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Wednesday, June 08, 2011
S1 S0 S1 D0 D1 D2 D3 S0 D0 D1 D2 D3
Block diagram Gate-level diagram
In Block diagrams: Circles on the input indicate the logic convention of the input signal Circles on the output indicate the physical configuration of the output gate
ElE 385 . Output S1 S0 S1 D0 D1 D2 D3 S0 D0 D1 D2 D3 Block diagram Gate-level diagram S1 S0 D0 L L L L H H H L H H H H D1 H L H H D2 H H L H D3 H H H L . A. June 08.A. 2011 2-into-4 decoder with P. Inputs and a N.Fall 2001 Wednesday.
output . June 08. A.ElE 385 . inputs and a N.Fall 2001 Wednesday. 2011 Logic Conventions are the Choice of the User a L L H H b L H L H f H H H L One or more inputs = LOW. A. the output is HIGH The output is HIGH only when both inputs are LOW 2-input Positive Active NAND 2-input AND with P.
June 08.ElE 385 .A.Fall 2001 Wednesday. Inputs and a N. A. Outputs S1(L) S0(L) S1 S0 Block diagram Gate-level diagram . 2011 2-into-4 decoder with N.
Fall 2001 Wednesday. Inputs and a N. June 08.A. Outputs S1(L) S0(L) S1 D3 D2 D1 D0 S0 D0 D1 D2 D3 Block diagram 00=HH Gate-level diagram S1 L L H H S0 L H L H D 0 H H H L D 1 H H L H D 2 H L H H D 3 L H H H . 2011 2-into-4 decoder with N.ElE 385 . A.
2011 2-into-4 Decoder with Enable S1 S0 EN S1 S0 EN(L) D0 D1 D2 D3 D0 D1 D2 D3 Block diagram EN S1 S0 D0 D1 D2 D3 H L L L L H L L L L H L L L L H L L L L L L L L H L L L H H L H H x x Gate-level diagram .Fall 2001 Wednesday.ElE 385 . June 08.
Fall 2001 Wednesday. the truth table is: in PA logic: I3 I2 I1 I0 S1 S0 I3 I2 I1 I0 S1 S0 L L L H L L 0 0 0 1 0 0 L L H L L H 0 0 1 0 0 1 L H L L H L 0 1 0 0 1 0 H L L L H H 1 0 0 0 1 1 Otherwise. .ElE 385 . a 16-row truth table is required (often called a priority encoder). June 08. 2011 I3 I2 I1 I0 S1 4-into-2 encoder S0 If it is assured that the input signals are decoded.
Reading for Tuesday. 2011 Homework for Tuesday. 2-5.) When more than one input is active. (That is. Use positiveactive logic for this problem. Aug. June 08. 8/28: Sections 2-3. 28 Due at 11 AM 1) Draw the gate-level diagram and block-diagram of a 2into-4 decoder with negative-active inputs and positiveactive outputs 2) Repeat problem 1 with a positive-active enable added 3) Find a minimum realization of a 4-into-2 priority encoder.ElE 385 . 2-6 . encode the lowest-numbered active input. 2-4. more than one of the input lines may be active at any given time.Fall 2001 Wednesday.