P. 1
robotprojects_ver7.5.4

robotprojects_ver7.5.4

|Views: 5,467|Likes:
Published by Adel Ashyap

More info:

Published by: Adel Ashyap on Jul 19, 2011
Copyright:Attribution Non-commercial

Availability:

Read on Scribd mobile: iPhone, iPad and Android.
download as PDF, TXT or read online from Scribd
See more
See less

05/30/2013

pdf

text

original

The procedure for building and testing the ADC0804 and DAC0808 system is given as
follows:

1. Assuming that the ADC0804 and DAC0808 circuits are tested and working
complete the digital circuit shown Figure 3.12 in the graphic editor. Compile and
save the circuit.
2. Power down the ADC0804 and DAC0808 circuits. Program the PLD with the
circuit in Figure 3.12.
3. Build the circuits in Figure 3.13 and Figure 3.14. Use a potentiometer to test the
ADC0804 and DAC0808 together. You should see 0V or 5V on the DAC’s
output when the pot is turn to its extremes.
4. Disconnect the potentiometer’s output from the ADC0804’s analog input. The
output of the function generator should now be connected to the ADC0804’s
analog input. Test the DAC0808 using the following sinusoidal sources: 100Hz,
500Hz, 1000Hz, 5000Hz, 15000Hz, 50000Hz, 200KHz, and 600KHz. Make sure
you apply the DC offset for all cases. Measure and print the waveforms showing
the frequencies and peak-to-peak amplitudes of each waveform using the
oscilloscope.
5. Have the instructor sign your work when done.

Figure 3.12. Digital circuit for the ADC0804 and DAC0808 system.

Wireless Projects, Version 7.5.3 - DEVRY Page 25

3/13/2006

25

Figure 3.13. Analog transmit circuitry.

Function Generator

Sinewave + 2.5V DC offset

8

From PLD pin 8

From PLD pin 5

From PLD pin 4

2

4

19

PLD pin 58 – D0

PLD pin 57 – D1

PLD pin 56 – D2

PLD pin 55 – D3

PLD pin 54 – D4

1

PLD pin 51 – D6

PLD pin 52 – D5

PLD pin 50 - D7

16

14

13

15

12

11

17

18

5

20

7

6

8

10

IC2
ADC0804

+Vin

-Vin

CS RD

WR

C1=150pF

R5=10K

INTR

To PLD pin 2

3

Notes:

PLD = Programmable Logic Device

PLD platform

3 Outputs

9 Inputs

PLD –
EMP7128SLC84

To Led 0 and DAC0808: PLD pin 25 – Y0
To Led 1 and DAC0808: PLD pin 24 – Y1
To Led 2 and DAC0808: PLD pin 22 – Y2
To Led 3 and DAC0808: PLD pin 21 – Y3
To Led 4 and DAC0808: PLD pin 20 – Y4
To Led 5 and DAC0808: PLD pin 18 – Y5
To Led 6 and DAC0808: PLD pin 17 – Y6
To Led 7 and DAC0808: PLD pin 16 – Y7

-

Wireless Projects, Version 7.5.3 - DEVRY Page 26

3/13/2006

26

Note: Can use any PLD.

Figure 3.14. Analog receive circuitry for DAC0808 chip.

PLD Pin 16

PLD Pin 17

PLD Pin 18

PLD Pin 20

PLD Pin 21

PLD Pin 22

PLD Pin 24

PLD Pin 25

13

Io

Rref=4.7kΩ

R=4.7kΩ

Rf=4.7kΩ

4

7

+12

-12

6

3

2

15

2

4

16

3

14

C=0.1µF

-12V

Vref=5V

+5V

y0 y1 y2 y3 y4 y5 y6 y7

A1
A2
A3
A4
A5
A6
A7
A8

5
6
7
8
9
10
11
12

DAC0808

Altera EMP7128SLC PLD

Counter
outputs

_

+

Vo=Io×Rf

741

Digital Design
See Figure 3.13.

4Mhz Clock input

PLD Pin 83

y[7..0]

Wireless Projects, Version 7.5.3 - DEVRY Page 27

3/13/2006

27

You're Reading a Free Preview

Download
scribd
/*********** DO NOT ALTER ANYTHING BELOW THIS LINE ! ************/ var s_code=s.t();if(s_code)document.write(s_code)//-->