Switched Capacitor DC-DC Converters: Topologies and Applications

Bill Tsang and Eddie Ng

Outline
Motivations Dickson s Charge Pump Other Various Charge Pumps Applications Conclusion

Motivations Inductorless On-chip integration Low cost High switching frequency Easy to implement (open-loop system) Fast transient but large ripple High efficiency but limited output power .

Vt .Ideal Dickson s Charge Pump(Phase 1) 2VDD-Vt VDD VDD-Vt VDD-Vt VDD Vo VDD-Vt C1 C2 C3 0 VDD clk clk_bar ‡ Clk=0. Clk_bar=VDD ‡ Finite diode voltage drops.

Ideal Dickson s Charge Pump(Phase 2) 3VDD-2Vt VDD VDD-Vt VDD Vo 2VDD-Vt 2VDD-2Vt VDD-Vt VDD 0 clk C1 C2 C3 clk_bar ‡ Clk=VDD. Clk_bar=0 ‡ Maximum voltage stress on diodes 2VDD-Vt => reliability issue ‡ Maximum voltage stress on capacitors VCn =n(VDD-Vt) => reliability issue .

Dickson s Charge Pump V2+ V2 V1+ V1 V1 ( th 1 VDD C clk C1 C 2 Vo C2 C C3 C1=C2=C3=C clk_bar (V ! VJ (V " Vth out C Io  C  C p f (C  C p ) (B dy effect c n e signific nt t l ter st ges) DD !  N * ((  t )  t   ¡ ¡   V2 ¡ .

Non-idealities Threshold voltage drop Vth ! Vtho  [Mos charge pumps for low-voltage operation] .

max ! ©  2 © ª ¸ F ¹ 2 ¹ º 2 F [An n-chip High-v lt ge gener t r circuit f r EEPROMs with p wer supply v lt ge el w 2V] .V BS 2 F  2 F Parasitic capacitor divider voltage drop Low conversion efficiency and pumping gain G ! V  V ! (V  V (V ) V2 2 1 tn 2 Limited maximum number of stages ¨ VDD  Vtho Vout.

Modified Switch VDD VDD S1 2VDD CTS clk clk ‡St tic Ch rge Tr nsfer Switches (CTS) ‡Elimin te tr nsist r thresh ld dr p ¢ ¢ D1 D1 ¢ .

Clk_bar=VDD: 1.Modified Dickson s Charge Pump #1 (NCP-1) 3 V V2 1 D1 V D2 1 2 3 VDD S1 clk clk_bar Con itions: 1. 3 To turn off transistor s2. Clk=V . Clk=0. 3 (V ¤ To turn on transistor s2. 2 (V. Vgs = 2(V £ 2. Vgs = 2(V ¥ ¥ ¥ C C1 C C2 C C3 ¥ C C4 2 * (V " Vt (V2 ) 2 * (V Vt (V1 ) ¥ ¦ ¦ S2 S3 S4 ¦ ¦ § V § ¦ ¦ § ¦ D3 D4 Vo ¦ C C5 im ossible .Clk_bar=0: 2.

Modified Dickson s Charge Pump #1 (NCP-1) Static Charge Transfer Switches (CTS) Better voltage pumping gain than diodes GV 2 ! V2  V1 ! (V Lower voltage equals upper voltage of pervious stage Utilizing higher voltage from following stage to drive CTS Reverse charge sharing since CTS cannot turn off completely .

Modified Switch #2 D1 S1 MN1 used to turn off MS1 MN1 MP1 MP1 used to turn on MS1 Next st ge clk ‡ Elimin te tr nsist r thresh ld dr p ‡ Complete turn-off of switch. S1 .

Clk To turn on tr nsistor MN2 nd turn off M 2. v3+(V ¨ To turn on tr nsistor MP2 nd M 2.Modified Dickson s Charge Pump #2 (NCP-2) V V 1 2 S1 S2 S3 2 2 C clk C1 C C2 C clk_bar Conditions: 1.v3 2. Vgs = 2(V  r=VDD: v1. Vgs = 2(V  ©    D1 D2    ©       ©  V D3 3 C3 2 * (V " Vtp 2 * (V " Vt (V2 ) 2 * (V " Vt (V1 ) . Clk=0. v2+(V. Clk=Vdd.Clk r=0: v2.

Complete Circuit(NCP-2) dV dV dV M D1 v1 M D2 v2 M D3 v3 Vo M D4 M 1 M 2 M 3 M 4 M N2 M P2 Cp clk C1 Cp C2 Cp C3 clk r ‡Careful PMO well connection to prevent latch-up ‡Diode-connected output stage used      q Cp Cp C4 C5 .

Modified Dickson s Charge Pump #3 (NCP-3) NCP-3 uses boosted clock at output stage V V Vi S1 S2 S3 C C clk C1 C C2 C C3 C4 clk_bar %&% $ ! " " " D1 D2 D3 S4 " " # # " # " " V D4 Vo C5 V Clock G rator clk .

Converters Output Voltage Results .

Optimum Capacitance Selection (V ! VDD i i  p  I out f( i p) Vout ! VDD  N * (V p out Ctot ! * Ci .

C  C .

V ! i V CiV  I out / f Ci 2 C .

.

xCtot .

Ci  C p CiVDD  I out / f  Ci .

i  C p VDD (Vout  VDD ) ! 2 xCi .

min [A Low-Ripple witched-Capacitor DC-DC Up converter for Low-voltage applications] .CiVDD  I out / f ¨ I out I out !  © ©V f VDD f ª DD ¸ C p I out ¹  ¹ V f º DD 2 Ci .

Rds(on). ESR.Efficiency and Output Impedance Power loss due to: Vth. etc Efficiency estimation Vout L! M *Vin M=ideal conversion ratio [Performance limits of switched-capacitor DC-DC Converter] Output impedance (slow switching) [Performance limits of switched-capacitor DC-DC Converter] i Ts Ts=switching period Xi= parasitic time constant q=charge supplied to the source Vout Ro ! 1  Vout ! q Ts fC . Cp.

Cross-Coupled Charge Pump 2Vdd L Vo ! L  ds ( o Vripple IL ! 2f ¨ 1 ©  © ª L VDD M10 M9 ) 1 1 ¸ ¹ ¹ L º 1 C1 RL Vo (Vo « 1 » ! ¬ sC1  sC L  ¼ RL ½ (I L ­ CL1 C2 phi2 phi1 ‡ PMO to transmit 2VDD to output ‡ Bodies tied to source(highest voltage) to avoid forward iasing junction diodes [Area-efficient CMO Charge Pumps for LCD Drivers] .

H-bridge Topology 1 Commercial products (Linear Technology. Fairchild. Maxim ) Buck or Boost 3 functions Negative voltage generation 2 4 Oscillator and Control .

5 Vin .H-bridge Topologies Vin 1 2 Phase 1: transistors in re are on Phase 2: transistors in blue are on 3 Vin 4 Vout 1 2 phi1 phi2 oubler phi2 phi1 Vout = 2Vin Vout Vin 1 4 Vout 2 3 Vin phi1 phi2 inverter phi2 phi1 3 Vin 4 Vout = -Vin phi2 phi1 Splitter phi2 phi1 Vout = 0.

Application (1): Flash Memory Floating gate programming Control gate voltage >> Vdd [ee141 lecture] .

Application (1): Flash Memory Nominal VDD= 5V .

Application (2): Sample Switches vic phi2d Vi+ phi1d Cs phi2 + OTA Cs phi2 CL phi2d vic phi1 vic Ci + VoVo+ vic phi1 VDD M9 M10 A M8 M7 Voltage doubler C1 C2 C3 Phi M9 M6 Phi_bar Vin ' ' S/H circuit constant vgs sampling with all input level Reduces distortion Reduces Rds(on) phi1d Vi- ' Ci CL ' Phi_bar M4 M5 M3 M2 M1 M11 Vo VSS .

Application (3): Low voltage Amplifier Positive zero in Miller compensation 1/gm pole-zero cancellation [charge-pump assisted low-power/low-voltage CMOS Opamp Design] VDD Charge pump V+ V- >2VGS .

LCD driver . ADC.Conclusion Different Dickson s SC converters discussed Optimal Capacitor size selection Discussion of cross-coupled doublers Commercial product: Full H-bridge Applications: Flash. Amplifier.