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ENC28J60

ENC28J60

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Published by: Shailesh Prasad on Sep 07, 2011
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02/01/2014

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The Bit Field Clear (BFC) command is used to clear up
to 8 bits in any of the ETH Control registers. Note that
this command cannot be used on the MAC registers,
MII registers, PHY registers or buffer memory. The BFC
command uses the provided data byte to perform a bit-
wise NOTAND operation on the addressed register
contents. As an example, if a register had the contents
of F1h and the BFC command was executed with an
operand of 17h, then the register would be changed to
have the contents of E0h.

The BFC command is started by lowering the CS pin.
The BFC opcode should then be sent, followed by a
5-bit address (A4 through A0). The 5-bit address
identifies any of the ETH registers in the current bank.
After the BFC command and address are sent, a data
byte containing the bit field clear information should
be sent, MSb first. The supplied data will be logically
inverted and subsequently ANDed to the contents of
the addressed register on the rising edge of the SCK
line for the D0 bit.

The BFC operation is terminated by bringing the CS
pin high. If CS is brought high before eight bits are
loaded, the operation will be aborted for that data
byte.

FIGURE 4-6:

WRITE BUFFER MEMORY COMMAND SEQUENCE

SO

SI

SCK

CS

0

2

3

4

5

6

7

8

910111213141516171819202122

1

0

0

1

1

1

1

0

7

6

5

4

1D07

6

5

4

3

2

1

0

23

3

2

1

Data Byte 0

Data Byte 1

Opcode

Address

High-Impedance State

ENC28J60

DS39662B-page 30

Preliminary

© 2006 Microchip Technology Inc.

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