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5

VITAS Block Diagram

Project code :
91.4I501.001
PCB P/N : 07263
Revision : SC

Intel CPU
D

INPUTS

OUTPUTS

+5VALW

VGA_CORE_S0 42

+5VALW

DCBATOUT

+3VALW
+3VL

38

SYSTEM DC/DC

APL5913

4X64MB
DDRII 47,48

OUTPUTS

INPUTS

SYSTEM DC/DC
3,4,5

16

TPA51125

SC421A

Penryn SV

Clock Generator
ICS9LPRS355

SYSTEM DC/DC

VGA DC/DC

TPS51116

INPUTS

OUTPUTS

+1.8V

+1.1VS

INPUTS

OUTPUTS

42

FSB
800/1066MHz

+0.9VS

DCBATOUT

+1.8V

39

14

DDRII
Slot 0
667/800
12

Cantiga-PM
AGTL+ CPU I/F

DDRII
667/800

Slot 1

CRT
1600X1200@75

RGB CRT
DDRII 667/800 Channel A

nVIDIA

DDR I/F

LVDS(Dual Channel)

INTEGRATED GRAHPICS

DDR II 667/800 Channel B

NB9M-GE

PCIE x 16

LVDS, CRT I/F

13

LCD
WXGA+

SYSTEM DC/DC
SC412A

15

44,45,46

HDMI

6,7,8,9,10,11

HDMI

INPUTS

OUTPUTS

+5VALW

+1.05V

40

MAXIM CHARGER

26

MAX8731

DMIx4

C-LINK
WEBCAM

INPUTS

OUTPUTS
BT+

DCBATOUT

18V 3.0A

15

SD/MMC
MS/MS Pro/xD

Realtek
RTS5158

25

RJ45
CONN
27

USB 2.0

INTEL

BLUETOOTH
USB 2.0

ISL6260CCRZ

USB x 3

INPUTS

22

Realtek
RTL8101-GR
10/100
23

PCIE

12 USB 2.0/1.1 ports


ETHERNET (10/100/1000Mb)

SATA

High Definition Audio

RJ11
CONN

HDD

DCBATOUT

22

ODD

ACPI 1.1

22

LPC I/F

LPC Bus

28

LINE OUT

KBC
PCIE+USB 2.0

MIC IN
INTERNAL MIC

WPCE775L

Flash ROM
2MB

26

29

32

Touch
PAD
31

OUTPUTS

L2:

GND

+1.5VS

41

L3:

Signal 2

L4:

Signal 3

L5:

VCC

L6:

Signal 4

L7:

GND

L8:

Signal 5

Thermal
& Fan
GMT G7921
24

31

Signal 1

+1.8VS

30

Int.
KB

L1:

INPUTS

WINBOND

SPI

Mini-Card
802.11a/b/g/n

OP AMP
GMT G1431
A

G972

17,18,19,20,21

28

PCB LAYER

SYSTEM DC/DC

PCI/PCI BRIDGE

HD AUDIO
CODEC
CX20561-14Z

0.844~1.3V
22A
36,37

6 PCIE ports
HD AUDIO

OUTPUTS
+VCC_CORE

4 SATA ports

AMOM
MODEM
CX20548-11Z

34

CPU DC/DC

22

ICH9-M

25

5V 100mA

<Core Design>

2CH SPEAKER

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Block Diagram
Size
A3

Document Number

Date: Monday, May 05, 2008


5

Rev

SA

VITAS
Sheet
1

of

48

ICH9M Functional Strap Definitions

Rev.1.5

page 92

Usage/When Sampled

HDA_SDOUT

XOR Chain Entrance/


Allows entrance to XOR Chain testing when TP3
PCIE Port Config1 bit1, pulled low. When TP3 not pulled low at rising edge
Rising Edge of PWROK.
of PWROK, sets bit1 of RPC.PC (Cofig Registers:
offset 224h). This signal has weak internal
pull-down.

ICH9 EDS 642879

SIGNAL

PULL-UP 20K

CFG[2:0]

CL_DATA[1:0]

PULL-UP 20K

CL_RST0#

PULL-UP 20K

FSB Frequency Select 000 = FSB1067


011 = FSB667
010 = FSB800
others = Reserved

DPRSLPVR/GPIO16

PULL-DOWN 20K

PCIE config2 bit2,


Rising Edge of PWROK.

This signal has a weak internal pull-up.


Sets bit2 of PRC.PC2 (Config Registers: Offset
224h).

GPIO20

Reserved.

This signal should not be pulled high.

GNT1#/
GPIO51

ESI Strap (Server Only) ESI compatible mode is for server platforms only.
Rising Edge of PWROK.
This signal should not be pulled low for desktop
and mobile.

HDA_SYNC

GNT3#/
GPIO55

Top-Block Swap
override. Rising Edge
of PWROK.

Sampled low: Top-Block Swap mode (inverts A16 for


all cycles targeting FWH BIOS space).
Note: Software will not be able to clear the
Top-Swap bit until the system is rebooted
without GNT3# being pulled down.

GLAN_DOCK#

GNT0#:
SPI_CS1#/
GPIO58

Boot BIOS Destination


Selection 0:1.
Rising Edge of PWROK.

Controllable via Boot BIOS Destination bit


(Config Registers: Offset 3410h:bit 11:10).
GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC

GNT[3:0]#/GPIO[55,53,51]

PULL-UP 20K

GPIO20

PULL-DOWN 20K

GPIO49

PULL-UP 20K

LDA[3:0]#/FHW[3:0]#

PULL-UP 20K

LAN_RXD[2:0]

PULL-UP 20K

LDRQ[0]

PULL-UP 20K

LDRQ[1]/GPIO23

PULL-UP 20K

PME#

PULL-UP 20K

PWRBTN#

PULL-UP 20K

SATALED#

PULL-UP 15K

SPI_CS1#/GPIO58/CLGPIO6

PULL-UP 20K

SPI_MOSI

PULL-DOWN 20K

SPI_MISO

PULL-UP 20K

SPKR

PULL-DOWN 20K

TACH_[3:0]

PULL-UP 20K

TP[3]

PULL-UP 20K

USB[11:0][P,N]

PULL-DOWN 15K

DMI Termination
Voltage. Rising Edge
of CLPWROK.

The signal is required to be low for desktop


applications and required to be high for mobile
applications.

SATALED#

PCI Express Lane


Reversal. Rising Edge
of PWROK.

Signal has weak internal pull-up. Sets bit 27


of MPC.LR (Device 28: Function 0:Offset D8).

No Reboot.
Rising Edge of PWROK.

If sampled high, the system is strapped to the


"No Reboot" mode (ICH9 will disable the TCO Timer
system reboot feature). The status is readable
via the NO REBOOT bit.

TP3
GPIO33/
HDA_DOCK
_EN#

XOR Chain Entrance.


Rising Edge of PWROK.
Flash Descriptor
Security Override
Strap. Rising Edge of
PWROK.

This signal should not be pull low unless using


XOR Chain testing.
Sampled low: the Flash Descriptor Security will be
overridden. If high, the security measures will be
in effect. This should only be enabled in
manufacturing environments using an external
pull-up resister.

Montevina Platform Design guide 22339 0.5

CL_CLK[1:0]

GNT2#/
GPIO53

GPIO49

Rev.1.5

Strap Description

This signal has a weak internal pull-down.


Sets bit0 of PRC.PC (Config Registers: Offset
224h).

Integrated TPM Enable, Sample low: the Integrated TPM will be disable.
Rising Edge of CLPWROK. Sample high: the MCH TPM enable strap is sampled
low and the TPM Disable bit is clear, the
Integrated TPM will be enable.

Pin Name

PCIE config1 bit0,


Rising Edge of PWROK.

SPI_MOSI

Cantiga chipset and ICH9M I/O controller


Hub strapping configuration

Resistor Type/Value

HDA_SYNC

SPKR

ICH9 EDS 642879


Comment

Signal

ICH9 Integrated pull-up


and pull-down Resistors

page 218

Configuration

ENERGY_DETECT

PULL-UP 20K

CFG[4:3]
Reserved
CFG8
CFG[15:14]
CFG[18:17]

HDA_BIT_CLK

PULL-DOWN 20K

CFG5

DMI x2 Select

HDA_DOCK_EN#/GPIO33

PULL-UP 20K

0 = DMI x2
1 = DMI x4 (Default)

HDA_RST#

PULL-DOWN 20K

CFG6

iTPM Host Interface

0 = The iTPM Host Interface is enabled (Note 2)


1 = The iTPM Host Interface is disabled (default)

HDA_SDIN[3:0]

PULL-DOWN 20K

CFG7

HDA_SDOUT

PULL-DOWN 20K

Intel Management
engine crypto strap

0 = Transport Layer Security (TLS) cipher


suite with no confidentiality
1 = TLS cipher suite with confidentiality(Default)

PULL-DOWN 20K

CFG9

PCIE Graphics Lane

The pull-up or pull-down


active when configured
for native GLAN_DOCK#
functionality and determined
by LAN controller.

0 = Reserved Lanes, 15->0, 14->1 ect..


1 = Normal operation (Default): Lane Numbered in
Order

CFG10

PCIE Loopback enable 0 = Enable (Note 3)


1 = Disable (Default)

CFG[13:12] XOR/ALL

00
10
01
11

=
=
=
=

CFG16

FSB Dynamic ODT

0 = Dynamic ODT Disabled


1 = Dynamic ODT Enabled (Default)

CFG19

DMI Lane Reversal

0 = Normal operation (Default): Lane Numbered in


Order
1 = Reverse Lanes
DMI x4 mode [MCH->ICH]: (3->0, 2->1, 1->2 and 0->3)
DMI x2 mode [MCH->ICH]: (3->0, 2->1)

CFG20

Digital Display Port 0 = Only Digital Display Port or PCIE is


operational (Default)
(SDVO/DP/iHDMI)
display Port and PCIe are operating
Concurrent with PCIe 1 = Digital
simulataneously via the PEG port

SDVO
SDVO Present
0 =
1 =
_CTRLDATA
L_DDC_DATA Local Flat Panel (LFP)
0 =
1 =
Present

Reserve
XOR mode Enabled
ALLZ mode Enable (Note 3)
Disabled (Default)

No SDVO Card Present (Default)


SDVO Card Present
LFP Disabled (Default)
LFP Card Present; PCIE disabled

NOTE:
1. All strap signals are sampled with respect to the leading edge of the (G)MCH
Power OK (PWROK) signal.
2. iTPM can be disabled by a 'Soft-Strap' option in the Flash-decriptor section of
the Firmware. This 'Soft-Strap' is activated only after enabling iTPM via CFG6.
Only one of the CFG10/CFG12/CFG13 straps can be enabled at any time.

SMBus
PCIE Routing page 19

LANE1

LAN

LANE2

MiniCard WLAN

USB Table

page 19

Thermal

USB

Pair
0
1
2
3
4
5
6
7
8
9
10
11

Device
USB3
FREE
External USB3
FREE
External USB2
FREE
WLAN
BLUETOOTH
CARD_READER
FREE
CAMERA
FREE

KBC
BATTERY

MINI

<Core Design>

ICH9M

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Clock
Generator

Table of Content
Size
A3

Document Number

Date: Monday, May 05, 2008

Rev

SA

VITAS
Sheet

of

48

5
H_A#[35..3]

H_A20M#
H_FERR#
H_IGNNE#

A6
A5
C4

A20M#
FERR#
IGNNE#

D5
C6
B4
A3

STPCLK#
LINT0
LINT1
SMI#

H_STPCLK#
18
H_INTR
18
H_NMI
18
H_SMI#

TEST7

TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30
TPAD30

TP65
TP61
TP66
TP64
TP73
TP70
TP69
TP59
TP72
TP60
TP74

RSVD_CPU_1
RSVD_CPU_2
RSVD_CPU_3
RSVD_CPU_4
RSVD_CPU_5
RSVD_CPU_6
RSVD_CPU_7
RSVD_CPU_8
RSVD_CPU_9
RSVD_CPU_10
RSVD_CPU_11

M4
N5
T2
V3
B2
C3
D2
D22
D3
F6
B1

H_ADS#
H_BNR#
H_BPRI#

H5
F21
E1

H_DEFER# 6
H_DRDY# 6
H_DBSY# 6

6
6
6

+1.05VS

D
1

CONTROL

H1
E2
G5

BR0#
IERR#
INIT#

F1

H_BREQ#0 6
56R2J-4-GP
2 R49 +1.05VS
D20 CPU_IERR# 1
B3
H_INIT#
18

DY

R338
51R2F-2-GP

A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#
ADSTB1#

LOCK#

H4

RESET#
RS0#
RS1#
RS2#
TRDY#

C1
F3
F4
G3
G2

HIT#
HITM#

G6
E4

BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#

H_LOCK#

6
H_CPURST# 6
H_RS#[2..0]

H_RS#0
H_RS#1
H_RS#2

H_TRDY# 6
H_HIT#
H_HITM#

1218

6
6

XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_DBRESET#_R

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20

H_THERMDA, H_THERMDC routing together,


Trace width / Spacing = 10 / 10 mil
Connect to V Core

PROCHOT#
THRMDA
THRMDC
THERMTRIP#

HCLK

RSVD#M4
RSVD#N5
RSVD#T2
RSVD#V3
RSVD#B2
RSVD#C3
RSVD#D2
RSVD#D22
RSVD#D3
RSVD#F6

BCLK0
BCLK1

4/23 Houston
CPU_PROCHOT#_R

THERMAL

ICH

18

DEFER#
DRDY#
DBSY#

XDP/ITP SIGNALS

H_ADSTB#1

Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1

18
18
18

ADS#
BNR#
BPRI#

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#

ADDR GROUP 1

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_REQ#0 K3
H_REQ#1 H2
H_REQ#2 K2
H_REQ#3 J3
H_REQ#4 L1

A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
ADSTB0#

R47

D21
A24
B25

68R2-GP

36

+1.05VS
H_THERMDA 24
H_THERMDC 24

C7

PM_THRMTRIP-A# 7,18

A22
A21

ITP Connector

CLK_CPU_BCLK 16
CLK_CPU_BCLK# 16
PM_THRMTRIP#
should connect to
ICH9 and MCH
without T-ing
( No stub)

RESERVED

H_ADSTB#0
H_REQ#[4..0]

J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1

ADDR GROUP 0

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
6
6

Reserve for ITP, when


install ITP connector,
install R338.

U65A 1 OF 4

+1.05VS

1012 DB
C271

DY
1012 DB

SCD1U16V2KX-3GP

0R2J-2-GP
2
1

H_A#[35..3]

Reserve for ITP


R97

DY
ITP1

29
1

+1.05VS

KEY_NC

ITP_VDD

BGA479-SKT6-GPU6

62.10079.001
1012 DB
H_CPURST#
+3VS
R72
XDP_DBRESET#_R

1
R96

DY

2 H_RESET#_R
1KR2J-1-GP

16 CLK_CPU_XDP#
XDP_TMS

30
2

3
5
7
9
11
13
15
17
19
21
23
25
27

4
6
8
10
12
14
16
18
20
22
24
26
28
32

2
31

+1.05VS

R73
XDP_DBRESET#_R 1
XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_TCK
XDP_TDO_R 1
XDP_TCK
XDP_TRST#
XDP_TDI

2 0R2J-2-GP

DY
1
1
1

DY

2 R80

XDP_DBRESET#

2 R74
2 R75
2 R76

DY
DY
DY

XDP_DBRESET# 19

0R2J-2-GP
0R2J-2-GP
0R2J-2-GP

MCH_CLKSEL2 7,16
MCH_CLKSEL1 7,16
MCH_CLKSEL0 7,16

CLK_CPU_XDP 16

0R2J-2-GP XDP_TDO

1012 DB

1KR2J-1-GP
+1.05VS

MLX-CONN28A-4-GP

DY
XDP_TDI

R84

54D9R2F-L1-GP

XDP_TMS

R71

54D9R2F-L1-GP

XDP_TDO

R79

54D9R2F-L1-GP

XDP_BPM#5

R77

54D9R2F-L1-GP

(Place
<Core Design>

R310 with in 200ps (~1") to CPU

Wistron Corporation
XDP_TRST#

R83

54D9R2F-L1-GP

XDP_TCK

R82

54D9R2F-L1-GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

CPU (1 of 2)
Size

Document Number

Rev

VITAS
Date: Monday, May 05, 2008

SA
Sheet

of

48

2
H_DINV#[3..0]
H_DSTBN#[3..0]
H_DSTBP#[3..0]
H_D#[63..0]

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DSTBP#[3..0]

H_D#[63..0]

D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
DSTBN1#
DSTBP1#
DINV1#

C
Layout notes
Z= 55 Ohm 0.5" MAX for GTLREF

+1.05VS
6
6
6

1KR2F-3-GP
R362

H_DSTBN#1
H_DSTBP#1
H_DINV#1

AD26
C23
D25
C24
AF26
CPU_TEST5 AF1
A26

TEST1
TEST2
CPU_TEST3

1 1

CPU_GTLREF0

R363
2KR2F-3-GP

DY

C508
SC1KP50V2KX-1GP

16
16
16

B22
B23
C21

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6

DATA GRP3

H_D#16 N22
H_D#17 K25
H_D#18 P26
H_D#19 R23
H_D#20 L23
H_D#21 M24
H_D#22 L22
H_D#23 M23
H_D#24 P25
H_D#25 P23
H_D#26 P22
H_D#27 T24
H_D#28 R24
H_D#29 L25
H_D#30 T25
H_D#31 N25
L26
M26
N24

6 H_DSTBN#0
6 H_DSTBP#0
6 H_DINV#0

DATA GRP1

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
DSTBN0#
DSTBP0#
DINV0#

DATA GRP0

E22
F24
E26
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25

DATA GRP2

U65B 2 OF 4
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15

MISC

BSEL0
BSEL1
BSEL2

D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
DSTBN2#
DSTBP2#
DINV2#

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47

D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN3#
DSTBP3#
DINV3#

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

COMP0
COMP1
COMP2
COMP3

R26
U26
AA1
Y1

DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#

E5
B5
D24
D6
D7
AE6

H_DSTBN#2 6
H_DSTBP#2 6
H_DINV#2 6

H_DSTBN#3 6
H_DSTBP#3 6
H_DINV#3 6
COMP0
COMP1
COMP2
COMP3

R360 1
R361 1
R78 1
R81 1

2
2
2
2

27D4R2F-L1-GP
54D9R2F-L1-GP
27D4R2F-L1-GP
54D9R2F-L1-GP

H_DPRSTP# 7,18,36
H_DPSLP# 18
H_DPWR# 6
H_PWRGD 18
H_CPUSLP# 6
PSI#
36
Connect to V Core

R39
1KR2J-1-GP

BGA479-SKT6-GPU6

DY

1
R359

DY

TEST1
1KR2J-1-GP

TEST2
1KR2J-1-GP

1
R43

DY DY

R70
1KR2J-1-GP

Layout Note:
Comp0, 2 connect with Zo=27.4 ohm, make
trace length shorter than 0.5" .
Comp1, 3 connect with Zo=55 ohm, make
trace length shorter than 0.5" .

Route the TEST3 and TEST5 signals through


a ground referenced Zo = 55-ohm trace
that ends in a via that is near a GND via
and is accessible through an oscilloscope connection.

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CPU (3 of 2 )
Size

Document Number

Rev

VITAS
Date: Monday, May 05, 2008

SA
Sheet

of

48

+VCC_CORE

0128 DB

C158

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

C184

C183
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

0128 DB

VCCA
VCCA

B26
C26

VID0
VID1
VID2
VID3
VID4
VID5
VID6

AD6
AF5
AE5
AF4
AE3
AF3
AE2

VCCSENSE

AF7

VCC_SENSE 36

VSSSENSE

AE7

VSS_SENSE 36

1
2

1
2

1
2

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

DY

1
2

1
2

Please these outside socket


cavity on L8(South side Secondary)

C179
SC22U6D3V5MX-2GP

DY

C546
SC22U6D3V5MX-2GP

C545
SC22U6D3V5MX-2GP

C160
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

C153

C133
SC22U6D3V5MX-2GP

C115

C127
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

Please these inside socket


cavity on L8(North side Primary)

0128 DB

+1.05VS

C119

DY
2

DY

+VCC_CORE

C611
SC22U6D3V5MX-2GP

+VCC_CORE

C606
SC22U6D3V5MX-2GP

DY

SC22U6D3V5MX-2GP

DY

C586

C616
SC22U6D3V5MX-2GP

C114

0128 DB

VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP

Please these inside socket


cavity on L8(South side Primary)

1
2

1
2

SCD01U16V2KX-3GP

1
2

1
2

1
2

Layout Note:
Place as close as possible to the CPU VCCA pin.

Connect to V Core

Layout Note:
VCCSENSE and VSSSENSE lines
should be of equal length.

C107

CPU_GND1
TP67

NCTF PIN
CPU_GND2
CPU_GND3

TP166
TP71

CPU_GND4
TP165

C106
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C192

C105

C189

C190
SCD1U10V2KX-4GP

Please these inside socket


cavity on L8(North side Secondary)

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

+1.05VS

Layout Note:
Provide a test point (with
no stub) to connect a
differential probe
between VCCSENSE and
VSSSENSE at the location
where the two 54.9ohm
resistors terminate the
55 ohm transmission line.

4 OF 4

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

BGA479-SKT6-GPU6

R397

100R2F-L1-GP-U

SC10U6D3V5MX-3GP

C118

0429 PV

C503

R395

100R2F-L1-GP-U

C507

C126

SC22U6D3V5MX-2GP

36

C132

SC22U6D3V5MX-2GP

+VCC_CORE

1
2
0R0603-PAD

C152

SC22U6D3V5MX-2GP

H_VID[6..0]

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6

R356

C159

DY

SC22U6D3V5MX-2GP

+1.5VS
+1.5V_VCCA_S0

C178

SC22U6D3V5MX-2GP

layout note: "1D5V_VCCA_S0"


as short as possible

0128 DB

0128 DB

TC3
ST220U2D5VBM-LGP

DY

+VCC_CORE

SC22U6D3V5MX-2GP

BGA479-SKT6-GPU6

C157

DY
2

DY
2

1
2

1
2

DY DY

A4
A8
A11
A14
A16
A19
A23
AF2
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3

+VCC_CORE

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

SC22U6D3V5MX-2GP

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

U65D

C551
SC22U6D3V5MX-2GP

C562
SC22U6D3V5MX-2GP

C587
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

C607

DY

SC22U6D3V5MX-2GP

C612

DY

SC22U6D3V5MX-2GP

DY

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

C617

Please these inside socket cavity on L8(South side Secondary)

U65C 3 OF 4

C550

DY DY

+VCC_CORE

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

C561

A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18

Please these outside socket


cavity on L8(North side Secondary)

0128 DB

+VCC_CORE

Please these inside socket


cavity on L8(North side Secondary)

+VCC_CORE

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CPU (3 of 3 )
Size

Document Number

Rev

VITAS
Date: Monday, May 05, 2008
5

SA
Sheet
1

of

48

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

+1.05VS

H_SWING routing Trace width and


Spacing use 10 / 20 mil

R329
221R2F-2-GP

H_SWING Resistors and


Capacitors close MCH
500 mil ( MAX )

1
R330
100R2F-L1-GP-U

1
2

C483
SCD1U10V2KX-4GP

H_SWING

H_RCOMP routing Trace width and


Spacing use 10 / 20 mil
1
R325

2 H_RCOMP
24D9R2F-L-GP

Place them near to the chip ( < 0.5")

H_SWING
H_RCOMP

C5
E3

H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63

H_SWING
H_RCOMP

+1.05VS

F2
G8
F8
E6
G2
H6
H2
F6
D4
H3
M9
M11
J1
J2
N12
J6
P2
L2
R2
N9
L6
M5
J3
N2
R1
N5
N6
P13
N8
L7
N10
M3
Y3
AD14
Y6
Y10
Y12
Y14
Y7
W2
AA8
Y9
AA13
AA9
AA11
AD11
AD10
AD13
AE12
AE9
AA2
AD8
AA3
AD3
AD7
AE14
AF3
AC1
AE3
AC3
AE11
AE8
AG2
AD6

HOST

H_D#[63..0]

H_D#[63..0]

3
4

R335
1KR2F-3-GP

1
2

DY C487

H_CPURST#
H_CPUSLP#
H_AVREF
H_DVREF

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35

A14
C15
F16
H13
C18
M16
J13
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
B18
K17
B20
F21
K21
L20

H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#

H12
B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9
H9
E12
H11
C9

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

J8
L3
Y13
Y1

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

L10
M7
AA5
AE6

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

L9
M8
AA6
AE5

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

B15
K13
F13
B13
B14

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#_0
H_RS#_1
H_RS#_2

B6
F12
C8

H_RS#0
H_RS#1
H_RS#2

H_A#[35..3]

H_ADS#
3
H_ADSTB#0 3
H_ADSTB#1 3
H_BNR#
3
H_BPRI# 3
H_BREQ#0 3
H_DEFER# 3
H_DBSY# 3
CLK_MCH_BCLK 16
CLK_MCH_BCLK# 16
H_DPWR# 4
H_DRDY# 3
H_HIT#
3
H_HITM# 3
H_LOCK# 3
H_TRDY# 3

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DSTBP#[3..0]

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DSTBP#[3..0]

H_REQ#[4..0]

H_RS#[2..0]

CANTIGA-GM-GP-U-NF

SCD1U16V2ZY-2GP

1
2

C12
E11
A11
B11

H_AVREF H_AVREF

R333
2KR2F-3-GP

H_CPURST#
H_CPUSLP#

H_A#[35..3]

1 OF 10

U57A
4

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

Cantiga (1 of 6)

Document Number

Date: Monday, May 05, 2008

VITAS

Rev

SA
Sheet

of

48

M_RCOMPP

2 2K21R2F-GP CFG6

DY

2 2K21R2F-GP

DY

2 2K21R2F-GP CFG7

R347 1

DY

2 2K21R2F-GP CFG8

R349 1

DY

2 4K02R2F-GP CFG9

BG48
BF48
BD48
BC48
BH47
BG47
BE47
BH46
BF46
BG45
BH44
BH43
BH6
BH5
BG4
BH3
BF3
BH2
BG2
BE2
BG1
BF1
BD1
BC1
F1
A47

CFG12

DY

2 2K21R2F-GP

R24

DY

2 2K21R2F-GP CFG13

DY

2 2K21R2F-GP CFG16

R352 1

DY

2 2K21R2F-GP CFG10

3,18 PM_THRMTRIP-A#
19,36 PM_DPRSLPVR
Connect to V Core

DMI Lane Reversal


MCH_CFG_19
Low = Normal (default)
High = Lanes Reversed
Cantiga = 2.2K

PCI Express Graphics Lane


MCH_CFG_9
Low = Normal (default)

SM_REXT

499R2F-2-GP
2

Use DDR3 need enable

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

AE40
AE38
AE48
AH40

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

AE35
AE43
AE46
AH42

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

AD35
AE44
AF46
AH43

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

B33
B32
G33
F33
E33

GFX_VR_EN

C34

R48
1KR2F-3-GP

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

19
19
19
19

DMI_TXP0 19
DMI_TXP1 19
DMI_TXP2 19
DMI_TXP3 19
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

H48
D45
F40
B40

LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3

A41
H38
G37
J37

LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3

B42
G38
F37
K37

LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
LVDSB_DATA_3

F25
H25
K25

TVA_DAC
TVB_DAC
TVC_DAC

H24

TV_RTN

C31
E32

TV_DCONSEL_0
TV_DCONSEL_1

1218

AE41
AE37
AE47
AH39

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4

DY

CLK_MCH_3GPLL 16
CLK_MCH_3GPLL# 16

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA#_3

19
19
19
19

DMI_RXP0 19
DMI_RXP1 19
DMI_RXP2 19
DMI_RXP3 19

E28

CRT_BLUE

G28

CRT_GREEN

J28

CRT_RED

G29

CRT_IRTN

H32
J32
J29
E29
L29

CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC

+1.05VS

AH37
AH36
AN36
AJ35
AH34

CL_CLK0 19
CL_DATA0 19
M_PWROK
19
CL_RST#0
19

MCH_CLVREF

GRAPHICS

R3431

H47
E46
G40
A40

DMI

NC#BG48
NC#BF48
NC#BD48
NC#BC48
NC#BH47
NC#BG47
NC#BE47
NC#BH46
NC#BF46
NC#BG45
NC#BH44
NC#BH43
NC#BH6
NC#BH5
NC#BG4
NC#BH3
NC#BF3
NC#BH2
NC#BG2
NC#BE2
NC#BG1
NC#BF1
NC#BD1
NC#BC1
NC#F1
NC#A47

AV42
AR36
BF17
BC36

CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF

DY

T37
T36

PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

H44
J46
L44
L40
N41
P48
N44
T43
U43
Y43
Y48
Y36
AA43
AD37
AC47
AD39

PEG_RXN0 44
PEG_RXN1 44
PEG_RXN2 44
PEG_RXN3 44
PEG_RXN4 44
PEG_RXN5 44
PEG_RXN6 44
PEG_RXN7 44
PEG_RXN8 44
PEG_RXN9 44
PEG_RXN10 44
PEG_RXN11 44
PEG_RXN12 44
PEG_RXN13 44
PEG_RXN14 44
PEG_RXN15 44

PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8
PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15

H43
J44
L43
L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40

PEG_RXP0 44
PEG_RXP1 44
PEG_RXP2 44
PEG_RXP3 44
PEG_RXP4 44
PEG_RXP5 44
PEG_RXP6 44
PEG_RXP7 44
PEG_RXP8 44
PEG_RXP9 44
PEG_RXP10 44
PEG_RXP11 44
PEG_RXP12 44
PEG_RXP13 44
PEG_RXP14 44
PEG_RXP15 44

PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15

J41
M46
M47
M40
M42
R48
N38
T40
U37
U40
Y40
AA46
AA37
AA40
AD43
AC46

TXN0
TXN1
TXN2
TXN3
TXN4
TXN5
TXN6
TXN7
TXN8
TXN9
TXN10
TXN11
TXN12
TXN13
TXN14
TXN15

C603
C578
C601
C576
C599
C574
C597
C572
C596
C570
C593
C569
C592
C566
C589
C581

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

PEG_TXN0 44
PEG_TXN1 44
PEG_TXN2 44
PEG_TXN3 44
PEG_TXN4 44
PEG_TXN5 44
PEG_TXN6 44
PEG_TXN7 44
PEG_TXN8 44
PEG_TXN9 44
PEG_TXN10 44
PEG_TXN11 44
PEG_TXN12 44
PEG_TXN13 44
PEG_TXN14 44
PEG_TXN15 44

PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15

J42
L46
M48
M39
M43
R47
N37
T39
U36
U39
Y39
Y46
AA36
AA39
AD42
AD46

TXP0
TXP1
TXP2
TXP3
TXP4
TXP5
TXP6
TXP7
TXP8
TXP9
TXP10
TXP11
TXP12
TXP13
TXP14
TXP15

C604
C579
C602
C577
C600
C575
C598
C573
C595
C571
C594
C568
C591
C567
C590
C582

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

PEG_TXP0 44
PEG_TXP1 44
PEG_TXP2 44
PEG_TXP3 44
PEG_TXP4 44
PEG_TXP5 44
PEG_TXP6 44
PEG_TXP7 44
PEG_TXP8 44
PEG_TXP9 44
PEG_TXP10 44
PEG_TXP11 44
PEG_TXP12 44
PEG_TXP13 44
PEG_TXP14 44
PEG_TXP15 44

CANTIGA-GM-GP-U-NF
R37
1KR2F-3-GP

CL_VREF ~= 0.35V

C82

NC

C41
SC100P50V2JN-3GP

R23

R22

1 0R0402-PAD
2
2
1R20
100R2J-2-GP

R29

R44

19,33 PM_PWROK
17,23,26,27,30,44 PLT_RST#

CFG5

SM_VREF
SM_PWROK
SM_REXT
SM_DRAMRST#

R50
1KR2F-3-GP

1015 DB

N28
M28
G36
E36
K36
H36

ICH_SDVO_CLK
ICH_SDVO_DATA

TSATN#

B12

TSATN#

HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC

B28
B30
B29
C29
A28

DDPC_CTRLCLK
DDPC_CTRLDATA
SDVO_CTRLCLK
SDVO_CTRLDATA
CLKREQ#
ICH_SYNC#

TP54
1
TP55
1
MCH_CLK_REQ# 16
MCH_ICH_SYNC# 19

1113 DB

R38
499R2F-2-GP

DDPC/SDVO for HDMI used

CANTIGA-GM-GP-U-NF

HDA_BCLK
HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC

1
1
1
1
1

+1.8V
R367
2

1KR2F-3-GP
1

SM_RCOMP_VOH

1107 DB
R364
3K01R2F-3-GP

C516

SCD01U16V2KX-3GP

DY

DY

R354 1

SM_RCOMP_VOH
SM_RCOMP_VOL

C512
SC2D2U6D3V3MX-1-GP

SM_RCOMP_VOL

TP168
TP53
TP51
TP52
TP167

C501

R28

PM_EXTTS#0
PM_EXTTS#1
PWROK_R
RSTIN#

BF28
BH28

C502

R355
SCD01U16V2KX-3GP

1KR2F-3-GP

2 4K02R2F-GP CFG20

SM_RCOMP_VOH
SM_RCOMP_VOL

DDR_VREF_S3

DY

PM_SYNC#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR

M_RCOMPP
M_RCOMPN

L_VDD_EN
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK

R29
B7
N33
P32
AT40
AT11
T20
R32

PM

R33

19
PM_SYNC#
4,18,36 H_DPRSTP#
12 PM_EXTTS#0
13 PM_EXTTS#1

BG22
BH21

1011 DB

SM_RCOMP
SM_RCOMP#

+1.8V

CFG18
CFG19
CFG20

SRN10KJ-5-GP

DY

12
12
13
13

CFG16

M_ODT0
M_ODT1
M_ODT2
M_ODT3

VGA

2 4K02R2F-GP CFG19

4
3

BD17
AY17
BF15
AY13

M29
C44
B43
E37
E38
C41
C40
B37
A37

PEG_CMP

PEG_COMPI
PEG_COMPO

1
2

2 2K21R2F-GP CFG11

SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1

DY

12
12
13
13

L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA

49D9R2F-GP

R32

ME

R26

M_CS0#
M_CS1#
M_CS2#
M_CS3#

L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK

M33
K33
J33

+VCC_PEG

R40

1
L32
G32
M32

RN6
PM_EXTTS#0
PM_EXTTS#1

GRAPHICS VID

2 2K21R2F-GP CFG18

MISC

DY

HDA

BA17
AY16
AV16
AR13

F43
E43

CFG

+3VS

+3VS
R31

CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20

SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1

3 OF 10

U57C

12
12
13
13

SC2D2U6D3V3MX-1-GP

1
2

3,16 MCH_CLKSEL0
3,16 MCH_CLKSEL1
3,16 MCH_CLKSEL2

12
12
13
13

M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3

TV

M_CKE0
M_CKE1
M_CKE2
M_CKE3

PEG_CLK
PEG_CLK#

FSB setting
T25
R25
P25
P20
P24
C25
N24
M24
E21
C23
C24
N21
P21
T21
R20
M20
L21
H21
P29
R28
T28

BC28
AY28
AY36
BB36

B38
A38
E41
F41

M_RCOMPN
R348
80D6R2F-L-GP

SA_CKE_0
SA_CKE_1
SB_CKE_0
SB_CKE_1

DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#

CLK

R351
80D6R2F-L-GP

AR24
AR21
AU24
AV20

PCI-EXPRESS

+1.8V

SA_CK#_0
SA_CK#_1
SB_CK#_0
SB_CK#_1

M_CLK_DDR0 12
M_CLK_DDR1 12
M_CLK_DDR2 13
M_CLK_DDR3 13

RESERVED#BG23
RESERVED#BF23
RESERVED#BH18
RESERVED#BF18

AP24
AT21
AV24
AU20

LVDS

BG23
BF23
BH18
BF18

RESERVED#AY21

SA_CK_0
SA_CK_1
SB_CK_0
SB_CK_1

AY21

RESERVED#B31
RESERVED#B2
RESERVED#M1

DDR CLK/ CONTROL/COMPENSATION

B31
B2
M1

RESERVED#M36
RESERVED#N36
RESERVED#R33
RESERVED#T33
RESERVED#AH9
RESERVED#AH10
RESERVED#AH12
RESERVED#AH13
RESERVED#K12
RESERVED#AL34
RESERVED#AK34
RESERVED#AN35
RESERVED#AM35
RESERVED#T24

RSVD

1
Place the 49D9 Ohm resistor
within 500 mils (1.27 mm)
of the (G)MCH.

2 OF 10

U57B

M36
N36
R33
T33
AH9
AH10
AH12
AH13
K12
AL34
AK34
AN35
AM35
T24

SCD1U10V2KX-4GP
2
1

1218

High = Lanes Reversed


Cantiga = 2.2K
1113 DB
+3VS

Please Close GMCH


R522
10KR2J-3-GP

+1.05VS

TSATN#_KBC

TSATN#_KBC 30

R340
56R2J-4-GP

TSATN#

Q7
MMBT3904WT1G-GP

Wistron Corporation

Please Close to U22

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

1218

Cantiga (2 of 6)
Size

Document Number

Rev

SA

VITAS
Date: Monday, May 05, 2008

Sheet

of

48

M_A_BS#0 12
M_A_BS#1 12
M_A_BS#2 12

SA_RAS#
SA_CAS#
SA_WE#

BB20
BD20
AY20

M_A_RAS# 12
M_A_CAS# 12
M_A_WE# 12

SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14

BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25

MEMORY

M_A_DM[7..0]

CANTIGA-GM-GP-U-NF

M_A_DQS[7..0]

M_A_DQS#[7..0]

M_A_A[14..0]
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

M_A_DM[7..0] 12

M_A_DQS[7..0] 12

M_A_DQS#[7..0] 12

M_A_A[14..0] 12

M_B_DQ[63..0]
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

5 OF 10

U57E

AK47
AH46
AP47
AP46
AJ46
AJ48
AM48
AP48
AU47
AU46
BA48
AY48
AT47
AR47
BA47
BC47
BC46
BC44
BG43
BF43
BE45
BC41
BF40
BF41
BG38
BF38
BH35
BG35
BH40
BG39
BG34
BH34
BH14
BG12
BH11
BG8
BH12
BF11
BF8
BG7
BC5
BC6
AY3
AY1
BF6
BF5
BA1
BD3
AV2
AU3
AR3
AN2
AY2
AV1
AP3
AR1
AL1
AL2
AJ1
AH1
AM2
AM3
AH3
AJ3

SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63

SB_BS_0
SB_BS_1
SB_BS_2

BC16
BB17
BB33

SB_RAS#
SB_CAS#
SB_WE#

AU17
BG16
BF14

SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

AM47
AY47
BD40
BF35
BG11
BA3
AP1
AK2

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6
AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14

AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33

M_B_BS#0 13
M_B_BS#1 13
M_B_BS#2 13
M_B_RAS# 13
M_B_CAS# 13
M_B_WE# 13

M_B_DM[7..0]

BD21
BG18
AT25

MEMORY

13 M_B_DQ[63..0]

SA_BS_0
SA_BS_1
SA_BS_2

SYSTEM

SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63

4 OF 10

U57D

AJ38
AJ41
AN38
AM38
AJ36
AJ40
AM44
AM42
AN43
AN44
AU40
AT38
AN41
AN39
AU44
AU42
AV39
AY44
BA40
BD43
AV41
AY43
BB41
BC40
AY37
BD38
AV37
AT36
AY38
BB38
AV36
AW36
BD13
AU11
BC11
BA12
AU13
AV13
BD12
BC12
BB9
BA9
AU10
AV9
BA11
BD9
AY8
BA6
AV5
AV7
AT9
AN8
AU5
AU6
AT5
AN10
AM11
AM5
AJ9
AJ8
AN12
AM13
AJ11
AJ12

SYSTEM

M_A_DQ[63..0]
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

DDR

12 M_A_DQ[63..0]

DDR

M_B_DM[7..0] 13

M_B_DQS[7..0]

M_B_DQS[7..0] 13

M_B_DQS#[7..0]

M_B_DQS#[7..0] 13

C
M_B_A[14..0]

M_B_A[14..0] 13

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14

CANTIGA-GM-GP-U-NF

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

Cantiga (3 of 6)

Document Number

Rev

VITAS
Date: Monday, May 05, 2008

SA
Sheet

of

48

1
2

C60
SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP

C69

Coupling CAP

R34 2VCC_GMCH_35
1
0R0402-PAD

AG34
AC34
AB34
AA34
Y34
V34
U34
AM33
AK33
AJ33
AG33
AF33

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

AE33
AC33
AA33
Y33
W33
V33
U33
AH28
AF28
AC28
AA28
AJ26
AG26
AE26
AC26
AH25
AG25
AF25
AG24
AJ23
AH23
AF23

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

T32

VCC

D
VCC CORE

C80

POWER

1
2

C58
SCD22U10V2KX-1GP
2
1

1
2

C78
SCD22U10V2KX-1GP
2
1

1
2

Coupling CAP 370 mils from the Edge

Coupling CAP

1
2

C34

2
1

1
2

1
2

1
2

1
2

1
2

SCD1U16V2KX-3GP
2

1
2

BC1

DY

SCD1U16V2ZY-2GP

POWER

C53

DY

SC1U10V3KX-3GP

VCC GFX NCTF

C35

SC22U10V6ZY-2GP

Place on the Edge

DY
2

SCD47U6D3V2KX-GP

ST220U2D5VBM-LGP

VCC SM

TC18

DY

DY

C65

SCD1U16V2ZY-2GP

C74

C67

SCD1U16V2ZY-2GP

C57

C83

SC22U6D3V5MX-2GP

C64

DY

C77

SCD1U16V2ZY-2GP

C63

+1.05VS

Place CAP where


LVDS and DDR2 taps

VCC NCTF

FOR VCC SM
+1.8V

1
2

1
2

C519

Place on the Edge

AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23

SC1U10V3KX-3GP

1
C88

SC1U10V3KX-3GP
2
1
C557

C55
SCD22U10V2KX-1GP

C472

SCD22U10V2KX-1GP
2
1

C39
SCD1U10V2KX-4GP
2
1

1
2

C618

VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF

CANTIGA-GM-GP-U-NF

C44
SCD1U10V2KX-4GP
2
1

VCC SM LF

VCC GFX

TC15

SC22U6D3V5MX-2GP

CANTIGA-GM-GP-U-NF

AV44 SM_LF1_GMCH
BA37 SM_LF2_GMCH
AM40 SM_LF3_GMCH
AV21 SM_LF4_GMCH
AY5 SM_LF5_GMCH
AM10 SM_LF6_GMCH
BB13 SM_LF7_GMCH

DY

SC22U6D3V5MX-2GP

VCC_AXG_SENSE
VSS_AXG_SENSE

VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF

C79

0128 DB

SCD47U6D3V2KX-GP
C91

AJ14
AH14

0128 DB

ST220U2D5VBM-LGP

VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG

0128 DB

6 OF 10

FOR VCC CORE


0128 DB

+1.05VS

SC10U10V5ZY-1GP

VCC_AXG_SENSE
VSS_AXG_SENSE

TP36

Y26
AE25
AB25
AA25
AE24
AC24
AA24
Y24
AE23
AC23
AB23
AA23
AJ21
AG21
AE21
AC21
AA21
Y21
AH20
AF20
AE20
AC20
AB20
AA20
T17
T16
AM15
AL15
AE15
AJ15
AH15
AG15
AF15
AB15
AA15
Y15
V15
U15
AN14
AM14
U14
T14

U57F

+1.05VS

SCD1U16V2ZY-2GP

TP43

VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC
VCC_SM/NC

W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16

SCD1U16V2ZY-2GP

BA36
BB24
BD16
BB21
AW16
AW13
AT13

VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF

SCD1U16V2ZY-2GP

VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM

SCD1U16V2ZY-2GP

AP33
AN33
BH32
BG32
BF32
BD32
BC32
BB32
BA32
AY32
AW32
AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29
AW29
AV29
AU29
AT29
AR29
AP29

7 OF 10

U57G

+1.8V

A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

Cantiga (4 of 6)

Document Number

Rev

VITAS
Date: Monday, May 05, 2008

SA
Sheet

of

48

1
+1.05VS

852mA

AP28
AN28
AP25
AN25
AN24
AM28
AM26
AM25
AL25
AM24
AL24
AM23
AL23

VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF

C42
SCD47U6D3V2KX-GP

C470
SC4D7U6D3V3KX-GP

C86

C40

SCD47U6D3V2KX-GP

+3VS_HV

+1.05VS_+3VS

R373
0429
1
2
0R0402-PAD

C498

PV
C520

+1.05VS
R342
1
2
0R0603-PAD

0429 PV

DY

C495
SC10U6D3V5MX-3GP

POWER

1D05V_VCC_AXF

A PEG

350mA
2

1
2

R371
10R2J-2-GP
2
1

VTT

VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM

C54

1
2

AXF
A CK

SM CK

VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG

V48
U48
V47
U47
U46

VCC_DMI
VCC_DMI
VCC_DMI
VCC_DMI

AH48
AF48
AH47
AG47

+3VS_HV

1D05V_VCC_DMI

456mA
2

VTTLF1
VTTLF2
VTTLF3

1
2

1
2

0429 PV

SC10U10V5ZY-1GP

B
+1.05VS
R36
1
2
0R0805-PAD

DY
2

C559

DY

C485
SCD47U6D3V2KX-GP

A8
L1
AB2

C474
SCD47U6D3V2KX-GP

VTTLF
VTTLF
VTTLF

1218

C552

C580

1782mA

C473
SCD47U6D3V2KX-GP

CANTIGA-GM-GP-U-NF

C491
1
2

1218

VCCD_PEG_PLL
VCCD_LVDS
VCCD_LVDS

1R2F-GP

0429 PV

C553
SC22U6D3V5MX-2GP

+VCC_PEG

C554
R386
1
2
0R0603-PAD

SCD1U16V2ZY-2GP

M38
L37

R345
1
2
0R0805-PAD

+VCC_PEG

VTTLF

DY

VCC_HV
VCC_HV
VCC_HV

106mA

VCCD_HPLL

HV

VCCD_QDAC

K47
C35
B35
A35

PEG

L28
AF1

BF21
BH20
BG20
BF20

VCC_TX_LVDS

DMI

VCCD_TVDAC

1D05V_RUN_PEGPLLAA47

C558
SCD1U10V2KX-4GP

SCD1U16V2ZY-2GP

C477

M25

R344
C496

SC22U6D3V5MX-2GP

0429 PV

1D05V_RUN_HPLL

VCC_HDA

VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK

200mA

1D8V_SM_CK

B22
B21
A21

SC22U6D3V5MX-2GP

R319
1
2
0R0603-PAD

A32

VCC_AXF
VCC_AXF
VCC_AXF

SC4D7U6D3V3KX-GP

1D5VRUN_TVDAC
+1.05VS

VCCA_TV_DAC
VCCA_TV_DAC

D TV/CRT

1218

B24
A24

TV

1218

C504

HDA

DY

+1.8V

C61

LVDS

1
2

CRT

AR20
AP20
AN20
AR17
AP17
AN17
AT16
AR16
AP16

BAT54-7-F-GP

SCD1U16V2ZY-2GP

PLL

VCCA_PEG_PLL

+3VS
D24

A SM

2
1
2
1

C68

1
2

AA48

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
1D05V_RUN_PEGPLL

C50

SC2D2U6D3V3MX-1-GP

SC22U6D3V5MX-2GP

C62

SCD1U16V2ZY-2GP

1218

VSSA_LVDS

VCCA_PEG_BG

1D5VRUN_TVDAC
C510
SCD01U16V2KX-3GP

C549
SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP

R366
10R2J-2-GP
2
1

VCCA_LVDS

J47

1D05V_SM_CK

0429 PV

C565

+1.5VS

R30
1
2
0R0603-PAD

1D05V_RUN_PEGPLL

1
2
BLM18BB221SN1D-GP

1106 DB

+1.05VS

SCD1U16V2ZY-2GP

1
2
1

C475

DY

C52

J48

AD48

SC1U10V3ZY-6GP

C28

DY

VCCA_MPLL

TC8

DY

+1.05VS

SC1U10V3ZY-6GP

M_VCCA_MPLL

C49

AE1

VCCA_PEG_BG

1D05V_SM

0429 PV

L20

220ohm 100MHz

R25

1
2
0R0603-PAD

2
+1.05VS_PLL

+1.05VS

SCD1U16V2ZY-2GP

VCCA_HPLL

0502 PV

C555

SC4D7U6D3V3KX-GP

+1.05VS

C471

PV

SC22U6D3V5MX-2GP

120ohm 100MHz

C478

R385
0429
1
2
0R0402-PAD

SC22U6D3V5MX-2GP

SC4D7U6D3V3KX-GPSC10U6D3V5MX-3GP

FCM1608KF-1-GP
1
2
L10

+1.5VS
M_VCCA_HPLL

VCCA_DPLLB

AD1

EC45

SCD1U16V2ZY-2GP

120ohm 100MHz
FCM1608KF-1-GP
1
2
L12

VCCA_DPLLA

L48

1
2

1218

0429 PV
R321
0R0603-PAD

F47

A LVDS

M_VCCA_MPLL

+1.05VS

VCCA_DAC_BG
VSSA_DAC_BG

1
2

ST220U2D5VBM-LGP

M_VCCA_HPLL

A25
B25

U13
T13
U12
T12
U11
T11
U10
T10
U9
T9
U8
T8
U7
T7
U6
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1

SCD1U16V2ZY-2GP

1218

VCCA_CRT_DAC
VCCA_CRT_DAC

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

SC2D2U10V3ZY-1GP

1218

B27
A26

8 OF 10

U57H

0429 PV

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

Document Number

Cantiga (5 of 6)

Date: Monday, May 05, 2008

VITAS

Sheet

Rev

SA
10

of

48

CANTIGA-GM-GP-U-NF

R19

1
2
0R0402-PAD

Modification AJ6 to reserved Pin

0429 PV

BG21
L12
AW21
AU21
AP21
AN21
AH21
AF21
AB21
R21
M21
J21
G21
BC20
BA20
AW20
AT20
AJ20
AG20
Y20
N20
K20
F20
C20
A20
BG19
A18
BG17
BC17
AW17
AT17
R17
M17
H17
C17

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

BA16

VSS

AU16
AN16
N16
K16
G16
E16
BG15
AC15
W15
A15
BG14
AA14
C14
BG13
BC13
BA13

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AN13
AJ13
AE13
N13
L13
G13
E13
BF12
AV12
AT12
AM12
AA12
J12
A12
BD11
BB11
AY11
AN11
AH11

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

Y11
N11
G11
C11
BG10
AV10
AT10
AJ10
AE10
AA10
M10
BF9
BC9
AN9
AM9
AD9
G9
B9
BH8
BB8
AV8
AT8

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

10 OF 10

U57J

AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23
AJ6

VSS

VSS NCTF

VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS SCB

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

9 OF 10

U57I

AU48
AR48
AL48
BB47
AW47
AN47
AJ47
AF47
AD47
AB47
Y47
T47
N47
L47
G47
BD46
BA46
AY46
AV46
AR46
AM46
V46
R46
P46
H46
F46
BF44
AH44
AD44
AA44
Y44
U44
T44
M44
F44
BC43
AV43
AU43
AM43
J43
C43
BG42
AY42
AT42
AN42
AJ42
AE42
N42
L42
BD41
AU41
AM41
AH41
AD41
AA41
Y41
U41
T41
M41
G41
B41
BG40
BB40
AV40
AN40
H40
E40
AT39
AM39
AJ39
AE39
N39
L39
B39
BH38
BC38
BA38
AU38
AH38
AD38
AA38
Y38
U38
T38
J38
F38
C38
BF37
BB37
AW37
AT37
AN37
AJ37
H37
C37
BG36
BD36
AK15
AU36

NC

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1

VSS
VSS
VSS
VSS

U24
U28
U25
U29

VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF

AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17

VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB

BH48
BH1
A48
C1
A3

NC#E1
NC#D2
NC#C3
NC#B4
NC#A5
NC#A6
NC#A43
NC#A44
NC#B45
NC#C46
NC#D47
NC#B47
NC#A46
NC#F48
NC#E48
NC#C48
NC#B48

E1
D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48

GMCH_GND1
GMCH_GND2
GMCH_GND3
GMCH_GND4

TP169
TP163
TP170
TP164

NCTF PIN

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CANTIGA-GM-GP-U-NF
Size

Cantiga (6 of 6)

Document Number

Rev

VITAS
Date: Monday, May 05, 2008

SA
Sheet

11

of

48

M_CLK_DDR0
M_CLK_DDR#0

Layout Note:
Place near DM1
8 M_A_BS#2
8 M_A_BS#0
8 M_A_BS#1

1
2

TC2
ST220U2D5VBM-LGP

C90
SCD1U16V2ZY-2GP

C66
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C128

C108

DY
SC2D2U10V3ZY-1GP

SC2D2U10V3ZY-1GP

C524

DY
SC2D2U10V3ZY-1GP

C81

C102

DY
SC2D2U10V3ZY-1GP

SC2D2U10V3ZY-1GP

C96

C113

+1.8V

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS

C515
SCD1U16V2ZY-2GP

C121
SCD1U16V2ZY-2GP

C548
SCD1U16V2ZY-2GP

C543
SCD1U25V2ZY-1GP

C538
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C522

DY
2

C528
SCD1U16V2ZY-2GP

C533
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C109

DY

C71
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C84

DY

C93
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C99

DY

+0.9VS

Layout Note:
Place these resistors
closely DM1,all
trace length Max=1.5"

+0.9VS

M_A_A12
M_A_BS#2

RN38 SRN56J-4-GP
1
4
2
3

RN39
4
3

M_A_BS#0
M_A_A10

RN34 SRN56J-4-GP
1
4
2
3

4
3

M_ODT0
M_CS0#

RN3
1
2

RN16 SRN56J-4-GP
M_A_A6
4
1
M_A_A5
3
2

M_A_A14
M_A_A11

RN19 SRN56J-4-GP
1
4
2
3

4
3

M_A_CAS#
M_A_WE#

RN33 SRN56J-4-GP
1
4
2
3

RN10 SRN56J-4-GP
M_A_A2
4
1
M_A_A13
3
2

M_ODT1
M_CS1#

RN32 SRN56J-4-GP
1
4
2
3

4
3

M_CKE1
M_A_A7

RN22 SRN56J-4-GP
1
4
2
3

4
3

RN37 SRN56J-4-GP
M_A_A8
1
M_A_A9
2

RN35 SRN56J-4-GP
M_A_A1
1
M_A_A3
2

7
7

M_ODT0
M_ODT1

DDR_VREF_S3

C637

RN13 SRN56J-4-GP
M_A_A4
1
M_A_A0
2

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

11
29
49
68
129
146
167
186

/DQS0
/DQS1
/DQS2
/DQS3
/DQS4
/DQS5
/DQS6
/DQS7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

13
31
51
70
131
148
169
188

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

M_ODT0
M_ODT1

114
119

ODT0
ODT1

1
2

CKE0
CKE1

79
80

CK0
/CK0

30
32

M_CLK_DDR0
M_CLK_DDR#0

CK1
/CK1

164
166

M_CLK_DDR1
M_CLK_DDR#1

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

10
26
52
67
130
147
170
185

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

SDA
SCL

195
197

ICH_SMBDATA
ICH_SMBCLK

VDDSPD

199

SA0
SA1

198
200

NC#50
NC#69
NC#83
NC#120
NC#163/TEST

50
69
83
120
163

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

81
82
87
88
95
96
103
104
111
112
117
118

VREF
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196

GND

GND

201

M_CS0#
M_CS1#

1
C201
DUMMY-C2

7
7

C207
DUMMY-C2

BA0
BA1

/CS0
/CS1

110
115

107
106

M_A_RAS# 8
M_A_WE# 8
M_A_CAS# 8

M_CKE0 7
M_CKE1 7
M_CLK_DDR0 7
M_CLK_DDR#0 7
M_CLK_DDR1 7
M_CLK_DDR#1 7

put near connector

C48

DUMMY-C2
C46

2
DUMMY-C2

ICH_SMBDATA 13,16,21,26
ICH_SMBCLK 13,16,21,26
SCD1U16V2ZY-2GP

+3VS

RN2

1
2

4
3

C32

SRN10KJ-11-GP-U

PM_EXTTS#0 7

C26
SC2D2U6D3V3KX-GP

+1.8V

SRN56J-4-GP
M_A_BS#1
1
M_A_RAS#
2

M_A_BS#0
M_A_BS#1

SC2D2U10V3ZY-1GP

DY
2

RN7

DDR_VREF_S3

SRN56J-4-GP
4
3

SRN56J-4-GP
1
M_CKE0
2

M_A_BS#2

108
109
113

8 M_A_A[14..0]

/RAS
/WE
/CAS

8 M_A_DQS[7..0]

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

8 M_A_DM[7..0]

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85

8 M_A_DQ[63..0]

DM2
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

8 M_A_DQS#[7..0]

C224

202

DDR2-200P-36-GP-U1

SCD1U16V2ZY-2GP
A

<Core Design>

Wistron Corporation
DM2 use 62.10017.E11

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

DDRII-SODIMM SLOT1
Size
Custom

Document Number

Date: Monday, May 05, 2008


5

Rev

SA

VITAS
Sheet

12
1

of

48

M_CLK_DDR2

M_CLK_DDR#2
8 M_B_DQS#[7..0]

C206
DUMMY-C2

8 M_B_DQ[63..0]
8 M_B_DM[7..0]

C123

DY
SCD1U16V2ZY-2GP

C111
SCD1U16V2ZY-2GP

C101
SCD1U16V2ZY-2GP

C87
SCD1U16V2ZY-2GP

C73
SCD1U16V2ZY-2GP

C95
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C122

C110
SCD1U16V2ZY-2GP

C100
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C94

DY

C85
SCD1U16V2ZY-2GP

C72
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C131

DY

+0.9VS

Layout Note:
Place these resistors
closely DM2,all
trace length Max=1.5"

+0.9VS

RN23

SRN56J-4-GP
1
4
2
3

RN17

SRN56J-4-GP
1
4
2
3

4
3

RN12

SRN56J-4-GP
1
4
2
3

4
3

SRN56J-4-GP
1
4
2
3

4
3

M_B_CAS#
M_B_WE#
M_B_A9
M_CKE2
M_B_A8
M_B_A5
M_B_A0
M_B_BS#1
RN14
M_B_A3
M_B_A1
RN4
M_CS3#
M_ODT3

1
2
RN24

M_CKE3

SRN56J-4-GP
4
3

SRN56J-4-GP
1
4
2
3

RN9

4
3

1
2

SRN56J-4-GP
M_B_A14
1
M_B_A11
2

RN18

SRN56J-4-GP
M_B_A6
1
M_B_A7
2

RN15

SRN56J-4-GP
M_B_A2
1
M_B_A4
2

RN11

SRN56J-4-GP
M_B_A10
1
M_B_BS#0
2

RN5

SRN56J-4-GP
M_CS2#
1
M_ODT2
2

RN20

SRN56J-4-GP
M_B_BS#2
1
M_B_A12
2

4
3

4
3
4
3

M_B_RAS#
M_B_A13

RN21

DDR_VREF_S3

7 M_ODT2
7 M_ODT3

SRN56J-4-GP

M_B_BS#0
M_B_BS#1

107
106

BA0
BA1

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

11
29
49
68
129
146
167
186

/DQS0
/DQS1
/DQS2
/DQS3
/DQS4
/DQS5
/DQS6
/DQS7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

13
31
51
70
131
148
169
188

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

M_ODT2
M_ODT3

114
119

ODT0
ODT1

1
2

DDR_VREF_S3

0128 DB

DY C645

SCD1U16V2ZY-2GP

SC2D2U10V3ZY-1GP

C644

SRN56J-4-GP
1
4
2
3

RN8

202

CK0
/CK0

30
32

CK1
/CK1

164
166

M_CLK_DDR3
M_CLK_DDR#3

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

10
26
52
67
130
147
170
185

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

SDA
SCL

195
197

ICH_SMBDATA
ICH_SMBCLK

VDDSPD

199

SA0
SA1

198
200

NC#50
NC#69
NC#83
NC#120
NC#163/TEST

50
69
83
120
163

M_CS2#
M_CS3#

VREF
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196

GND

GND

201

2
DUMMY-C2
C45

2
DUMMY-C2

ICH_SMBDATA 12,16,21,26
ICH_SMBCLK 12,16,21,26
SCD1U16V2ZY-2GP

+3VS

0429 PV

4
3

+3VS

SRN10KJ-11-GP-U
PM_EXTTS#1 7

EC23

DY

1109 DB

C33

C30
DY SC2D2U6D3V3KX-GP

0128 DB
C

DDR2-200P-25-GP-U2

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

DM1 use 62.10017.B51

Title

Date:
4

put near connector


C47

M_CLK_DDR3 7
M_CLK_DDR#3 7

Size
Custom

M_CLK_DDR2 7
M_CLK_DDR#2 7

1
2

+1.8V

81
82
87
88
95
96
103
104
111
112
117
118

7
7

M_CKE2 7
M_CKE3 7
M_CLK_DDR2
M_CLK_DDR#2

RN58

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

CKE0
CKE1

79
80

SCD1U25V3ZY-1GP

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS

110
115

8 M_B_BS#0
8 M_B_BS#1

TC13

DY

ST220U2D5VBM-LGP

C89
SCD1U16V2ZY-2GP

C547
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C536

DY

C104
SCD1U16V2ZY-2GP

C116
SC2D2U10V3ZY-1GP

C98
SC2D2U10V3ZY-1GP

SC2D2U10V3ZY-1GP

SC2D2U10V3ZY-1GP

SC2D2U10V3ZY-1GP

C530

C542

DY

C76

/CS0
/CS1

M_B_RAS# 8
M_B_WE# 8
M_B_CAS# 8

M_B_BS#2

8 M_B_BS#2

108
109
113

+1.8V

/RAS
/WE
/CAS

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

Layout Note:
Place near DM2

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85

8 M_B_A[14..0]

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14

8 M_B_DQS[7..0]

C200
DUMMY-C2

DM1

DDRII-SODIMM SLOT2

Document Number

Monday, May 05, 2008

VITASSheet
1

Rev

SA
13

of

48

CRT I/F & CONNECTOR

+5VS_CRT

+5VS
F2

D27

BLUE

0122 DB

1
C488
SCD1U16V2ZY-2GP

CRT1

4
3

RED

DY

6
1

RED

BAV99S-GP

GREEN
BLUE

+3VS
D26

BAV99-7-F-GP

JVGA_HS

14

JVGA_VS
DDC1_CLK

15

JVGA_HS
SYN-CONN15-GP

1012 DB

JVGA_VS

13

16

DDC1_DATA

12

D22

11

7
2
8
3
9
4
10
5

+5VS_CRT1

GREEN

SRN2K2J-1-GP

DY

C499
SC33P50V2JN-3GP

DY C500

C531
SC33P50V2JN-3GP
SC22P50V2JN-4GP

1
1

BAV99S-GP

DDC1_DATA

45

RN36

1102 DB

17
3

1024 DB

2
2

DDC1_CLK 45

+5VS_CRT1

D21
CH501H-40PT-1-GP

1
2

D28
4

FUSE-1D1A6V-8GP

0109 DB

DY

1012 DB

C492
SCD1U16V2ZY-2GP

C75
SCD1U16V2ZY-2GP

+3VS

1012 DB

+5VS_CRT1

C537
SC22P50V2JN-4GP
3

0109 DB
BAV99S-GP

DY

Layout Note:
* Must be a ground return path between this ground and the ground on
the VGA connector.
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.

CRT Termination/EMI
Filter

2
Y

RN31

74AHCT1G125GW-1-GP

VSYNC_5

2
1

3
4

JVGA_HS
JVGA_VS

C505

C514

1
2

0130 DB

C526
SC2D2P50V2CC-GP

GND

BLUE

SC2D2P50V2CC-GP

GREEN

SC2D2P50V2CC-GP

VCC

C527
SC12P50V2JN-3GP

45 M_VSYNC

OE#

C506
SC12P50V2JN-3GP

U56

C517
SC12P50V2JN-3GP

R370
R358
R375
150R2J-L1-GP-U
150R2J-L1-GP-U
150R2J-L1-GP-U

74AHCT1G125GW-1-GP

M_BLUE

GND

45 M_BLUE

RED

L17
BLM15BB470SN1D-2GP
1
2
L15
BLM15BB470SN1D-2GP
1
2
L16
BLM15BB470SN1D-2GP

HSYNC_5

VCC

M_GREEN

45 M_HSYNC

OE#

45 M_GREEN

U55

45 M_RED

Place Close Connector


1

C486
SCD1U16V2ZY-2GP

M_RED

1106 DB

+5VS_CRT1

0117 DB

SRN33J-5-GP-U

<Core Design>
1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CRT Connector
Size
A3

Document Number

Date: Monday, May 05, 2008


A

Rev

SA

VITAS
Sheet
E

14

of

48

LCD / INVERTER INTERFACE / CAMERA

White LED:
Lite-On 83.00191.D70
Everlight 83.19217.F70

0312 SI

LED1
CAPS_LED_PWR

330R2J-3-GP

SCD1U16V2ZY-2GP

1112 DB

LED-W-12-GP

LID_CLOSE#

DY

COVER_SW

C56
SCD22U16V3ZY-GP

C59
SC1KP50V2KX-1GP

DY
2

DY

100R2J-2-GP

30,32 LID_CLOSE#

SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP

R27

30

C490

C497

1107 DB

+LCDVDD

1109 DB

SIZE_DET1

+3VS

30
45
45

R339 100KR2J-1-GP

1109 DB

EC_BLON

BRIGHTNESS_CONN

DDC2_CLK
DDC2_DATA

COVER_SW

SCD1U16V2ZY-2GP

1108 DB

USB_10+
USB_10-

EC10

+5VS_CAMERA

48
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2

24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45

46

0502 PV

C534
SCD1U25V2ZY-1GP

LVDS1

CAPS_LED# 29,30

EC6

C494
SCD1U16V2ZY-2GP

R51

+3VS
+5VS

DCBATOUT

0502 PV

R336
2

100KR2J-1-GP
1
+3VS
SIZE_DET0 30

1109 DB

TXOUTB_L2+ 45
TXOUTB_L2- 45
TXOUTB_L1+ 45
TXOUTB_L1- 45
TXOUTB_L0+ 45
TXOUTB_L0- 45
TXCLKB_L+ 45
TXCLKB_L- 45
TXOUTA_L2+ 45
TXOUTA_L2- 45
TXOUTA_L1+ 45
TXOUTA_L1- 45
TXOUTA_L0+ 45
TXOUTA_L0- 45
TXCLKA_L+ 45
TXCLKA_L- 45

SIZE_DET0
(PIN27)

SIZE_DET1
(PIN19)

15.4"

17.0"

15.6"

16.0"

47
ACES-CONN46C-2-GP-U

Change to 20.F1296.046

+3VS
U25
R2

SATA_LED#

R1

SATA_BD_LED_C

SATA_BD_LED 28

SATA_LED#_C

SATA_LED 30

PDTA124EU-1-GP

1109 DB

2N7002EDW-GP

R531
100KR2J-1-GP

+5VS_CAMERA

TP49 TP28-75-GP

USB_10+

TP57 TP28-75-GP

USB_10-

TP58 TP28-75-GP

GND

R350
1
2
0R0402-PAD

BRIGHTNESS_CONN

TP56 TP28-75-GP

R353

1102 DB

DY

1107 DB
R374

DY

0429 PV
BRIGHTNESS 30

L_BKLTCTL 45

0R2J-2-GP
R346
100KR2J-1-GP

0R3-0-U-GP
+5VS

+5VS_CAMERA

Q16 DY
AO3403-GP

S
D

G
1

0429 PV

30 CAM_PWR#

CAM_PWR#
1
R368

DY

2 CAM_PWR_G#
10KR2J-3-GP

+3VS

Layout 40 mil

1
2

0502 PV

USB_10+

1
2

R45

1
2
0R0402-PAD

USB20_P10

C518
SCD1U16V2ZY-2GP

R372
100KR2J-1-GP

DY
19

C525

SCD1U16V2ZY-2GP

DY

R35
100KR2J-1-GP

1
C509
1
C51

R337
100KR2J-1-GP

IN#1
OUT
EN
GND

GND
IN#8
IN#7
IN#6
IN#5

1
2

SC1U10V3ZY-6GP

SCD1U16V2ZY-2GP

BC5

D23

DY

+5VALW

9
8
7
6
5

U53

DY

DY

BAV99W-1-GP
R341
10KR2J-3-GP

G5281RC1U-GP
EC7

EC_BLON
2
SC1000P50V3JN-GP
BRIGHTNESS_CONN
2
SC1000P50V3JN-GP

L_VDD_EN

+3VS

BAV99W-1-GP

U54

45

DY

C511
1
DY SC1KP50V2KX-1GP

+LCDVDD

1
2
3
4

+3VS

D25

USB_10-

1
2
0R0402-PAD

USB20_N10

SC4D7U10V5KX-1GP

EC61

19

R46

18

Q8

L_VDD_EN

DY

+LCDVDD

R334

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

100R2J-2-GP
2N7002DW-7F-GP

Title

LCD/Inverter Connector/CAM/LED
Size
A3

Document Number

Date: Monday, May 05, 2008

Rev

SA

VITAS
Sheet

15

of

48

CLK48_ICH

25

CLK48_5158

R148
10KR2J-3-GP

R193

R185
1

33R2J-2-GP
2 FSA

19
27
43
52
33
56

61
60

CLK_CPU_BCLK1
CLK_CPU_BCLK1#

CPUT1_F
CPUC1_F

58
57

CLK_MCH_BCLK1
CLK_MCH_BCLK1#

CPUT2_ITP/SRCT8
CPUC2_ITP/SRCC8

54
53

CLK_CPU_XDP1
CLK_CPU_XDP1#

SRCT7/CR#_F
SRCC7/CR#_E

51
50

CLK_PCIE_LAN1
CLK_PCIE_LAN1#

SRCT6
SRCC6

48
47

CLK_PCIE_MINI1_1
CLK_PCIE_MINI1_1#

X1
X2

17

USB_48MHZ/FSLA

33R2J-2-GP

45
44

STP_PCI#
STP_CPU#

PCI_STOP#
CPU_STOP#

19
19

CPUT0
CPUC0

7
6

12,13,21,26 ICH_SMBCLK
12,13,21,26 ICH_SMBDATA
C

19

SRCT11/CR#_H
SRCC11/CR#_G

40
39

SRCT9
SRCC9

37
38

SRCT4
SRCC4

34
35

CLK_MCH_3GPLL1
CLK_MCH_3GPLL1#

SRCT3/CR#_C
SRCC3/CR#_D

31
32

CLK_PCIE_ICH1
CLK_PCIE_ICH1#

SRCT2/SATAT
SRCC2/SATAC

28
29

27MHZ_NONSS/SRCT1/SE1
27MHZ_SS/SRCC1/SE2
SRCT0/DOTT_96
SRCC0/DOTC_96

SCLK
SDATA

63

CK_PWRGD

SRCT10
SRCC10

41
42

CK_PWRGD/PD#

+3VS

19 CLK_SATA_OE#
7 MCH_CLK_REQ#
27 PCLK_FWH

R144
10KR2J-3-GP

CLK_PCI_KBC
PCLK_ICH

2 475R2F-L1-GP
2 33R2J-2-GP

R168 1
R186 1

2 33R2J-2-GP
2 33R2J-2-GP

PCI2_TME
SRC-5_EN/PCI-3
27_SEL
ITP_EN

8
10
11
12
13
14

PCI0/CR#_A
PCI1/CR#_B
PCI2/TME
PCI3
PCI4/27_SELECT
PCI_F5/ITP_EN

FSB
FSC

64
5

FSLB/TEST_MODE
REF0/FSLC/TEST_SEL

55

NC#55

33R2J-2-GP

SC4D7P50V2CN-1GP

ICS9LPRS355BKLFT-GP

+1.05VS

0
1

SRC8
CPU_ITP

ITP_EN
R184
10KR2J-3-GP

CPU_BSEL2

R138

CPU_BSEL1

R104

CPU_BSEL0

R158

1
0
0
0
0

0R2J-2-GP

R133
CLK_BSEL1

0R2J-2-GP

R110
CLK_BSEL0

0R2J-2-GP

R166

1
2

1
R151 1
R152
1
R176 1
R177

2
2 0R0402-PAD
0R0402-PAD
2
2 0R0402-PAD
0R0402-PAD

CLK_PCIE_SATA1
CLK_PCIE_SATA1#

1
R174 1
R175

2
2 0R0402-PAD
0R0402-PAD

24
25

MCH_SSCDREFCLK1
MCH_SSCDREFCLK1#

20
21

CLK_MCH_DREFCLK1
CLK_MCH_DREFCLK1#

1
R172 1
R173
1
R170 1
R171

2
2 33R2J-2-GP
33R2J-2-GP
2
2 0R0402-PAD
0R0402-PAD

FS_A
1
1
1
0
0

CPU

CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7
CLK_PCIE_ICH 19
CLK_PCIE_ICH# 19
CLK_PCIE_SATA 18
CLK_PCIE_SATA# 18

0303 SI
27MHZ_NONSS 45
27MHZ_SS 45
DREFCLK 44
DREFCLK# 44

R160
10KR2J-3-GP

100M
133M
166M
200M
266M

1218

FSC

R167
10KR2J-3-GP

27_SEL

PIN 20

PIN 21

0
1

10KR2J-3-GP

DOT96T
SRCT0

DOT96C
SRCC0

DY

PIN 24

PIN 25

FSB

SRCT1/LCDT_100
27M_NSS

SRCT1/LCDT_100
27M_SS

0R2J-2-GP
FSA
2K2R2J-2-GP

R141 1

2 1KR2J-1-GP

MCH_CLKSEL2 3,7

R105 1

2 1KR2J-1-GP

MCH_CLKSEL1 3,7

R163 1

2 2K2R2J-2-GP

MCH_CLKSEL0 3,7

<Core Design>

Wistron Corporation

27_SEL

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

R132
1KR2J-1-GP

Title

Clock Generator ICS9LPRS355


Size

Document Number

Rev

SA

VITAS
Date: Monday, May 05, 2008

1. All of Input pin didn't have internal pull up resistor.


2. Clock Request (CR) function are enable by registers.
3. CY28548 integrated serial resistor of differential clock,
so put 0 ohm serial resistor in the schematic.

DY R109
1KR2J-1-GP
1

DY R191
1KR2J-1-GP

0
0
1
1
0

DY

CLK_BSEL2

Design Note:

R142
56R2J-4-GP

FS_B

R154
DY R108
DY
0R2J-2-GP
0R2J-2-GP

DY

2
1

DY

CLK_PCIE_MINI1 26
CLK_PCIE_MINI1# 26

+1.05VS

+3VS_CK505

Output

CLK_PCIE_LAN 23
CLK_PCIE_LAN# 23

+3VS_CK505

FS_C

ITP_EN

CLK_CPU_XDP 3
CLK_CPU_XDP# 3

+1.05VS

R183
10KR2J-3-GP

CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6

0429 PV

C318
1

R157
10KR2J-3-GP

DY

DY

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

PCI2_TME

DY

2
2 0R0402-PAD
0R0402-PAD
2
2 0R0402-PAD
0R0402-PAD

CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3

C342
1

DY

R149
10KR2J-3-GP

ICS
71.09355.B03
Realtek 71.00875.003

1
R117 1
R118
1
R119 1
R120

C333
1

+3VS_CK505

GND

2
2 0R0402-PAD
0R0402-PAD
2
2 0R0402-PAD
0R0402-PAD
2
2 0R0402-PAD
0R0402-PAD

65

CLK_ICH14

GND
GNDSRC
GNDSRC
GNDSRC
GNDCPU
GND

19

22
30
36
49
59
26

R139

18
15
1

MCH_CLK_REQ#

GND48
GNDPCI
GNDREF

0425 PV

1
R111 1
R112
1
R113 1
R114
1
R115 1
R116

C336

DY

0429 PV

30
17

1017 DB

R143 1
R145 1

DY1
19

3
2

VDD96_IO
VDDPLL3_IO
VDDSRC_IO
VDDSRC_IO
VDDSRC_IO
VDDCPU_IO

4
16
9
46
62
23

1
2

CLK_XTAL_IN
CLK_XTAL_OUT

C349 SC4D7P50V2CN-1GP

SRC-5_EN/PCI-3

VDDREF
VDD48
VDDPCI
VDDSRC
VDDCPU
VDDPLL3

PCI_STOP#/CPU_STOP#
SRC5

1
2

1
2

2
1

PIN44,45

0
1
R155
10KR2J-3-GP

DY

SRC-5_EN/PCI-3

C707

SC10U10V5ZY-1GP

C292
SC12P50V2JN-3GP
U17

DY

C708

SCD1U16V2ZY-2GP

C298
SC12P50V2JN-3GP

C724

SCD1U16V2ZY-2GP

CLK_XTAL_OUT

C722

SCD1U16V2ZY-2GP

X-14D31818M-50GP

C721

SCD1U16V2ZY-2GP

0324 SI

X2
CLK_XTAL_IN

C307

SCD1U16V2ZY-2GP

0429 PV

0429 PV
+3VS_CK505

SBK160808T-601Y-N-GP
SC10U10V5ZY-1GP

C705
SCD1U16V2ZY-2GP

C723
SCD1U16V2ZY-2GP

DY

C718
SCD1U16V2ZY-2GP

C715
SCD1U16V2ZY-2GP

C713
SCD1U16V2ZY-2GP

DY

C706
SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP

C300

0128 DB

L4

SBK160808T-601Y-N-GP

0324 SI

+3VS_CK505_IO

+3VS_CK505_IO

+3VS_CK505

L3

+3VS

+3VS_CK505

+3VS

Sheet
1

16

of

48

+3VS
RN56

1
2
3
4
D

8
7
6
5

PCI_TRDY#
PCI_FRAME#
INT_PIRQD#
PCI_REQ3#
2 OF 6
U75B

SRN8K2J-4-GP
RN54

1
2
3
4

8
7
6
5

D11
C8
D9
E12
E9
C9
E10
B7
C7
C5
G11
F8
F11
E7
A3
D2
F10
D5
D10
B3
F7
C3
F3
F4
C1
G7
H7
D1
G5
H6
G1
H3

PCI_PLOCK#
PCI_IRDY#
PCI_SERR#
INT_PIRQB#

SRN8K2J-4-GP
RN55

1
2
3
4

8
7
6
5

PCI_PERR#
PCI_REQ0#
INT_PIRQG#
INT_PIRQH#

SRN8K2J-4-GP

RN53

1
2
3
4

8
7
6
5

PCI_REQ2#
PCI_REQ1#
PCI_STOP#
PCI_DEVSEL#

INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#

SRN8K2J-4-GP
RN28

J5
E1
J6
C4

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

PCI

F1
G4
B6
A7
F13
F12
E6
F6

REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55

PCI_REQ0#
PCI_GNT0#
PCI_REQ1#
PCI_REQ2#
PCI_REQ3#
PCI_GNT3#

C/BE0#
C/BE1#
C/BE2#
C/BE3#

D8
B4
D6
A5

IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#

D3
E3
R1
C6
E4
C2
J4
A4
F5
D7

PCI_IRDY#

PLTRST#
PCICLK
PME#

C14
D4
R2

PCI_PLTRST#

PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#

PCLK_ICH 16
C

ICH_PME#

Interrupt I/F

PIRQA#
PIRQB#
PIRQC#
PIRQD#

H4
K6
F2
G2

PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

TP186

INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
INT_PIRQH#

ICH9M-GP-NF

1
2
3
4

8
7
6
5

INT_PIRQC#
INT_PIRQA#
INT_PIRQF#
INT_PIRQE#

SRN8K2J-4-GP

1023 DB

19

PCI_GNT0#
1
R236
1
R140
PCI_GNT3#
1
R222

SPI_CS#1

DY

DY

DY

1KR2J-1-GP
1KR2J-1-GP

USE LPC
B

1KR2J-1-GP

+3VALW

U78

BOOT BIOS Strap


PCI_GNT#0 SPI_CS#1

PCI_PLTRST#

BOOT BIOS Location

SPI

PCI

LPC(Default)

VCC

PLT_RST#

PLT_RST# 7,23,26,27,30,44

GND
74LVC1G08GW-1-GP

DY

A16 swap override strap


PCI_GNT#3

R543

0R2J-2-GP

low = A16 swap override enable


high = default

<Core Design>
A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

ICH9-M (1 of 5)

Document Number

Date: Monday, May 05, 2008


5

VITAS

Rev

SA
Sheet
1

17

of

48

+RTCVCC

ICH_RTCX2
ICH_RTCX1

1
R459

+RTCVCC

2
10MR2J-L-GP

1MR2J-1-GP

1
R487
X6
R147

ICH_INTVRMEN

+RTCVCC

2
20KR2J-L2-GP
1

R488

G48
GAP-OPEN

RTCX1
RTCX2

ICH_RTCRST#
SRTCRST#
SM_INTRUDER#

A25
F20
C22

RTCRST#
SRTCRST#
INTRUDER#

B22
A22

INTVRMEN
LAN100_SLP

E25

GLAN_CLK

ICH_INTVRMEN

LPC_AD[0..3]

1 OF 6

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

K5
K4
L6
K2

FWH4/LFRAME#

K3

LDRQ0#
LDRQ1#/GPIO23

J3
J1

GLAN_COMP place within 500 mil of ICH9M


+1.5VS

1
R448

SRN33J-4-GP
RN29
28
28
28
28

1
2
3
4

HDA_RST#_CODEC
HDA_BITCLK_CODEC
HDA_SYNC_CODEC
HDA_SDOUT_CODEC

ACZ_BIT_CLK
ACZ_SYNC_R

8
7
6
5

28
45

HDA_SDIN0
HDA_SDIN1

ACZ_SDATAOUT_R

15

HDD
ODD

22
22
22
22
22
22
22
22

SATA_LED#
SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0
SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1

B10

GLAN_DOCK#/GPIO56

B28
B27

GLAN_COMPI
GLAN_COMPO

N7
AJ27

DPRSTP#
DPSLP#

AJ25
AE23

AE7

HDA_RST#

AF4
AG4
AH3
AE5

HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3

AG5

HDA_SDOUT

AG7
AE8

HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO34

SATA_LED#

AG8

SATALED#

C736 1
C738 1

AJ16
AH16
2 SCD01U50V2KX-1GP SATA_TXN0_C AF17
2 SCD01U50V2KX-1GP SATA_TXP0_C AG17

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

C742 1
C745 1

AH13
AJ13
2 SCD01U50V2KX-1GP SATA_TXN1_C AG14
2 SCD01U50V2KX-1GP SATA_TXP1_C AF14

+3VS

LPC_FRAME# 27,30
R219
GPIO23

TP185 TPAD30 1
2
10KR2J-3-GP

+1.05VS

KA20GATE 30
H_A20M# 3
H_DPRSTP#

R458
56R2J-4-GP

H_DPRSTP# 4,7,36
H_DPSLP# 4

H_FERR#_R

1
R465

2
56R2J-4-GP

FERR#

AJ26

CPUPWRGD

AD22

H_PWRGD 4

IGNNE#

AF25

H_IGNNE# 3

INIT#
INTR
RCIN#

AE22
AG25
L3

H_INIT# 3
H_INTR 3

NMI
SMI#

AF23
AF24

H_NMI

STPCLK#

AH27

H_STPCLK# 3

THRMTRIP#

AG26

PECI

AG27

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

AH11
AJ11
AG12
AF12

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

AH9
AJ9
AE10
AF10

HDA_BIT_CLK
HDA_SYNC

27,30

LAN_TXD0
LAN_TXD1
LAN_TXD2

AF6
AH4
ACZ_RST#_R

SRN33J-4-GP

2 GLAN_COMP
24D9R2F-L-GP

D13
D12
E13

LAN / GLAN
CPU

8
7
6
5

LAN_RXD0
LAN_RXD1
LAN_RXD2

H_FERR# 3
+3VS
R553

2 10KR2J-3-GP

KBRCIN# 30
+1.05VS

R131
1
2
56R2J-4-GP

H_SMI# 3

H_THERMTRIP_R

1
2
R472
54D9R2F-L1-GP

PM_THRMTRIP-A# 3,7

Placed Within 2" from

SATA

1
2
3
4

45 HDA_RST#_VGA
45 HDA_BITCLK_VGA
45 HDA_SYNC_VGA
45 HDA_SDOUT_VGA

ACZ_RST#_R
ACZ_BIT_CLK
ACZ_SYNC_R
ACZ_SDATAOUT_R

LAN_RSTSYNC

F14
G13
D14

IHDA

RN30

C13

A20GATE
A20M#

LPC_AD[0..3]

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

C716
SC1U10V3KX-3GP

SRTCRST# new signal Pin

C23
C24

U75A
ICH_RTCX1
ICH_RTCX2

RTC
LPC

0311 SI

C319
SC1U10V3KX-3GP

SM_INTRUDER#

330KR2F-L-GP
1
2
R490

X-32D768KHZ-46GP

C695
SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

C696

2
20KR2J-L2-GP

4
2

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

SATA_CLKN
SATA_CLKP

AH18
AJ18

SATARBIAS#
SATARBIAS

AJ7
AH7

ICH9

CLK_PCIE_SATA# 16
CLK_PCIE_SATA 16
SATARBIAS

2
24D9R2F-L-GP

1
R520

Place within 500 mils of


ICH9 ball

ICH9M-GP-NF

+3VL
+RTCVCC

U79

1 R554
2
0R0402-PAD

RTC_PWR_L

5
3
2

R555

0429 PV

RTC_PWR

1
CH715FPT-GP

C776
SC1U10V3ZY-6GP

W=20mils

RTC1

BATT1.1

W=20mils

W=20mils

1
4

1KR2J-1-GP

W=20mils

AMP-CON3-8-GP

20.D0201.103
0311 SI
<Core Design>
A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

integrated VccSus1_05,VccSus1_5,VccCL1_5

INTVRMEN

High=Enable

Low=Disable

Title

integrated VccLan1_05VccCL1_05

LAN100_SLP

High=Enable

Low=Disable

Size

Document Number

ICH9-M (2 of 5)

Date: Monday, May 05, 2008


5

VITAS

Rev

SA
Sheet

18
1

of

48

R165
10KR2J-3-GP

VRMPWRGD

D21

R156
PCIE_WAKE#

1
R492

2 ICH_TP7
DY 0R2J-2-GP

A20

10KR2J-3-GP

1105 DB
30
30
32

EC_SCI#

EC_SCI#
EC_SWI#
SB_PWR_LED
+3VS
10KR2J-3-GP
2
1

0312 SI

16

CLK_SATA_OE#

R544

TP128
TP187

GPIO17
GPIO18

TP176
TP181
TP129

GPIO22
GPIO27
GPIO28
GPIO38

TP127
+3VS

R150

TP122
TP125
TP123

2 8K2R2J-3-GP

4 OF 6
U75D

PERN2
PERP2
PETN2
PETP2

J29
J28
K27
K26

PERN3
PERP3
PETN3
PETP3

G29
G28
H27
H26

PERN4
PERP4
PETN4
PETP4

E29
E28
F27
F26

17

SPI_CLK
SPI_CS#0
SPI_CS#1

SPI_CS#1

1218

TPAD30 TP119
TPAD30 TP124

0321 SI
R547
1

2
22D6R2F-L1-GP

D23
D24
F23

SPI_MOSI
SPI_MOSO

D25
E23

USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
USB_OC#8
USB_OC#9
USB_OC#10
USB_OC#11

N4
N5
N6
P6
M1
N2
M4
M3
N3
N1
P5
P3

USB_RBIAS_PN AG2
AG1

Y27
Y26
W29
W28

DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1

7
7
7
7

DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP

AB27
AB26
AA29
AA28

DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2

7
7
7
7

DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

AD27
AD26
AC29
AC28

DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3

7
7
7
7

DMI_CLKN
DMI_CLKP

DMI_ZCOMP
DMI_IRCOMP

PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP

USBP0N
USBP0P
USBP1N
USBP1P
SPI_CLK
USBP2N
SPI_CS0#
USBP2P
SPI_CS1#/GPIO58/CLGPIO6 USBP3N
USBP3P
SPI_MOSI
USBP4N
SPI_MISO
USBP4P
USBP5N
OC0#/GPIO59
USBP5P
OC1#/GPIO40
USBP6N
OC2#/GPIO41
USBP6P
OC3#/GPIO42
USBP7N
OC4#/GPIO43
USBP7P
OC5#/GPIO29
USBP8N
OC6#/GPIO30
USBP8P
OC7#/GPIO31
USBP9N
OC8#/GPIO44
USBP9P
OC9#/GPIO45
USBP10N
OC10#/GPIO46
USBP10P
OC11#/GPIO47
USBP11N
USBP11P
USBRBIAS
USBRBIAS#

USB

TPAD30

D20 LAN_RST#1

RSMRST#

D22

CK_PWRGD

R5

CLPWROK

R6

PWRBTN#_SB 30

0429 PV

1 R162
2
0R0402-PAD

RSMRST#_SB 33

PM_SLP_M#

SLP_M#

B16

CL_CLK0
CL_CLK1

F24
B19

CL_CLK0 7

CL_DATA0
CL_DATA1

F22
C19

CL_DATA0 7

CL_VREF0
CL_VREF1

C25
A19

CL_RST0#
CL_RST1#

F21
D18

GPIO24/MEM_LED
GPIO10/SUS_PWR_ACK
GPIO14/AC_PRESENT
GPIO9/WOL_EN

A16
C18
C11
C20

+1.5VS

DMI_IRCOMP_R

ALL_PWRGD 36,38,39,40,4

TP178
+3VS
C

R446
3K24R2F-GP

CL_VREF0_ICH
CL_VREF1_ICH
CL_RST#0

7
+3VALW

GPIO24
GPIO10

TP179
TP190
R496

DY

0312 SI

R445
453R2F-1-GP

R497
453R2F-1-GP

DY

10KR2J-3-GP

1108 DB
RP2

Q21
36

USB20_N0 22
USB20_P0 22

USB3

USB20_N2 22
USB20_P2 22

External USB3

USB20_N4 22
USB20_P4 22
26
26
22
22
25
25

USB20_N10 15
USB20_P10 15

CLK_EN#

VRMPWRGD

1105 DB

2N7002E-1-GP

Bluetooth

GPIO22
R489

Card Reader
CAM

+3VS

RN57
4
3

+3VS

1108 DB

1
2

DY

+3VALW

USB

External USB2
WLAN

USB_OC#8
USB_OC#3
ICH_RI#
XDP_DBRESET#

ICH9M-GP-NF

2
8K2R2J-3-GP

Pair

1
2
3
4
5

PM_BATLOW#_R
SMB_ALERT#
USB_OC#10
USB_OC#9

10
9
8
7
6

USB_OC#0
USB_OC#1
USB_OC#6
USB_OC#2

SRN10KJ-L3-GP

USB3

FREE

External USB3

FREE

External USB2

FREE

WLAN

BLUETOOTH

CARD READER

FREE

10

CAMERA

11

FREE

1109 DB
RP1
USB_OC#7
USB_OC#11
USB_OC#5
USB_OC#4
+3VALW

1
2
3
4
5

+3VALW

SRN10KJ-L3-GP
A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

Document Number

ICH9-M (2 of 5)

Date: Monday, May 05, 2008


3

+3VALW

10
9
8
7
6

Device

1012 DB
4

2
DY 0R2J-2-GP

R447
R450
24D9R2F-L-GP

SRN10KJ-5-GP

1112 DB

CK_PWRGD 16
1
M_PWROK 7 R218

M_PWROK

+3VS

CLK_PCIE_ICH# 16
CLK_PCIE_ICH 16

GPIO18
SIRQ

SPKR
MCH_SYNC#
TP3
PWM0
PWM1
PWM2

R3

LAN_RST#

DY

T26
T25

USB20_N6
USB20_P6
USB20_N7
USB20_P7
USB20_N8
USB20_P8

TP126

M7
AJ24
B21
AH20
AJ20
AJ21

TACH1/GPIO1
TACH2/GPIO6
TACH3/GPIO7
GPIO8
LAN_PHY_PWR_CTRL/GPIO12
ENERGY_DETECT/GPIO13
TACH0/GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
GPIO27
GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
GPIO49
GPIO57/CLGPIO5

B13

PWRBTN#

ICH9M-GP-NF

AF29
AF28
AC5
AC4
AD3
AD2
AC1
AC2
AA5
AA4
AB2
AB3
AA1
AA2
W5
W4
Y3
Y2
W1
W2
V2
V3
U5
U4
U1
U2

ICH_TP3

SST

TPAD30 TP120
TPAD30 TP121

1218

DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP

28
SB_SPKR
7 MCH_ICH_SYNC#

.
.
. .

C29
C28
D27
D26

PERN5
PERP5
PETN5
PETP5

7
7
7
7

VRMPWRGD

BATLOW#

G20
M2

L29
L28
TXN2_CM27
TXP2_CM26

DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0

WAKE#
SERIRQ
THRM#

DPRSLPVR/GPIO16

1
1

V27
V26
U29
U28

C10

PWROK

24

PM_SLP_S3# 23,24,30,33,39,40,41,42
PM_SLP_S4# 30,31,33,39
PM_SLP_S5#
R159
10KR2J-3-GP
TP131
1
2
GPIO26
TP182
PM_PWROK
PM_PWROK 7,33
R169
M_PWROK
1
2
1112 DB
0R2J-2-GP
PM_DPRSLPVR 7,36
R545 1
DY 2
100KR2J-1-GP
PM_BATLOW#_R

PCIE_RXN2
PCIE_RXP2
C691 SCD1U10V2KX-5GP 2
C690 SCD1U10V2KX-5GP 2

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP

CLKRUN#

PCIE_RXN2
PCIE_RXP2
PCIE_TXN2
PCIE_TXP2

WLAN

PERN1
PERP1
PETN1
PETP1

AG19
AH21
AG21
A21
C12
C21
AE18
K1
AF8
AJ22
A9
D19
L1
AE19
AG22
AF21
AH24
A8

S4_STATE#/GPIO26

ICH_SUSCLK

26
26
26
26

1
1

N29
N28
TXN1_C P27
TXP1_C P26

PCI-Express

PCIE_RXN1
PCIE_RXP1
C689 SCD1U10V2KX-5GP 2
C688 SCD1U10V2KX-5GP 2

Direct Media Interface

PCIE_RXN1
PCIE_RXP1
PCIE_TXN1
PCIE_TXP1

SPI

LAN

23
23
23
23

STP_PCI#
STP_CPU#

E20
M5
AJ23

C16
E16
G17

SIRQ

P1

1 2

+3VALW
2

SMBALERT#/GPIO11

A14
E19

PCIE_WAKE#

23,26,30 PCIE_WAKE#
30 SIRQ
24,45 THERM_SCI#

A17

L4

SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#

PMSYNC#/GPIO0

SMB_ALERT#
TPAD30
STP_PCI#
STP_CPU#

STP_PCI#
STP_CPU#

SUS_STAT#/LPCPD#
SYS_RESET#

SRN10KJ-6-GP

CLK_ICH14 16
CLK48_ICH 16
ICH_SUSCLK

M6

H1
AF3

8
7
6
5

C687
SCD1U10V2KX-4GP
2

16
16

R4
G19

TP177

GPIO11 Reserved for future


R552
8K2R2J-3-GP

30 PM_CLKRUN#

PM_SYNC#

CLK14
CLK48

1
2
3
4

RI#

SATA1GP
SATA3GP
SATA2GP
SATA0GP

XDP_DBRESET#

3 XDP_DBRESET#
+3VS

F19

SATA0GP
SATA1GP
SATA2GP
SATA3GP

3K24R2F-GP

ICH_RI#

AH23
AF19
AE21
AD20

STP_PCI#
STP_CPU#

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37

C731
SCD1U10V2KX-4GP
2
1

1
2
D

SATA
GPIO

ICH_SMB_CLK
ICH_SMB_DATA
LINKALERT#
ME_EC_CLK1
ME_EC_DATA1

21
ICH_SMB_CLK
21 ICH_SMB_DATA

SRN10KJ-5-GP

RN27

SMB

DY

+3VS

3 OF 6
U75C
G16 SMBCLK
A13 SMBDATA
E17 LINKALERT#/GPIO60/CLGPIO4
C17 SMLINK0
B18 SMLINK1

Clocks

RN52

3
4

SRN2K2J-1-GP

2
1

4
3

+3VS

RN51

3
4

+3VALW

RN49
SRN10KJ-5-GP

+3VALW

SYS GPIO
Power MGT

+3VALW

MISC
GPIO
Controller Link

2
1

VITAS
1

Rev

SA
Sheet

19

of

48

6 OF 6

DY

DY

2
C678

C299

1
2

DY

VCC_GLAN_PLL
C295
SC10U6D3V5MX-3GP

1218
VCCGLAN1_5

1mA
1

DY

A27

VCCGLANPLL

D28
D29
E26
E27

VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5

1
2

1
2

1
2
1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

1
2

18mA

+3VALW

1
2
0R0603-PAD

0429 PV

VCCLAN3_3
VCCLAN3_3

+3VALW

R546

DY

C324

A12
B12

0429 PV

+3VS

0117 DB

0429 PV

177mA

DY
2

VCCLAN1_05
VCCLAN1_05

1
2
0R0402-PAD

+3VALW

SCD022U16V2KX-3GP

A10
A11

R474
SB_VCCCL3_3

1218

0429 PV

0429 PV

C770

A24
B24

1106 DB

C350

SB_VCCSUS3_3USB

C771

1
2
0R0603-PAD

G23 VCCSUS1_5[3]

VCCCL3_3
VCCCL3_3

DY

G22 VCCSUS1_05[3]

VCCCL1_5

C381

C338

DY

VCCCL1_05

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

C351

R188
SB_VCCSUS3_3

SC4D7U6D3V3MX-2GP

+3VS

1
2
0R0402-PAD

1106 DB

1
2
0R0402-PAD

C769

0117 DB

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCCUSBPLL

AC12
AC13
AC14
AJ5

1
2

1
2

VCC1_5_A
VCC1_5_A

VCC1_5_A

G10
G9

AA7
AB6
AB7
AC6
AC7

1
2
1

CORE
VCCP_CORE

1
2

T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7

AC21

A26
+3VS

PCI

2
1
2

1
2

1
2

1
2

C293
SC2D2U10V3KX-1GP

1
2

80mA
SC4D7U6D3V3KX-GP

1218

DY

SCD1U10V2KX-4GP

DY

1
2

1
2

0R2J-2-GP

0R2J-2-GP

C749
VCCLAN1D05
1
SCD1U10V2KX-4GP

0117 DB

R438
1

23mA

DY

2
1
2

R107
1

AF1

TP130
TP132

C346

R542

32mA

0429 PV

C294

C328

C323
SCD1U16V2ZY-2GP

+1.5VS

DY+1.5VS

VCCSUS3_3

32mA

C322

R535

GLAN POWER

SCD1U10V2KX-4GP

SCD1U16V2ZY-2GP

C354

A18
D16
D17
E22

VCC3_3=278mA

SB_VCCHDA
C765

SCD1U10V2KX-5GP

C748

VCC1_5_A
VCC1_5_A

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

VCCSUS1_5[2]

C321

+1.05VS

1
2
0R0603-PAD

+3VS

0429 PV

SB_VCCSUSHDA

SC1U6D3V2ZY-GP

SB_VCCLAN3_3

1D5V_USB_S0

AC18
AC19

F18

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

USB CORE

18mA in S0;50mA in S3/S4/S5

1
2
0R0402-PAD

C369
SCD1U16V2ZY-2GP

R202

DY

SCD1U16V2ZY-2GP

+3VS

C764

VCC1_5_A

VCCSUS1_5

C316

0429 PV

SCD1U16V2ZY-2GP

USBPLL=10mA

R225

1
2
0R0603-PAD
C374
SCD1U10V2KX-4GP

C348

AC9

AD8 VCCSUS1_5[1]

R121
SB_V_CPU_IO

SCD1U16V2ZY-2GP
+3VS

+1.05VS

1mA

0429 PV

TP133

1
1

SCD1U16V2ZY-2GP

0429 PV

C331

SCD1U16V2ZY-2GP

+1.5VS

SCD1U16V2ZY-2GP

0429 PV

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

VCCSUS1_5

2
1

SB_VCC_1_5_A

1
2
0R0603-PAD

AC11
AD11
AE11
AF11
AG10
AG11
AH10
AJ10

VCCSUS1_05[1]
VCCSUS1_05[2]

0429 PV

1 R452
2
C760 0R0402-PAD

SCD1U10V2KX-4GP

R206

AC8
F17

50mA
1 R444
2
0R0402-PAD

C326

1 R477
2
0R0603-PAD

+3VS

1
2
0R0603-PAD

SCD1U10V2KX-4GP

+1.5VS

VCCSUS1_05
VCCSUS1_05

R204
S/B_PCI_VCCP_CORE_S0
C368
C372
C376

SCD1U16V2ZY-2GP

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

ATX

SCD1U16V2ZY-2GP

1231 SI

0429 PV

1
2

2
1

1231 SI

C773

AC16
AD15
AD16
AE15
AF15
AG15
AH15
AJ15

VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3

B9
F9
G3
G6
J2
J7
K7

0502 PV

3D3V_VCCPCORE_ICH_S0

SCD1U16V2ZY-2GP

0429 PV

C340
SC1U10V3ZY-6GP

C367
SC1U10V3ZY-6GP

1mA

SB_SATA_USB_1_5_A

1
2
0R0805-PAD

R549
10R2J-2-GP

D30
CH751H-40PT

V5REF_S5

SATA+USB=1.56A

R203

AJ3

ARX

+1.5VS

VCCSUSHDA

AD19
AF20
AG24
AC20

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

+5VALW

AJ4

VCCSATAPLL

VCC3_3
VCC3_3
VCC3_3
VCC3_3

+1.5VS

23mA

2
1
IND-1D2UH-5-GP L30
C677

SCD1U16V2ZY-2GP

+3VALW

VCCHDA

AJ19

AC10

DY

C682

EC15
SCD1U16V2ZY-2GP

C684
SC1U10V3ZY-6GP

0429 PV

SCD1U16V2ZY-2GP

SC1U10V3ZY-6GP

VCC3_3

SB_VCC_3_3_C

C325

SCD1U16V2ZY-2GP

Layout Note:
Place near ICH8

1231 SI

C763

AJ6

SCD1U16V2ZY-2GP

V5REF_S0

VCC3_3

C680
SCD01U16V2KX-3GP

VCCDMI

C353

1D5V_DMIPLL_ICH_S0

SCD1U16V2ZY-2GP

D29
CH751H-40PT

VCC3_3

AG29

DY

1D5V_DMIPLL_ICH_S0

SCD1U16V2ZY-2GP

1mA

R530
10R2J-2-GP

AB23
AC23

C339

DY

+1.05VS

1
2
0R0603-PAD

SCD1U16V2ZY-2GP

VCCA3GP

+5VS

SC1U10V3ZY-6GP

+3VS

C728

SC10U10V5ZY-1GP

*Within a given well, 5VREF needs to be up before the


corresponding 3.3V rail

C320

VCCDMI
VCCDMI
V_CPU_IO
V_CPU_IO

C335

DY

SC4D7U6D3V3MX-2GP

+1.5VS_APLL

L5

1
2
IND-1D2UH-5-GP

R29
W23
Y23

C360

SC10U10V5ZY-1GP

+1.5VS

VCCDMIPLL

C344

SCD1U10V2KX-4GP

47mA

VCCPSUS

2
2

C317
SC2D2U10V3ZY-1GP

SC10U10V5ZY-1GP

C686

VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B

R153
SB_VCC1_05
SCD1U10V2KX-4GP

C685

TC19
SC10U10V5ZY-1GP

DY

ST220U2D5VBM-LGP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

V5REF_SUS

AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29
F25
G25
H24
H25
J24
J25
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T24
T27
T28
T29
U24
U25
V24
V25
U23
W24
W25
K23
Y24
Y25

1.13A
SCD1U10V2KX-4GP

C289

DY

V5REF

Layout Note:Place near ICH9M

A15
B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

SCD1U10V2KX-4GP

C306

0429 PV

AE1

VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05

SCD1U16V2ZY-2GP

V5REF_S5

A6

VCCRTC

SCD1U16V2ZY-2GP

+1.5VS_PCIE
R443
1
2
0R0805-PAD

C717
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

657mA

+1.5VS

C726

U75F
A23
V5REF_S0

6uA in G3

VCCPUSB

+RTCVCC

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

VCCGLAN3_3
ICH9M-GP-NF
Title

3D3V_GLAN_S0

ICH9 (3/5)
Size

R134 0R2J-2-GP

Document Number

0117 DB
4

Rev

VITAS
Date: Monday, May 05, 2008
3

SA
Sheet
1

20

of

48

5 OF 6
U75E

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

ICH_GND1
A1
A2
A28
A29 ICH_GND2
AH1
AH29
AJ1 ICH_GND3
AJ2
AJ28
AJ29 ICH_GND4
B1
B29

+3VS

3
4

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

RN48
SRN2K2J-1-GP

+3VS

2
1

AA26
AA27
AA3
AA6
AB1
AA23
AB28
AB29
AB4
AB5
AC17
AC26
AC27
AC3
AD1
AD10
AD12
AD13
AD14
AD17
AD18
AD21
AD28
AD29
AD4
AD5
AD6
AD7
AD9
AE12
AE13
AE14
AE16
AE17
AE2
AE20
AE24
AE3
AE4
AE6
AE9
AF13
AF16
AF18
AF22
AH26
AF26
AF27
AF5
AF7
AF9
AG13
AG16
AG18
AG20
AG23
AG3
AG6
AG9
AH12
AH14
AH17
AH19
AH2
AH22
AH25
AH28
AH5
AH8
AJ12
AJ14
AJ17
AJ8
B11
B14
B17
B2
B20
B23
B5
B8
C26
C27
E11
E14
E18
E2
E21
E24
E5
E8
F16
F28
F29
G12
G14
G18
G21
G24
G26
G27
G8
H2
H23
H28
H29

U76
12,13,16,26 ICH_SMBDATA

19

ICH_SMB_CLK

ICH_SMB_CLK

ICH_SMB_DATA

ICH_SMB_DATA 19

ICH_SMBCLK 12,13,16,26

2N7002EDW-GP

SMBUS
C

TP184
TP175

NCTF PIN

Wistron Corporation

TP183

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
TP174
Title

ICH9-M (4 of 4)
Size

Document Number

ICH9M-GP-NF
Date: Monday, May 05, 2008
5

Rev

SA

VITAS
4

Sheet
1

21

of

48

USB PORT

+5V_USB2

TC20
ST100U10VCM-GP

SCD1U16V2ZY-2GP SC1000P50V3JN-GP

1029 DB

R198
19

1
2
0R0402-PAD

USB20_P0

1
C43
SCD1U16V2ZY-2GP

USB20_N4

TP33 TP28-75-GP

USB20_P4

TP31 TP28-75-GP

USB20_N2

TP29 TP28-75-GP

USB20_P2

TP25 TP28-75-GP

GND

TP11 TP28-75-GP

+5VS

TP22 TP28-75-GP

NUMLK_LED_PWM 1

TP19 TP28-75-GP

GND

TP23 TP28-75-GP

GND

TP48 TP28-75-GP

+5VS
+5V_USB1

0311 SI

11
1

19
19
19
19

USB20_N4
USB20_P4
USB20_N2
USB20_P2

+5VS

NUMLK_LED_PWM

330R2J-3-GP

6
5
4

C719
SCD1U10V2KX-4GP

+5V

USB20_P4

2
BT1

BT_LED 32
WL_PRIORITY 26
BT_PRIORITY 26
BT_DET# 30

USB7-

TP156 TP28-75-GP

BT_LED

TP153 TP28-75-GP

WL_PRIORITY

TP157 TP28-75-GP

BT_PRIORITY

TP154 TP28-75-GP

BT_DET#

TP158 TP28-75-GP

1
2
0R0402-PAD

Q25
AO3403-GP

+3VS

BT_EN#

A BT_EN#_C
1SS355PT-GP

0429 PV

GND
GND
GND
GND
GND
GND
GND

S1
S4
S7
P5
P6
8
9

TP135

ODD_DP
ODD_MD

TPAD30

A+
AB+
BNP1
NP2

R541

DY

+3VAUX_BT

R556
100KR2J-1-GP

C783

2
D31
30

P1
P4

C779

USB7-

DP
MD

SKT-SATA7P+6P-22-GP

1106 DB

R557
1

BT_EN#_1

10KR2J-3-GP

DY

C780
SC4D7U10V5KX-1GP

USB20_N7

SATA_RXP1_C
SATA_RXN1_C

NP1
NP2

SC1U10V3ZY-6GP

R278
19

2 C772
2 C775

S2
S3
S6
S5

MAX 150mA

TP152 TP28-75-GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY DY DY

TP155 TP28-75-GP

+5V
+5V

EC32 EC33 EC34

USB7+

10

GND

USB7+
USB7-

TP151 TP28-75-GP

ODD1

P2
P3

1108 DB

2
3
4
5
6
7
8

+3VAUX_BT

0108 DB

10KR2J-3-GP

18 SATA_TXP1
18 SATA_TXN1
1
18 SATA_RXP1
SCD01U50V2KX-1GP
1
18 SATA_RXN1
SCD01U50V2KX-1GP

0318 SI

EC31
SCD1U16V2ZY-2GP

TC21

0502 PV

0502 PV

C626
SCD1U10V2KX-4GP

C766

IP4220CZ6-GP

DY

EC58

USB20_N4

6
5
4

ESD I/O4
VP
ESD I/O3

SC10U10V5ZY-1GP

+3VAUX_BT

ESD I/O1
GND
ESD I/O2

SCD1U16V2ZY-2GP

USB20_N2

1
2
3

SCD1U16V2ZY-2GP

USB20_P2

U5

BLUETOOTH

0311 SI

ODD Connector

1026 DB

0502 PV

SKT-SATA22P-20-GP

0317 SI

+5VS

IP4220CZ6-GP

ETY-CON8-11-GP

C777

MLX-CON10-6-GP-U

+5V

ESD I/O4
VP
ESD I/O3

NUMLK_LED#

NUMLK_LED#

ESD I/O1
GND
ESD I/O2

1
2
3

USB20_N0

30

0502 PV

C774

USB20_P0

EC60

2
3
4
5
6
7
8
9
10
12

R11

1016 DB

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
NP2
24

1025 DB

1109 DB

U21

1
1

0429 PV

USB1

0318 SI

2
3
4
5
6
7

SCD01U50V2KX-1GP
SATA_RXN0_C
2
SATA_RXP0_C
2
SCD01U50V2KX-1GP

SC10U10V5ZY-1GP

TP47 TP28-75-GP

SCD1U16V2ZY-2GP

TP42 TP28-75-GP

SCD1U16V2ZY-2GP

+5V_USB1

FUSE-2A8V-3GP

+5V_USB1

100 mil

C761

F1

C757

18 SATA_RXN0
18 SATA_RXP0

+5V_USB1

+5V

18 SATA_TXP0
18 SATA_TXN0
SKT-USB-131-GP-U

USB0+

100 mil

HDD1

23
NP1
1

2
3
4
5
7

C725

DY

C727

8
6
1

0429 PV

1
FUSE-2A8V-3GP

100 mil

USB2

USB0-

1
2
0R0402-PAD

USB20_N0

19

F3

SATA HD Connector

R196

+5V_USB2

+5V

DY
1101 DB

1 C782

SCD1U16V2KX-3GP

<Core Design>

1102 DB

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

1108 DB

Title

R277
19

USB20_P7

1
2
0R0402-PAD

0429 PV

HDD/CDROM/USB/BT

USB7+
Size
A3

Document Number

Date: Monday, May 05, 2008

Rev

SA

VITAS
Sheet

22

of

48

0429 PV
2

DVDD33

C390

C371
SCD1U16V2ZY-2GP

DY

SCD01U16V2KX-3GP
49D9R2F-GP
MDIS1_LAN
49D9R2F-GP

DY2

C329

SCD01U16V2KX-3GP

RTL8102EL-VB-GR-GP

49D9R2F-GP

2
1

DY

G
S

PM_SLP_S3#

DVDD15

0312 SI

DVDD33

DVDD33
ISOLATE#

DY R529
10KR2J-3-GP
LAN_EECS
LAN_EESK
LAN_EEDI
LAN_EEDO

1
2
3
4

VCC
DC
ORG
GND

DY
C744
SCD1U16V2ZY-2GP

DSM_ISOLATE# 30

1KR2J-1-GP
R235
15KR2F-GP

0407 PV

71.08102.A03

<Core Design>

0227 SI
19,26,30 PCIE_WAKE#
7,17,26,27,30,44 PLT_RST#
19
PCIE_TXP1
19
PCIE_TXN1
16 CLK_PCIE_LAN
16 CLK_PCIE_LAN#
19
PCIE_RXP1
19
PCIE_RXN1

PCIE_WAKE#
PLT_RST#
PCIE_TXP1
PCIE_TXN1
CLK_PCIE_LAN
CLK_PCIE_LAN#
PCIE_RXP1
C370 SCD1U10V2KX-5GP 2
PCIE_RXN1
C375 SCD1U10V2KX-5GP 2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

1101 DB

Title

1
1

Size
A3

Document Number

Date: Monday, May 05, 2008


A

8
7
6
5

AT93C46DN-SH-B-GP

R560

CS
SK
DI
DO

DVDD33

DY

U77

0422 PV

R234
DY 1KR2J-1-GP

1
R526
3K6R3-GP

LAN_EESK
LAN_EEDI
DVDD33
LAN_EEDO
LAN_EECS
DVDD15

48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33

EESK
EEDI/AUX
VDD33
EEDO
EECS
DVDD12
TEST5
TEST4
TEST3
TEST2
NC#38
VDD33
ISOLATE#
TEST1
TEST0
CLKREQ#

For 93C56
+3VS

DVDD33

DVDD15

LAN_X2
LAN_X1

CTRL15

LAN_DSM# 30

EVDD18
PCIE_HSOP
PCIE_HSON

C330

VCTRL12A
AVDD33
MDIP0
MDIN0
NC#5
MDIP1
MDIN1
NC#8
NC#9
NC#10
NC#11
NC#12
NC#13
NC#14
DVDD12
VDD33

DVDD15
EVDD18

MDIN1

DY

DY2

19,24,30,33,39,40,41,42

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

DVDD15
DVDD33

0317 SI
Q23
BSS138-7F-GP

MDIP1
MDIN1

30 LAN_PWR_ON

65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49

8101_RSET

GND
RSET
VCTRL12D
NC#62
CKXTAL2
CKXTAL1
NC#59
DVDD12
LED0
LED1
LED2
LED3
VDD33
NC#52
GPO
GPI
DVDD12

MAPIN0
MAPIN1
LANWAKE#
PERST#
DVDD12
NC#22
HSIP
HSIN
EGND
REFCLK_P
REFCLK_M
EVDD12
HSOP
HSON
EGND
NC#32

27
27

LAN_PY2

17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

MDIP0
MDIN0

AVDD18
AVDD33
MDIP0
MDIN0
AVDD18
MDIP1
MDIN1
AVDD18

8101E use this circuit, 8102E dummy this circuit

DY

2
2

LAN_DSM#

U24

27
27

2N7002E-1-GP

YELLOW_LED# 27
GREEN_LED# 27

MDIP1

40 mils

AO3413-GP
Q24

LAN_PY1
SC1000P50V3JN-GP

1
2
R470
100KR2J-1-GP

EEPROM LED OPTION USE '01'


(DEFINED IN SPEC)
=> LED0 : ACT (Yellow)
=> LED1 : LINK (Green)
(BOTH 10/100 AND GIGA CHIP)

2
SC15P50V2JN-2-GP

R182
2K49R2F-GP
1

MDIN0

C714

.
. .
.
G

C366
1
2 SC15P50V2JN-2-GP

R548 should be 2.49K 1% ohm for 8102E,


R548 should be 2K 1% for 8101E.

MDIS0_LAN
49D9R2F-GP

1023 DB

LAN_PY2

SCD1U16V2ZY-2GP

0317 SI

C358

DY

+3V_LAN

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
C751

Q22

1
R181
1
R180
1
R179
1
R178

R473
1MR2J-1-GP

C739

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C380

SCD1U16V2ZY-2GP

C391

C746

1
2

EC30
DVDD15

0429 PV

1106 DB

DY 0R5J-5-GP
S

DVDD15

X4
XTAL-25MHZ-67GP

MDIP0

SCD1U16V2ZY-2GP

R491

R510

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP

1012 DB

1
2
0R0603-PAD
C741

0502 PV

C740

1012 DB

0502 PV

CTRL15

C337

C735

+3VALW

40 mils

C389

2
0R0603-PAD

DY SCD1U16V2ZY-2GP DY SCD1U16V2ZY-2GP

0502 PV

SCD1U16V2ZY-2GP

DVDD33

R241

+3V_LAN

C734

C733

SCD1U16V2ZY-2GP

C732

0502 PV

AVDD18

1106 DB

AVDD18

40 mils

C752

1
2

1
2
0R0603-PAD

SC1U10V3ZY-6GP

0505 PV

C758
SCD1U16V2ZY-2GP

0502 PV

EVDD18

AVDD33

R500

DY

0R3-0-U-GP

EVDD18

R501

RTL8101E
VITAS

Sheet
E

Rev

SA
23

of

48

+5VS

0303 SI
1

FAN1_VCC
R18
10KR2J-3-GP

FAN1

C489
SC10U10V5ZY-1GP

D3
MMBD4148-F-GP

C27
SCD1U16V2ZY-2GP

*Layout* 15 mil

1
FAN1
RESET#
FG1
CLK

1
2
4
14

THERM#
THERM_SET

13
3

SGND
SGND
SGND

8
10
12

DGND
DGND

5
17

VCC

20

DVCC

7
9
11

DXP1
DXP2
DXP3

15
16
18

ALERT#
SDA
SCL

19

NC#19

1
R382
100KR2F-L1-GP

TP30 TP28-75-GP

SENSE2 for System

G792_DXN2

G7921SF1U-GP

B
C532
SC2200P50V2KX-2GP

Q17
CH3904PT-GP

SENSE3 for GPU

G110

GTHERMDA 45

V_DEGREE
=(((Degree-72)*0.02)+0.34)*VCC

TP32 TP28-75-GP

GND

G792_DXP2

SMBD_G792
SMBC_G792

TP28 TP28-75-GP

V_DEGREE

Setting T8 as
85 Degree

19,45 THERM_SCI#

FAN1_VCC

G792_ALERT#

R380
10KR2J-3-GP

FAN1_FG1

G792_SUSCLK

+3VS

5V_G792_S0

R383
100KR2J-1-GP

*Layout* 30 mil

G792_RST# 33

74.07921.079

U62

R379
66K5R3F-GP

4
ACES-CON3-4-GP-U

G792_RST#

1012 DB

C541
SCD1U25V3KX-GP

C29
SC1KP50V2KX-1GP

C556
SCD1U16V2ZY-2GP

+5VS

1
2
R377
100R2F-L1-GP-U

*Layout* 15 mil

1
2

1
2

1
2

C25
SC4D7U10V5ZY-3GP

3
2

FAN1_VCC

FAN1_FG1
+5VS

Place near chip as close


as possible

GTHERMDC 45
H_THERMDA 3

DXP1:108 Degree
DXP2:H/W Setting
DXP3:88 Degree

+3VS

GAP-CLOSE

C535
SC2200P50V2KX-2GP

C539
SC2200P50V2KX-2GP

SENSE1 for CPU

H_THERMDC 3
R378
10KR2J-3-GP

EC_RST#

.
.
. .

30

Q18

G792_ALERT#

G792_ALERT# 45
+5VS

3
4

2N7002E-1-GP

RN40
SRN2K7J-3-GP

2
1

+3VS

SMBD_G792

U59
19,23,30,33,39,40,41,42 PM_SLP_S3#
19 ICH_SUSCLK

1
2
3

A
B
GND

30

VCC

0115 DB

U61

DY

+5VALW

KBC_SCL1

KBC_SDA1 30

SMBC_G792

2N7002DW-7F-GP
G792_SUSCLK
R381

74AHCT1G08DCKR-1GP
R384

0R2J-2-GP
0R2J-2-GP

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Thermal/Fan Controllor
Size
Custom

Document Number

Date: Monday, May 05, 2008

Rev

SA

VITAS
Sheet

24

of

48

DY

CLK48_5158

1
22R2J-2-GP

R229

SD_DAT4/XD_WP#

XD_R/B#

SD_DAT3/XD_WE#

XD_ALE

XD_CE#

XD_CLE

12M_XO

RST#

MODE_SEL

X5
XTAL-12MHZ-21GP

DY

Reserve for 5158E used.

+3VS

R228 DY
270KR2F-GP
C388
SC27P50V2JN-2-GP
2
1

DY

0103 SI

1
22R2J-2-GP

12M_XI

5158E vendor suggest ues


5.6pF,
or use 48MHz directly by
Clock gne.

CR

SD_DAT2/XD_RE#

2
C387
SC27P50V2JN-2-GP
2
1

R720 resistor
need close pin
47.

R247
16

CR

CR

CR

R511
R519

1
R506

5158_VIN
0R2J-2-GP
+3VS_A

0R2J-2-GP

+3VS_D

0R2J-2-GP

USB20_P8

DP

AG33

A3V3_OUT

19

CR

SCD1U16V2ZY-2GP

DGND

38
XD_RDY/CF_D13

40

39

41
XD_ALE/CF_D4

42
XD_CE#/CF_D11

XD_CLE/CF_D3

43

44
RST#

46

45
MODE_SEL

37

33
32

CR

+3VS_D

CR
SD_DAT6/XD_D7/MS_D3

SD_DAT6/XD_D7/MS_D3/CF_D15

31

CF_CS0#

30

MS_INS#/CF_IORD#

29

MS_INS#

SD_DAT7/XD_D2/MS_D2/CF_IOWR#

28

SD_DAT7/XD_D2/MS_D2

SD_DAT0/XD_D6/MS_D0/CF_RST#

27

SD_DAT0/XD_D6/MS_D0

SD_DAT1/XD_D3/MS_D1/CF_IORDY

26

SD_DAT1/XD_D3/MS_D1_R

XD_D5/MS_BS/CF_A2

25

XD_D5/MS_BS

R561
1
CR 2
0R0402-PAD

RST#
C753
SCD1U16V2ZY-2GP

+3VS_D

0429 PV

R505

CF_DMARQ

C386

DY

R563
499KR2F-1-GP

0225 SI
1

MODE_SEL

XD_D4

R512
0R2J-2-GP
SD_DAT1/XD_D3/MS_D1_R 2 DY
1

RTS5158E-GR-GP

XD_D4

SD_CD#

SD_WP

CRYSTAL_SEL

0R2J-2-GP

XD_CD#

CR

CR

0313 SI

0225 SI

71.05158.A0G
VBUS_LED#

High is use
48MHz, NC is use
Crystal.

R525
100KR2J-1-GP

24

CF_A1/XD_D4

CF_D1/XD_CD#

CF_D2
17

CF_D9
16

GPIO0

CF_D10
15

14

13

CF_CD#

0103 SI

23

DGND

CF_DMACK#

D3V3_OUT

12

CF_A0/SD_CD#

11

22

VREG

21

CR

CARD_3V3

C743
SCD1U16V2ZY-2GP

9
10

CF_D0/SM_WPM#/SD_WP

+3VS_D

DY DY

VREG

C361
SC1U10V3KX-3GP

CR

5V_IN

19

C759
SCD1U16V2ZY-2GP

20

5158_VIN

CF_D8/SM_CD#

DY

1
1 0R2J-2-GP
0R2J-2-GP

18

CR

+3VS_CARD

D3V3

19

+3VS_A

0313 SI

2
R515 2
R213

+3VS
+5VS

SD_CLK/XD_D1/MS_CLK/CF_D7

2
1

CR

CR DY

C379
SC4D7U10V5ZY-3GP

34

SD_CLK/XD_D1/MS_CLK

1
CR 2SD_CLK/XD_D1/MS_CLK_L
R562 0R0402-PAD
1
CR 2 SD_CLK/XD_D1/MS_CLK_R
R564 0R0402-PAD

DM

SD_DAT5/XD_D0

AV33

SD_CMD

35

2
C755
SCD1U16V2ZY-2GP

C352
SC4D7U10V5ZY-3GP

C750

36

SC1U10V3KX-3GP

3
USB20_N8

+3VS_A
C754
SCD1U16V2ZY-2GP

1224 SI

0429 PV

SD_CMD

SD_DAT5/XD_D0/CF_D14

RREF

AV_PLL

C762
SC47P50V2JN-3GP

SD_DAT1

DY

R524
10KR2J-3-GP

DY
2

AV_PLL

1 RREF
CR 6K19R2F-GP

0103 SI

SD_DAT4/XD_WP#/CF_D6

2
R527

SD_DAT3/XD_WE#/CF_D5

+3VS_A

SCD1U16V2ZY-2GP

SD_DAT2/XD_RE#/CF_D12

R518
0R2J-2-GP
CR 1

CR

VREG

47

CR
C756

C357
SC1U10V3KX-3GP

XTLO

CR

XTLI

U23

AG_PLL

0103 SI

48

DY

1
CR 2
R513 0R0402-PAD

0103 SI

0429 PV

0103 SI

R558

CR

VBUS_LED_L

LED2
1A

Q6
K2

VBUS_LED

+3VS

DY

3
R1

LED-Y-74-GP

CR

R215
0R2J-2-GP

CR

2
R2
PDTC144EU-1-GP

330R2J-3-GP

+5VS

VBUS_LED#

4 IN1 CARD-READER (SD/SD IO/MMC/MMC4.0/MS/MS PRO/XD)


+3VS_CARD
CARD1

31

SD_VCC

28
38

MS_VCC
MS_VCC

19

VCC

SD_CMD
SD_CLK/XD_D1/MS_CLK_L

36
27

SD_CMD
SD_CLK

SD_DAT0/XD_D6/MS_D0
SD_DAT1
SD_DAT2/XD_RE#
SD_DAT3/XD_WE#

23
22
41
39

SD_DAT0
SD_DAT1
SD_DAT2
SD_DAT3

SD_CD#
SD_WP

42
21

SD_CD_DETECT
SD_WP_PROTECT

SD_WP

45
44

SD_WP1
SD_WP2

XD_D5/MS_BS
SD_DAT0/XD_D6/MS_D0
MS_INS#
SD_CLK/XD_D1/MS_CLK_R

26
30
34
37

MS_BS
MS_SDIO
MS_INS
MS_SCLK

35
32
29

MS_RESERVED#MS_7
MS_RESERVED#MS_5
SD_I/O

+3VS_CARD

DY

C778
SC4D7U10V5ZY-3GP

C781
SCD1U16V2ZY-2GP

SD_DAT1/XD_D3/MS_D1_R

CR
0313 SI

0313 SI

TP188

SD_DAT6/XD_D7/MS_D3
SD_DAT7/XD_D2/MS_D2
CARD1_SD_IO
1

NP1
NP2
NP3
NP4
NP5
NP6

TPAD28

NP1
NP2
NP3
NP4
NP5
NP6

CD
ALE

2
7

XD_CD#
XD_ALE

R/B#
RE#
CE#
CLE
WE#
WP#

3
4
5
6
8
9

XD_R/B#
SD_DAT2/XD_RE#
XD_CE#
XD_CLE
SD_DAT3/XD_WE#
SD_DAT4/XD_WP#

11
12
13
14
15
16
17
18

SD_DAT5/XD_D0
SD_CLK/XD_D1/MS_CLK
SD_DAT7/XD_D2/MS_D2
SD_DAT1/XD_D3/MS_D1_R
XD_D4
XD_D5/MS_BS
SD_DAT0/XD_D6/MS_D0
SD_DAT6/XD_D7/MS_D3

SD_CO2
SD_CO1

51
50

SD_CD#

SD_3P
SD_6P
SD_7P
SD_8P

49
48
47
46

D0
D1
D2
D3
D4
D5
D6
D7

MS_VSS

25

SD_VSS
SD_VSS

33
24

GND
GND
GND
GND
GND
GND
GND
GND

1
20
40
10
43
52
53
54

SD_DAT0/XD_D6/MS_D0
SD_DAT1

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

TAI-CON43-GP-U5

Title

USB Card Reader Controller - RTS5158

20.I0030.001

Size

Document Number

Date:

Monday, May 05, 2008

Rev

SC

Warrior
5

Sheet
1

25

of

42

HDMI Connector

Mini Card Connector1(802.11a/b/g)


+1.5VS
+3VS_MINI

MINI1

53

R369
1
DY 2 0R2J-2-GP

19,23,30 PCIE_WAKE#

R365 1
R357 1

22 WL_PRIORITY
22 BT_PRIORITY

DY
DY

2 0R2J-2-GP
2 0R2J-2-GP
TPAD30 TP50

1030 DB

NP1
1
WL_PRI
BT_PRI
1

16 CLK_PCIE_MINI1#
16 CLK_PCIE_MINI1

30
30

+3VS

19
19

R568
100KR2J-1-GP

R567
10KR2J-3-GP

PCIE_TXN2
PCIE_TXP2

+3VS_MINI

U80
HDMI_HPD

45 HDMI_HPD

HPD

0503 PV

+3VS

+3VS_MINI
+VL
R314

0429 PV

0503 PV

+3VS_MINI

0122 DB
1019 DB

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
NP2

WIFI_RF_EN 30
PLT_RST# 7,17,23,27,30,44

PLT_RST#

1012 DB
ICH_SMBCLK
ICH_SMBDATA

ICH_SMBCLK 12,13,16,21
ICH_SMBDATA 12,13,16,21
USB20_N6 19
USB20_P6 19

1108 DB
3

TP26 TPAD30

WLAN_LED# 32

TP24 TPAD30

54

1
2
0R0805-PAD

2N7002EDW-GP

4
6
8
10
12
14
16

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

E51_RXD
E51_TXD

19 PCIE_RXN2
19 PCIE_RXP2

+3VS

2
3
5
7
9
11
13
15

SKT-MINI52P-22-GP-U

0122 DB

62.10043.591

L28

2
DY
10KR2J-3-GP

HDMI_HPD 45

HPD_C
1
1
DY 2
R406
BLM15BB221SN1D-GP

HPD

DY

R405
100KR2J-1-GP

0122 DB

R569
100KR2J-1-GP

0122 DB

+3VS_MINI

+VL

+1.5VS

+3VS_MINI

HDMI_TXD2

46
46

HDMI_TXD2#
HDMI_TXD1

HDMI_TXD2#
HDMI_TXD1

46
46

HDMI_TXD1#
HDMI_TXD0

HDMI_TXD1#
HDMI_TXD0

46
46

HDMI_TXD0#
HDMI_TXC

HDMI_TXD0#
HDMI_TXC

46

HDMI_TXC#

HDMI_TXC#

45
45

HDMI_SCL
HDMI_SDA

1
2

0503 PV

D10
BAT54A-5-GP

RN45

4
3

SRN2K2J-1-GP

HDMI_SCL

+5VS_HDMI

HPD

0505 PV

HDMI_SDA

.
.
. .

+5VS_HDMI

S
2N7002E-1-GP

33

<Core Design>

22.10296.011

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

0411 PV

+5VS

Title

0505 PV

MINI CARD/HDMI CONN .

R570
1 DY
2
0R2J-2-GP

Size
A3

Document Number

Date: Monday, May 05, 2008


A

1
2

1
2

SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP

23

SKT-HDMI19P-12GP-U
RUN_PWR_CTLR

C484
SCD1U16V2ZY-2GP

C493

21

Q29

C464

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

0425 PV
1

SCD1U16V2ZY-2GP
C523

SC10U10V5ZY-1GP

46

HDMI_TXD2

+5VS

C479
C529

SCD1U16V2ZY-2GP

20

22
2

HDMI1

Rev

SA

VITAS
Sheet
E

26

of

48

AVDD18

10/100M Lan Transformer


8101E need connect to 1.8V,
8102E don't need.

0502 PV

MDIP0

MDIN0

MDIN0

23
MDIP1
XRF_RDC

MDIP1

23

23

MDIN1

1
3
2
7
6
8

MDIN1

RJ45-1

16
14
15

XFR_RXC
RJ45-3
XFR_CMT
RJ45-6

10
11
9

4
5

C786
1DY

RJ45-2

23 GREEN_LED#

12
13

C640
SCD01U100V5KX-1GP

XFR_CMT_1
XFR_RXC_1

+3V_LAN

1113 DB

23 YELLOW_LED#

4
3
2
1

1106 DB

R404
RN43
SRN75J-1-GP

13
15

470R2J-2-GP
C785

RJ1

Green : Link up
Blinking : TX/RX activity SC1KP50V2KX-1GPDY
2

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C693

RJ45-6
RJ45-7

RJ45-4
RJ45-7

5
6
7
8

0128 DB
DY C692
DY

14
9
10
11
1
2
3
4
5
6
7
8
12

RJ45-1
RJ45-2
RJ45-3
RJ45-4

1029 DB

C639
SCD01U100V5KX-1GP

2
2

XFORM-16P-5-GP

RJ45-13P-4-GP

1 R400
2
470R2J-2-GP

+3V_LAN

PIN A1 : GREEN
PIN A3 : ORANGE
PIN B2 : YELLOW

SC1KP50V2KX-1GP

1106 DB

1
1

23
MDIP0
XRF_RDC

EC55
SCD1U16V2ZY-2GP

EC56
SCD1U16V2ZY-2GP

XF1
4

1.route on bottom as differential pairs.


2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except
RJ-45 moat.
0306 SI

LAN Connector

R451
0R2J-2-GP
DY

0306 SI

1109 DB
3

LAN_TERMINAL 1
C642

Remark:
Add trace width to 20mils
for RJ1 pin4, 5 and pin 7, 8.

2
SC1500P2KV8KX-3GP

Golden Finger for Debug Board


1019 DB
+5VS
+5VS_LPC

TOP VIEW
2

PLT_RST#_1
LPC_FRAME#_1
LPC_GND
PCLK_FWH_1

...

...

A15 (B1)
A14 (B2)

A2
A1

(B14)
(B15)

LPC_AD3_1
LPC_AD2_1
LPC_AD1_1
LPC_AD0_1
EXT_FWH#_1
+3VS_LPC

+5VS_LPC

+5VS_LPC

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15

1
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15

+3VS

G75

DEBUG1

GAP-OPEN-PWR
PLT_RST#_1
LPC_FRAME#_1
LPC_GND
PCLK_FWH_1

G78

LPC_AD3_1

G82
LPC_AD2

+3VS_LPC

LPC_AD2_1

7,17,23,26,30,44

PLT_RST#

PLT_RST#

ZZ.GF030.XXX

G79

LPC_AD1_1

16

PCLK_FWH

PCLK_FWH

GAP-OPEN-PWR

Please put near board edge.


LPC_AD[0..3]

G85

LPC_AD0_1

GAP-OPEN-PWR

18,30

PCLK_FWH_1

2
GAP-OPEN-PWR

G84
LPC_AD0

PLT_RST#_1

2
GAP-OPEN-PWR

G83

LPC_FRAME#_1

G77

2
GAP-OPEN-PWR

LPC_AD1

Boot Device must have ID[3:0] = 0000


Has internal pull-down resistors
All may be left floated
FPET7 Elec. P3-46

LPC_FRAME#

GAP-OPEN-PWR

FOX-GF30

BOTTOM VIEW

18,30 LPC_FRAME#

GAP-OPEN-PWR
LPC_AD3_1
LPC_AD2_1
LPC_AD1_1
LPC_AD0_1
EXT_FWH#_1

2
GAP-OPEN-PWR

G81
LPC_AD3

+3VS_LPC

G76

EXT_FWH#_1

2
GAP-OPEN-PWR

G80

LPC_GND

GAP-OPEN-PWR
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

LAN CONN/Debug
Size
A3

Document Number

Date: Monday, May 05, 2008


A

Rev

SA

VITAS
Sheet
E

27

of

48

+3VS_AUD

+3VS
R230

43
42

DIB_P
DIB_N

12

PC_BEEP

1101 DB

SPDIF

48

S/PDIF

45
46
47

GPIO2
GPIO1
EAPD#/GPIO0

AUD_GPIO2
AUD_GPIO1
29,30

EAPD#

1019 DB

2
1

PORTD_L
PORTD_R

27
28

PORTB_L
PORTB_R

14
15

MONO
STEREO_L
STEREO_R

29
30
31

AVSS
AVSS

DVSS
DVSS

GND

1
2
C418
SC1U10V3ZY-6GP
RESERVED_22
RESERVED_23

1
C397

2
SC1000P50V3JN-GP

1
C444

2
SC1000P50V3JN-GP

19

SB_SPKR

SB_SPKR_C

SCD1U16V2ZY-2GP

DY

AUD_AGND

C438
SC1U10V3ZY-6GP

2K2R2J-2-GP

JACK_DETECT#
2
5K11R2F-L1-GP

2
5K11R2F-L1-GP

0502 PV
1107 DB

TP143 TP28-75-GP

+5VALW

TP150 TP28-75-GP

GND

TP144 TP28-75-GP

MIC_IN#

TP149 TP28-75-GP

MICL

TP141 TP28-75-GP

MICR

TP148 TP28-75-GP

AUD_AGND

TP142 TP28-75-GP

HP_OUT_L

TP140 TP28-75-GP

HP_OUT_R

TP147 TP28-75-GP

JACK_DETECT#

TP139 TP28-75-GP

AUD_AGND

TP146 TP28-75-GP

CHG_LED#

TP138 TP28-75-GP

PWR_BD_LED#

TP145 TP28-75-GP

SATA_BD_LED

TP137 TP28-75-GP

+5VS

1107 DB

AUD1

17

15
14
13
12
11
10
9
8
7
6
5
4
3
2

+5VALW

1
2
SCD1U16V2ZY-2GP
C420 SCD1U16V2ZY-2GP

C423

EC11
SCD1U16V2ZY-2GP

MIC_IN#
MICL
MICR
HP_OUT_L
HP_OUT_R
JACK_DETECT#

1109 DB
30 CHG_LED#
32 PWR_BD_LED#
15 SATA_BD_LED

DY

EN
GND
VIN
VOUT
NC#5

ACES-CON15-7-GP
AUD_AGND
<Core Design>

1
2

C436

16

G9091-330T12U-GP
SC10U10V5KX-2GP

Wistron Corporation

2 SCD1U16V2ZY-2GP

AUD_AGND

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

AUD_AGND

0305 SI

1101 DB

AUDIO CODEC CX20561-14Z


Size
A3

AUD_AGND

Document Number

Date: Monday, May 05, 2008


A

+5VS

AUD_AGND

1
2
3
4
5

C416
SCD1U16V2ZY-2GP

0429 PV

EC38

C427

0429 PV

R294

AUD_AGND

BIASC

U40

+3VS_AUD

CUT MOAT

DY2SC100P50V2JN-3GP

4K7R2J-2-GP

C428

+5VS

AUD_AGND

+3VS_AUD

1
2
0R0603-PAD

1
2
0R0603-PAD

MIC_IN#
2
20KR2F-L-GP
+3VS_AUD

1
R260

0R2J-2-GP

0429 PV

SC1U10V3ZY-6GP

1109 DB

DY

AUD_PC_BEEP
2
SCD1U16V2ZY-2GP

R255

1
R266
1
R270

C421

2
SC1000P50V3JN-GP
R280

1012 DB

0R2J-2-GP

1 R281
2
0R0402-PAD

1
R263

C404

R252

1106 DB

C430

2
SC1000P50V3JN-GP

DY2

C424
SC1U10V2MX-GP

1
C442

DY2SC100P50V2JN-3GP

1023 DB

1012 DB

1012 DB

2 KBC_BEEP_C
DY 0R2J-2-GP

2
SCD01U16V2KX-3GP

MICL
MICR

R271 100R2J-2-GP

FLY_P
FLY_N

C396

100R2J-2-GP

2
2

1
R251

CX20561-14Z-GP

25
38

7
41

49

R267
1
1

1023 DB

AUD_GPIO1

29,30 KBC_BEEP

2 SC1U10V3ZY-6GP MICL_M
2 SC1U10V3ZY-6GP MICR_M

1
1

AUD_LOL 29
AUD_LOR 29

1115 DB

AUD_AGND

1106 DB

22
23
32
33

R244

EC28

1023 DB

AUD_AGND

DY2SCD01U16V2KX-3GP

MIC_INT_L 29

1023 DB

VREF_LO
VREF_HI
RESERVED#32
RESERVED#33

AUD_AGND

BC3
SC10U10V5MX-2GP

2
2 SC2D2U10V5KX-2GP
SC2D2U10V5KX-2GP

C408
C410

39
37

1023 DB

DY2SCD01U16V2KX-3GP

BIASC
MIC_L
MIC_R

FLY_P
FLY_N

1
C419

SC10U10V5ZY-1GP
2

18
16
17

AUD_GPIO2

DY DY

SCD1U16V2ZY-2GP
2

26
40
36

MICBIASC
PORTC_L
PORTC_R

TP136
1
C4151
C417

24

BIASB
INT_MIC_L
INT_MIC_R

VREF

DMIC_CLOCK
DMIC_1/2

R265
10KR2J-3-GP

19
20
21

SENSEA
1
2

R269
10KR2J-3-GP

MICBIASB
MIC_L
MIC_R

VREF_FILT

DY

2 R257
47KR2J-2-GP

HP_OUT_L
HP_OUT_R

34
35

AUDIO_SENSE

HP_OUT_R

R274
4K7R2J-2-GP

13

+3VS

HP_OUT_L
EC29

AVDD
AVDD
AVEE

1218

EC35
MIC_INT_M

AUD_AGND

PORTA_L
PORTA_R

1012 DB
MIC_INT_L

BIT_CLK
SYNC
SDATA_IN
SDATA_OUT

EC24

R275
1KR2J-1-GP

6
10
8
5

MIC_L

SC10U10V5ZY-1GP
2

RESET#

EC27

C429

SCD1U16V2ZY-2GP
2

Close to Modem

45

DVDD_1D8_AUD

11

MIC_R

C422

SC1U10V2MX-GP

AUD_PC_BEEP

AVEE_AUD

9
4
3
44

U35

HDA_SDATAIN0_CODEC

+3VS_AUD

VDD_IO
DVDD_1_8
DVDD_3_3
DVDD

1
2

C400

AMOM_DIPP
AMOM_DIPN

TP159
TP160

TP162 TP161

1
2
R253 33R2J-2-GP

C395
SCD1U16V2ZY-2GP

+3VS

2
HDA_BITCLK_CODEC
HDA_SYNC_CODEC
HDA_SDIN0
HDA_SDOUT_CODEC

SC10U10V5ZY-1GP

1218

18 HDA_RST#_CODEC
18
18
18
18

1106 DB

C392

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2

C401 C409

DY
2

SC10U10V5ZY-1GP

0429 PV

DVDD_3D3_AUD

1
2
0R0603-PAD
C393

Rev

SA

VITAS
Sheet
E

28

of

48

+5VS

1023 DB

+5VS_OP
G86

+3VS

GAP-CLOSE-PWR

DY

+5VS_OP

C440
SC1U10V3ZY-6GP

+5VS_OP

AUD_AGND
+5VS_OP
AUD_AGND

1
R284
R285 1
1
R289
1
R288

5
9
17
7

LINLIN+
RINRIN+

DY
DY

0R2J-2-GP
2 10KR2J-3-GP
2
0R2J-2-GP
2
0R2J-2-GP

2
3
12

SHUTDOWN#
BYPASS

19
10

ROUT+
ROUTLOUT+
LOUT-

18
14
4
8

GND
GND
GND
GND
GND

1
11
13
20
21

GAIN0
GAIN1
NC#12
G1431F2U-GP

Av(dB)
6
10
15.6
21.6

SPKR_R+
SPKR_RSPKR_L+
SPKR_L-

EAPD#

AUD_AGND
MIC_INT_L
EC18

AUD_AGND

RIN+
C445
C443

1109 DB
R290
KBC_BEEP_R
2
SCD1U16V2ZY-2GP

47KR2J-2-GP

0R2J-2-GP

DY

TP115 TP28-75-GP

+5VS

TP117 TP28-75-GP

CAPS_LED#_17

TP116 TP28-75-GP

AUD_AGND

8
7
6
5

MIC

0425 PV

+5VS

R130
330R2J-3-GP

MIC1

1108 DB

R291
0R2J-2-GP

TP114 TP28-75-GP

SCD033U50V3KX-1GP

SRC100P50V-2-GP

R_LINE_IN

2
1

R_LINE_IN_C
2
SCD033U50V3KX-1GP

1
C426

AUD_AGND
SC1U10V3ZY-6GP

1
2
3
4

R283
AUD_LOR

AUD_AGND

R293

28

2
47KR2J-2-GP

SPKR_L-

C425

SPKR_L+

L_LINE_IN_C

SCD033U50V3KX-1GP

L_LINE_IN

2
1

AUD_LOL

0R2J-2-GP

DY

MIC_INT_L
C296
1
2

DY

SC47P50V2JN-3GP
TP3

TP28-75-GP

TP2

TP28-75-GP

SPKR_R+

TP1

TP28-75-GP

EC17

1108 DB

0109 DB

C297

ACES-CON4-1-GP-U2

0311 SI

DY
SC1000P50V3JN-GP

AUD_AGND
SPKR_RSPKR_R+
SPKR_L-

Speaker

SPKR_L+

AUD_AGND

4
3
2

1114 DB
SPKR1

ACES-CON4-1-GP-U2

<Core Design>

Wistron Corporation

AUD_AGND

TP28-75-GP

R292
0R2J-2-GP

1108 DB

TP4

SPKR_R-

R287
28

MIC_INT_L

CAPS_LED#_17

SC47P50V2JN-3GP

2
DY

4
3
2

SC47P50V2JN-3GP

KBC_BEEP_L
2
SCD1U16V2ZY-2GP

1
C437

EC16 1

0109 DB
KBC_BEEP

15,30 CAPS_LED#

28,30

RC1
SPKR_RSPKR_R+
SPKR_LSPKR_L+

MIC_INT_L
SCD033U50V3KX-1GP

1108 DB

28

1108 DB

LIN+

1
C433

DY SC100P50V2JN-3GP

C441

KBC_BEEP

28,30

1019 DB

BYPASS

28,30

R282
0R2J-2-GP

DY

GAIN0 GAIN1
0
0
0
1
1
0
1
1

KBC_MUTE# 30

BYPASS

VDD
PVDD
PVDD

AUD_AGND

L_LINE_IN
LIN+
R_LINE_IN
RIN+

16
6
15

1
2

1113 DB

1106 DB

U43

C439
SC4D7U10V5ZY-3GP

R286
100KR2J-1-GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

0311 SI

Title

AUDIO AMP/SPEAKER
Size
A3

Document Number

Date: Monday, May 05, 2008


A

Rev

SA

VITAS
Sheet
E

29

of

48

1
+3VL_KBC

+3VL_KBC

+3VS

CAP close to VCC-GND pin pair

L7

+3VL_KBC
BT_TH#

33,35

+3VL

G50

3D3V_KBC_AUX_VCC

1
2
BLM18AG601SN-3GP

GAP-CLOSE-PWR

BT_TH#

R475

100KR2J-1-GP

1
1

19,23,26 PCIE_WAKE#
R220

ADP_LIMIT
GPIO92
AIRLINE_VOLT_RC
DY 2PCIE_L_WAKE#

97
98
99
100
108
96

GPI90/AD0
GPI91/AD1
GPI92/AD2
GPI93/AD3
GPIO05
GPIO04

R224 0R2J-2-GP

80

LPC

GPI94
GPI95
GPI96
GPI97

D/A

124
7
2
3
126
127
128
1
125
8
122
121
29
9
123

1112
1109
1105

PM_SLP_S3#
KBC_PWR_BTN#
AD_IN#
LID_CLOSE#
TSATN#_KBC
BT_DET#

23 LAN_PWR_ON
32 PWR_WLAN
31 TP_LED_AMBER#
DB
15,29 CAPS_LED#
35 AD_OFF
33 PM_RSMRST#
19,31,33,39 PM_SLP_S4#
DB
28 CHG_LED#
23 LAN_DSM#
DB
15 CAM_PWR#
15 SIZE_DET0
DB
15 SIZE_DET1
DB
15 EC_BLON

1109
1023
1105 DB
1019 DB
1112 DB

28,29 EAPD#
32 PWR_LED
31 TP_LED_WHITE#

SRN10KJ-5-GP
EC_BLON
3
2
L_BKLT_EN
4
1

64
95
93
94
119
6
109
120
65
66
16
17
20
21
22
23
24
25
26
27
28
73
74
75
110

GPIO01/TB2
GPIO03
GPIO06
GPIO07
GPIO23
GPIO24
GPIO30
GPIO31
GPIO32/D_PWM
GPIO33/H_PWM
GPIO40/F_PWM
GPIO42/TCK
GPIO43/TMS
GPIO44/TDI
GPIO45/E_PWM
GPIO46/TRST#
GPIO47
GPIO50/TDO
GPIO51
GPIO52/RDY#
GPIO53
GPIO70
GPIO71
GPIO72
GPO82/TRIS#

GPIO74/SDA2
GPIO73/SCL2
GPIO22/SDA1
GPIO17/SCL1

SMB

CAP near ADC


PLT_RST# 7,17,23,26,27,44
CLK_PCI_KBC 16
LPC_FRAME# 18,27

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

1 SC15P50V2JN-2-GP

L_BKLT_EN 45

EC_SWI#

GPIO

84
83
82
91

GPIO16
GPIO34
GPIO36

1
R478

111
113
112
114
14
15

1030 DB

E51_TxD 26
E51_RxD 26
R523
10KR2J-3-GP
1
2
SPI_WP#2 32
1
2
R503
10KR2J-3-GP

GPIO16

44

+3VL

2 GND connect
at one point

2 LID_CLOSE#
10KR2J-3-GP

0228 SI

2
32
32
32
32

4
77

32KX1/32KCLKIN

KBC_32KX2

79
30

32KX2
GPIO55/CLKOUT

63
117
31
32
118
62

GPIO14/TB1
GPIO20/TA2
GPIO56/TA1
GPIO15/A_PWM
GPIO21/B_PWM
GPIO13/C_PWM

13
12
11
10
71
72

GPIO12/PSDAT3
GPIO25/PSCLK3
GPIO27/PSDAT2
GPIO26/PSCLK2
GPIO35/PSDAT1
GPIO37/PSCLK1

86
87
90
92

F_SDI
F_SDO
F_CS0#
F_SCK

29 KBC_MUTE#
TP118

KBC_GPIO14

C304
SC1U10V3KX-3GP

15 SATA_LED
15 BRIGHTNESS

R209
R208
R207

1
1
1

WIRELESS_BTN#
TP_BTN#
TDATA_5
TCLK_5

2
2 33R2J-2-GP
2 33R2J-2-GP
33R2J-2-GP

SPI_SDO_C
SPI_CS#_C
SPI_SCK_C

1
R223
10KR2J-3-GP

2
R509
10KR2J-3-GP

R514
10KR2J-3-GP

DY

DY

R507
10KR2J-3-GP

1
R495
10KR2J-3-GP

PCB_VER0
PCB_VER1
PCB_VER2

DY

KBC_GPIO14 1
R135

R494
10KR2J-3-GP

R517

10KR2J-3-GP

KBSOUT0/JENK#
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KBSOUT4/JEN0#
KBSOUT5/TDO
KBSOUT6/RDY#
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
GPIO60/KBSOUT16
GPIO57/KBSOUT17

53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33

KCOL1
31
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17
KCOL18

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

54
55
56
57
58
59
60
61

31
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8

VCC_POR#

85

KBC

PS/2

FIU

KCOL[1..18]

B
KROW[1..8]

+3VL_KBC

1
R476

10KR2J-3-GP

1109 DB

+3VL_KBC

DY

2
10KR2J-3-GP

R498
R516

D11
ECSCI#_L

EC_RST# 24

WPCE773LA0DG-GP

+3VL_KBC

Planar
ID[2,1,0]
SA: 0,0,0
SB: 0,0,1
SC: 0,1,0
-1: 1,0,0
-2: 0,1,1
-3: 1,0,1

SIRQ

+3VS

2 OF 2

KBC_32KX1

0312 SI23 DSM_ISOLATE#


1019 DB28,29 KBC_BEEP

SPI_SDI
SPI_SDO
SPI_CS#
SPI_SCK

SPI_SDI
SPI_SDO
SPI_CS#
SPI_SCK

1
2
SRN4K7J-8-GP

U19B

19 PWRBTN#_SB

KBC_VCORF

AGND

1019 DB

26

1023 DB

32
31
31
31

1
2
G49
GAP-CLOSE-PWR

4
3

KBC_32KX2
2
33KR3-GP

82.30001.861 EPSON MC-306


32.768Khz 12.5pf 10ppm

1023 DB

2 PM_RSMRST#
10KR2J-3-GP

+3VS
RN47

KBC_SDA1
KBC_SCL1

DY

X3_1 1
R194
SC15P50V2JN-2-GP

1109 DB

1105 DB

DY

C356
2

WIFI_RF_EN
22

+3VALW

1
R504

0115 DB

2
4K7R2J-2-GP

1
116
89
78
45
18
5

E51_TxD

24
24
34,35
34,35

103

AD_OFF

R528 4K7R2J-2-GP

1
R493

TP near KB
connector
R164
20MR3-GP

1105 DB

NUMLK_LED# 22

SHBM

2
1

0122 DB

KBC_32KX1

X3
X-32D768KHZ-46GP

PWR_S5_EN 38

VCORF
1

GPIO77
GPIO76/SHBM
GPIO75
GPIO81

SER/IR

WPCE773LA0DG-GP

81

GPO83/SOUT_CR/BADDR1
GPIO87/SIN_CR
GPO84/BADDR0

R190 10KR2J-3-GP

KBC_SDA1
KBC_SCL1
KBC_SDA0
KBC_SCL0

BT_EN#

GND
GND
GND
GND
GND
GND

DY

GPIO66/G_PWM

SPI

RN50

68
67
69
70

3
4

18,27

SIRQ
19
PM_CLKRUN# 19
KBRCIN# 18
KA20GATE 18

ECSCI#_L

0311 SI

C334

2
LPC_AD[0..3]

KBC_SCL0
KBC_SDA0

SRN4K7J-8-GP

1109 DB

SP

+3VL_KBC

1105 DB

3
19,23,24,33,39,40,41,42
32
33,34
15,32
1113 DB
7
1030 DB
22

SCD1U16V2ZY-2GP

0312 SI

101
105
106
107

GPIO41

4
VDD

A/D

SCD1U16V2ZY-2GP

RN46

GPIO10/LPCPD#
LRESET#
LCLK
LFRAME#
LAD0
LAD1
LAD2
LAD3
SERIRQ
GPIO11/CLKRUN#
KBRST#
GA20
ECSCI#/GPIO54
GPIO65/SMI#
GPIO67/PWUREQ#

48D7KR2F-GP
PCB_VER0
PCB_VER1
PCB_VER2

1 OF 2

C737 1

1105 DB

R502
1
10KR2J-3-GP

34 AIRLINE_VOLT

C365 1

AD_IA
TP134

102

VREF

AVCC

115
88
76
46
19
VCC
VCC
VCC
VCC
VCC

104

AD_IA
AIRLINE_VOLT_RC

2
R221
140KR2F-1-GP

C355
SC10U10V5ZY-1GP

1
2

2
34

LIMIT_SIGNAL

R508
0R2J-2-GP
U19A

1
D16
1N4148W-7-F-GP

C373
SCD1U10V2KX-5GP

C378
SC10U10V5ZY-1GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC10U10V5ZY-1GP

C327 C720 C377 C730 C729 C712

SCD1U10V2KX-5GP
C747

DY

1023 DB

2
100KR2J-1-GP

+3VS

2
100KR2J-1-GP

+3VALW

1SS355PT-GP
A EC_SCI#

EC_SCI# 19

EC_SWI#

EC_SWI# 19

Add Label "5V_S0"

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

0425 PV

KBC WPCE775L
Size
A3

Document Number

Date: Monday, May 05, 2008

Rev

SA

VITAS
Sheet

30

of

48

TouchPad Connector

1011 DB

1107 DB

27

MATRIXID1#

MATRIXID2#

+3VS
D7

4
3

1
2

C221 1
C220 1

1
11

2 SC33P50V2JN-3GP
2 SC33P50V2JN-3GP

TDATA_5
TCLK_5
TP_LED_AMBER#
TP_LED_WHITE#
TP_ON/OFF

+5VS

TP_BTN# 30

100R2J-2-GP
R85

EC14
SCD1U16V2ZY-2GP

C343
SC1000P50V3JN-GP

DY

+5V_TP

TP83 TP28-75-GP

TDATA_5

TP77 TP28-75-GP

TCLK_5

TP76 TP28-75-GP

GND

TP99 TP28-75-GP

GND

TP78 TP28-75-GP

GND

TP100 TP28-75-GP

TP_LED_AMBER#

TP81 TP28-75-GP

TP_LED_WHITE#

TP75 TP28-75-GP

GND

TP84 TP28-75-GP
TP80 TP28-75-GP

+5VS

TP79 TP28-75-GP

TP82 TP28-75-GP

Please populate close TPAD1

DY

TP_SLP_S4

0408 PV

1109 DB
D

BAV99S-GP

for EMI

DY

DY
C672
SCD1U16V2KX-3GP

TP_SLP_S4_C
R411

DY

C674

DY
SCD1U16V2KX-3GP

Q19
2N7002E-1-GP

G
KCOL14
KCOL13
KCOL4
KCOL7

8
7
6
5

19,30,33,39 PM_SLP_S4#

RC3
SRC100P50V-2-GP

1
2
3
4

RC2
SRC100P50V-2-GP

1
2
3
4

RC5
SRC100P50V-2-GP

for EMI
KCOL10
KROW7
KROW8
KROW2

KROW3
KCOL1
KROW6
KROW5

8
7
6
5

8
7
6
5

<Core Design>

1
2
3
4

RC7
SRC100P50V-2-GP

RC6
SRC100P50V-2-GP

1
2
3
4

1
2
3
4

RC4
SRC100P50V-2-GP

KCOL16
KCOL11
KCOL12
KCOL15

8
7
6
5

8
7
6
5

KROW1
KCOL2
KCOL6
KROW4

R425
100KR2J-1-GP

10KR2J-3-GP

.
DY .
. .
KCOL9
KCOL8
KCOL5
KCOL3

DY

DY

1112 DB

Q20
AO3403-GP

R408
100KR2J-1-GP

C649

TCLK_5

+5V_TP

+5VALW
+5VALW

SC1U10V3KX-3GP

TP_ON/OFF

GND

0R3-0-U-GP

0228 SI

R437

0310 SI

1108 DB

8
7
6
5

R67
10KR2J-3-GP

1112 DB

TP_LED_AMBER# 30
TP_LED_WHITE# 30

0228 SI

D8

1
2
3
4

30
30

ACES-CON10-11-GP

BAV99W-1-GP

TDATA_5

+3VS

12
10
9
8
7
6
5
4
3
2

ACES-CON26-7GP

C233
SCD1U16V2ZY-2GP

RN25
SRN10KJ-11-GP-U

TPAD1

Change to 20.K0345.026

DY

+5V_TP

C258
SCD1U16V2ZY-2GP

C253
SC1U10V3ZY-6GP

28
2

TP_ON/OFF

TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP

Jap

TP98
TP112
TP97
TP111
TP96
TP110
TP95
TP109
TP94
TP108
TP93
TP107
TP92
TP106
TP91
TP105
TP90
TP104
TP89
TP103
TP88
TP102
TP87
TP101
TP86

Eur

TP113 TP28-75-GP

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

US

KROW8
KROW7
KCOL10
KROW5
KROW6
KCOL1
KROW3
KROW4
KCOL6
KCOL2
KROW1
KCOL3
KCOL5
KCOL8
KCOL9
KCOL7
KCOL4
KCOL13
KCOL14
KCOL15
KCOL12
KCOL11
KCOL16
KCOL17
KCOL18

+5V_TP

Keyboard matrix ( from vendor )

KROW2

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

30 KCOL[1..18]

30 KROW[1..8]

+5V_TP

KB1

Internal KeyBoard Connector

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

0408 PV
Title

KeyBoard-CONN
for EMI

Size
A3

Document Number

Date: Monday, May 05, 2008

Rev

SA

VITAS
Sheet

31

of

48

+3VL_KBC

+3VL_KBC

CS#
DO
WP#
GND

VCC
HOLD#
CLK
DIO

PWR_BD_LED# 28

R197
SPI_HOLD#_2 1

1KR2J-1-GP

R2

R1

SPI_SCK

30 SPI_SCK

PDTC124EU-1-GP
Q26

R1

2M Flash ROM
72.25X16.001

SPI_SDO

30 SPI_SDO

R2

PDTC124EU-1-GP
Q14

W25X16VSSIG-GP

0128 DB

PWR_BD_LED# 28

C359
SCD1U16V2ZY-2GP

SPI_WP#2

8
7
6
5

1
2
3
4

SPI_CS#
SPI_SDI_C
2
33R2J-2-GP

0312 SI

1012 DB

30

DY

1
R216

1112 DB

1KR2J-1-GP
U20

SPI_WP#2

2
R210
10KR2J-3-GP

30

R211

30 SPI_CS#
30 SPI_SDI

PWR_LED

19

0312 SI

SB_PWR_LED

+5VS

1107 DB
2

+5VALW

LID_CLOSE#

LID_CLOSE# 15,30

ACES-CON10-11-GP

C784
SCD1U16V2ZY-2GP

PWR_BD_LED#

TP39 TP28-75-GP

PWR_BT#

TP46 TP28-75-GP

WLAN_AMBER

TP38 TP28-75-GP

WLAN_WHITE#

TP45 TP28-75-GP

WLAN_BT#

TP37 TP28-75-GP

LID_CLOSE#

TP44 TP28-75-GP

GND

TP40 TP28-75-GP

GND

TP41 TP28-75-GP

+3VL

TP189 TP28-75-GP

0228 SI

22

BT_LED

Q13

U47

E
WLAN_LED#_C

R315
100KR2J-1-GP

WLAN_LED# 26

PDTA124EU-1-GP

COVER SWITCH

+3VL

TP34 TP28-75-GP

2N7002EDW-GP

R300
100KR2J-1-GP

PWR_BD_LED#
PWR_BT#
WLAN_AMBER
WLAN_WHITE#
WLAN_BT#

2
3
4
5
6
7
8
9
10
12

1108 DB
+5VS

11
1

+3VS

PWR1

WL_LED#
EC8
SCD1U16V2ZY-2GP

R2

+5VS

EC9
SCD1U16V2ZY-2GP

R1

R311
100KR2J-1-GP

1112 DB

0228 SI
Please populate close PWR1
+3VS

WLAN_WHITE#

WLAN LED DISABLE


WL_LED#

WLAN_AMBER

30

WL_LED#

1109 DB

0502 PV

R1

PWR_WLAN

PWR_WLAN

PWR_WLAN

.
. .
.
S

DY

.
2N7002E-1-GP

R2
R1

C447
SC1000P50V3JN-GP

PDTC124EU-1-GP
Q12

PDTC124EU-1-GP
Q10

R2

Q11
WIRELESS_BTN# 30

1
2
R307
100R2J-2-GP

WLAN_BT#

WL_LED

R308
10KR2J-3-GP

WIRELESS SWITCH

WLAN LED ENABLE

1101 DB

1101 DB

1109 DB
1101 DB

+3VL

+3VL

WLAN_BT#
PWR_BT#

R309
2
100R2J-2-GP

KBC_PWR_BTN# 30

EC42
SCD1U16V2ZY-2GP

BAV99S-GP

<Core Design>

PWR_BT#

R305
10KR2J-3-GP

POWER SWITCH

D20

C461
SCD1U16V2ZY-2GP

1102 DB

C448
SC1000P50V3JN-GP

Wistron Corporation

DY

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

FWH and CONN.


Size
A3

Document Number

Date: Monday, May 05, 2008


A

Rev

SA

VITAS
Sheet
E

32

of

48

+3VALW

R499

U74

PM_PWROK 7,19

PM_RSMRST#

30 PM_RSMRST#

2
+3VALW

R146

1SS355PT-GP
A

DY

DY
A K
D13
1SS355PT-GP

DY

R259
470R2J-2-GP

2N7002DW-7F-GP

2N7002E-1-GP

30,35

PM_SLP_S3

+0.9VS

PM_SLP_S3

PM_SLP_S4

DY

+5V

R249
470R2J-2-GP

2N7002DW-7F-GP

0502 PV

PM_SLP_S3

DY

+5VALW to +5VS Transfer


+3VALW to +3VS Transfer

1
2
3
4

SCD1U25V2ZY-1GP

R268
100KR2J-1-GP

2N7002EDW-GP

+1.8VS_EN 42

U34

2
1

R52
1KR2J-1-GP

C560 DY
SCD1U25V3ZY-1GP

RUN_PWR_CTLR_1

0128 DB

+1.8V

1
2
3
4

SCD1U25V2ZY-1GP
1
2

RUN_PWR_CTLR_1

U64
S
S
S
G

D
D
D
D

8
7
6
5

PM_SLP_S4

+1.8VS

C125
1 DY2

U10

DY

R276
470R2J-2-GP

DY
DY

0502 PV

R53
330KR2J-L1-GP

R56
100KR2J-1-GP

C399
SCD01U25V2KX-3GP

C406
SCD1U25V2ZY-1GP

RUNON

2
8
7
6
5

EC22

0128 DB

0109 DB

R261
470R2J-2-GP

DCBATOUT

DY

DY

PM_SLP_S3# 19,23,24,30,39,40,41,42
RUN_PWR_CTLR

1
2
3
4

+3VL

D
D
D
D

D
D
D
D

AO4422-1-GP

1105 DB

AO4422-1-GP

SCD1U16V2ZY-2GP

2N7002EDW-GP

+1.8VS_EN_1

U33
S
S
S
G

DY

U37
S
S
S
G

2
2
1

RUN_PWR_CTLR

+3VL

R279
330KR2J-L1-GP

8
7
6
5

+3VALW

C402
1 DY2

8
7
6
5

1
D
D
D
D

U36
S
S
S
G

AO4422-1-GP

U32

2
0R5J-5-GP

+5V

DY

SCD1U25V2ZY-1GP

26 RUN_PWR_CTLR

PM_SLP_S3

1
R264

1107 DB

1
2
3
4

+3VS

2
0R5J-5-GP

+5VALW

+5VALW

C407
1 DY2

R262
330KR2J-L1-GP

1
R254

+5VALW to +5V Transfer


DCBATOUT

EC25
SCD1U16V2ZY-2GP

R243
100KR2J-1-GP

2
0R5J-5-GP

+5VS

DCBATOUT

+3VL

1
R245

Populate close U34

+1.8V

0502 PV

1105 DB

+5V

R226
470R2J-2-GP

2N7002DW-7F-GP

Run Power

1107 DB
+5VS

BT_TH#

DY U26

R227
470R2J-2-GP
1
DY 2

R189
2K2R2J-2-GP

PM_SLP_S4

DY

2N7002DW-7F-GP

PM_SLP_S4# 19,30,31,39

DY

RUNON

+5VS

DY U29

.
. .
.

Q9

.
DY
.
. .
.

+3VS

PM_SLP_S3

DY

Q28
2N7002E-1-GP

D14
1SS355PT-GP

2
4
D

PM_SLP_S3

R250
470R2J-2-GP
1
DY 2

AD_IN#

A K

30,34

470R2J-2-GP

+1.5VS

R161
10KR2J-3-GP

DY

R258

DY

DY

D12
1SS355PT-GP

+1.05VS

4K7R2J-2-GP

Q27
2N7002E-1-GP

.
.
. .

Discharge Circuit
DY U30

RSMRST#_SB 19

0502 PV

R242
470R2J-2-GP
1
DY 2

PMBS3906-GP

DY

74LVC1G08GW-1-GP

1105 DB

0R2J-2-GP

GND

PM_SLP_S3#

Q4

D33
19,23,24,30,39,40,41,42

2 R122
1
10KR2J-3-GP

G792_RST#

VCC

24

36 CORE_PWRGD

C414
SCD01U25V2KX-3GP

<Core Design>

Wistron Corporation

0128 DB

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

AO4422-1-GP
Title
EC52
SCD1U16V2ZY-2GP

0502 PV

PWRPLANE
Size
A3

Document Number

Date: Monday, May 05, 2008

Rev

SA

VITAS
Sheet

33

of

48

EC57

EC54

EC26

EC59

EC21

EC43

EC44

EC1

EC4

EC5

EC48

DCBATOUT

DY
2

SCD1U50V3ZY-GP

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

BAV99W-1-GP

SCD1U25V3ZY-1GP

AD<=17V, disable
charger function

R310
100KR2F-L1-GP

EC49
100KR2J-1-GP
AD_IN#

Adaptor In Soft-Start Circuit


AD+_TO_SYS

G10
GAP-CLOSE-PWR

1
2

G12
GAP-CLOSE-PWR
1
2

MAX8731AETI-GP

GND

BAT_SENSE

1
R17

2 BT+SENSE
100R2F-L1-GP-U

BT+SENSE

C457

EC40

C452

C465

C463

35

C20
SCD01U50V2ZY-1GP

<Core Design>

SCD1U16V2ZY-2GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

1
2
G6
GAP-CLOSE-PWR
Title

CHG_AGND

CHARGER MAX8731ETI

Need Check MAXIM Sming Use MAX8731 or MAX8731A


4

0407 PV

Size
A3

Document Number

Date: Monday, May 05, 2008


5

0407 PV

15

29

C6

C3
SC1U10V3KX-3GP

SCD01U50V2ZY-1GP

C5

CCV
CCI
CCS
REF
DAC
GND

Layout Trace 300mil

FBSA

INP

D01R2512F-4-GP

FBSB

16

IND-6D8UH-89-GP

MAX8731_CSIN

MAX8731_CSIP

R323

G89

18
17

4
3
2
1

CSIP

1
5
6
7
8

L13
MAX8731_LX1

U6
IRF8707PBF-GP

CSIN

1
2 C17
SCD1U25V3KX-GP

GAP-CLOSE-PWR
1
2

2
1

C4

SCD1U25V3ZY-1GP

MAX8731_CCV
6
MAX8731_CCI
5
MAX8731_CCS
4
MAX8731_REF
3
MAX8731_DAC 7
12

2
4K7R2F-GP

SCD01U50V2ZY-1GP

R8 1R3F-GP
MAX8731_LX 1
2
1
2 C16
SC220P50V2JN-3GP
MAX8731_DLO

SC10U25V6KX-1GP

PGND

BT+

SC10U25V6KX-1GP

20
19

1109 DB

SC10U25V6KX-1GP

BATSEL

DLO

EC3

CHG_PWR

G90
GAP-CLOSE-PWR

SDA

C36

2nd:FDS8884(84.8884.A37)

MAX8731_DHI

SCL

2 C22

C19

SC10U25V6KX-1GP

1MAX8731_CCV1

23

SC1U10V3KX-3GP

C38

2nd:FDS8884(84.8884.A37)

R2
1

SCD01U50V2ZY-1GP

SCD1U16V2ZY-2GP

LX

2
1SS400PT

1
2

24

S
S
S
G

DHI

D2

2MAX8731_BST1
0R3-0-U-GP

D
D
D
D

AD_IA

MAX8731_BST 1
MAX8731_LDO

ACOK

CHG_AGND

25
21

C37

14

BST
LDO

10

30,35 KBC_SDA0

0307 SI

MAX8731_VCC

13

30,35 KBC_SCL0

C2

27
26

R10
C15
SCD1U25V3KX-GP
ACAV_IN

NEAR KBC POWER

C10

CSSN
VCC

4
3
2
1

VDD

U4
CHG_AGND IRF8707PBF-GP

5
6
7
8

11

ACIN

R5
33R2J-2-GP

28

SCD1U25V3ZY-1GP

CSSP

SCD1U25V3KX-GP

DCIN

CHG_AGND

NEAR INPUT AD+

SC10U25V6KX-1GP

22

PWR_MAX8731
C11
SC1U10V3KX-3GP

S
S
S
G

C1
SCD01U50V2ZY-1GP

CHG_AGND

10KR2F-2-GP

R21
470KR2J-2-GP

SC10U25V6KX-1GP

+3VL

R4

2nd:A04407(84.04407.D37)

CHG_AGND

D
D
D
D

MAX8731_ACIN

R1
49K9R2F-L-GP

AO4407-1-GP

SC10U25V6KX-1GP

MAX8731_DCIN

U3

1
2

C21
SC1U25V5KX-1GP

CHG_AGNDCHG_AGND

2
0R2J-2-GP

ASNS

1
R14

R3
383KR3F-GP

BT+

8
7
6
5

C9
SCD1U25V3KX-GP

C7
SCD1U25V3KX-GP

AD+

0407 PV

D
D
D
D

DC_IN_D

2N7002EDW-GP

U44
S
S
S
G

1
2
3
4

AD+

ACAV_IN

MAX8731_CSSN

2
100KR2J-1-GP

MAX8731_CSSP

R12
DCIN_GATE2
2
49K9R2F-L-GP

G16
GAP-CLOSE-PWR
1
2

R9
1

DCIN_GATE1

1017 DB

1109 DB

U48

2nd:A04433(84.04433.A37)

Layout Trace 300mil

1
2
R327
D01R2512F-4-GP
2

EC47
SCD1U25V3ZY-1GP

P2003EVG-GP

R6
10KR2J-3-GP

30

0417 PV

DCBATOUT

Layout Trace 250mil

G14
GAP-CLOSE-PWR
1
2

1
2
3
4

R7
15K4R2F-GP

ACAV_IN

U49
S
S
S
G

D
D
D
D

8
7
6
5

2N7002E-1-GP

G96
GAP-CLOSE-PWR

Layout Trace 250mil

R13
10KR2F-2-GP

G95
GAP-CLOSE-PWR

.
.
. .

C8
SC1U10V3KX-3GP

1109 DB

NEAR

MAX8731_LDO

Q15

DY

30,33

+3VL

SCD1U25V3ZY-1GP

R317

AIRLINE_VOLT 30

SCD1U25V3ZY-1GP

1
2
R301
15K4R2F-GP

SCD1U25V3ZY-1GP

0424 PV

SCD1U25V3ZY-1GP

2
3

SCD1U25V3ZY-1GP

2 SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

C451 1
+3VL

D1
AD+

Rev

SA

VITAS

Sheet
1

34

of

48

Adaptor in to generate DCBATOUT

AD+

DCIN1
AD_JK

0424 PV

A
EC41
SC1KP50V2KX-1GP

SCD1U50V3ZY-GP

C446

0423 PV

R2

30

2
IN

AD_OFF

R1
R2

DCIN_LED

TP7

TP28-75-GP

GND

TP8

TP28-75-GP

LIMIT_SIGNAL

TP6

TP28-75-GP

AD_JK

TP9

TP28-75-GP

AD_JK

TP10 TP28-75-GP

AD_JK

TP20 TP28-75-GP

GND

TP5

D
D
D
D

8
7
6
5

AO4407-1-GP
D

C31

E
SCD1U25V3ZY-1GP

Q2

R322
100KR2J-1-GP

3 OUT
1 GND

Q1

R1

AD_OFF#

C24
SCD1U50V3ZY-GP

U50
S
S
S
G

PDTA124EU-1-GP

0128 DB
0424 PV

0424 PV

1
2
3
4

ETY-CON6-8-GP-U

4K7R2J-2-GP

AD+_2
D32
P4SSMJ24AAPT-GP

C14
SCD1U50V3ZY-GP

R15
200KR2J-L1-GP
2
1

DCIN_LED

R302

LIMIT_SIGNAL

2
3
4
5
6

AD+

DTC114EUA-1-GP

TP28-75-GP

BATTERY CONNECTOR
BT+
BAT1

D6

BAV99W-1-GP

0502 PV

3
4
SRN100J-3-GP
2
100R2J-2-GP

10
8
7
6
5
4
3
2

BAT_SDA0
BAT_SCL0
BAT_TH#

1112 DB

1
9
G4
34

BT+SENSE

2
GAP-CLOSE

FOX-CON8-5-GP-U1

1
R16

30,33 BT_TH#

EC63

2
BAV99W-1-GP
B

KBC_SDA0

SCD1U16V2ZY-2GP

EC62
SCD1U16V2ZY-2GP

RN1
2
1

30,34 KBC_SDA0
30,34 KBC_SCL0

D5

KBC_SCL0

1012 DB

+3VL

C18
SCD1U25V3ZY-1GP

+3VL

C23
SC1000P50V3JN-GP

0502 PV
+3VL

2
3

EC64
SCD1U16V2ZY-2GP

BT_TH#

D4

BT+

TP21 TP28-75-GP

BT+

TP16 TP28-75-GP

BT+

TP15 TP28-75-GP

GND

TP18 TP28-75-GP

GND

TP27 TP28-75-GP

BAT_SDA0

TP14 TP28-75-GP

BAT_SCL0

TP13 TP28-75-GP

BAT_TH#

TP12 TP28-75-GP

GND

TP17 TP28-75-GP

BAV99W-1-GP

0502 PV

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

AD/BATT CONN
Size
A3

Document Number

Date: Monday, May 05, 2008


5

Rev

SA

VITAS
Sheet
1

35

of

48

2
13

1
C698
1

2
SC1KP50V2KX-1GP
2

R468
6K98R2-GP

C683
1
2
SC1KP50V2KX-1GP

BOOT

R456

1
2

1
2

G121
GAP-CLOSE-PWR-2U

1
2

1
6260_ISEN2

6260_RTN
<Core Design>

C694
SCD01U50V2ZY-1GP

Wistron Corporation
C697
SC1KP50V2KX-1GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

ISL6266CCRZ_CPU_CORE(1/2)
Size
A3

Document Number

Date: Monday, May 05, 2008


4

G122
GAP-CLOSE-PWR-2U

8
7
6
5
D
D
D
D

Close to
phase 1
Inductor

2 C679 6260_VO
SC330P50V3KX-GP

6260_AGND

5
6
7
8
4
3
2
1

4
3
2
1
1

2
5K1R2F-2-GP

1
2
0R0402-PAD

6260_AGND

0314 SI

VCC_SENSE

1
6260_DFB

Close to IC

C681
SCD1U10V2KX-4GP

R454
1
2
0R0402-PAD

R449
1KR2F-3-GP

ISL6260CCRZ-T-GP

VSS_SENSE

R399
NTC-10K-9-GP

R442

6260_AGND

6260_VO

R410
5K11R3F-1-GP

R436
2K94R2F-GP

37

C700
SC220P50V2KX-3GP

16

VO

37

6260_VO

VW

C669
1
2
SCD22U10V3KX-2GP

6260_ISEN1

6260_VSUM

COMP

6260_VW

C676

R413
10KR2F-2-GP

10KR2F-2-GP

4K53R2F-1-GP

FB

17

6260_VSUM

R439

10

6260_COMP

6260_OCSET

R414
10R2F-L-GP

R412

VDIFF

VSUM

11

6260_ISEN1_G1

DPRSTP#

OCSET

6208_LG1
R466
12K7R3F-GP
1
2

6260_ISEN1_G2

37

6260_AGND

6260_VSUM

CLK_EN#

S
S
S
G

DPRSLPVR

38

1
2
3
4

36

POWERPAK-8P-GP

6260_VO

2 6260_COMP_R 1
2
C710
SCD022U16V2KX-3GP
R471
68K1R2F-1-GP
1
2

VR_ON

RTN

R460
1KR2F-3-GP

35

2
C

U68

+5VALW

6260_FB

21

+VCC_CORE

25

ISEN3

37

Close to
phase 1
Inductor

2 VDIFF_C 1
2
180R2F-1-GP
C709
SC1800P50V2KX-1GP

PWM3

6260_ISEN2

SCD068U10V2KX-1GP

1
R469

6260_ISEN2

1
2
C675
SCD22U16V3KX-2-GP

4,7,18 H_DPRSTP#

22

37

1
R453

ISEN2

6260_PWM2

19 CLK_EN#

VID0
VID1
VID2
VID3
VID4
VID5
VID6

DFB

7,19 PM_DPRSLPVR

6260_PWM2

15

19,38,39,40,42 ALL_PWRGD

SOFT

DROOP

H_VID[6..0]

26

POWERPAK-8P-GP

6
28
29
30
31
32
33
34

14

1
2 G125 6260_VID0
GAP-CLOSE-PWR-2U 1
2 G124 6260_VID1
GAP-CLOSE-PWR-2U 1
2 G123 6260_VID2
GAP-CLOSE-PWR-2U 1
2 G126 6260_VID3
GAP-CLOSE-PWR-2U 1
2 G127 6260_VID4
GAP-CLOSE-PWR-2U 1
2 G129 6260_VID5
GAP-CLOSE-PWR-2U 1
2 G130 6260_VID6
GAP-CLOSE-PWR-2U
6260A_VR_ON
1
2
R440
1KR2J-1-GP
6260_DPRSLPVR
1
2
R441
499R2F-2-GP
CLK_ENABLE#
2
0R2J-2-GP
R521
1
2
0314 SI
0R0402-PAD
6260_VDIFF

6260_DROOP

6260_SOFT
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6

SCD015U50V3KX-GP

PWM2

8
7
6
5

NTC

D
D
D
D

6260_NTC

VSEN

2 R396
NTC-470K-1-GP

U12

S
S
S
G

VR_TT#

1
2
3
4

RBIAS

L24
IND-D36UH-9-GP

6208_UG1
6208_PH1

37

PMON

6260_ISEN1

6260_RBIAS

12

1
2
1
C699

2 R409
4K02R2F-GP
2

PSI#

6260_PMON

3 CPU_PROCHOT#_R

5
6
7
8

POWERPAK-8P-GP

6260_VSEN

40

18

39
3V3

PGOOD

6260_ISEN1

POWERPAK-8P-GP

GND

EC53
SCD1U25V3ZY-1GP

23

DY

C623
SC10U25V6KX-1GP

ISEN1

37

C613
SC10U25V6KX-1GP

27

6260_FCCM

C177
SC10U25V6KX-1GP

PWM1

6260_PWM1

FCCM

C188
SC10U25V6KX-1GP

U66

U11

24

6260_FCCM

S
S
S
G

6260_AGND
C711
SC1U10V3KX-3GP

6260_PSI#

EC13
SCD1U50V3KX-GP

41

0417 PV

VSS

S
S
S
G

R461
1
2
0R0402-PAD
R462
2
10KR2F-2-GP
1
2 R463
6260_AGND
147KR2F-GP

PSI#

1109 DB

D
D
D
D

6260_AGND

6260_AGND

ISL6208CRZ-TGP-U

DY

KBC reset Pin to IMVP PGD_IN(pin 2)


R464
68R2-GP

6208_PH1
6208_UG1
6208_LG1

7
8
4

DCBATOUT_6260_1

33

D
D
D
D

19
+1.05VS

VIN

U73
6260_AGND

0425 PV

GAP-CLOSE-PWR

FCCM

PHASE
UGATE
LGATE

GAP-CLOSE-PWR-2U

GAP-CLOSE-PWR
G31
1
2

R457
1K91R2F-1-GP

CORE_PWRGD

20

GAP-CLOSE-PWR
G30
1
2

PWM

G128

6260_AGND
C668
SC1U10V3KX-3GP

GAP-CLOSE-PWR
G29
1
2

6260_FCCM

9
3

6260_VDD

GAP-CLOSE-PWR
G28
1
2

6260_PWM1

+3VS
6260_VIN

GAP-CLOSE-PWR
G117
1
2

C671
SCD01U50V2KX-1GP

U71

R433
10R3J-3-GP

GAP-CLOSE-PWR
G118
1
2

C634
SC1U10V3KX-3GP

R434
10R3J-3-GP

VCC

+3VALW

+5VALW

GND
GND

R455
+3.3V_6260 1
2
0R0402-PAD

GAP-CLOSE-PWR
G119
1
2

6260_AGND

1
2
1
2
0R0402-PAD C635
0429 PV SCD22U10V3KX-2GP

DCBATOUT_6260_1

VDD

R403

+5VALW

DCBATOUT_6260_1
G120

DCBATOUT

Rev

SA

VITAS
Sheet
1

36

of

48

DCBATOUT_6260_2

1
2

6260_VSUM

36 6260_ISEN2

6260_ISEN2

1
2

1
6260_ISEN1

0321 SI

GAP-CLOSE-PWR
G114
1
2

TC10

TC11

1
6260_VO
36

GAP-CLOSE-PWR
G113
1
2

+VCC_CORE

2
36 6260_VSUM

1
2
2

0321 SI

SCD22U10V3KX-2GP

36

GAP-CLOSE-PWR
G23
1
2

TC12

TC16
SE330U2VDM-L-GP

R99
5K11R3F-1-GP

R101
10KR2F-2-GP

TC14

SE330U2VDM-L-GP

10KR2F-2-GP

C670
1
2

TC17

SE330U2VDM-L-GP

GAP-CLOSE-PWR
G22
1
2

GAP-CLOSE-PWR
G21
1
2

2
1

R100
10R2F-L-GP

6208_LG2

2
1

G115
GAP-CLOSE-PWR-2U

1
6260_ISEN2_G1

S
S
S
G

1
2
3
4

6260_ISEN2_G2

G116
GAP-CLOSE-PWR-2U

R102

DCBATOUT_6260_2
G20

+VCC_CORE

SE330U2VDM-L-GP

POWERPAK-8P-GP

Iomax = 41A, OCP >= 60A

SE330U2VDM-L-GP

POWERPAK-8P-GP

84.00351.036
Renesas RJK0351DPA-02
Id: 40A Qg: 17.6nC
Rdson: 4.3 ~ 5m
Rg: 2.4

4
3
2
1
8
7
6
5
D
D
D
D

U63

SE330U2VDM-L-GP

ISL6208CRZ-TGP-U

5
6
7
8

5
6
7
8
4
3
2
1
8
7
6
5
D
D
D
D

U9

DCBATOUT

6208_PH2
6208_PH2
6208_UG2
6208_LG2

S
S
S
G

FCCM

7
8
4

1
2
3
4

BOOT

5
VCC

6260_FCCM

9
3

36 6260_FCCM

PHASE
UGATE
LGATE
GND
GND

1
2

PWM

CYNTEC 0.36uH
Idc=30A 10*11.5*4
DCR=1.05mOhm
Idc: 30A
68.R3610.20C

C112
SC10U25V6KX-1GP

C103
SC10U25V6KX-1GP

6260_PWM2

6208_UG2

L18
IND-D36UH-9-GP

C544
SC10U25V6KX-1GP

36 6260_PWM2

C540
SC10U25V6KX-1GP

U58

SCD1U50V3KX-GP

C513
SC1U10V3KX-3GP

DY
S
S
S
G

1
2
1
2
0R0402-PAD C521
0429 PV SCD22U10V3KX-2GP

EC12

DY

U60

POWERPAK-8P-GP
S
S
S
G

R376

+5VALW

84.00365.036
Renesas RJK0365DPA
Id: 30A Qg: 7.6nC
Rdson: 9.6 ~ 13.4m
Rg: 0.8

D
D
D
D

D
D
D
D

U7
POWERPAK-8P-GP

0117 DB
0417 PV

Panasonic 330F
2V ESR: 9m
Iripple: 3A
79.33719.L01

GAP-CLOSE-PWR
G112
1
2
B

GAP-CLOSE-PWR
G111
1
2
GAP-CLOSE-PWR

0425 PV

<Core Design>
A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

ISL6260CCRZ_CPU_CORE(2/2)
Size
A3

Document Number

Date: Monday, May 05, 2008


5

Rev

SA

VITAS
Sheet
1

37

of

48

VBST1

22

10

DRVH2

DRVH1

21

51125_VBST1 1
R248
51125_DRVH1

51125_LL2

11

LL2

LL1

20

51125_LL1

51125_DRVL2

12

DRVL2

DRVL1

19

51125_DRVL1

24

51125_VO1

51125_VFB2

VFB2

VFB1

51125_VFB1

13

EN0

5
6
7
8
U42
IRF8707PBF-GP

PGOOD

23

ENTRIP2

VREF

GND

15

51125_TONSEL

TONSEL

GND

25

51125_SKIPSEL

14

SKIPSEL

VCLK

18

DY

2 0R2J-2-GP

R533 1

DY

2 0R2J-2-GP

+3VL

R551 1

+51125_VREF

R550 1
R273 1

2 0R2J-2-GP

DY

2 0R2J-2-GP

DY

2 0R2J-2-GP

1
1
+3VL

TONSEL

AUTOSKIP

200k/CH1
250k/CH2

245k/CH1
305k/CH2

1
2

5V_PWR

+3VL

51125_ENTRIP2

VREG5

300k/CH1
375k/CH2

DY

00A AUTOSKIP 00A AUTOSKIP

R534

VREG3

C382

1
2
G64
GAP-CLOSE-PWR

0425 PV

2N7002EDW-GP

<Core Design>
A

C385
SC18P50V2JN-1-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

DY
Title
Size
A3

365k/CH1
460k/CH2

TPA51125 +5VALW +3VALW

Document Number

Date: Monday, May 05, 2008


5

+5VALW

1
2
G59
GAP-CLOSE-PWR

+3VL_U71

1
2
G63
GAP-CLOSE-PWR
1
2
G60
GAP-CLOSE-PWR

0429 PV

160KR2F-GP

PWM

1
2
G61
GAP-CLOSE-PWR

C383
SC18P50V2JN-1-GP

PWR_S5_EN_U71

1
2
0R0402-PAD

G62
GAP-CLOSE-PWR

2N7002EDW-GP

R238
30 PWR_S5_EN

SCD1U25V3ZY-1GP

SKIPSEL

VREF

U28

GND

R239
10KR2J-3-GP

0425 PV

G53
GAP-CLOSE-PWR

160KR2F-GP

2
1

G52
GAP-CLOSE-PWR

EC19

DY

DY

+3VALW

R532

+3VL_U70

SCD1U25V3ZY-1GP

0502 PV

51125_ENTRIP1
C394

1
2
G58
GAP-CLOSE-PWR
1

PWR_S5_EN_U70

1
2
0R0402-PAD
1

Design Current=4A
OCP design>6A
R233
10KR2J-3-GP

U27

0429 PV

SCD1U16V2ZY-2GP

Sanyo 220uF 6.3V


ESR=25mohm
Iripple=2.4A
77.22271.27L

30 PWR_S5_EN

R231
20KR2F-L-GP

ALL_PWRGD 19,36,39,40,42

2 0R2J-2-GP

R537 1

1
2
G54
GAP-CLOSE-PWR

1
2
G51
GAP-CLOSE-PWR

R536
30KR2F-GP

DY

1
C412
SC10U10V5KX-2GP

R548 1

2 0R2J-2-GP

+VL

DY

R240 1

R237

G56
GAP-CLOSE-PWR

C767
SC18P50V2JN-1-GP

Design Current=1.2A
OCP>2A

Sanyo 220uF 6.3V


ESR=25mohm
Iripple=2.4A
77.22271.27L

+VL

R246
100KR2J-1-GP

2
1
2

+3VL

Close to IC TPS51125

3D3V_PWR

2
2

DY

TC7
ST220U6D3VDM-20GP

DY

VREG3

R538
0R2J-2-GP
+3VALW

+3VL

+51125_VREF

1
2
G55
GAP-CLOSE-PWR

G74

TPS51125RGER-GP

C398
SC10U10V5KX-2GP

R232
10KR2F-2-GP

51125_ENTRIP1

ENTRIP1

4
3
2
1

2 51125_EN0
820KR2F-GP
51125_ENTRIP2

CYNTEC 3.3uH
Idc=6A
6.5*6.9*3
DCR= 28 ~
30mOhm
68.3R310.20A

VO1

VO2

5V_PWR

5V_PWR
2
IND-3D3UH-57GP

VREG5

S
S
S
G

1
2
3
4
1 2

DY C768
SC18P50V2JN-1-GP

C384

SCD22U6D3V2KX-1GP

51125_VO2

S
S
S
G

1
+51125_VREF

L9

R272

DY R539
0R2J-2-GP

R540
6K65R2F-GP

2
SCD1U25V3KX-GP

GAP-CLOSE-PWR-3-GP

G71
GAP-CLOSE-PWR-3-GP

ST220U6D3VDM-20GP

U38
IRF8707PBF-GP

51125_VBST1_L 1
2
0R0603-PAD

C434

VBST2

D
D
D
D

D
D
D
D

8
7
6
5

2
IND-3D3UH-57GP

L8

TC6

1
2 51125_VBST2
0R0603-PAD
51125_DRVH2

D
D
D
D

2
VIN

C403

51125_VBST2_L
2
1
SCD1U25V3KX-GP
R256

3D3V_PWR
3D3V_PWR 1

0425 PV

S
S
S
G

U39
IRF8707PBF-GP

C435

DY

1101 DB

C405

1
2
3
4

S
S
S
G

1101 DB

0407 PV

SC10U25V6KX-1GP

U31

0117 DB
EC37

SC10U25V6KX-1GP

0425 PV

DCBATOUT_51125_1

SCD01U50V2KX-1GP

U41
IRF8707PBF-GP

C411

DCBATOUT_51125_1

D
D
D
D

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD01U50V2KX-1GP

8
7
6
5

DY
D

C413

16

0407 PV

1
2
G66
GAP-CLOSE-PWR
1
2
G57
GAP-CLOSE-PWR
1
2
G65
GAP-CLOSE-PWR
1
2
G67
GAP-CLOSE-PWR
1
2
G69
GAP-CLOSE-PWR

DCBATOUT

17

C431

DCBATOUT_51125_2

C432

G73
GAP-CLOSE-PWR
1
2
G72
GAP-CLOSE-PWR
1
2
G70
GAP-CLOSE-PWR
1
2
G68
GAP-CLOSE-PWR

SCD01U50V2KX-1GP

EC36

DCBATOUT

DCBATOUT_51125_2

SC10U25V6KX-1GP

SI4800, SO-8
Id=9A, Qg=8.7~13nC
Rdson=23~30mohm

DCBATOUT

5
6
7
8

4
3
2
1

Rev

SA

VITAS
Sheet
1

38

of

48

TI TPS51116 for 1D8V and 0D9V

G93

+5VALW

1101 DB

R316
5D1R3J-GP

51116_VDD
2
6K8R2F-2-GP

1
R320

1 2

DCBATOUT_51116
D

DCBATOUT

GAP-CLOSE-PWR
G94
1
2

C455
SC1U10V2KX-1GP

GAP-CLOSE-PWR

+5VALW

2
C462

GAP-CLOSE-PWR
G91
1
2

1
SC1KP50V2KX-1GP

GAP-CLOSE-PWR
G92
1
2

C458
SC1U10V2KX-1GP

15

VDDQS

TPS51116_VDDQ

FB

TPS51116_FB

2
C454
SCD033U50V3KX-1GP

0430 PV

DY

CHIP CHOKE 0.68UH


PCMC063T-R68
RDC: 5.0 ~ 5.5m 0117 DB
DC current: 15.5A
68.R6810.20B

U51

POWERPAK-8P-GP
84.00351.036
Renesas RJK0351DPA-02
Id: 40A Qg: 17.6nC
Rdson: 4.3 ~ 5m
Rg: 2.4

0502 PV

2
EC51

EC50
SCD1U16V2ZY-2GP

DY

0R2J-2-GP
R298
10KR2F-2-GP

COIL-D68UH-5-GP

SCD1U50V3KX-GP

DDR_VREF_S3

TPS51116_PHS

C469
+5VALW SCD1U25V3KX-GP

GAP-CLOSE-PWR
G97
1
2

2
TPS51116RGER-GP-U

1 R303
2
0R0603-PAD

TPS51116_VBST 1

R566

GAP-CLOSE-PWR
G106
1
2

GAP-CLOSE-PWR
G107
1
2

+1.8V_RUN_P

L14

DY
2

TPS51116_UGT
C449
SC18P-GP

S
S
S
G

5 REF
1DDR_VREF_S3_R

R299
14KR2F-GP DY

D
D
D
D

25

VCCA

POWERPAK-8P-GP

+5VALW

VTTS
GND

+1.8V

GAP-CLOSE-PWR
G108
1
2

VTT

24

GAP-CLOSE-PWR
G104
1
2

GAP-CLOSE-PWR
G100
1
2

S
S
S
G

+0.9VP

VSSA

TPS51116_VDDQ

U52

TON

18
17

PGND1
PGND1

+1.8V_RUN_P
Iomax = 13A
OCP >= 15A

C481

PGND2

19

0117 DB

C480

84.00365.036
Renesas RJK0365DPA
Id: 30A Qg: 7.6nC
Rdson: 9.6 ~ 13.4m
Rg: 0.8

TPS51116_LGT

DL

EC46

DY

NC#7

TPS51116_PHS

VTTIN

20

5
6
7
8

23

LX

G102

+1.8V_RUN_P

4
3
2
1

VTTEN

DCBATOUT_51116

1101 DB

5
6
7
8

EN/PSV

10

21 TPS51116_UGT

SC10U25V6KX-1GP

11

DH

D
D
D
D

NC#12

2 TPS51116_VBST
0R0603-PAD

SC10U25V6KX-1GP

+1.8V_RUN_P

12

SCD1U50V3KX-GP

PM_SLP_S3#

PGD

22 TPS51116_VBST1

4
3
2
1

19,30,31,33 PM_SLP_S4#
19,23,24,30,33,40,41,42

13

R324

BST

DY
10KR2F-2-GP

19,36,38,40,42 ALL_PWRGD

14

ILIM

R304

+3VALW

VDDP

1011 DB

0425 PV

U46

VDDP

16

TPS51116_CS

TC9
SE330U2D5VDM-LGP

GAP-CLOSE-PWR
G98
1
2

1025 DB

GAP-CLOSE-PWR
G109
1
2

Sanyo 330uF 2.5V


ESR=15mOhm
77.23371.L01

GAP-CLOSE-PWR
G105
1
2
GAP-CLOSE-PWR
G103
1
2

TPS51116_LGT
B

GAP-CLOSE-PWR
G99
1
2

+1.8V_RUN_P
G101

TPS51116_VDDQ

DY
2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

0425 PV

+1.8V_RUN_P

C70
SC10U6D3V5MX-3GP

0425 PV

G88
+0.9VP

+0.9VS

VTTREF

S0

Hi

Hi

On

On

S3

Lo

Hi

On

On

Off(Hi-Z)

S4/S5

Lo

Lo

Off

Off

Off

SC10U6D3V3MX-GP

G87

VTT

C476

On

VDDR

1
C466
C467

S5

S3

SC10U6D3V3MX-GP GAP-CLOSE-PWR

0.9VS
Iomax=1A

2
SCD1U16V2ZY-2GP
2

State

GAP-CLOSE-PWR
C468

SC10U6D3V3MX-GP

<Core Design>
A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

TPS51116 1D8V/0D9V
Size
A3

Document Number

Date: Monday, May 05, 2008


5

Rev

SA

VITAS
Sheet
1

39

of

48

DCBATOUT

+5VALW

G1

LX

SC412A_LX_2

13

RILIM_2

6K49R2F-1-GP
SC412A_DL_2
0128

POWERPAK-8P-GP

1
2

1
2

1
2

2
SC412A_VFB_2

R295
10K2R2F-GP

CYNTEC 1.0H
Idc: 11A
6.56.93mm
Rdc: 9 ~ 10m
68.1R01A.20B

DY
BC4

SCD01U16V2KX-3GP

DY

C482

C450

R296
4K12R2F-GP

+1.05V_VCCP_P

RTN

10

GND

PAD
SC412AMLTRT-GP

VOUT

NC#15

17

NC#14

15

SC412A_VFB_2

+1.05V_VCCP_P

EC39
SCD1U16V2ZY-2GP

FB

14

U2
84.00351.036
Renesas RJK0351DPA-02
Id: 40A Qg: 17.6nC
Rdson: 4.3 ~ 5m
Rg: 2.4

SC412A_DL_2

DB

SCD1U10V2KX-4GP

NC#8

SC22P50V2JN-4GP

0128 DB

DL

S
S
S
G

1112 DB
C

NC#7

D
D
D
D

C459
SCD1U10V2KX-4GP

1
2
COIL-1UH-34-GP

33KR2F-GP

+1.05V_VCCP
Iomax = 9.5A
OCP >= 15A

L11

SC412A_DH_2
SC412A_LX_2

ILIM

1 SC412A_LX_2

EN

0502 PV

R313
2

5
6
7
8

12

C460

SC412A_DH_2

C12

TC1
SE330U2VDM-L-GP

16

POWERPAK-8P-GP

4
3
2
1

DH

U1

4
3
2
1

1SS355PT-GP
A

0425 PV

VCC

BST

SCD1U25V3KX-GP

5
6
7
8

C456

SC412A_LX_2

C13

SC10U25V6KX-1GP

PM_SLP_S3#

EC2

DY

SC10U25V6KX-1GP

R318
2

84.00365.036
Renesas RJK0365DPA
Id: 30A Qg: 7.6nC
Rdson: 9.6 ~ 13.4m
Rg: 0.8

SCD1U50V3KX-GP

4,30,33,39,41,42

GAP-CLOSE-PWR

SC_1.05_BST

PGOOD

S
S
S
G

D18

1231 SI

11

0117 DB

G3

SC10U25V6KX-1GP

0317 SI

DCBATOUT_SC412A_2

D
D
D
D

1
2VCC_PWRGD1
R306 0R2J-2-GP

19,36,38,39,42 ALL_PWRGD

GAP-CLOSE-PWR

C453
SC1U10V3KX-3GP

U45

D19
CH521S-30-GP-U1

1 2

SC_1.05_VCC

+3VS

R312
10KR2J-3-GP

GAP-CLOSE-PWR

R297
10R3J-3-GP

1011 DB

DCBATOUT_SC412A_2

G2

+5VALW

Panasonic 330F 2V
ESR: 9m Iripple: 3A
79.33719.L01

Close to IC SC412A

1101 DB

+1.05V_VCCP_P
G5
1

+1.05VS

GAP-CLOSE-PWR
G7
1
2
GAP-CLOSE-PWR
G18
1
2
GAP-CLOSE-PWR
G8
1
2
GAP-CLOSE-PWR
G11
1
2
GAP-CLOSE-PWR
G17
1
2

GAP-CLOSE-PWR
G19
1
2
GAP-CLOSE-PWR
G9
1
2
GAP-CLOSE-PWR
G15
1
2
GAP-CLOSE-PWR
G13
1
2
GAP-CLOSE-PWR

0425 PV

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

SC412A +1.05VS
Size
A3

Document Number

Date: Monday, May 05, 2008


5

Rev

SA

VITAS
Sheet
1

40

of

48

+1.8V

1
C288
SC10U10V5ZY-1GP

C301
SC1U10V3ZY-6GP

0425 PV

DY C284
SC10U10V5ZY-1GP

+5VALW

G43

1101 DB

GAP-CLOSE-PWR
G41
1
2

Vo(cal.)=1.5V

U15

GAP-CLOSE-PWR
G39
1
2

1D5V_LDO

1
C282
SC10U10V5ZY-1GP

GAP-CLOSE-PWR

1
TC4
ST100U4VBM-L-GP

C305

R137
60K4R2F-GP

Vo=0.8*(1+(R1/R2))

R136
69K8R2F-GP

SC33P50V2JN-3GP

G972-120ADJF11U-GP

SO-8-P

DY

5912_FB_1

VO#4
VO#3
ADJ
GND

SA 1010

PM_SLP_S3#

4
3
2
1

C283
SC10U10V5ZY-1GP

Iomax = 3A
+1.5VS

PM_SLP_S3#

VIN
VPP
POK
VEN
GND

19,23,24,30,33,39,40,42

5
6
7
8
9

KEMET NTD:5.615
100uF, 4V, B2 Size
Iripple=1.1A, ESR=70mohm

<Core Design>
A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

GMT_1D5V_LDO
Size
A3

Document Number

Date: Monday, May 05, 2008


5

Rev

SA

VITAS
Sheet
1

41

of

48

FB

SC_VGA_VFB

1
2

1
2

SC_VGA_DL

0423 PV

GPU_VCTL_2 1

BC2

Q5

2GPU_VCTL_3

GAP-CLOSE-PWR
C362
SC2200P50V2KX-2GP

G45

GAP-CLOSE-PWR
2N7002E-1-GP

0311 SI

G44

GPU_VCTL_1

GAP-CLOSE-PWR

0429 PV

G47

.
. .
.

R559

G37

10KR2J-3-GP

0225 SI

0.95V
1.1V

GAP-CLOSE-PWR

NVVDD_SENSE 44

19K6R2F-GP

R187

VID=0
VID=1

VGA_CORE_S0

0225 SI

1
2
0R0402-PAD

VGA_CORE_PWR
G46

R205

DY

GPU_VCTL

0317 SI

R217
49K9R2F-L-GP

VGA_CORE_PWR

45

DY

10KR3F-GP

SC412AMLTRT-GP

10

VOUT

SC_VGA_VFB

R212
19K6R2F-GP

NC#15

RTN

NC#14

15

PAD

14

NC#8

GND

NC#7

0128 DB

SCD01U16V2KX-3GP

SCD1U25V3KX-GP

0221 SI
C

6K49R2F-1-GP

TC5
SE330U2VDM-6-GP

R565

C332

SCD1U50V3ZY-GP

SC_VGA_DL

SC_VGA_LX

DL

0314 SI

SC_VGA_ILIM1

R214

DY 13K3R3F-GP

13

ILIM

EN

C345

10KR2J-3-GP

12

4
3
2
1

SC_VGA_EN

17

PM_SLP_S3#

C364
SC100P50V2JN-3GP
S
S
S
G

19,23,24,30,33,39,40,41

R192

G40

0425 PV

SC_VGA_LX

R195

84.00351.036
Renesas RJK0351DPA-02
Id: 40A Qg: 17.6nC
U18
Rdson: 4.3 ~ 5m
POWERPAK-8P-GP
Rg: 2.4

SC_VGA_DH

GAP-CLOSE-PWR

Panasonic 330F 2V
ESR: 9m Iripple: 3A
79.33719.L01

16

GAP-CLOSE-PWR

VGA_CORE_PWR

1
2
COIL-1UH-34-GP
5
6
7
8

DH

G38

D
D
D
D

LX

SCD1U25V3KX-GP
SC_VGA_LX

BST

0221 SI

L6

GAP-CLOSE-PWR

SC4D7U25V5MX-1GP

C347

PGOOD

SC_VGA_DH

G36

VCC
11

5
6
7
8
4
3
2
1

1
2VGA_PWRGD1
R200 0R2J-2-GP

+1.8VS_EN

2SC_VGA_LX

33

SC_VGA_BST

VGA_CORE_S0

Iomax = 9A, OCP >= 15A


CYNTEC 1.0H
Idc: 11A
VGA_CORE_PWR
6.56.93mm
Rdc: 9 ~ 10m
68.1R01A.20B Vosetting=1.1

U22

0109 DB

C363
SC1U10V3ZY-6GP

S
S
S
G

R199
10KR2J-3-GP

C287

SC4D7U25V5MX-1GP

SC_VGA_VCC

C291

DY

1 2

+3VS

D
D
D
D

EC20

84.00365.036
Renesas RJK0365DPA
D15
CH521S-30-GP-U1
Id: 30A Qg: 7.6nC
U16
Rdson: 9.6 ~ 13.4m
POWERPAK-8P-GP
Rg: 0.8

VGA_CORE_PWR
+5VALW

R201
10R3J-3-GP

0109 DB

DCBATOUT_SC_VGA

0117 DB

+5VALW

SCD1U25V3ZY-1GP

Vout Setting:
0.5V/Rlow=(Vout-0.5V)/Rhigh
Low(0V)=>Vo=0.9V
High(3.3V)=>Vo=1.09V

GAP-CLOSE-PWR
G42

0425 PV

GAP-CLOSE-PWR

DCBATOUT_SC_VGA

1D1V_S0
Iomax = 2.4A

G24

FB

APL5913-KAC-1-GP

GND

R55
1D1V_FB 1

C117

56KR2F-GP

R54
C120
1
2

150KR2F-L-GP

SC33P50V2JN-3GP

0111 DB

Vout=0.8V*(1+R601/R596)

GAP-CLOSE-PWR

+1.1VS

0425 PV

GAP-CLOSE-PWR

3
4

GAP-CLOSE-PWR
G33
1
2

GAP-CLOSE-PWR
G26
1
2
GAP-CLOSE-PWR
G25
1
2

<Core Design>

0425 PV

C124
SC10U10V5ZY-1GP

0429 PV

VOUT
VOUT

1D1V_PWR

SC10U10V5ZY-1GP
2

EN

C97
SC10U10V5ZY-1GP

5
9

21D1V_EN
0R0402-PAD

VIN
VIN

POK

R41

1
PM_SLP_S3#

2 1D1V_POK
DY
0R2J-2-GP

VCNTL

U8
R42

0123 DB

C92
SC1U10V3ZY-6GP

GAP-CLOSE-PWR
G34
1
2

GAP-CLOSE-PWR
G27
1
2

+1.8V

19,36,38,39,40 ALL_PWRGD

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

KEMET NTD:5.615
100uF, 4V, B2 Size
Iripple=1.1A, ESR=70mohm

Title

VGA CORE 1V
Size
A3

Document Number

Date: Monday, May 05, 2008


5

GAP-CLOSE-PWR
G35
1
2

+5VALW

0128 DB

DCBATOUT
G32

Rev

SA

VITAS
Sheet
1

42

of

47

0312 SI

0314 SI

H20

H21

HOLE

H15

HOLE

H3

HOLE

H14

HOLE

HOLE

H10
HOLE

H16
HOLE

H5
HOLE

H17
HOLE

H6
HOLE

H18

HOLE

87.66383.231

HOLE

HOLE

H12

HOLE

HOLE

H11

H8

HOLE

H19

HOLE

H7

1
HOLE

H9

H2
HOLE

H1
HOLE

H13
HOLE

H4

1108 DB

SPR8

SPRING-6

SPRING-58-GP

SPR10
SPRING-14

SPRING-6

SPR9

SPR7
SPRING-62-GP

34.40V16.001
34.49U26.001
34.49U24.001
34.39S07.003
34.13B01.001
34.41V01.001
34.4B312.002
34.13B01.001

SPRING-31-GP

SPR1
SPR3
SPR4
SPR6
SPR7
SPR8
SPR9
SPR10

SPR6

SPR4

SPRING-7

SPRING-1-GP

SPR3

SPR1

0429 PV

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

MISC
Size
A3

Document Number

Date: Monday, May 05, 2008


A

Rev

SA

VITAS
Sheet
E

43

of

48

+1.8VS

AG25
AG26
2 SCD1U10V2KX-5GP
2 SCD1U10V2KX-5GP

RXP15
RXN15

PEX_TERMP

PEX_TX15
PEX_TX15#

AF27
AE27

PEX_RX15
PEX_RX15#

AG10

PEX_RSVD

1
2

2
1

1
2

2
1

1
2

1
2

2
1

1
2

2
1

1
2

2
1

1
2

2
1

R66

C181

C584

1
47
47
48
48

R429
30D1R2F-L-GP

R91
DY

1
R428
30D1R2F-L-GP

2
M22

TP68
R65

FBA_DEBUG

L-10NH-GP
C564

0311 SI

R427

R387
2K49R2F-GP

DY

+1.8VS

+1.1VS

FB_VREF

0111 DB

10KR2J-3-GP

R426
DY 1KR2F-3-GP

A16

FB_VREF

FB_PLLAVDD

R19

FB_DLLAVDD

T19

L1

DY 1KR2F-3-GP DY

C667
NB9M-GE-S-A1-H-GP

FB_PLLAVDD
C216
C217

1
2

1
C186

1
2

1
2
1
2
2

1
2
1
2
1
2

1
2
1
2
1
2
1
2

1
2
1
2
1
2
1
2

1
2

1
2

2
1
2
1
2
1
2
1
2

PEX_PLLDVDD

PEX_RX14
PEX_RX14#

AE25
AE26

1
2

1
2

1
1
2

1
2
1
2
1
2
1
2

FBA_DEBUG

C173 1
C174 1

FBCAL_TERM_GND 2

PEX_TX14
PEX_TX14#

B16

AD23
AD24

FBCAL_PU_GND

FBCAL_TERM_GND

C223
BLM18AG221SN1D-GP

RXP14
RXN14

FBCAL_PD_VDDQ

A15

FBA_CLK0
FBA_CLK0#
FBA_CLK1
FBA_CLK1#

2 SCD1U10V2KX-5GP
2 SCD1U10V2KX-5GP

B15

FBCAL_PU_GND

FBA_CMD_12

R86

+1.8VS

PEX_RX13
PEX_RX13#

FBCAL_PD_VDDQ

LAB TESTPOINTS

+1.8VS

PEX_TX13
PEX_TX13#

AG24
AF25

FBA_CLK0
FBA_CLK0#
FBA_CLK1
FBA_CLK1#

47,48
47,48
47,48
47,48
47,48
48
47,48
47,48
47,48
47,48
47,48
47,48
47,48
47,48
47
47,48
47
47,48

place near GPU

AF9

L19

AC22
AD22

F24
F23
N24
N23

FBA_CMD_8
FBA_CMD_9
FBA_CMD_10
FBA_CMD_11
FBA_CMD_12
FBA_CMD_13
FBA_CMD_14
FBA_CMD_15
FBA_CMD_16
FBA_CMD_17
FBA_CMD_18
FBA_CMD_19
FBA_CMD_20
FBA_CMD_21
FBA_CMD_22
FBA_CMD_23
FBA_CMD_24
FBA_CMD_25

40D2R2F-2-GP

+1.1VS

PEX_PLLVDD

C149 1
C148 1

C260

RXP13
RXN13

C259

2 SCD1U10V2KX-5GP
2 SCD1U10V2KX-5GP

FBA_CLK0
FBA_CLK0#
FBA_CLK1
FBA_CLK1#

FBA_CMD_11

FBA_CMD_27 47,48

C151 1
C150 1

PEX_RX12
PEX_RX12#

C256

AE24
AF24

RXP12
RXN12

PEX_TX12
PEX_TX12#

2 SCD1U10V2KX-5GP
2 SCD1U10V2KX-5GP

0111 DB

C662

PEX_RX11
PEX_RX11#

AB21
AB22

C146 1
C147 1

AF22
AE22

RXP11
RXN11

+3VS

place near balls

PEX_TX11
PEX_TX11#

2 SCD1U10V2KX-5GP
2 SCD1U10V2KX-5GP

TP63

42

PEG_TXP15
PEG_TXN15

AD21
AC21

C175 1
C176 1

FBADQS_RN0
FBADQS_RN1
FBADQS_RN2
FBADQS_RN3
FBADQS_RN4
FBADQS_RN5
FBADQS_RN6
FBADQS_RN7

47
47,48
47
47,48
48
48
48

NVVDD_SENSE

2
PEG_RXP15
PEG_RXN15

7
7

PEX_RX10
PEX_RX10#

A12
B12
C12
D12
E12
F12

B24
D25
E18
A18
R22
R27
Y24
AA27

FBA_CMD_0
FBA_CMD_1
FBA_CMD_2
FBA_CMD_3
FBA_CMD_4
FBA_CMD_5
FBA_CMD_6

SC4D7U6D3V3KX-GP

7
7

AG21
AG22

VDD33
VDD33
VDD33
VDD33
VDD33
VDD33

FBADQSN0
FBADQSN1
FBADQSN2
FBADQSN3
FBADQSN4
FBADQSN5
FBADQSN6
FBADQSN7

F26
J24
F25
M23
N27
M27
K26
J25
J27
G23
G26
J23
M25
K27
G25
L24
K23
K24
G22
K25
H22
M26
H24
F27
J26
G24
G27
M24
K22

SC1U10V2KX-1GP

PEG_TXP14
PEG_TXN14

PEX_TX10
PEX_TX10#

47
47
47
47
48
48
48
48

0314 SI
1

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28

SCD01U25V2KX-3GP

7
7

AD19
AD20

FBADQS_WP0
FBADQS_WP1
FBADQS_WP2
FBADQS_WP3
FBADQS_WP4
FBADQS_WP5
FBADQS_WP6
FBADQS_WP7

SCD1U10V2KX-5GP

PEG_RXP14
PEG_RXN14

RXP10
RXN10

A24
C25
E19
A19
T22
T27
AA24
AA26

SC1U6D3V3KX-2GP

7
7

PEX_RX9
PEX_RX9#

2 SCD1U10V2KX-5GP
2 SCD1U10V2KX-5GP

W15
W16

FBADQSP0
FBADQSP1
FBADQSP2
FBADQSP3
FBADQSP4
FBADQSP5
FBADQSP6
FBADQSP7

SC4D7U6D3V3KX-GP

PEG_TXP13
PEG_TXN13

AE21
AF21
C144 1
C145 1

VDD_SENSE
GND_SENSE

SCD01U16V2KX-3GP

PEG_RXP13
PEG_RXN13

7
7

PEX_TX9
PEX_TX9#

SCD1U10V2KX-5GP

7
7

AB19
AB20

47
47
47
47
48
48
48
48

PEG_TXP12
PEG_TXN12

RXP9
RXN9

C211

7
7

PEX_RX8
PEX_RX8#

2 SCD1U10V2KX-5GP
2 SCD1U10V2KX-5GP

PEG_RXP12
PEG_RXN12

AF19
AE19
C171 1
C172 1

C215

PEG_TXP11
PEG_TXN11

7
7

RXP8
RXN8

7
7

PEX_TX8
PEX_TX8#

2 SCD1U10V2KX-5GP
2 SCD1U10V2KX-5GP

PEG_RXP11
PEG_RXN11

AC18
AB18

C169 1
C170 1

7
7

PEX_RX7
PEX_RX7#

C197

10KR2J-3-GP

PEG_TXP10
PEG_TXN10

AG18
AG19

C198

C254
SC1U10V2KX-1GP

7
7

PEX_TX7
PEX_TX7#

FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7

C262
SC1U10V2KX-1GP

PEG_RXP10
PEG_RXN10

AD17
AD18

D23
C26
D19
B19
T24
T26
AA23
AB27

10KR2J-3-GP

PEG_TXP9
PEG_TXN9

7
7

RXP7
RXN7

FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7

C204
SCD1U10V2KX-5GP

7
7

PEX_RX6
PEX_RX6#

2 SCD1U10V2KX-5GP
2 SCD1U10V2KX-5GP

47
47
47
47
48
48
48
48

C229

C255
SCD1U10V2KX-5GP

PEG_RXP9
PEG_RXN9

AE18
AF18
C142 1
C143 1

C245

place near GPU

C244

C251

SCD1U10V2KX-5GP

PEG_TXP8
PEG_TXN8

7
7

PEX_TX6
PEX_TX6#

C205

C228

C252

SCD1U10V2KX-5GP

7
7

AC16
AD16

C232

FBAD[48..63]

C237

C272

+1.8VS

SCD022U16V2KX-3GP

PEG_RXP8
PEG_RXN8

RXP6
RXN6

C203

48

C210

SC4D7U6D3V3KX-GP

7
7

2 SCD1U10V2KX-5GP
2 SCD1U10V2KX-5GP

C247

C277

SCD1U16V2KX-3GP

PEG_TXP7
PEG_TXN7

C167 1
C168 1

C225

C278

SCD1U16V2KX-3GP

7
7

PEX_RX5
PEX_RX5#

C209

SC1U6D3V2KX-GP

PEG_RXP7
PEG_RXN7

PEX_TX5
PEX_TX5#

AF16
AE16

C279

SCD1U16V2KX-3GP

PEG_TXP6
PEG_TXN6

7
7

AB14
AB15

VGA_CORE_S0

SCD1U16V2KX-3GP

7
7

RXP5
RXN5

SCD1U10V2KX-5GP

PEG_RXP6
PEG_RXN6

2 SCD1U10V2KX-5GP
2 SCD1U10V2KX-5GP

PEX_RX4
PEX_RX4#

C214

FBAD[32..47]

SCD1U16V2KX-3GP

7
7

C140 1
C141 1

AG15
AG16

C660

SCD1U16V2KX-3GP

PEG_TXP5
PEG_TXN5

PEX_TX4
PEX_TX4#

C222

C276

SCD1U16V2KX-3GP

PEG_RXP5
PEG_RXN5

7
7

AD15
AC15

C230

SCD1U10V2KX-5GP

7
7

RXP4
RXN4

PEX_RX3
PEX_RX3#

SCD1U16V2KX-3GP

PEG_TXP4
PEG_TXN4

2 SCD1U10V2KX-5GP
2 SCD1U10V2KX-5GP

PEX_TX3
PEX_TX3#

AE15
AF15

C231

SCD1U16V2KX-3GP

7
7

C165 1
C166 1

PEX_RX2
PEX_RX2#

C226

SCD1U16V2KX-3GP

PEG_RXP4
PEG_RXN4

AF13
AE13
AD13
AD14

C208

SCD1U16V2KX-3GP

7
7

RXP3
RXN3

PEX_TX2
PEX_TX2#

J10
J12
J13
J9
L9
M11
M17
M9
N9
N11
N12
N13
N14
N15
N16
N17
N19
P11
P12
P13
P14
P15
P16
P17
R9
R11
R12
R13
R14
R15
R16
R17
T11
T17
T9
U19
U9
W10
W12
W13
W18
W19
W9

SCD1U16V2KX-3GP

PEG_TXP3
PEG_TXN3

2 SCD1U10V2KX-5GP
2 SCD1U10V2KX-5GP

AB11
AB12

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

SCD1U16V2KX-3GP

7
7

C138 1
C139 1

PEX_RX1
PEX_RX1#

SCD1U16V2KX-3GP

PEG_RXP3
PEG_RXN3

RXP2
RXN2

PEX_TX1
PEX_TX1#

SCD1U16V2KX-3GP

PEG_TXP2
PEG_TXN2

7
7

2 SCD1U10V2KX-5GP
2 SCD1U10V2KX-5GP

AD12
AC12
AG12
AG13

0111 DB

place near balls

SCD1U16V2KX-3GP

7
7

C163 1
C164 1

PEX_RX0
PEX_RX0#

SC4D7U6D3V3KX-GP

PEG_RXP2
PEG_RXN2

2 SCD1U10V2KX-5GP
2 SCD1U10V2KX-5GP

AE12
AF12

48

SC4D7U6D3V3KX-GP

7
7

C136 1
C137 1

PEX_TX0
PEX_TX0#

SC4D7U6D3V3KX-GP

PEG_TXP1
PEG_TXN1

PEX_REFCLK
PEX_REFCLK#

AD10
AD11

SC1U6D3V2KX-GP

PEG_RXP1
PEG_RXN1

7
7

RXP1
RXN1

AB10
AC10

SC1U6D3V2KX-GP

7
7

RXP0
RXN0

C246

C261

0111 DB

SC4700P25V2KX-LGP

PEG_TXP0
PEG_TXN0

2 SCD1U10V2KX-5GP
2 SCD1U10V2KX-5GP

C196

C238

SC4700P25V2KX-LGP

7
7

C161 1
C162 1

C585

C265

SC4700P25V2KX-LGP

PEG_RXP0
PEG_RXN0

2
200R2F-L-GP

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#

FBAD[16..31]

SC10U6D3V5MX-3GP

7
7

1
R388

PEX_RST#

SC1U6D3V2KX-GP

DREFCLK
DREFCLK#

AD9
AF10
AE10

SC1U6D3V2KX-GP

16
16

PEX_RST#

C193

C155
SC4D7U6D3V3KX-GP

0429 PV

C135

SCD1U10V2KX-5GP

1
2
0R0402-PAD

PLT_RST#

C195

47

place near GPU

SCD1U10V2KX-5GP

7,17,23,26,27,30

C194

SC1U10V2KX-1GP

R391

AB13
AB16
AB17
AB7
AB8
AB9
AC13
AC7
AD6
AE6
AF6
AG6

SC1U10V2KX-1GP

PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ

A13
B13
C13
D13
D14
E13
F13
F14
F15
F16
F17
F19
F22
H23
H26
J15
J16
J18
J19
L19
L23
L26
M19
N22
U22
Y22

C235

SCD022U16V2KX-3GP

NC#AE9
NC#AG9

FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ

SCD022U16V2KX-3GP

place near balls


AE9
AG9

0109 DB

FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63

SC4700P25V2KX-LGP

+1.1VS

D21
C22
B22
A22
C24
B25
A25
A26
D22
E22
E24
D24
D26
D27
C27
B27
D16
E16
D17
F18
D20
F20
E21
F21
C16
B18
C18
D18
C19
C21
B21
A21
P22
P24
R23
R24
T23
U24
V23
V24
N25
N26
R25
R26
T25
V26
V25
V27
V22
W22
W23
W24
AA22
AB23
AB24
AC24
W25
W26
W27
AA25
AB25
AB26
AD26
AD27

SC4700P25V2KX-LGP

FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63

C134
SC10U6D3V5MX-3GP

SC4D7U6D3V3KX-GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C583

C212

C239

SC4D7U6D3V3KX-GP

C154

C249

SC4D7U6D3V3KX-GP

C563

C248

SCD1U10V2KX-5GP

C129

U69B
2/13

FBAD[0..15]

SCD1U10V2KX-5GP

C130

SC1U10V2KX-1GP

AC9
AD7
AD8
AE7
AF7
AG7

SC1U10V2KX-1GP

PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD

47

place near GPU

SCD022U16V2KX-3GP

place near balls

SCD022U16V2KX-3GP

0111 DB

+1.1VS
U69A
1/13

place near BGA

0116 DB

DDR2: 1.0V = 2.0V * 1K/(1K+1K)


NB9M-GE-S-A1-H-GP

0314 SI

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

NB9M-GE (1 of 13)

Size

Document Number

Date:

Monday, May 05, 2008

Rev

VITAS
5

SA
Sheet

44

of

48

150R2J-L1-GP-U

2
150R2J-L1-GP-U

0111 DB

150R2J-L1-GP-U

22R2J-2-GP

IFPAB_RSET

AA4
AA5

TXOUTA_L1- 15
TXOUTA_L1+ 15

IFPAB_PLLVDD
IFPAB_RSET

Y4
W4

IFPA_TXD3#
IFPA_TXD3

AB5
AB4

IFPB_TXD4#
IFPB_TXD4

V1
W1

TXOUTB_L0- 15
TXOUTB_L0+ 15

IFPB_TXD5#
IFPB_TXD5

W2
W3

TXOUTB_L1- 15
TXOUTB_L1+ 15

IFPB_TXD6#
IFPB_TXD6

AA3
AA2

TP85

TPAD30

XTAL-27MHZ-29-GP

DY

DY

C268
SC20P50V2JN-1GP

For NB86

0111 DB

64.25505.6DL

0114 DB

0111 DB

IFPA_TXD2#
IFPA_TXD2

R90

DY27MHZ_XOUT

C264
SC20P50V2JN-1GP

IFPA_TXD1#
IFPA_TXD1
A DATA

R61
1KR2F-3-GP

DY

DY

16 27MHZ_NONSS

XTAL_OUT

X1
27MHZ_XIN

0R2J-2-GP

AD5
AB6

IFPA_TXD0#
IFPA_TXD0

TXOUTA_L0- 15
TXOUTA_L0+ 15

NB9M-GE-S-A1-H-GP

R93

V4
V5

E9
E10

G86 : R324=0ohm , R318=DY

TXOUTA_L2- 15
TXOUTA_L2+ 15

U69E
6/13

C619

C615

SC470P50V2KX-3GP

SC4D7U6D3V3KX-GP

0111 DB

C614

SC4700P50V2KX-1GP

IFPAB_PLLVDD

DY

L22
1
2
BLM18AG221SN1D-GP

XTAL_OUTBUFF

XTAL_IN

R95

27MHZ_SS

XTAL_SSIN

D10

10KR2J-3-GP

16

D11
R94

SP_PLLVDD

0116 DB

+1.8VS

L6

0114 DB

NB9M-GE-S-A1-H-GP

VID_PLLVDD

0111 DB

PLLVDD

K6
C227

10KR2J-3-GP

R57
1
R59
1
R58
1

SC4700P50V2KX-1GP

M_BLUE 14

C241

SCD1U16V2KX-3GP

M_GREEN 14

AD3

C240
SC1U6D3V2KX-GP

AE3

DACA_BLUE

C243
SC1U6D3V2KX-GP

DACA_GREEN

M_RED 14

XTAL_PLL

K5

1
AE2

U69J
12/13
PLL_VDD

C650

M_HSYNC 14
M_VSYNC 14

AD2
AD1

SC1U6D3V2KX-GP

DACA_RED

124R2F-U-GP

DACA_HSYNC
DACA_VSYNC

R392

DACA_RSET

L2
1
2
BLM18AG221SN1D-GP

+1.1VS

DACA_VREF

C621 GDACA_RSET AE1

DACA_VDD

AF1

GDACA_VREF

AG2

1
2

C608

0116 DB

GDACA_VDD

SCD1U10V2KX-5GP

C610

SC470P50V2KX-3GP

C609

SC4700P50V2KX-1GP

SC4D7U6D3V3KX-GP

C605

SCD1U10V2KX-5GP

0116 DB

U69C
3/13

0111 DB

L21
1
2
BLM18AG221SN1D-GP

+3VS

0116 DB
+1.8VS
L23
1
2
BLM18AG221SN1D-GP

U69M
5/13
DACC_VDD

IFPA_IOVDD

V2

IFPB_IOVDD

B DATA

1
2

C629
SC470P50V2KX-3GP

C628
SC470P50V2KX-3GP

C630

C627

SC4700P50V2KX-1GP

SC4D7U6D3V3KX-GP

0111 DB

C622

SC4700P50V2KX-1GP

TXOUTB_L2- 15
TXOUTB_L2+ 15

IFPB_TXD7#
IFPB_TXD7

AA1
AB1

A CLOCK

IFPA_TXC#
IFPA_TXC

AD4
AC4

TXCLKA_L- 15
TXCLKA_L+ 15

B CLOCK

IFPB_TXC#
IFPB_TXC

AB2
AB3

TXCLKB_L- 15
TXCLKB_L+ 15

W5

DACC_VDD

R6

DACC_VREF

V6

DACC_RSET

V3

R398
1KR2J-1-GP

IFPAB_IOVDD

DACC_HSYNC
DACC_VSYNC

U6
U4

DACC_RED

T5

DACC_GREEN

T4

DACC_BLUE

R4

NB9M-GE-S-A1-H-GP
NB9M-GE-S-A1-H-GP

+3VS
RN44

1
2

4
3

DDC2_CLK
DDC2_DATA

SRN2K2J-1-GP
+3VS

NB9M-GE
NB9M-GE
NB9M-GE
0x06E8
0x06E8
0x06E8
256MB
256MB
256MB
32M16 DDR2
32M16 DDR2
32M16 DDR2
K4N51163QG-HC25 HYB18T512161B2F-25 HY5PS121621CFP-25
Samsung
Qimonda
Hynix
ROM_SI

0101

0110

0111

I2CH_SCL
I2CH_SDA

2
40K2R2F-GP
R87

2
40K2R2F-GP
+3VS

F11
F10

28

SPDIF

15
15
30
42

R407
GPU_THRM# 1
2
GPU_ALERT# 10R2J-2-GP 2
R69
0R2J-2-GP

DY2

C651

36KR2J-GP

SUB_VENDOR
0
No VBIOS ROM
1
BIOS ROM present

XCLK_277
0
Reserved
1
27MHz(POR)

0311 SI

1
2
3
4

0430 PV

HDCP_SCL

72.88088.E01

J5

NC#F6

F6

R401
10KR2J-3-GP

DY

NC#C15
NC#D15

TESTMODE

AD25

0205 DB

AC6
R60
10KR2J-3-GP

NB9M-GE-S-A1-H-GP

ROM_SI
ROM_SO
ROM_SCLK
STPAP0
STPAP1
STPAP2

VR-Q

1
R416
1
R417
1
R422
1
R424

1
R418

2
34K8R2F-1-GP

2
DY 5K62R2F-GP
2
15KR2F-GP

U69L
10/13
+3VS

1
R415

2
5K1R3F-L-GP
1

2
DY 5K62R2F-GP
2
10KR2F-2-GP
2
DY 5K62R2F-GP

2
DY 15KR2F-GP

R4321

R421

HDAUDIO

DY

2
1K2R2J-1-GP

1
R423

HDA_BCLK

A7

HDA_SYNC

B7

HDA_SDI

A6

HDA_SDO

B6

HDA_RST

C6

HDA_BITCLK_VGA 18
HDA_SYNC_VGA
HDA_SDIN1_R
1
2
R430 33R2J-2-GP

18
HDA_SDIN1

18

HDA_SDOUT_VGA 18
A

HDA_RST#_VGA 18

2
45K3R2F-L-GP

1
R420

2
DY 1K2R2J-1-GP

R4311

2
5K1R3F-L-GP

DY
NB9M-GE-S-A1-H-GP

R98
10KR2J-3-GP

Wistron Corporation

3GIO_PADCFG
0000
Desktop
0001
Notebook (POR)

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

SLOT_CLOCK_CFG
0
GPU and MCH do not share a common reference clock
1
GPU and MCH share a common reference clock (POR)

NC#1
NC#2
NC#3
GND

DY

1
R419
USER[3:0]
1111 Use EDID to detect panel settings

0311 SI

VCC
NC#7
SCL
SDA

2
C15
D15

0121 DB

PLL Termination Settings


PEX_PLL_EN_TERM
0 Disable (POR)
1 Enable

N5

NC#J5

GND
R435

0317 SI
G792_ALERT# 24
THERM_SCI# 19,24

8
7
6
5

AT88SC0808C-SU-1-GP

BUFRST#

SCD01U16V2KX-3GP

Power Rail
Bit3
Bit2
Bit1
Bit0
ROM_S0
VDD33 XCLK_277 TVMODE[2] TVMODE[1] TVMODE[0]
ROM_SCLK VDD33 PCI_DEVID[4] SUB_VENDOR SLOT_CLK_CFG PEX_PLL_EN_TERM100
ROM_SI
VDD33 RAMCFG[3] RAMCFG[2] RAMCCFG[1] RAMCFG[0]
STRAP2 MIOB_VDDQ PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0]
STRAP1 MIOB_VDDQ 3GIO_PADCFG[3] 3GIO_PADCFG[2] 3GIO_PADCFG[1] 3GIO_PADCFG[0]
STRAP0 MIOB_VDDQ USER[3] USER[2] USER[1] USER[0]

Logical Strap Bit Mapping


Resistor Pull-up Pull-down
5Kohms
1000
0000
10Kohms
1001
0001
15Kohms
1010
0010
20Kohms
1011
0011
25Kohms
1100
0100
30Kohms
1101
0101
35Kohms
1110
0110
45Kohms
1111
0111

SPDIF

R331
10KR2J-3-GP
DY

0111 DB
HDMI_HPD 26
L_BKLTCTL
L_VDD_EN
L_BKLT_EN
GPU_VCTL

F9

C625
SCD01U16V2KX-3GP
U70

HDCP_SDA

NC#F11
NC#F10

RN41

4
3

HDCP_SCL
HDCP_SDA

A3
A4

R394
2K2R2J-2-GP
R393
2K2R2J-2-GP

1
1

1
2

ROM_SI
ROM_SO
ROM_SCLK

A10
C10
C9

+3VS

SRN2K2J-1-GP

B10

ROM_SI
ROM_SO
ROM_SCLK

0114 DB

R88

3
4

I2CE_SCL
I2CE_SDA

+3VS

ROM_CS#

SC12P50V2JN-3GP

+3VS

NB9M-GE-S-A1-H-GP

MISC

STRAP0
STRAP1
STRAP2

I2CS_SCL
I2CS_SDA

SRN2K2J-1-GP

C7
B9
A9

2
I2CS_SCL T1
I2CS_SDA T2

HDMI_SDA 26

SRN2K2J-1-GP

RN42

2
1

C632

STPAP0
STPAP1
STPAP2

N1
G1
C1
M2
M3
K3
K2
J2
C2
M1
D2
D1
J3
J1
K1
F3
G3
G2
F1
F2

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19

Y6
W6

I2CD_SCL 2
I2CD_SDA 1

R389

+3VS

3
4

I2CE_SCL
I2CE_SDA

HDMI_SCL 26

RN26

DY 10KR2J-3-GP

0429 PV

N2
N3

C636
SC12P50V2JN-3GP

DDC2_CLK 15
DDC2_DATA 15

1
R390
10KR2J-3-GP
DY

0111 DB

I2CD_SCL
I2CD_SDA

0116 DB

THERMDP
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST#

BLM18AG221SN1D-GP L25
HDMI_SCL
1
2
BLM18AG221SN1D-GP L26
HDMI_SDA
1
2

D9
AF3
AF4
AG4
AE4
AG3

1
1
1

A2
B1

HDMI_SDA_1

TP173
TP171
TP172

I2CC_SCL
I2CC_SDA

THERMDN

HDMI_SCL_1

24

D8

I2CB_SCL
I2CB_SDA

R2
R3

C257
SC2200P50V2KX-2GP
DY
GTHERMDA

GTHERMDC

24

R1
T3

I2CA_SCL
I2CA_SDA

9/13

U69G
11/13

+3VS
DDC1_CLK 14
DDC1_DATA 14

U69F

NB9M-GE (2 of 3)

Size

Document Number

Date:

Monday, May 05, 2008

Rev

VITAS
3

SA
Sheet

45

of

48

0116 DB
+1.8VS
L27

0111 DB

P6
R5

IFPC_PLLVDD
IFPC_RSET

DP

IFPC_AUX#
IFPC_AUX

R62
1KR2F-3-GP

L29
3D3V_HDMI_S0_1
1
2
BLM18AG221SN1D-GP

J6

IFPC_IOVDD

0116 DB

N6
M6

IFPE_PLLVDD
IFPE_RSET

DP

IFPE_AUX#
IFPE_AUX

D4
D3

U69K
13/13

IFPE_L3#
IFPE_L3

1
C3151
C314

2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP

HDMI_TXC# 26
HDMI_TXC 26

TXC
TXC

IFPC_L3#
IFPC_L3

TXD0
TXD0

IFPC_L2#
IFPC_L2

K4
L4

IFPE_L2#
IFPE_L2

1
C3081
C309

2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP

HDMI_TXD0# 26
HDMI_TXD0 26

TXD1
TXD1

IFPC_L1#
IFPC_L1

M4
M5

IFPE_L1#
IFPE_L1

1
C3131
C312

2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP

HDMI_TXD1# 26
HDMI_TXD1 26

TXD2
TXD2

IFPC_L0#
IFPC_L0

N4
P4

IFPE_L0#
IFPE_L0

1
C3101
C311

2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP

HDMI_TXD2# 26
HDMI_TXD2 26

NB9M-GE-S-A1-H-GP

R89

H6

IFPE_IOVDD

1KR2J-1-GP

TXC
TXC

IFPE_L3#
IFPE_L3

B4
B3

TXD0
TXD0

IFPE_L2#
IFPE_L2

C4
C3

TXD1
TXD1

IFPE_L1#
IFPE_L1

D5
E4

TXD2
TXD2

IFPE_L0#
IFPE_L0

F4
F5

0108 DB
NB9M-GE-S-A1-H-GP

Q3

R479
R480
R486
R485
R481
R482
R484
R483

2
2
2
2
2
2
2
2

1
2

C250
SC470P50V2KX-3GP

SC4D7U6D3V3KX-GP

SC4700P50V2KX-1GP

2
1KR2J-1-GP

J4
H4

0111 DB
C646

G5
G4

1 499R2F-2-GP
1 499R2F-2-GP
1 499R2F-2-GP
1 499R2F-2-GP
1 499R2F-2-GP
1 499R2F-2-GP
1 499R2F-2-GP
1 499R2F-2-GP

+1.1VS

C647

DVI

IFPE_RSET

U69H
8/13

R402
DVI

1
2

1
2

U69I
7/13
C218
SC470P50V2KX-3GP

SC4D7U6D3V3KX-GP

C638
SC4700P50V2KX-1GP

IFPE_PLLVDD
1
2
BLM18AG221SN1D-GP
C641

.
+3VS

.
.
. .
G

2N7002E-1-GP

U69D
4/13

D7

DACB_VDD

G6

DACB_VREF

F8

DACB_RSET

DACB_VDD

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

B17
B2
B20
B23
B26
B5
B8
E11
E14
E17
E2
E20
E23
E26
E5
E8
H2
H5
J11
J14

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

J17
K19
K9
L11
L12
L13
L14
L15
L16
L17
L2
L5
M12
M13
M14
M15
M16

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

P19
P2
P23
P26
P5
P9
T12
T13
T14
T15
T16
U11
U12
U13
U14
U15
U16
U17
U2
U23
U26
U5
V19

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

V9
W11
W14
W17
Y2
Y23
Y26
Y5

GND
GND
GND
GND
GND
GND
GND
GND

NC#AA6
NC#AC19
NC#E15
NC#T6
NC#J22
NC#L22

AA6
AC19
E15
T6
J22
L22

NB9M-GE-S-A1-H-GP

DACB_CSYNC

D6

DACB_RED

F7

R92
1KR2J-1-GP

AC11
AC14
AC17
AC2
AC20
AC23
AC26
AC5
AC8
AF11
AF14
AF17
AF2
AF20
AF23
AF26
AF5
AF8
B11
B14

DACB_GREEN

E7

DACB_BLUE

E6

NB9M-GE-S-A1-H-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

NB9M-GE (3 of 3)

Size

Document Number

Date:

Monday, May 05, 2008

Rev

VITAS
5

SA
Sheet

46

of

48

FBAD[0..15]

U14
44,48 FBA_CMD_10
44,48 FBA_CMD_18

L2
L3

BA0
BA1

44,48
44,48
44,48
44,48
44,48
44,48
44,48
44
44
44
44
44,48
44,48

R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8

A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

K8
J8

CK
CK

K2

CKE

44,48 FBA_CMD_8

L8

CS

44,48 FBA_CMD_9

K3

WE

44,48 FBA_CMD_15

K7

RAS

44,48 FBA_CMD_25

L7

CAS

F3
B3

LDM
UDM

FBA_CMD_14
FBA_CMD_16
FBA_CMD_17
FBA_CMD_20
FBA_CMD_19
FBA_CMD_23
FBA_CMD_21
FBA_CMD_22
FBA_CMD_24
FBA_CMD_0
FBA_CMD_2
FBA_CMD_3
FBA_CMD_1

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

VDD1
VDD2
VDD3
VDD4
VDD5

A1
E1
J9
M9
R1

44

FBAD[16..31]

U13

FBAD10
FBAD11
FBAD13
FBAD8
FBAD15
FBAD14
FBAD9
FBAD12
FBAD5
FBAD1
FBAD6
FBAD2
FBAD3
FBAD4
FBAD0
FBAD7

44,48 FBA_CMD_10
44,48 FBA_CMD_18

L2
L3

BA0
BA1

44,48
44,48
44,48
44,48
44,48
44,48
44,48
44
44
44
44
44,48
44,48

R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8

A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

K8
J8

CK
CK

K2

CKE

44,48 FBA_CMD_8

L8

CS

44,48 FBA_CMD_9

K3

WE

44,48 FBA_CMD_15

K7

RAS

44,48 FBA_CMD_25

L7

CAS

F3
B3

LDM
UDM

K9

ODT

FBA_CMD_14
FBA_CMD_16
FBA_CMD_17
FBA_CMD_20
FBA_CMD_19
FBA_CMD_23
FBA_CMD_21
FBA_CMD_22
FBA_CMD_24
FBA_CMD_0
FBA_CMD_2
FBA_CMD_3
FBA_CMD_1

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

VDD1
VDD2
VDD3
VDD4
VDD5

A1
E1
J9
M9
R1

+1.8VS
FBA_CLK0#
FBA_CLK0

44,48 FBA_CMD_11

44
44

FBADQM0
FBADQM1

44,48 FBA_CMD_12

ODT

FBADQSP0
FBADQSN0

F7
E8

LDQS
LDQS

44
44

FBADQSP1
FBADQSN1

B7
A8

UDQS
UDQS

J2

VREF

A2
E2
L1
R3
R7
R8

NC#A2
NC#E2
NC#L1
NC#R3
NC#R7
NC#R8

C286

44,48 FBA_CMD_27

SCD1U10V2KX-5GP

R106
1KR2F-3-GP

0303 SI

44
44

J1
J7

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

FBADQM2
FBADQM3

VSS1
VSS2
VSS3
VSS4
VSS5

A3
E3
J3
N1
P9

FBADQSP2
FBADQSN2

F7
E8

LDQS
LDQS

44
44

FBADQSP3
FBADQSN3

B7
A8

UDQS
UDQS

J2

VREF

A2
E2
L1
R3
R7
R8

NC#A2
NC#E2
NC#L1
NC#R3
NC#R7
NC#R8

C281
44,48 FBA_CMD_27

HYB18T512161B2F-25-GP

VDDL
VSSDL

J1
J7

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

VSS1
VSS2
VSS3
VSS4
VSS5

A3
E3
J3
N1
P9

44
44

FBA_VREF_B

FBA_VREF_B

44,48 FBA_CMD_11

SCD047U10V2KX-2GP

44
44

R103
1KR2F-3-GP

FBA_CLK0#
FBA_CLK0

44,48 FBA_CMD_12

+1.8VS

VDDL
VSSDL

K9

+1.8VS
44
44

44
44

44

FBAD29
FBAD25
FBAD31
FBAD24
FBAD27
FBAD30
FBAD26
FBAD28
FBAD23
FBAD16
FBAD22
FBAD17
FBAD19
FBAD20
FBAD18
FBAD21

HYB18T512161B2F-25-GP

X - cap for CMD


X - cap for CMD
+1.8VS

C290

C302

C273

C659

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

+1.8VS

SC1U10V2KX-1GP

C269

C704
SC1U10V2KX-1GP

C652
SC1U10V2KX-1GP

C156
SC1U10V2KX-1GP

C270
SC1U10V2KX-1GP

+1.8VS

FBA_CLK0#

FBA_CLK0#

2
1

1
2

1
2

C657

SCD1U10V2KX-5GP

1
2

C661

SC1U10V2KX-1GP

C263

C703
SCD1U10V2KX-5GP

C185
SC1U10V2KX-1GP

C199
SC1U10V2KX-1GP

+1.8VS

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C213
SC1U10V2KX-1GP

C219

C285

C274
SC1U10V2KX-1GP

C655

SC1U10V2KX-1GP

C656

SC1U10V2KX-1GP

+1.8VS

C653

SC1U10V2KX-1GP

FBA_CLK0

C280

SC1U10V2KX-1GP

44

FBA_CLK0

SC1U10V2KX-1GP

R467
475R2F-L1-GP

44

SC1U10V2KX-1GP

C275

+1.8VS

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

VRAM1
Document Number

Rev

VITAS
Date:
5

SA
Sheet

Monday, May 05, 2008


1

47

of

48

FBAD[32..47]

U72
44,47 FBA_CMD_10
44,47 FBA_CMD_18

L2
L3

BA0
BA1

44,47
44,47
44,47
44,47
44,47
44,47
44,47
44
44
44
44
44,47
44,47

R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8

A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

K8
J8

CK
CK

FBA_CMD_14
FBA_CMD_16
FBA_CMD_17
FBA_CMD_20
FBA_CMD_19
FBA_CMD_23
FBA_CMD_21
FBA_CMD_6
FBA_CMD_5
FBA_CMD_4
FBA_CMD_13
FBA_CMD_3
FBA_CMD_1

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

44,47 FBA_CMD_8

L8

CS

44,47 FBA_CMD_9

K3

WE

44,47 FBA_CMD_15

K7

44,47 FBA_CMD_25
44
44

FBADQM4
FBADQM5

44,47 FBA_CMD_12

VDD1
VDD2
VDD3
VDD4
VDD5

A1
E1
J9
M9
R1

RAS

L7

CAS

F3
B3

LDM
UDM

K9

ODT

44
44

FBADQSP4
FBADQSN4

F7
E8

LDQS
LDQS

44
44

FBADQSP5
FBADQSN5

B7
A8

UDQS
UDQS

R68
1KR2F-3-GP

44,47 FBA_CMD_27

SCD1U10V2KX-5GP

C242

44,47
44,47
44,47
44,47
44,47
44,47
44,47
44
44
44
44
44,47
44,47

R2
P7
M2
P3
P8
P2
N7
N3
N8
N2
M7
M3
M8

A12
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

K8
J8

CK
CK

44,47 FBA_CMD_11

K2

CKE

44,47 FBA_CMD_8

L8

CS

44,47 FBA_CMD_9

K3

WE

44,47 FBA_CMD_15

K7

RAS

44,47 FBA_CMD_25

L7

CAS

F3
B3

LDM
UDM

K9

ODT

FBA_CMD_14
FBA_CMD_16
FBA_CMD_17
FBA_CMD_20
FBA_CMD_19
FBA_CMD_23
FBA_CMD_21
FBA_CMD_6
FBA_CMD_5
FBA_CMD_4
FBA_CMD_13
FBA_CMD_3
FBA_CMD_1

VDDL
VSSDL

J1
J7

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

VSS1
VSS2
VSS3
VSS4
VSS5

A3
E3
J3
N1
P9

44
44

FBA_CLK1#
FBA_CLK1

FBADQM6
FBADQM7

44,47 FBA_CMD_12

J2

VREF

A2
E2
L1
R3
R7
R8

NC#A2
NC#E2
NC#L1
NC#R3
NC#R7
NC#R8

44
44

FBADQSP6
FBADQSN6

F7
E8

LDQS
LDQS

44
44

FBADQSP7
FBADQSN7

B7
A8

UDQS
UDQS

J2

VREF

A2
E2
L1
R3
R7
R8

NC#A2
NC#E2
NC#L1
NC#R3
NC#R7
NC#R8

FBA_VREF_A
C180
44,47 FBA_CMD_27

HYB18T512161B2F-25-GP

SCD047U10V2KX-2GP

R64
1KR2F-3-GP

FBA_VREF_A

BA0
BA1

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

VDD1
VDD2
VDD3
VDD4
VDD5

A1
E1
J9
M9
R1

44

FBAD56
FBAD63
FBAD58
FBAD62
FBAD61
FBAD59
FBAD60
FBAD57
FBAD52
FBAD53
FBAD48
FBAD55
FBAD51
FBAD50
FBAD54
FBAD49

VDDL
VSSDL

J1
J7

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

VSS1
VSS2
VSS3
VSS4
VSS5

A3
E3
J3
N1
P9

+1.8VS

CKE

K2

44,47 FBA_CMD_11

L2
L3

44
44

FBA_CLK1#
FBA_CLK1

44,47 FBA_CMD_10
44,47 FBA_CMD_18

+1.8VS
+1.8VS

44
44

FBAD[48..63]

U67

44

FBAD42
FBAD45
FBAD40
FBAD46
FBAD44
FBAD41
FBAD47
FBAD43
FBAD38
FBAD35
FBAD32
FBAD37
FBAD36
FBAD33
FBAD39
FBAD34

HYB18T512161B2F-25-GP

0303 SI
X - cap for CMD
X - cap for CMD
+1.8VS
+1.8VS

2
1

2
1

2
1

1
2

1
2

1
2

1
2

1
2

1
2

C643
SC1U10V2KX-1GP

C266
SCD1U10V2KX-5GP

C673
SC1U10V2KX-1GP

C666

SC1U10V2KX-1GP

C663

C658
SCD1U10V2KX-5GP

C633
SC1U10V2KX-1GP

SC1U10V2KX-1GP

+1.8VS

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C701

SC1U10V2KX-1GP

C234

C588
SC1U10V2KX-1GP

SC1U10V2KX-1GP

C267

C665
SC1U10V2KX-1GP

C187

C664
SC1U10V2KX-1GP

C236
SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

+1.8VS

C303

C624
SC1U10V2KX-1GP

+1.8VS

SC1U10V2KX-1GP

C654

C702

C631
SC1U10V2KX-1GP

+1.8VS

C202
SC1U10V2KX-1GP

FBA_CLK1

C620
SC1U10V2KX-1GP

FBA_CLK1

C191
SC1U10V2KX-1GP

44

C182
SC1U10V2KX-1GP

R63
475R2F-L1-GP

FBA_CLK1#

FBA_CLK1#

44

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

VRAM2
Document Number

Rev

VITAS
Date:
5

SA
Sheet

Monday, May 05, 2008


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