# Operational Amplifier

Chapter No. 3 Differential Amplifiers
Operational Amplifiers: The operational amplifier is a direct-coupled high gain amplifier usable from 0 to over 1MH Z to which feedback is added to control its overall response characteristic i.e. gain and bandwidth. The op-amp exhibits the gain down to zero frequency. Such direct coupled (dc) amplifiers do not use blocking (coupling and by pass) capacitors since these would reduce the amplification to zero at zero frequency. Large by pass capacitors may be used but it is not possible to fabricate large capacitors on a IC chip. The capacitors fabricated are usually less than 20 pf. Transistor, diodes and resistors are also fabricated on the same chip. Differential Amplifiers: Differential amplifier is a basic building block of an op-amp. The function of a differential amplifier is to amplify the difference between two input signals. How the differential amplifier is developed? Let us consider two emitter-biased circuits as shown in fig. 1.

Fig. 1 The two transistors Q1 and Q2 have identical characteristics. The resistances of the circuits are equal, i.e. RE1 = R E2, RC1 = R C2 and the magnitude of +VCC is equal to the magnitude of ?VEE. These voltages are measured with respect to ground. To make a differential amplifier, the two circuits are connected as shown in fig. 1. The two +VCC and ?VEE supply terminals are made common because they are same. The two emitters are also connected and the parallel combination of RE1 and RE2 is replaced by a resistance RE. The two input signals v1 & v2 are applied at the base of Q1 and at the base of Q2. The output voltage is taken between two collectors. The collector Notes prepared by Mrs. Sejal Shah 1

Operational Amplifier resistances are equal and therefore denoted by RC = RC1 = RC2. Ideally, the output voltage is zero when the two inputs are equal. When v1 is greater then v2 the output voltage with the polarity shown appears. When v1 is less than v2, the output voltage has the opposite polarity. The differential amplifiers are of different configurations. The four differential amplifier configurations are following: 1. 2. 3. 4. Dual input, balanced output differential amplifier. Dual input, unbalanced output differential amplifier. Single input balanced output differential amplifier. Single input unbalanced output differential amplifier.

Notes prepared by Mrs. Sejal Shah

2

Operational Amplifier Fig. 2 These configurations are shown in fig. 2, and are defined by number of input signals used and the way an output voltage is measured. If use two input signals, the configuration is said to be dual input, otherwise it is a single input configuration. On the other hand, if the output voltage is measured between two collectors, it is referred to as a balanced output because both the collectors are at the same dc potential w.r.t. ground. If the output is measured at one of the collectors w.r.t. ground, the configuration is called an unbalanced output. A multistage amplifier with a desired gain can be obtained using direct connection between successive stages of differential amplifiers. The advantage of direct coupling is that it removes the lower cut off frequency imposed by the coupling capacitors, and they are therefore, capable of amplifying dc as well as ac input signals.

Dual Input, Balanced Output Differential Amplifier: The circuit is shown in fig. 1, v1 and v2 are the two inputs, applied to the bases of Q1 and Q2 transistors. The output voltage is measured between the two collectors C1 and C2 , which are at same dc potentials. D.C. Analysis: To obtain the operating point (ICC and VCEQ) for differential amplifier dc equivalent circuit is drawn by reducing the input voltages v1 and v2 to zero as shown in fig. 3.

Fig. 3 The internal resistances of the input signals are denoted by RS because RS1= RS2. Since both emitter biased sections of the different amplifier are symmetrical in all respects, therefore, the operating point for only one section need to be determined. The same values of ICQ and VCEQ can be used for second transistor Q2. Applying KVL to the base emitter loop of the transistor Q1. Notes prepared by Mrs. Sejal Shah 3

Operational Amplifier

The value of RE sets up the emitter current in transistors Q1 and Q2 for a given value of VEE. The emitter current in Q1 and Q2 are independent of collector resistance RC. The voltage at the emitter of Q1 is approximately equal to -VBE if the voltage drop across R is negligible. Knowing the value of IC the voltage at the collector VCis given by VC =VCC ? IC RC and VCE = VC ? VE = VCC ? IC RC + VBE VCE = VCC + VBE ? ICRC (E-2)

From the two equations VCEQ and ICQ can be determined. This dc analysis applicable for all types of differential amplifier. Example - 1 The following specifications are given for the dual input, balanced-output differential amplifier of fig.1: RC = 2.2 k , RB = 4.7 k , Rin 1 = Rin 2 = 50 , +VCC = 10V, -VEE = -10 V, βdc =100 and VBE = 0.715V. Determine the operating points (ICQ and VCEQ) of the two transistors. Solution: The value of ICQ can be obtained from equation (E-1).

Notes prepared by Mrs. Sejal Shah

4

Balanced Output Difference Amplifier: The circuit is shown in fig. 2. Analysis : In previous lecture dc analysis has been done to obtain the operatiing point of the two transistors. 1 v1 and v2 are the two inputs. Notes prepared by Mrs. The dc voltages are reduced to zero and the ac equivalent of CE configuration is used. which are at same dc potentials. The values of ICQ and VCEQ are same for both the transistors. To find the voltage gain Ad and the input resistance Ri of the differential amplifier.C. Dual Input. Sejal Shah 5 . 1 A.Operational Amplifier The voltage VCEQ can be obtained from equation (E-2). Fig. The output voltage is measured between the two collectors C1 and C2. applied to the bases of Q1 and Q2 transistors. the ac equivalent circuit is drawn using r-parameters as shown in fig.

This voltage across each collector resistance is shown 180° out of phase with respect to the input voltages v1 and v2. This is same as in CE configuration. assuming RS1 / and RS2 / are very small in comparison with RE and re' and therefore neglecting these terms. The collector C2 is assumed to be more positive with respect to collector C1 even though both are negative with respect to to ground. Sejal Shah 6 . Again. Substituting current relations. The polarity of the output voltage is shown in Figure. resistance r'e1 and r'e2 are also equal and designated by r'e . Applying KVL in two loops 1 & 2. Notes prepared by Mrs. 2 Since the two dc emitter currents are equal. Therefore.Operational Amplifier Fig.

Notes prepared by Mrs. & ie2 in the above expression Thus a differential amplifier amplifies the difference between two input signals.(-RC iC1) = RC (iC1 . ie1 and ie2 can be calculated. Defining the difference of input signals as vd = v1 ? v2 the voltage gain of the dual input balanced output differential amplifier can be given by (E-2) Differential Input Resistance: Differential input resistance is defined as the equivalent resistance that would be measured at either input terminal with the other terminal grounded. Similarly. Resistance RS1 and RS2 are ignored because they are very small.Operational Amplifier Solving these two equations.ie2) Substituting ie1.VC1 = -RC iC2 . This means that the input resistance Ri1 seen from the input signal source v1 is determined with the signal source v2 set at zero. The output voltage VO is given by VO = VC2 . Sejal Shah 7 . the input signal v1 is set at zero to determine the input resistance Ri2 seen from the input signal source v2.iC2) = RC (ie1 .

Sejal Shah 8 .Operational Amplifier Substituting ie1. Example . Therefore. βdc =100 and VBE = 0. Like CE amplifier the differential amplifier is a small signal amplifier. -VEE = -10 V. Another ways is to use FET. Output Resistance: Output resistance is defined as the equivalent resistance that would be measured at output terminal with respect to ground. Similarly the output resistance RO2 measured at C2 with respect to ground is equal to that of the collector resistor RC.2 k . balanced-output differential amplifier: RC = 2. Similarly.1 The following specifications are given for the dual input. Notes prepared by Mrs. The factor of 2 arises because the re' of each transistor is in series.7 k . +VCC= 10V. To get very high input impedance with differential amplifier is to use Darlington transistors. RB = 4.715V. Rin 1 = Rin 2 = 50 . the output resistance RO1 measured between collector C1 and ground is equal to that of the collector resistance RC. It is generally used as a voltage amplifier and not as current or power amplifier. RO1 = RO2 = RC (E-5) The current gain of the differential amplifier is undefined.

The input resistance seen from each input source is given by (E-3) and (E-4): (c) The output resistance seen looking back into the circuit from each of the two output terminals is given by (E-5) Ro1 = Ro2 = 2. The parameters of the amplifiers are same as discussed in example-1 of lecture-1.988 mA VCEQ=8. 1. Determine the input resistance c. we obtain b).54V The ac emitter resistance Therefore. Notes prepared by Mrs.Operational Amplifier a. Sejal Shah 9 . substituting the known values in voltage gain equation (E-2).2 k A dual input. Determine the voltage gain. balanced output difference amplifier circuit is shown in fig. The operating point of the two transistors obtained in lecture-1 are given below ICQ = 0. Solution: (a). Determine the output resistance. b.

the better is the common mode signal rejection e. The practical effectiveness of rejecting the common signal depends on the degree of matching between the two CE stages forming the differential amplifier. then the output of a practical op-amp cannot be described by simply Notes prepared by Mrs. Consequently B1 is called noninverting input terminal and B2 is called inverting input terminal. The connecting wires on the input bases act like small antennas. static and other kinds of undesirable pickup etc. Similarly.g.Operational Amplifier Fig. vO = Ad v1 & when v1 = 0. The common mode signal is interference. more closely are the currents in the input transistors. 1 Inverting & Non ? inverting Inputs: In differential amplifier the output voltage vO is given by VO = Ad (v1 ? v2) When v2 = 0. This is the important characteristic of a differential amplifier. In other words. If v1 and v2 are the two input signals. it refuses to amplify the common mode signals. If a differential amplifier is operating in an environment with lot of electromagnetic interference. Common mode Gain: A common mode signal is one that drives both inputs of a differential amplifier equally. If both the transistors were matched in all respects then the balanced output would be theoretically zero. Sejal Shah 10 . It discriminates against common mode input signals.Ad v2 Therefore the input voltage v1 is called the non inventing input because a positive voltage v1 acting alone produces a positive output voltage vO. In other words. the positive voltage v2 acting alone produces a negative output voltage hence v2 is called inverting input. each base picks up an unwanted interference voltage. vO = .

Date sheet always specify CMRR in decibels CMRR = 20 log CMRR. the differential amplifier should be designed so that  is large compared with the ratio of the common mode signal to the difference signal. If = 1000. Hence for an amplifier with = 1000. then It is equal to first term. vd = (v1 ? vd ) and vC = ½ (v1 + v2 ) The output voltage. a 1 V difference of potential between two inputs gives the same output as 1mV signal applied with the same polarity to both inputs. vd = 1  V. It is the ratio of differential gain Ad to the common mode gain AC. therefore can be expressed as vO = A1 v1 + A2 v2 Where A1 & A2 are the voltage amplification from input 1(2) to output under the condition that input 2 (1) is grounded. The voltage gain for the difference signal is Ad and for the common mode signal is AC. vC = 1mV. Therefore. Notes prepared by Mrs.Operational Amplifier v0 = Ad (v1 ? v2 ) In practical differential amplifier. The ability of a differential amplifier to reject a common mode signal is expressed by its common mode rejection ratio (CMRR). the output depends not only on difference signal but also upon the common mode signal (average). Sejal Shah 11 .

Sejal Shah 12 . balanced output differential amplifier.Operational Amplifier Dual Input. Notes prepared by Mrs. Differential amplifier with swamping resistors: By using external resistors R'E in series with each emitter. ground as shown in fig.r.t.. Since at the output there is a dc error voltage. to reduce the voltage to zero. It also increases the linearity range of the differential amplifier. two input signals are given however the output is measured at only one of the two-collector w. 2. DC analysis is exactly same as that of first case. therefore. this configuration is normally followed by a level translator circuit. 2 In other words. Fig. The output is referred to as an unbalanced output because the collector at which the output voltage is measured is at some finite dc potential with respect to ground. the dependence of voltage gain on variations of r'e can be reduced. there is some dc voltage at the output terminal without any input signal applied. Unbalanced Output Differential Amplifier: In this case. AC Analysis: The output voltage gain in this case is given by The voltage gain is half the gain of the dual input.

The specifications are given again for the dual input. Notes prepared by Mrs. Sejal Shah 13 .Operational Amplifier Fig. βdc =100 and VBE= 0. -VEE= -10 V. Fig. Determine the voltage gain. unbalanced-output differential amplifier: RC = 2. input resistance and the output resistance. Rin1 = Rin2= 50 . RB= 4.7 k . +VCC = 10V.2 k . 3 Example-1 Consider example-1 of lecture-2. shows the differential amplifier with swamping resistor R'E.715V. The value of R'E is usually large enough to swamp the effect of r'e. 3.

Sejal Shah 14 . the emitter supply VEE must be increased. RE should be very large. ICQ = 0. IE (quiescent operating current) decreases. Figure 5. Thus. unbalanced output configuration must be the same as those for the dual input. To get very high value of resistance RE and constant IE. For constant IE. To make operating point stable IE current should be constant irrespective value of dc. balanced output configuration. To maintain same value of IE. we have seen that the emitter current IE depends upon the value of dc. the ICQ and VCEQ values as well as input and output resistance values for the dual input.54 V Ri1 = Ri2 = 5.Operational Amplifier Solution: Since the component values remain unchanged and the biasing arrangement is same.1 Notes prepared by Mrs. current bias is used. current.2 k The voltage gain of the dual input. This also increases the value of CMRR but if RE value is increased to very large value.06 k Ro = 2.988 mA VCEQ = 8. unbalanced output differential amplifier is given by Constant Current Bias: In the dc analysis of differential amplifier.

shows the dual input balanced output differential amplifier using a constant current bias. Notes prepared by Mrs. If temperature changes. R2. the current depends upon VBE3. The resistance RE is replace by constant current transistor Q3. 2. To improve thermal stability. Sejal Shah 15 . the constant current bias also provides a very high source resistance since the ac equivalent or the dc source is ideally an open circuit. the voltage at the base of Q3 is Because the two halves of the differential amplifiers are symmetrical. all the performance equations obtained for differential amplifier using emitter bias are also valid. & RE. 1. Therefore. The dc collector current in Q3 is established by R1. As seen in IE expressions. each has half of the current IC3.Operational Amplifier Fig. a diode is placed in series with resistance R1as shown in fig. VBE changes and current IE also changes. Applying the voltage divider rule. IC3 in transistor Q3 is fixed because no signal is injected into either the emitter or the base of Q3. The collector current. Besides supplying constant emitter current.

Notes prepared by Mrs. In this case the common mode gain reduces to zero. Applying KVL to the base circuit of Q3. Since the cut ? in voltage VD of diode approximately the same value as the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied with one diode.Operational Amplifier Fig. Without D the current would vary with temperature because VBE3 decreases approximately by 2mV/° C. the current IE3 is constant and independent of temperature because of the added diode D. 2 This helps to hold the current IE3 constant even though the temperature changes. Therefore. Hence two diodes are used in series for VD. The diode has same temperature dependence and hence the two variations cancel each other and IE3 does not vary appreciably with temperature. Sejal Shah 16 .

Thus in a current mirror circuit.2 IZ(min) where IZ is the minimum current required to cause the zener diode to conduct in the reverse region. Current Mirror: The circuit in which the output current is forced to equal the input current is said to be a current mirror circuit. The current mirror is a special case of constant current bias and the current mirror bias requires of constant current bias Notes prepared by Mrs. 3. the current IC3 is automatically established to be nearly equal to I2. 4 Once the current I2 is set up. Fig. 4. The current mirror circuit is shown in fig. Zeners are available over a wide range of voltages and can have matching temperature coefficient The voltage at the base of transistor QB is Fig. Sejal Shah 17 .Operational Amplifier Some times zener diode may be used in place of diodes and resistance as shown in fig. that is to block the rated voltage VZ. the output current is a mirror image of the input current. 3 The value of R2 is selected so that I2  1.

Since Q3 and Q4 are identical transistors the current and voltage are approximately same For satisfactory operation two identical transistors are necessary. Sejal Shah 18 . The current mirror bias requires fewer components than constant current bias circuits. 1 The input stage is a dual input balanced output differential amplifier. The operation amplifier: An operational amplifier is a direct coupled high gain amplifier consisting of one or more differential (OPAMP) amplifiers and followed by a level translator and an output stage. An operational amplifier is available as a single integrated circuit package. 1. This stage provides most of the voltage Notes prepared by Mrs. Fig.Operational Amplifier and therefore can be used to set up currents in differential amplifier stages. The block diagram of OPAMP is shown in fig.

level translator circuits are used. This is usually dual input unbalanced output. 3 may be used to get better results. the output may be taken at the junction of two resistors in the emitter leg. If this shift is not sufficient. The output stage increases the output voltage swing and raises the current supplying capability of the OPAMP. the dc voltage level at the output of intermediate stage is well above ground potential.The intermediate stage of OPAMP is another differential amplifier which is driven by the output of the first stage. level shifter. The output stage is generally a push pull complementary amplifier. shifts the level by 0. Thus a dc voltage at the base of Q produces 0V dc at the output. Therefore level shifting circuit is used to shift the dc level at the output downward to zero with respect to ground. This increase in dc level tends to shift the operating point of the succeeding stages and therefore limits the output voltage swing and may even distort the output signal. Because direct coupling is used.7V. 2 Notes prepared by Mrs.Operational Amplifier gain of the amplifier and also establishes the input resistance of the OPAMP. It is decided by R1 and R2. Sejal Shah 19 . Instead of voltage divider emitter follower either with diode current bias or current mirror bias as shown in fig. Fig. 2. It also provides low output resistance. Level Translator: Because of the direct coupling the dc level at the emitter rises from stages to stage. To shift the output dc level to zero. An emitter follower with voltage divider is the simplest form of level translator as shown in fig. In this case. which is common collector amplifier.

4. It is an 8-pin DIP chip. 741c is most commonly used OPAMP available in IC package. intermediate stage with unbalanced output. 1.Operational Amplifier Fig. Parameters of OPAMP: The various important parameters of OPAMP are follows: 1. 3 Fig.Input Offset Voltage: Notes prepared by Mrs. shows a complete OPAMP circuit having input different amplifiers with balanced output. level shifter and an output amplifier. Sejal Shah 20 . 4 Lecture . Fig.6: Practical Operational Amplifier The symbolic diagram of an OPAMP is shown in fig.

For some OPAMP it may be up to 1000 G ohm. Vio is the difference of Vdc1 and Vdc2. Input Capacitance: (Ci) Notes prepared by Mrs. i. Input offset Current: The input offset current Iio is the difference between the currents into inverting and non-inverting terminals of a balanced amplifier. Sejal Shah 21 Fig. shows that two dc voltages are applied to input terminals to make the output zero. 5. the Iio value decreases further. The smaller the input offset voltage the better the differential amplifier.Input Bias Current: The input bias current IB is the average of the current entering the input terminals of a balanced amplifier i.e. For a 741C OPAMP the maximum value of Vio is 6mV. It means a voltage ± 6 mV is required to one of the input to reduce the output offset voltage to zero. because its transistors are more closely matched. 2. Iio = | IB1 ? IB2 | The Iio for the 741C is 200nA maximum. It may be positive or negative. Iio is 6 nA 3. 2. 2 . Differential Input Resistance: (Ri) Ri is the equivalent resistance that can be measured at either the inverting or non-inverting input terminal with the other terminal grounded. As the matching between two input terminals is improved.Operational Amplifier Input offset voltage is defined as the voltage that must be applied between the two input terminals of an OPAMP to null or zero the output fig.e. IB = (IB1 + IB2 ) / 2 For 741C IB(max) = 700 nA and for precision 741C IB = ± 7 nA 4. Vio = Vdc1 ? Vdc2 Vdc1 and Vdc2 are dc voltages and RS represents the source resistance. For the 741C the input resistance is relatively high 2 M . the difference between IB1 and IB2 becomes smaller.For a precision OPAMP 741C.

the range of the input common mode voltage is ± 13V maximum. The higher the value of CMRR the better is the matching between two input terminals and the smaller is the output common mode voltage.4 pf for the 741C. Parameters of OPAMP: 7. It can be done by connecting 10 K ohm pot between 1 and 5 as shown in fig. For the 741C. Offset Voltage Adjustment Range: 741 OPAMP have offset voltage null capability. Sejal Shah 22 . It is used to determine the degree of matching between the inverting and noninverting input terminals. CMRR is 90 dB typically. 3. For the 741C the offset voltage adjustment range is ± 15 mV. 3 By varying the potentiometer. CMRR is defined as the ratio of the differential voltage gain Ad to the common mode voltage gain ACM CMRR = Ad / ACM. output offset voltage (with inputs grounded) can be reduced to zero volts. Pins 1 and 5 are marked offset null for this purpose. A typical value of Ci is 1. Notes prepared by Mrs. 8. This means that the common mode voltage applied at both input terminals can be as high as +13V or as low as ?13V. Thus the offset voltage adjustment range is the range through which the input offset voltage can be adjusted by varying 10 K pot. For the 741C. Fig. 6.Operational Amplifier Ci is the equivalent capacitance that can be measured at either the inverting and noninverting terminal with the other terminal connected to ground. Common Mode Rejection Ratio (CMRR). Input Voltage Range : Input voltage range is the range of a common mode input signal for which a differential amplifier remains linear.

Large Signal Voltage Gain: Since the OPAMP amplifies difference voltage between two input terminals. For a 741C it is ± 13 V. Example . vin 1 = 10 mV rms. Supply voltage Rejection Ratio: (SVRR) SVRR is the ratio of the change in the input offset voltage to the corresponding change in power supply voltages. the voltage gain of the amplifier is defined as Because output signal amplitude is much large than the input signal the voltage gain is commonly called large signal voltage gain. vin 1 = 5 m V dc. For the 741C.1 Determine the output voltage in each of the following cases for the open loop differential amplifier of fig. It is 75 ohm for the 741C OPAMP.Operational Amplifier 9. vin 2= 20 mV rms Notes prepared by Mrs. Output voltage Swing: The ac output compliance PP is the maximum unclipped peak to peak output voltage that an OPAMP can produce. SVRR is separately specified as positive SVRR and negative SVRR. vin 2 = -7 µVdc b. 4: a. 11. SVRR can be defined as SVRR = Vio /  V Where  V is the change in the input supply voltage and Vio is the corresponding change in the offset voltage. 12. This is expressed in V / V or in decibels. Sejal Shah 23 . For 741C. For 741C is voltage gain is 200.000 typically. SVRR is measured for both supply magnitudes increasing or decreasing simultaneously. Output Resistance: (RO) RO is the equivalent resistance that can be measured between the output terminal of the OPAMP and the ground. Since the quiescent output is ideally zero. The output voltage never exceeds these limits for a given supply voltages +VCC and ?VEE. This also indicates the values of positive and negative saturation voltages of the OPAMP. 10. SVRR = 150 µ V / V. the ac output voltage can swing positive or negative. with R3 10K. For same OPAMPS.

The output voltage equation is valid for both ac and dc input signals.15 V. Solution: (a). the OPAMP saturates at ± 14 V. + VCC = + 15 V. However. Notes prepared by Mrs. (b).VEE = .4 V dc with the assumption that the dc output voltage is zero when the input signals are zero. Ri = 2 M . This non-sinusoidal waveform is unacceptable in amplifier applications. Sejal Shah 24 . The output voltage of an OPAMP is given by Remember that vo = 2. and output voltage swing = ± 14V.Operational Amplifier Fig. The output voltage is given by Thus the theoretical value of output voltage vo = -2000 V rms. 4 Specifications of the OPAMP are given below: A = 200. .000. Therefore. 5. the actual output waveform will be clipped as shown fig. R O = 75 .

From open loop gain vs frequency graph At 1 MHz shown in. 000 and cut off frequency is 10Hz. an OPAMP may drive a load resistance that is approximately zero. Output Short circuit Current : In some applications. The 741C can supply a maximum short circuit output current of only 25mA. Supply Current : IS is the current drawn by the OPAMP from the supply.8 m A. 14. fig. Since OPAMP is low power device and so its output current is limited. Gain Bandwidth Product: The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage gain is reduced to 1. It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1. Sejal Shah 25 . The amount of power consumed by the 741C is 85 m W. 6. 5 13. 16. Power Consumption: Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be consumed by the OPAMP in order to operate properly. The mid band voltage gain is 100. 15. For the 741C OPAMP the supply current is 2.Operational Amplifier Fig. Even its output impedance is 75 ohm but cannot supply large currents. Notes prepared by Mrs.

To understand this. Slew Rate: Slew rate is defined as the maximum rate of change of output voltage per unit of time under large signal conditions and is expressed in volts /  secs. 6 17. 6 If 'i' is more. capacitor charges quickly. Sejal Shah 26 . Fig. 7. then rate of change is also limited.Operational Amplifier Fig. consider a charging current of a capacitor shown in fig. Notes prepared by Mrs. If 'i' is limited to Imax.

which limits its use in higher frequency applications. Example . then distortion occurs.3 For the given circuit in fig. 18.  Vio /  T = 0. what is the differential input voltage?. For the 741C the slew rate is low 0.5  V / C. Input offset voltage drift = (  Vio /T). If the slope requirement is greater than the slew rate. so So bandwidth = 26. If A = 105.Operational Amplifier Slew rate indicates how rapidly the output of an OPAMP can change in response to changes in the input frequency with input amplitude constant. If the peak output is 12 V. Iin(off) = 20 nA. The input offset voltage drift is the ratio of the change in input offset voltage to change in temperature and expressed in  V /° C.2 An operational amplifier has a slew rate of 2 V / µs. input offset current drift is the ratio of the change in input offset current to the change in temperature.5 V /  S. Example . the slews determines the maximum frequency of operation fmax for a desired output swing. Sejal Shah 27 .5 kHz.  Iio/  T = 12 pA / C. what does the output offset voltage equal? Notes prepared by Mrs. The slew rate changes with change in voltage gain and is normally specified at unity gain. 1. Input Offset Voltage and Current Drift: It is also called average temperature coefficient of input offset voltage or input offset current. Input offset current drift = (  Iio / T). what is the power bandwidth? Solution: The slew rate of an operational amplifier is As for output free of distribution. Similarly. For 741C. If Vin(off) = 0.

1. That is. shows the open loop differential amplifier in which input signals vin1 and vin2 are applied to the positive and negative input terminals. In open loop configuration. Notes prepared by Mrs. the output signal is not fedback in any form as part of the input signal. 1 Solutin: Iin(off) = 20 nA Vin(off) = 0 (i) The differential input voltage = Iin(off) x 1k = 20 nA x 1 k = 20µ V (ii) If A = 105 then the output offset voltage Vin(off) = 20 µ V x 105 = 2 volt Output offset voltage = 2 volts. Sejal Shah 28 . The Differential Amplifier: Fig. There are three open loop OPAMP configurations. The OPAMP functions as a high gain amplifier.Operational Amplifier Fig. exists between input and output terminals of any type. Open loop OPAMP Configuration: In the case of amplifiers the term open loop indicates that no connection.

v2 = vin. 2. Therefore v1 = vin1 and v2 = vin2. vo = Ad (vin1 ? vin2 ) where. Therefore voltage drop across these resistances can be assumed to be zero. 1 Since the OPAMP amplifies the difference the between the two input signals. The source resistance Rin1 and Rin2 are normally negligible compared to the input resistance Ri. vo = -Ad vin Notes prepared by Mrs. The Inverting Amplifier: If the input is applied to only inverting terminal and non-inverting terminal is grounded then it is called inverting amplifier. Sejal Shah 29 . The OPAMP amplifies both ac and dc input signals. v1= 0. Ad is the open loop gain.Operational Amplifier Fig. this configuration is called the differential amplifier.This configuration is shown in fig.

Therefore open loop op-amp is not used in linear applications.Operational Amplifier Fig. The non-inverting amplifier: In this configuration. v2 = 0 Fig. This is because of very high gain. the output of the OPAMP is either negative or positive saturation or switches between positive and negative saturation levels. 3. v1 = +vin vo = +Ad vin This means that the input voltage is amplified by Ad and there is no phase reversal at the output. 3 In all there configurations any input signal slightly greater than zero drive the output to saturation level. Notes prepared by Mrs. the input voltage is applied to non-inverting terminals and inverting terminal is ground as shown in fig. Thus when operated in open-loop. Sejal Shah 30 . Thus the input signal is amplified and inverted also. 2 The negative sign indicates that the output voltage is out of phase with respect to input 180 ° or is of opposite polarity.

An amplifier with negative fedback has a self-correcting ability of change in output voltage caused by changes in environmental conditions. the input and output resistances. increases the bandwidth and changes. the feedback is called positive feedback. There are four following ways to connect these blocks.reduces the voltage gain. Positive feedback is necessary in oscillator circuits. The negative fedback stabilizes the gain. In positive feedback the feedback signal aids the input signal. If the signal fedback is of opposite or out phase by 180° with respect to the input signal. That is. It is also known as degenerative fedback because it reduces the output voltage and. an output signal is fedback to the input either directly or via another network. Other benefits are reduced distortion and reduced offset output voltage. 4. A closed loop amplifier can be represented by two blocks one for an OPAMP and other for a feedback circuits. These connections are shown in fig.in tern. These connections are classified according to whether the voltage or current is feedback to the input in series or in parallel: • • • • Voltage ? series feedback Voltage ? shunt feedback Current ? series feedback Current ? shunt feedback Notes prepared by Mrs. It is also known as regenerative feedback. It also reduces the effect of temperature and supply voltage variation on the output of an op-amp. If the signal is fedback in phase with the input signal. Sejal Shah 31 .Operational Amplifier Closed Loop Amplifier: The gain of the OPAMP can be controlled if fedback is introduced in the circuit. the feedback is called negative fedback.

The op-amp is represented by its symbol including its large signal voltage gain Ad or A.Operational Amplifier Fig. Voltage series feedback: It is also called non-inverting voltage feedback circuit. 4 In all these circuits of fig. Only first two. the input signal drives the non-inverting input of an amplifier. feedback in circuits are important. Sejal Shah 32 . With this type of feedback. the signal direction is from input to output for OPAMP and output to input for feedback circuit. 4. a fraction of the output voltage is then fed back to the inverting input. 5 Notes prepared by Mrs. as shown in fig. and the feedback circuit is composed of two resistors R1 and Rf.

Notes prepared by Mrs. (or is out of phase by 180° with respect to input voltage). This means that more voltage is fedback to the inverting input. The feedback gain B can be precisely controlled and it is independent of the amplifier. hence the feedback is said to be negative. even though differential voltage gain may change. Physically.Operational Amplifier Fig. 5 The feedback voltage always opposes the input voltage. Then the output voltage will try to increase. It reduces the feedback voltage vf and hence. causing vd voltage to decrease. Sejal Shah 33 . the feedback gain. The gain loop gain is very large such that AB >> 1 This shows that overall voltage gain of the circuit equals the reciprocal of B. This almost completely offset the attempted increases in output voltage. The closed loop voltage gain is given by The product A and B is called loop gain. if A decreases. Suppose A increases for some reasons (temperature change). Similarly. The output voltage decreases. vd voltage increases. It means that closed loop gain is no longer dependent on the gain of the op-amp. Thus the output voltage increases almost to same level. what is happening in the circuit? The gain is approximately constant. but depends on the feedback of the voltage divider.

This says. Again considering the voltage equation. and v1 = v2 (ideal).Operational Amplifier Different Input voltage is ideally zero. shows a voltage series feedback with the OPAMP equivalent circuit. This concept is useful in the analysis of closed loop OPAMP circuits. 1. that the voltage at non-inverting input terminal of an op-amp is approximately equal to that at the inverting input terminal provided that Ad is very large. Sejal Shah 34 . Notes prepared by Mrs. ideal closed loop voltage again can be obtained using the results Input Resistance with Feedback: fig. vO = Ad vd or vd = vO / Ad Since Ad is very large (ideally infinite) vd  0. For example.

an external voltage Vo is applied as shown in fig. Sejal Shah 35 . Notes prepared by Mrs. input vin is reduced to zero. 2. Thus Rif approaches infinity and therefore. To find output resistance with feedback Rf. 1 In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the input resistance of the feedback amplifier. Output Resistance with Feedback: Output resistance is the resistance determined looking back into the feedback amplifier from the output terminal. this amplifier approximates an ideal voltage amplifier. The input resistance with feedback is defined as Since AB is much larger than 1. which means that Rif is much larger that Ri.Operational Amplifier Fig.

It is very small because (1+AB) is very large. 3.Operational Amplifier Fig. It approaches to zero for an ideal voltage amplifier. Bandwidth with Feedback: The bandwidth of an amplifier is defined as the band of frequencies for which the gain remains constant. From this curve for a gain of 2 x 105 the Notes prepared by Mrs. shows the open loop gain vs frequency curve of 741C OPAMP. Fig. Sejal Shah 36 . 2 The output resistance (Rof ) is defined as This shows that the output resistance of the voltage series feedback amplifier is ( 1 / 1+AB ) times the output resistance Ro of the op-amp.

Since the gain bandwidth product is constant obviously the higher the gain the smaller the bandwidth and vice versa. Fig. Bandwidth with feedback = (1+ A B) x (B. It is the maximum frequency the OPAMP can be used for. the gain bandwidth product obtained from the open loop gain vs frequency curve is equal to the unity gain bandwidth of the OPAMP.W. the bandwidth is approximately 1MHz when the gain is unity.Operational Amplifier bandwidth is approximately 5Hz. without feedback) ff= fo (1+A B) Output Offset Voltage: Notes prepared by Mrs. Therefore the closed loop bandwidth increases by (1+AB). On the other hand. 3 The frequency at which gain equals 1 is known as the unity gain bandwidth. If negative feedback is used gain decrease from A to A / (1+AB). Furthermore. Sejal Shah 37 .

4 The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1. Some of the output offset voltage is fed back to the inverting input. Fig. To obtain voltage follower. Input bias voltage. The gain of the feedback circuit (B) is 1. 3. Input offset voltage. The actual output offset voltage with negative feedback is smaller. When loop gain AB is much greater than 1. When the noninverting amplifier gives unity gain. Sejal Shah . the closed loop output offset voltage is much smaller than the open loop output offset voltage. Voltage Follower: Fig. shows a feedback amplifier with an output offset voltage source in series with the open loop output AVd. R1 is open circuited and Rf is shorted in a negative feedback amplifier of fig. There are three cause of this unwanted offset voltage. After amplification an out of phase voltage arrives at the output canceling most of the original output offset voltage. 4. 5 38 Notes prepared by Mrs. The resultant circuit is shown in fig. 4. it is called voltage follower because the output voltage is equal to the input voltage and in phase with the input voltage. Input offset current.Operational Amplifier In an OPAMP even if the input voltage is zero an output voltage can exist. 1. 5. vout = Avd= A (v1 ? v2) v1 = vin v2 =vout v1 = v2 if A >> 1 vout = vin. The reasoning is similar to that given for distortion. 2. Fig. In other words the output voltage follows the input voltage.

Notes prepared by Mrs. Sejal Shah 39 . and the amplified as well as inverted output signal is also applied to the inverting input via the feedback resistor Rf. 1 The input voltage drives the inverting terminal. The non-inverting terminal is grounded. Fig. 1. shows the voltage shunt feedback amplifier using OPAMP. This arrangement forms a negative feedback because any increase in the output signal results in a feedback signal into the inverting input signal causing a decrease in the output signal. The closed loop voltage gain can be obtained by.Operational Amplifier Therefore Af = 1 / B = 1 Voltage shunt Feedback: Fig. Resistor R1 is connected in series with the source. writing Kirchoff's current equation at the input node V2.

1. The difference input voltage vd is ideally zero. In other words. Sejal Shah 40 . it is said to be at virtual ground. Therefore. The gain can be selected by selecting Rf and R1 (even < 1). (vd= vO/ A) is the voltage at the inverting terminals (v2) is approximately equal to that of the noninverting terminal (v1). the inverting terminal voltage (v1) is approximately at ground potential.Operational Amplifier The negative sign in equation indicates that the input and output signals are out of phase by 180. Therefore it is called inverting amplifier. Input Resistance with Feedback: Notes prepared by Mrs. shown earlier. the noninverting terminal is grounded and the.input signal is applied to the inverting terminal via resistor R1. Inverting Input at Virtual Ground: In the fig.

shown in fig. iO = ia + ib Since RO is very small as compared to Rf +(R1 || R2 ) Therefore. vd= vi ? v2 = 0 . The output resistance can be obtained using Thevenin's equivalent circuit. 3.e.i. Notes prepared by Mrs. iO= ia vO = RO iO + A vd.Operational Amplifier To find the input resistance Miller equivalent of the feedback resistor Rf. 2. Therefore. input resistance with feedback Rif is then Fig. Rf is splitted into its two Miller components as shown in fig. 3 Similarly. i.e. Sejal Shah 41 . is obtained. 2 Output Resistance with Feedback: The output resistance with feedback Rof is the resistance measured at the output terminal of the feedback amplifier.B vO Fig. the bandwidth increases by (1+ AB) and total output offset voltage reduces by (1+AB).

Sejal Shah 42 .Operational Amplifier Notes prepared by Mrs.