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BS P-III

Institute of Phsics

**Building your own Logic gates
**

Objects of the experiment

To understand "How the basic logic gates work?".

Introduction

A logic gate is an electronic circuit, which makes logical decisions. It has ohe output and one or more inputs. The output signal appears only for certain combinations of input signals. Logic gates are the basic building blocks from which most of the digital systems are built up. They implement the hardware of logical function, based on the logical algebra developed by George Boole. A unique characteristic of the Boolean algebra is that variables used in it can assume only one of the two values i.e. either 0 or 1. In this experiment, we will study the OR, AND, NOT, NAND, NOR gates some applications. They are used in computers, telephone switching systems, industrial control system, and automation etc.

**Part I: The OR Gate
**

The OR gate is represent by the following algebraic equation: A+B=C. It means that the logic of output should be '1' , when either A or B or both are '1'. A truth table may be defined as "a table, which gives the output states for all possible combinations of the in puts.

Figure1(a): Symbolic representation for an OR gate.

A 0 1 0 1

B 0 0 1 1

c

Com peleteTruth table for the double input OR gate.

Logic circuits

A

BS P-III

D1 C D2 B

(b) K

Diode OR Gate

Figure1: circuit diagram (b) for an OR gate.

How does it work... i) When A is at '+5V' , D1 is forward-biased and hence conducts. We get ' + 5 V ' at the point C. ii) Same mechanism happens if B is at '+5V' , D2 conducts switching the point C at '+5V'. iii) When both A and B are at '+5V, both the diodes D, and D2 conduct, and the point C is again at '+5V'. iv) The point C will be at 'OV, if and only if both A and B are at '0V'. When we perform the experiment, the voltage at the point C is never equal to the applied voltage at the point A and B. This is because of potential drop across the pn-junction, whitch is 0.7V for silicon diodes, and 0.3V for germanium diodes. Procedure 1. Construct the curcuit given in fig-1(b). 2. Verify the truth table given by applying the input voltage ( A & B as given in table ) and recording out puts.

**Part II: The AND Gate
**

In Boolean algebra, the logic AND is represented by the symbol "." or 'x'. Its working equation is AxB = C or A.B=C, i.e. C = 0 if any of two A or B is '0'.

**(a) Diode AND Gate D1 A D2 B (b)
**

Figure2: A Symbolic representation (a),and circuit diagram(b) for an AND gate.

+5V 2.2 K C

Logic circuits

BS P-III

The circuit in fig 2(b). If any of the point A or B (or both) is at zero potential, the potential of point C will be nearly zero, as the voltage across a forward- biased diode is very small (0.3 V). Moreover if both A and B are connected to '+5V' the point C will be at '+5V', because now both the diodes are off. This is called a 'diode AND gate' for obvious reason. More than two diodes may be used to form a. triple or multiple AND gate. A 0 1 0 1

Compelete the

B 0 0 1 1

c

Truth table for double input AND gate.

How does it work... i) ii) iii) iv) When A is at '0V ' diode D1 conducts. So the point C is driven to 'OV'. The same mechanism is repeated if B is at 'OV'. Then D2 conducts which switches the point C at 'OV'. When both A and B are at 'OV', both the diodes conduct and the point C is at 'OV'. When both the inputs A and B are at '+5V', no current will flow. The point C will be at '+5V', and we get the logic answer ' 1'. Procedure 1. Construct the curcuit given in fig-2(b). 2. Verify the truth table given by applying the input voltage ( A & B as given in table ) and recording out puts.

**Part III: The NOT Gate
**

This gate consists of three elements, a transistor and two resistors. It is called the NOT gate, because its output is opposite to its input. It is also called an inverter. It has one input and one output, as shown in the truth table. Its symbolic representation and circuit diagrams are shown in figure 3. A

Compelete the Truth

table for NOT gate.

c

1 0

3

+5V

1K

A C C

4.7 K

A NPN

(a)

Figure 3 : Symbolic (a), and circuit diagram (b), for NOT gate.

(b)

How does it work... In this circuit two resistors are used. The resistor used with the base terminal is higher than with the collector. The emitter base junction is forward biased and collector base junction is reverse biased. To control the base current we use the high resistance. Now see what happens when we make the input logically '1' and afterward '0'. When A is at '+5V', the emitter base junction is forward biased and the transistor is 'ON' and maximum current flows through the collector lead. We get the point C at '0V'. Conversely, when we connect A with '0V', The transistor stops working and we get the point C point at '+5V'. Procedure 1. Construct the curcuit given in fig-3(b). 2. Verify the truth table given by applying the input voltage ( A as given in table ) and recording out puts.

**Part IV: The NOR Gate
**

The combination of OR gate and NOT gate makes a NOR gate. Its symbolic representation along with the circuit diagrams is given in figure 4.

Figure4(a): Symbolic diagram for NOR gate.

4

Logic circuits

BS P-III

+5V

D1 A D2 B

1K

C

4.7 K

NPN

2.2 K

Figure4(b): circuit diagram for NOR gate.

A NOR gate will have an output ' 1 ' only when both inputs A and B are logically '0' If any of the input is '1' the output is '0'. A B 0 1 0 1

Compelete the

c

0 0 1 1

Truth table for NOR gate

Procedure 1. Construct the curcuit given in fig-4(b). 2. Verify the truth table given by applying the input voltage ( A and B as given in table ) and recording the out puts.

**Part V: The NAND Gate
**

A combination of AND gate and NOT gate makes a NAND gate. Its symbolic representation and circuit diagram are shown in figure 5.

**Figure5: Symbolic representation (a), and circuit diagram (b) for a NAND gate.
**

A D2 B

(a)

+5V +5V

2.2 K 4.7 K

D1

1K

C NPN

(b)

5

Logic circuits

BS P-III

This gate gives an output of '1' if its both inputs are not '1'. In other words it gives an output of ' 1 ' if either A, or B, or both are logically. '0'.

A 0 1 0 1

Compelete the

B 0 0 1 1

c

Truth table for NAND gate.

Procedure 1. Construct the curcuit given in fig-5(b). 2. Verify the truth table given by applying the input voltage ( A and B as given in table ) and recording the out puts.

6

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