!

nterrupt Control
Serial !/O Control
Accumulator Temp. Reg
!nstruction
Register
!nstruction
decoder
Nachine
Cycle
Encoding
W
Nultiplexer
8 - Bit internal Data Bus
W
Temp. Reg.
Stack Pointer
Z
Temp. Reg.
C
Temp. Reg.
B
Temp. Reg.
E
Temp. Reg.
D
Temp. Reg.
H
Temp. Reg.
L
Temp. Reg.
Stack Pointer
Program Counter
!ncrementer/ Decrementer
Address Latch
Address Buffer
Data/Address Buffer
Power
Supply
+ S v
CND
CLK
CEN
READY
Control
RD WR ALE ALE S0
S1 !O/N HLDA RESET
!N
RESET
OUT
Status DNA Reset
Timing and Control
Flag
Flip·flops
ALU
1
2
3
4
3
6
7
8
9
10
11
12
13
14
13
16
17
18
19
20
40
39
38
37
36
33
34
33
32
31
30
29
28
27
26
23
24
23
22
21
x1
x2
8LSL1Cu1
SCu
Slu
18AÞ
8S17Ŧ3
8S16Ŧ3
8S13Ŧ3
ln18
ln1A
Au0
Au1
Au2
Au3
Au4
Au3
Au6
Au7
vSS
vcc
PCLu
PLuA
CLk(Cu1)
8LSL1 ln
8LAu?
lC/M
S1
8u
W8
ALL
S0
A13
A14
A13
A12
A11
A10
A9
A8
_______
__
__
____
8383A
1
2
3
4
3
6
7
8
9
10
11
12
13
14
13
16
17
18
19
20
40
39
38
37
36
33
34
33
32
31
30
29
28
27
26
23
24
23
22
21
ÞA3
ÞA2
ÞA1
ÞA0
8u
CS
gnd
A1
A0
ÞC7
ÞC6
ÞC3
ÞC4
ÞC0
ÞC1
ÞC2
ÞC3
Þ80
Þ81
Þ82
ÞA4
ÞA3
ÞA6
ÞA7
W8
8LSL1
u0
u1
u2
u3
u4
u3
u6
u7
vcc
Þ87
Þ86
Þ83
Þ84
Þ83
__
__
__
8233
ÞÞl
__
__
Croup A
Control
Croup B
Control
Data Bus
Buffer
Read
Write
Control
Logic
Croup
A
Port A
Croup
B
Port B
Croup
B
Port C
Croup
A
Port C
+Sv
CND
Power Supplies
8 - Bit
!nternal
Data
Bus
l/C
ÞA7 Ŷ ÞA0
l/C
ÞC7 Ŷ ÞC4
l/C
ÞC3 Ŷ ÞC0
l/C
Þ87 Ŷ Þ80
Bidirectional Data Bus
D7-D0
RD
WR
A1
A0
RESET
__
__
CS
_

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