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# Mini-project: QPSK Digital Transmitter/Receiver

Mani Vaya Nasir Ahmed Introduction: In this project we implement quadrature phase shift keying (QPSK) end-to-end digital transmitter/receiver. The digital transmitter in our project randomly generates binary data, which is then modulated using QPSK. This signal is then received by the digital receiver, which performs multiple operations to recover the transmitted signal. Firstly, because we are using a carrier to modulate the transmitted signal, we must demodulate the signal. The demodulation requires knowledge of the carrier frequency, and the use of a low pass filter. The first step in demodulation is to break up the received signal into its constituent inphase and quadrature phase components. This is procedure is easily done using knowledge of the carrier frequency and low pass filters. However, because the channel may introduce an offset into the transmitted signal, a carrier offset recovery block is needed. This block performs a phase lock loop (PLL) to recover the phase of the transmitted signal. After phase recovery, the inphase and quadrature phase data are sent to match filters, which produce peaks at the time at which the filter output should be sampled. To discover the correct sampling instance, a symbol timing recovery block is needed. This block uses a delay lock loop (DLL) to lock onto the correct sampling instance. After the symbol timing recovery, the sampled data is then unmapped to discover which bits were sent from the transmitter. Each of the constituent components of the transmitter and receiver described above will be further elaborated upon in the coming sections. The focus of our project was the MATLAB implementation of the digital transmitter/receiver. In our simulations, we will incorporate distortion at the receiver to test the abilities of our PLL and DLL. That is, we will put a carrier offset that is to be discovered by the PLL, and also assume no knowledge of the symbol timing at the output of the matched filter. DIGITAL TRANSMITTER Quadrature phase shift keying: Binary data bits are grouped into chunks and each chunk is mapped to a particular waveform called a symbol which is sent across the channel after modulation by the carrier. This requires having a separate symbol for each possible combination of data chunks. In QPSK, each ‘chunk’ consists of two bits, which determine the inphase and quadrature gain for the modulator. To produce a unique waveform for each two bit chunk, we keep the gains constant over a number of samples which is called the symbol period.

the data on the inphase and quadrature phase can be independently recovered at the receiver.4 0 ..4 0 .6 0 . while the quadrature phase data is modulated with the sine wave. QPSK uses orthogonal waveforms (sine and cosine) referred to as the quadrature signals. The figure below demonstrates the typical organization and bit mapping of the QPSK constellation: quadrature phase 01 00 inphase 11 10 Figure 1: QPSK constellation diagram The following is the QPSK modulated waveform that was produced from our simulations: QS tr n m ds nl P K a s itte iga 1 0 .8 0 1 0 5 1 0 1 5 tim e 2 0 2 5 3 0 3 5 Figure 2: QPSK transmitted signal . The data to be transmitted on the inphase is modulated with the cosine wave..To transmit two bits per symbol period..2 a p d m litu e 0 ..2 0 .6 0 .8 0 . Due to the orthogonality of the sine and cosine basis functions.

Figure 3: QPSK Transmitter: Cos(λ c*n) Si(n) Data bits S/P I/Q LUT Sq(n) Sin(λ c*n) T(n) Figure 4: Digital Receiver System: Carrier recovery Symbol timing recovery Cos(λ c*n) LPF Si(n) Y(n) Sq(n) LPF Sin(λ c*n) MF MF Fsymb Symbol Quantization and Unmapping Serial Data Output .

A Phase locked looping system can track this time varying phase if the frequency mismatch is small relative to the carrier frequency. We can model the difference between the actual and expected carrier frequencies as a time varying phase. the phase locked loop plays a critical role in any coherent communication system. Cos(n*λ ^c ) Zi(n) Low-Pass Filter X(n) Zq(n) Low-Pass Filter Phase Detector Sin(n*λ ^c) Loop Filter Figure 5: PLL Block Diagram Numerically Controlled Oscillator: Given an analog system. the actual carrier frequency may be slightly different than the expected frequency. In an ideal communication system we know the transmitted carrier frequency and we need to calculate its phase offset for accurate demodulation.DIGITAL RECEIVER Carrier Offset Recovery : For locking on to the carrier of a received modulated signal. the phase recovery is often achieved using a voltage controlled oscillator that allows for precise adjustment of the carrier frequency based on the output of the phase detecting circuit.) This time varying phase can be expressed as θ (n)= Σ nm=0 (λ c)+ θ c and recursively as : θ (n) = θ (n-1) + λ c The Numerically controlled oscillator keeps track of the phase and forces a phase offset into the demodulationg carrier by incorporating an extra term as follows: . In a digital system we use a Numerically controlled oscillator to recover the phase. Due to imperfections in the transmitter. Consider the following expression for carrier sinusoid: sin(λ n + θ c) = sin(θ (n)) where θ (n) = λ n + θ c (λ n and θ c represent the carrier frequency and phase respectively.

Immediately after this phase change occurs the PLL begins to adjust the phase to force the phase difference to zero.Yq(n) = sin(θ ’(n). To get a correct sign estimate of the phase. θ (n-1) + λ c +δ pd(n) Phase detector: We can represent the actual received carrier frequency as the expected carrier frequency with some offset: λ ’c = λ c + θ ’(n) The NCO generates the demodulating sine and cosine with the expected digital frequency λ c and offsets this frequency with the output of the loop filter. The NCO frequency can hence be modeled as λ ^c = λ c + θ ^(n) Zi(n)= (cos(λ ’c)+ sin(λ ’c)) * cos(λ ^c) = ½* (cos(λ ’c+λ ^c) +cos(λ ’c-λ ^c) + sin(λ ’c+λ ^c) + sin(λ ’c-λ ^c)) Zq(n)= (cos(λ ’c)+ sin(λ ’c)) * sin(λ ^c) = ½*{sin(λ ^c+λ ’c)-sin(λ ^c-λ ’c) + cos(λ ^c+λ ’c)+ cos(λ ^c-λ ’c)} We can now apply a low pass filter to remove the double frequency terms and we will be left with: Yi(n)= cos( θ ’(n). the phase detector is set to minus one times the value of the subtracted signal.θ (n)) We now subtract the above two to obtain only the sine terms: Yi(n).4*x(n) + 0. We have to note that each time an amplitude transition occurs.sin(θ ’(n). it is equivalent to a phase shift of the carrier by pi/2.θ ^(n)) When the phases are only slightly mismatched we can say that : Sin(θ ) = θ for small θ Hence we can approximate the value of Yi(n)-Yq(n) to be equal to phase difference.15 for the loop gain.θ (n) = where δ pd(n) is the phase offset at time n. Loop filter: The estimated phase mismatch estimate is fed to the NCO via a loo filter often a simple low pass filter: Y(n) = o.θ ^(n)) Yq(n)= cos(θ ^(n). .θ ’(n)) .6*y(n-1) We also use a gain factor of 0.θ ^(n)) + sin(θ ’(n).

Note the behavior of Zi-Zq..0 05 .0 05 .1 0 ..2 0 0 5 0 10 0 10 5 20 0 20 5 30 0 .1 0 os t =1 0 0 ff e /1 0 os t=1 /1 0 ff e 0 0 0 os t=1 0 0 0 ff e 0 /1 0 0 5 0 10 0 n 10 5 20 0 20 5 30 0 .0 0 . Figure 6: Zi-Zq plots for various offsets 05 ..1 0 of e =1 /1 0 fs t 0 0 0 of e =1 0 0 fs t /1 0 of e 1 0 0 0 fs t= 0 /1 0 . Upon low pass filtering Zi-Zq we get the crude phase offset.0 0 Z q .. which is the received signal.1 05 .The following curves were obtained for different constant offsets that were introduced in the channel. demodulated by quadrature phase signal and offset by the PLL. which is then processed by the loop filter and NCO to get the new demodulating signals..1 05 .1 05 ..1 0 ..1 05 ..2 0 Figure 7: Phase offset obtained after low pass filtering Zi-Zq 05 .

The next step is for the receiver to sample the recovered message signals (inphase and quadrature channels) at the desired symbol rate. when to actually sample the signal is generally unknown. if the on time sample was at a peak of the match filter output. The symbol sampler simply counts until 16 samples have passed. This matched filter is to aid in the timing recovery for it will have a peak at multiples of the sampling interval. and is fed to the next stage of the decoding. In our implementation. it takes the previous sample. and the system also knows the number of samples per symbol (Ts). to discover ‘when’ to sample the signal. However. the averaging filter is the matched filter. the symbol timing recovery then checks the validity of the on time sampling. Even though the symbol rate is typically known to the receiver. This is the job of the symbol timing recovery. Basically. Prior to symbol timing recovery. Si in the above figure denotes this value for the I (inphase) channel. a matched filter is used.Symbol Timing Recovery: The symbol timing recovery block assumes that the received signal has been coherently demodulated and filtered using a low pass FIR filter. the number of samples per symbol was 16. then it knows to make an ‘on time sample’. and it also helps suppress the effects of noise. The input to the matched filter is the low pass filtered output of the demodulation process using the carrier-offset recovery. and the next sample and subtracts them. The method we used for symbol timing recovery was a delay locked loop (DLL). The block diagram is shown next: Offset Decision Si(n) Averaging Filter Symbol Sampler late sampling early sampling on time sampling _ Figure: DLL Block diagram In this figure. However. This on time sample is assumed to be the correct sampling time. . then the early and late sample would be equal. The Symbol sampler takes in samples at the sampling rate. Ideally.

For example. we chose one that would give us a quick lock to the correct sampling instance. then the early sample would equal the late sample. if after the first adjustment we are now sampling at the correct location. It is dependent on the threshold value chosen.5 0 20 40 60 80 100 time 120 140 160 180 200 Figure 8: Symbol Timing Recovery As can be seen from the above figure. the DLL algorithm locks on to the correct sampling instance. The figure below shows an example of this DLL algorithm for a square wave signal: Matched filtered signal and on time sampling instance using DLL 1. and the data was of the form (+1. Then. Once this sum passes a threshold. This simple example assumed a square wave as the input to the matched filter. We are thus ‘locked’ onto the correct sampling instance. the running sum for the decision is cleared and we once again start performing our test to see if our new estimate of the on time sampling instance is correct. after just a few samples. So.if this is not the case. .5 amplitude 0 -0. an appropriate offset is incorporated (we simply increment/decrement the counter which was counting from Ts to zero). then the difference between the early and late is multiplied by the on time sampling value and summed together. This DLL system works quite well in locking on to the correct sampling instance.….5 1 0. After experimentation with thresholds.5 -1 -1. The DLL was incorporated into our system to match to the correct sampling instance for the inphase and quadrature phase components of the received signal.).-1. and the running sum would never exceed the threshold. which is the peak of the triangle wave. then it is apparent that we are not sampling at the correct time for our on time sample..

3 0 .7 0 . within a few symbol periods. it was able to lock onto the correct sample. Even for time varying carrier offsets. For the timing recovery. We also analyzed the performance of our system under a noisy channel defined by : t=t+sigma*randn(1.length(t)).6 n is vria c o e a ne 0 . 6 x1 0 3 B R /sn is vria c E v o e a ne 5 4 BER 3 2 1 0 0 . However. our system was able to correctly demodulate using the recovered phase.8 0 .4 0 .2 0 .5 0 . and the timing recovery (DLL) performed optimally.1 0 .Conclusions: We implemented an end-to-end digital transmitter system. which comprised of: • • • • Digital QPSK transmitter Carrier offset recovery Symbol timing recovery Bit error rate calculation The simulation parameters we used were: • Modulation scheme = QPSK • Digital carrier frequency = π /2 • Symbol period = 16 samples • Block length = 256 bits • Average transmit power = 1 unit Our implementation was robust to different channel carrier offsets.9 1 . which produces additive white gaussian noise of variance sigma squared. the receiver assumed the first sample was ‘on-time’ even though it wasn’t.