# Department of Electronics and Communication Engineering

Digital Signal Processing Lab

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD IV Year B.Tech. ECE I-Sem T 0 P 3 C 2

DIGITAL SIGNAL PROCESSING LAB LIST OF EXPERIMENTS 1. To study the architecture of DSP chips – TMS 320C 5X/6X Instructions. 2. To verify linear convolution. 3. To verify the circular convolution. 4. To design FIR filter (LP/HP) using windowing technique a) Using rectangular window b) Using triangular window c) Using Kaiser window 5. To Implement IIR filter (LP/HP) on DSP Processors 6. N-point FFT algorithm. 7. MATLAB program to generate sum of sinusoidal signals. 8. MATLAB program to find frequency response of analog LP/HP filters. 9. To compute power density spectrum of a sequence. 10. To find the FFT of given 1-D signal and plot.

Maharaj Vijayaram Gajapathi Raj College of Engineering, Vizianagaram

1

Department of Electronics and Communication Engineering

Digital Signal Processing Lab

Equipment and Software

1. PCs – 40 No.s • • • • • • Model: HP Compaq DX6120MT Processor: Intel ® Pentium-4 3.00 GHz Chipset: Intel 915 GV Express Chipset RAM: 512 MB DDR-II Hard Disk: 80 GB SATA Monitor: HP 17”

2. CROs – 12 No.s • APLAB, 20 MHz Dual Trace

3. Function Generators – 12 No.s • APLAB, 3 MHz

4. DSP Starter kits – 12 No.s • • Texas Instruments Floating point DSP TMS320C6713

5. MATLAB – 15 Users • • • Signal Processing Toolbox Filter Design Toolbox Communication Toolbox

6. Code Composer Studio Software

Maharaj Vijayaram Gajapathi Raj College of Engineering, Vizianagaram

2

Department of Electronics and Communication Engineering

Digital Signal Processing Lab

System Requirements

Minimum • • • • • • • • Recommended

3 GHz or Higher Pentium• 3 GHz or Higher Pentium – Compatible CPU Compatible CPU 600 MB of free hard disk space • 512 MB RAM 512 MB of RAM SVGA (800 x 600 ) display • 32 bit Color Internet Explorer (6.0 or later) or Local CD-ROM drive Supported Operating Systems Windows® XP Windows NT® 4.0 Service Pack 4 or higher

DSK Hardware installation: • • • • • • • • Shut down and power off the PC Connect the supplied USB port cable to the board Connect the other end of the cable to the USB port of PC Note: If you plan to install a Microphone, speaker, or signal generator/CRO these must be plugged in properly before you connect power to the DSK. Plug the power cable into the board Plug the other end of the power cable into a power outlet The user LEDs should flash several times to indicate board is operational When you connect your DSK through USB for the first time on a Windows loaded PC the new hardware found wizard will come up. So, Install the drivers (The CCS CD contains the require drivers for C6713 DSK). Install the CCS software for C6713 DSK.

Troubleshooting DSK Connectivity: If Code Composer Studio IDE fails to configure your port correctly, perform the following steps: • • • • • Test the USB port by running DSK Port test from the start menu Click on the icon, Diagnostic Utility placed on desktop The below Screen will appear Select Start Option Utility Program will test the board After testing Diagnostic Status you will get PASS

Maharaj Vijayaram Gajapathi Raj College of Engineering, Vizianagaram

3

Department of Electronics and Communication Engineering

Digital Signal Processing Lab

If the board fails to detect 1. Reset the kit. 2. Check whether CCS is running or not. If running, close the application and run the diagnostic utility. 3. Check the USB ports of kit and the PC. 4. If board still fails, remove the power supply and reconnect the supply.

Maharaj Vijayaram Gajapathi Raj College of Engineering, Vizianagaram

4

Toolboxes are comprehensive collections of MATLAB functions (M-files) that extend the MATLAB environment to solve particular classes of problems. The toolboxes allow us to learn and apply specialized technology. exploration and visualization • Scientific and engineering graphics • Application development. files. The MATLAB System: Development Environment: This is the set of tools and facilities that help you use MATLAB functions and files. MATLAB features a family of application-specific solutions called toolboxes. data structures. fuzzy logic. and language constructs permit users to solve and analyze difficult computational problems from science and engineering without programming in a general purpose language. The name MATLAB stands for matrix laboratory. sine. and complex arithmetic. functions. Typical uses include: • Math and computation • Algorithm development • Modeling. and the search path. and browsers for viewing help. The MATLAB Language: This is a high-level matrix/array language with control flow statements. MATLAB is an interactive system whose basic data element is an array that does not require dimensioning. control systems. cosine. to more sophisticated functions like matrix inverse. especially those with matrix and vector formulations. and programming in an easy-to-use environment where problems and solutions are expressed in familiar mathematical notation. This allows us to solve many technical computing problems. Areas in which toolboxes are available include signal processing.
Maharaj Vijayaram Gajapathi Raj College of Engineering. It integrates computation. functions. Many of these tools are graphical user interfaces.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
1. input/output. a command history. visualization. and object-oriented programming features. in a fraction of the time it would take to write a program in a scalar non-interactive language such as C or FORTRAN. fast Fourier transforms and Bessel functions. Vizianagaram
5
. simulation and prototyping • Data analysis. matrix eigenvalues. and “programming in the large” to create complete large and complex application programs. including graphical user interface building. Its wide range of commands. Mathematical Function Library: This is a vast collection of computational algorithms ranging from elementary functions like sum. It includes the MATLAB desktop and Command Window. neural networks. wavelets simulation and many others. the workspace. MATLAB
INTRODUCTION: MATLAB is a high-performance language for technical computing. communications. It allows both “programming in the small” to rapidly create quick and dirty throw-away programs.

The MATLAB Application Program Interface (API): This is a library that allows you to write C and Fortran programs that interact with MATLAB.The first time MATLAB starts.
Enter Matlab Functions
View or use previously run functions
Use tabs to go to workspace browser or current directory browser
Drag the separator bar to resize windows
Maharaj Vijayaram Gajapathi Raj College of Engineering. calling MATLAB as a computational engine. variables. animation. It include facilities for calling routines from MATLAB (dynamic linking).
View or Change current directory Click to move window outside of desktop Close window
Get help. Vizianagaram
6
. the desktop appears. and presentation graphics. and for reading and writing MAT-files. and applications associated with MATLAB. MATLAB Desktop: When we start MATLAB.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
Handle Graphics®: This is the MATLAB graphics system including high-level commands for 2-D and 3-D data visualization. image processing. containing tools (graphical user interfaces) for managing files. the desktop appears as shown below.

Comment selected lines and specify indenting style using the Text menu Find and replace strings. as well as for M-file debugging. This provides a graphical user interface for basic text editing. These toolbox functions are a specialized extension of the MATLAB computational and graphical environment.
Type functions and variables at the MATLAB MATLAB displays the
Editor/Debugger: Editor/Debugger is used to create and debug M-files. expressed mostly in Mfiles.Department of Electronics and Communication Engineering Command Window:
Digital Signal Processing Lab
Command Window is used to enter variables and run functions and M-files. that implement a variety of signal processing tasks. The
Maharaj Vijayaram Gajapathi Raj College of Engineering. Signal Processing Toolbox Central Features: The Signal Processing Toolbox functions are algorithms. from waveform generation to filter design and implementation. parametric modeling. and spectral analysis.
Set breakpoints where you want execution to pause so you can examine variables
Hold the cursor over a variable and its current value appears ( known as data tip)
Signal Processing Toolbox: The Signal Processing Toolbox is a collection of tools built on MATLAB numeric computing environment which supports a wide range of signal processing operations. Vizianagaram
7
. which are the programs to be run.

For a system with a 1000 Hz sampling frequency. back to hertz.5.
Maharaj Vijayaram Gajapathi Raj College of Engineering. This toolbox uses the convention that unit frequency is the Nyquist frequency. of the digital filter.p) returns the p-point complex frequency response. plot(t. defined as half the sampling frequency.0. multiply by half the sample frequency.200/500). fs = 10000.x). % 256-point frequency response with fs = 1000 Hz.w] = freqz(b. t = 0:1/fs:1. x = sawtooth(2*pi*50*t).a. This is obtained by the following.a.. The cutoff frequency parameter for all basic filter design functions is normalized by the Nyquist frequency. multiply by 2/fs. axis([0 0. [h. Specifically.a] = cheby1(12. To convert normalized freq.5.f] = freqz(b. 300 Hz is 300/500 = 0.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
toolbox provides functions for generating widely used periodic waveforms like sawtooth which generate a sawtooth wave with peaks at ±1 and a period of 2PI. for e.6. To convert normalized frequency to angular frequency around the unit circle.g.
freqz accepts the filter coefficient vectors b and a.1000). freqz uses an FFT-based algorithm to calculate the ztransform frequency response of a digital filter. and an integer p specifying the number of points at which complex frequency response is calculated in vector h. Vizianagaram
8
.5 seconds of a 50 Hz sawtooth wave with a sample rate of 10 kHz and to plot 0. % 12th order Chebyshev type I filter [h. Following is an example to generate 1.256. H(ejw). [b. and the actual frequency points in vector w in rad/s. Digital Domain: The command.2 seconds of the generated waveform.2 -1 1])
Frequency Response: The Signal Processing Toolbox enables us to perform frequency domain analysis of both analog and digital filters.

we need only specify the desired cutoff frequency Wn in normalized frequency (Nyquist frequency = 1 Hz). each of these functions returns a lowpass filter.[500 2500]/5000. These are useful in conjunction with the filter design functions.7].. % Highpass Chebyshev Type II [b.4 0. The filter startup transients have finite duration. appending the string 'stop' for the bandstop configuration.b.1.7]). specify Wn as a two-element vector containing the passband edge frequencies. For a highpass filter. append the string 'high' to the function's parameter list.b.8. For a bandpass or bandstop filter.a] = cheby2(6.60.'stop').Wn] = buttord([1000 2000]/5000.a] = butter(5.4 0.4080 [b. always stable and the design methods are generally linear. % Lowpass Butterworth [b. Above command gives back order and cutoff frequencies of the filter as n = 12. % Bandpass Chebyshev Type I [b.a] = butter(n. attenuation 60 dB (Rp. s.% Bandstop elliptic To design an analog filter. They can be realized efficiently in hardware.[0. ripple-1 dB.1.Rs) [n. The primary disadvantage of FIR filters is that they often require a much higher filter order than IIR filters to achieve a given level of performance.'high'). % BPF with passband 1-2 KHz and stopband 500 Hz away on either side (Wp.0.a] = cheby1(4.1951 0. perhaps for simulation. p. or FIR filters) have both advantages and disadvantages compared to IIR filters.[0.0. Vizianagaram
9
. Wn = 0. use a trailing 's' and specify cutoff frequencies in rad/s: [b.a] = ellip(3.'s').Ws) % Sampling frequency 10 KHz. bandpass.60). By default.
Maharaj Vijayaram Gajapathi Raj College of Engineering.1. or bandstop configuration using the filter design functions. Here are some example digital filters: [b. the delay of these filters is often much greater than for an equal performance IIR filter. Correspondingly.Department of Electronics and Communication Engineering FIR Filter Design:
Digital Signal Processing Lab
Digital filters with finite-duration impulse response (all-zero. Complete Classical IIR Filter Design: We can easily create a filter of any order with a lowpass. % Analog Butterworth filter Designing IIR Filters to Frequency Domain Specifications: This toolbox provides order selection functions that calculate the minimum filter order that meets a given set of requirements.Wn). An example is given below. highpass.a] = butter(5. FIR filters have exactly linear phase.4.60.4).

a simple single-pole filter (lowpass) is b = 1. the length of y is the same as the length of x.
Filtering with the filter Function: It is simple to work back to a difference equation from the z-transform relation. Maharaj Vijayaram Gajapathi Raj College of Engineering. If the first element of a is not 1. where n-1 is the filter order. This is a canonical form that has the minimum number of delay elements. filter gives as many output samples as there are input samples. For example. filter divides the coefficients by a (1) before implementing the difference equation.
A filter in this form is easy to implement with the filter function.9]. Move the denominator to the left-hand side and take the inverse ZT. that is. % Denominator Where the vectors b and a represent the coefficients of a filter in transfer function form. Vizianagaram
10
. % Numerator a = [1 -0.Department of Electronics and Communication Engineering The filter Function:
Digital Signal Processing Lab
Filter is implemented as the transposed direct-form II structure.a. Assume a(1) = 1. y = filter(b.x).

database management. the 65. However. The floating point DSPs typically use a minimum of 32 bits to store each value. Digital signal processors are microprocessors optimized for basic mathematical calculations such as additions and multiplications.296 to be exact.e.294.767.535.. loops. etc. All floating point DSPs can also handle fixed point numbers. When it comes to mathematical computations the traditional microprocessor are deficient particularly where real-time performance is required.e. In unsigned integer.967.
Maharaj Vijayaram Gajapathi Raj College of Engineering.536 levels are spread uniformly between 0 and 1 and the signed fraction format allows negative numbers. The typical applications requiring such capabilities are word processing. With unsigned fraction notation. this doesn't mean that fixed point math will be carried out as quickly as the floating point operations. although a different length can be used.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
2. The primary trade-offs between fixed and floating point DSPs are shown below. communications. the stored number can take on any integer value from 0 to 65. a necessity to implement counters. Fixed point arithmetic is much faster than floating point in general purpose computers. equally spaced between -1 and 1.. The microprocessors used in personal computers are optimized for tasks involving data movement and inequality testing. spread sheets. Digital Signal Processors
INTRODUCTION: A digital signal processor (DSP) is an integrated circuit designed for high-speed data manipulations. and is used in audio. and signals coming from the ADC and going to the DAC. Vizianagaram
11
. it depends on the internal architecture. 4.536 possible bit patterns can represent a number. signed integer uses two's complement to include negative numbers from -32. 232 i. There are four common ways that these 216 i. and other data-acquisition and data-control applications. 65. This results in many more bit patterns than for fixed point. image manipulation. fixed point and floating point which refer to the format used to store and manipulate numbers within the devices. Fixed point DSPs usually represent each number with a minimum of 16 bits. Fixed versus Floating Point: Digital Signal Processing can be divided into two categories.768 to 32.

digital subscriber loop systems. They have been used in toys. In the past. image recognition. The usual way of specifying the fastness of a DSP is: fixed point systems are often quoted in MIPS (million integer operations per second). including two multipliers and six arithmetic logic units (ALUs). usually assembly or C. which enables a number of them to be put together to form a parallel-processing cluster. Vizianagaram
12
. C5x. hi-fi systems. cable modems. bar-code readers. an advanced very long instruction word (VLIW) architecture developed by Texas Instruments. imaging. telecom routing. Because of the reasonable cost and floating-point performance. In traditional applications. hard disk drives. while programs written in C are easier to develop and maintain. and active car suspensions. such as programs run on PCs and mainframes. it is restricted to short subroutines that must run with the utmost speed. these are suitable for many applications. Eight functional units. provide 1600 MIPS of costeffective performance. including wireless base stations. They have an optimized on-chip communication channel. pooled modems. If assembly is used at all. motor control. These include almost any filters. C6x: The C6x devices feature VelociTI ™. Now they are in many mass-market consumer products that are continuously entering new market segments. Programs written in assembly can execute faster. C2x. multifunction applications. voice-mail. All have modified Harvard architectures. C3x: The width of the data bus in the C3x series is 32 bits. C54x: The width of the data bus on these devices is 16 bits. floating point devices can be specified in MFLOPS (million floating point operations per second). C is almost always the first choice. The C4x devices have a 32-bit data bus and are floating-point. remote-access servers. C1x. or scientific processing. The Texas Instruments TMS320 family of DSP devices and their typical applications are mentioned below. modems. 3D graphics.
Maharaj Vijayaram Gajapathi Raj College of Engineering. cellular phones. How fast are DSPs? The primary reason for using a DSP instead of a traditional microprocessor is speed: the ability to move samples into the device and carry out the needed mathematical operations. TMS320 Family: The Texas Instruments TMS320 family of DSP devices covers a wide range. The C4x range devices have been used in virtual reality.Department of Electronics and Communication Engineering C versus Assembly:
Digital Signal Processing Lab
DSPs are programmed in the same languages as other scientific and engineering applications. and multi-channel telephone systems. Likewise. C2xx. analyzers. C4x: This range is designed for parallel processing. The C6x DSPs are optimized for multi-channel. and output the processed data. and parallel-processing systems. from a 16-bit fixed-point device to a single-chip parallel-processor device. DSPs were used only in specialized applications.

having few restrictions on how or when instructions are fetched. In 1982. and C54x fixed-point DSPs. The TMS320C62x™ DSP generation and the TMS320C64x™ DSP generation comprise fixed-point devices and the TMS320C67x™ DSP generation comprises floating point devices in the C6000 DSP platform. TMS320 DSPs have an architecture designed specifically for real-time signal processing.Department of Electronics and Communication Engineering Introduction to TMS320C6713:
Digital Signal Processing Lab
The TMS320C6000™ digital signal processor (DSP) platform is part of the TMS320™ DSP family. Parallelism is the key to extremely high performance. The VelociTI architecture of the C6000 platform of devices makes them the first off-the-shelf DSPs to use advanced VLIW to achieve high performance through increased instruction-level parallelism. floating-point. VelociTI is a highly deterministic architecture.
Automotive Adaptive ride control Cellular telephones Digital radios Navigation Vibration analysis Consumer Digital radios/TVs Music synthesizers Pagers Radar detectors Solid-state answering machines Control Disk drive control Laser printer control Motor control Servo control
Maharaj Vijayaram Gajapathi Raj College of Engineering. C3x and C4x floating-point DSPs. C2x. C2xx. Vizianagaram
13
. or stored. advanced VLIW (very long instruction word) architecture. VelociTI’s advanced features include: • • • • Instruction packing: reduced code size All instructions can operate conditionally: flexibility of code Variable-width instructions: flexibility of data types Fully pipelined branches: zero-overhead branching. Today. taking these DSPs well beyond the performance capabilities of traditional superscalar designs. C8x multiprocessor DSPs and TMS320C6x™ DSPs. A traditional VLIW architecture consists of multiple execution units running in parallel. All three uses the VelociTI™ architecture. executed.
TMS320 Family Overview The TMS320™ DSP family consists of fixed-point. a high-performance. the TMS320 family consists of many generations: C1x. Typical Applications for the TMS320 Family The TMS320 DSPs offer adaptable approaches to traditional signal-processing problems and support complex applications that often require multiple operations to be performed simultaneously. Texas Instruments (TI) introduced the TMS32010 — the first fixed-point DSP in the TMS320 family. C5x. and multiprocessor digital signal processors (DSPs). performing multiple instructions during a single clock cycle.

25 packet switching PDA Speaker phones Spread spectrum Video conferencing
Digital Signal Processing Lab
Industrial Numeric control Power-line monitoring Robotics Security access Military Image processing Missile guidance Navigation Radar processing Radio frequency modems Secure communications GPS Voice/Speech Speaker verification Speech enhancement Speech recognition Speech synthesis Speech coding Text-to-speech Voice mail
Typical Applications of TMS320 DSPs Features and Options of TMS320C67X: The C6000 devices execute up to eight 32-bit instructions per cycle.
Maharaj Vijayaram Gajapathi Raj College of Engineering. including an efficient C compiler. Vizianagaram
14
.to 56 600-bps modems Adaptive equalizers ADPCM transcoders Echo cancellation Channel multiplexing Data encryption Digital PBXs Digital speech interpolation DTMF encoding/decoding Graphics/Imaging 3-D transformations Animation/digital maps Homomorphic processing Image compression/transmission Image enhancement Medical Diagnostic equipment Fetal monitoring Hearing aids Patient monitoring Prosthetics Ultra sound equipment Sonar processing Faxing Future terminals Line repeaters X. and a Windows™ based debugger interface for visibility into source code execution characteristics. The C6000 generation has a complete set of optimized development tools. an assembly optimizer for simplified assembly-language programming and scheduling.Department of Electronics and Communication Engineering
General-Purpose Adaptive filtering Convolution Correlation Digital filtering Fast Fourier transforms Instrumentation Digital filtering Function generation Pattern matching Phase-locked loops Seismic processing Spectrum analysis Transient analysis Telecommunications 1200. The C67x device’s core CPU consists of 32 general-purpose registers of 32-bit word length and eight functional units.

The DSK is USB port interfaced platform that allows efficiently developing and testing applications for the C6713. MSB. Connectors on the C6713 DSK provide DSP external memory interface (EMIF) and peripheral signals that enable its functionality to be expanded with custom or third party daughter boards. The C6713 DSK includes a stereo codec. This analog interface circuit (AIC) has the following characteristics: High-Performance Stereo Codec • 90-dB SNR Multibit Sigma-Delta ADC (A-weighted at 48 kHz) • 100-dB SNR Multibit Sigma-Delta DAC (A-weighted at 48 kHz) • 8-kHz – 96-kHz Sampling-Frequency Support Software Control Via TI McBSP-Compatible Multiprotocol Serial Port • I2C-Compatible and SPI-Compatible Serial-Port Protocols • Glueless Interface to TI McBSPs Audio-Data Input/Output Via TI McBSP-Compatible Programmable Audio Interface • I2S-Compatible Interface Requiring Only One McBSP for both ADC and DAC • Standard I 2 S. an I/O port and Embedded JTAG emulation support. an analog interface circuit for Data conversion (AIC). Vizianagaram 15
. or LSB Justified-Data Transfers • 16/20/24/32-Bit Word Lengths Maharaj Vijayaram Gajapathi Raj College of Engineering.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
3. SDRAM and ROM. The high-performance board features the TMS320C6713 floating-point DSP capable of performing 1350 million floating-point operations per second (MFLOPS). TMS320C6713 DSK
Package Contents: The C6713™ DSK builds on TI's DSP Starter Kit (DSK) development boards.1 DSK Accessories The C6713 DSK has a TMS320C6713 DSP onboard that allows full-speed verification of code with CCS.
Fig: 3. The C6713 DSK provides a USB Interface.

Vizianagaram 16
. An on-board AIC23 codec allows the DSP to transmit and receive analog signals.Department of Electronics and Communication Engineering Features of C6713 DSK:
Digital Signal Processing Lab
The 6713 DSK enables us to evaluate and develop applications for TI C67XX DSP family.3 TMS320C6713 DSK Maharaj Vijayaram Gajapathi Raj College of Engineering. The codec can select the microphone or the line i/p as the active i/p. accessed by reading and writing to the CPLD registers.
Fig 3. McBSP0 is used for the codec control interface and McBSP1 is used for data. The DSK includes 4 LEDs and 4 DIP switches to provide the user with interactive feedback. Code Composer Studio communicates with the DSK through an embedded JTAG emulator with a USB host interface.2 TMS320C6713 DSK Overview Block Diagram
Fig 3. The analog o/p is driven to both line out and headphone connectors. line output and headphone output. line input. A programmable logic device. The CPLD has a register based user interface that lets the user configure the board by reading and writing to the CPLD registers. Analog audio I/O is done through four 3. The DSK can also be used with an external emulator through the external JTAG connector.5mm audio jacks that correspond to microphone input. CPLD is used to implement glue logic that ties the board components together. McBSP1 can be re-routed to the expansion connectors in software.

Department of Electronics and Communication Engineering Introduction to CCS
Digital Signal Processing Lab
Code Composer Studio is the DSP industry's first fully integrated development environment (IDE) with DSP-specific functionality.
Maharaj Vijayaram Gajapathi Raj College of Engineering. profile and manage projects from a single unified environment. Code Composer Studio lets us edit. and graphical algorithm scope probes Advanced graphical signal analysis Interactive profiling Automated testing and customization via scripting Visual project management system Compile in the background while editing and debugging Multi-processor debugging Help on the target DSP
Documents for Reference: spru509 spru189 spru190 slws106d spru402 sprs186j Code Composer Studio getting started guide TMS320C6000 CPU & Instruction set guide TMS320C6000 Peripherals guide codec(TLV320AIC23) Data Manual Programmer’s Reference Guide TMS320C6713 DSP
Softcopy of documents are available at: C:\CCStudio\docs\pdf. debug. Probe Points. Code Composer Studio features: • • • • • • • • • • • • IDE Debug IDE Advanced watch windows Integrated editor File I/O. injection/extraction of data signals via file I/O. Other unique features include graphical signal analysis. Vizianagaram
17
. build. automated testing and customization via a Cinterpretive scripting language and much more. multi-processor debugging.

Eg: Vectors.
Maharaj Vijayaram Gajapathi Raj College of Engineering. Eg: demo. Vizianagaram
18
. Create New Project Project New (File Name.pjt)
Digital Signal Processing Lab
2.Department of Electronics and Communication Engineering Procedure to work on CCS: 1. pjt .c). Create a Source file File New Type the code (Save & give file name.

lib) Note: Select Object & Library in (*. Add library file.lib Path: C:\CCStudio\c6000\cgtools\lib\rts6700.Department of Electronics and Communication Engineering 3.l) in Files of type.c
4.*. rts.o. Vizianagaram
19
.lib file & Hello.cmd: Project Add files to Project rts6700.
Maharaj Vijayaram Gajapathi Raj College of Engineering. Add Source files to Project Project Add files to Project
Digital Signal Processing Lab
demo.

Add Hello.cmd CMD file is Common for all non real time programs.cmd: Project Add files to Project hello. Path:C:\CCstudio\tutorial\dsk6713\hello1\hello. Compile Project Compile
Maharaj Vijayaram Gajapathi Raj College of Engineering.cmd Note: Select Linker Command file (*. Vizianagaram
20
.Department of Electronics and Communication Engineering 1.cmd) in Files of type
Digital Signal Processing Lab
2.

Load program File Load program
Vectors.
7. Vizianagaram
21
.out).(Eg. Vectors. Rebuild: Project rebuild. Out
Maharaj Vijayaram Gajapathi Raj College of Engineering.out executable file.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
6. which will create the final .

7. icon from tool bar menu. } Single Step Debugging: 1. Execution should halt at break point. 5. Now press F10. Repeat steps 2 to 6. Vizianagaram
22
.
Maharaj Vijayaram Gajapathi Raj College of Engineering. Similarly go to view & select CPU registers to view the changes happening in CPU registers.Department of Electronics and Communication Engineering 8. See the changes happening in the watch window. out file onto the target.) 2. i++.h> main() { int i=0. 3. To set break point select Load the Vectors. Execute project Debug Run
Digital Signal Processing Lab
Example program: # include<stdio. of your project. a.(eg: set a break point on to first line int i=0. Debug Run. Go to view and select Watch window. Keep the cursor on the line from where you want to start single step debugging. 4. printf("%d".i). 8. 6.

cdb” and add it to the current project. 7. You can also vary the sampling frequency using the DSK6713_AIC23_setFreq function in the “codec. View the contents of the generated file “YYYYcfg_c.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
Configuration of CODEC (TLV320AIC23) using Board Support Library: The prerequisites to configure the codec TLV320AIC23 through program using the board support library (BSL) are TMS320C6713 DSP Starter Kit. 10. Audio Source. 3.c” file to the current project which has the main function and calls all the other necessary routines. 5. Build. You can notice the input signal of 500 Hz. Load and Run the program.lib” to the current project 11. CRO. Switch on the Signal Generator with a sine wave of frequency 500 Hz. Speakers and Signal Generator. Vizianagaram
23
. From the File Menu new DSP/BIOS Configuration select “dsk6713. appearing on the CRO verifying the codec configuration.cdb” and save it as “YYYY. Create a new project with name XXXX. 4. Now Switch on the DSK and Bring Up Code Composer Studio on the PC.
Maharaj Vijayaram Gajapathi Raj College of Engineering. 2. 12. Steps for Configuring CODEC (TLV320AIC23) Connect CRO to the Socket Provided for LINE OUT.c” and copy the include header file ‘YYYYcfg. Add the given “codec. 1. PC with Code Composer Studio. 6. You can also pass an audio input and hear the output signal through the speakers. 13. 14.cmd” file to the current project. Connect a Signal Generator to the LINE IN Socket. Add the library file “dsk6713bsl.lib” from the location “C:\CCStudio\c6000\dsk6713\lib\dsk6713bsl.c” file and repeat the above steps. 9.c” file.h’ to the “codec. Add the generated “YYYYcfg. 8.pjt.

The devices also have varying sizes of data memory. University prescribed experiments
1. and interrupt logic. The program fetch. power-down logic. can be used as a program cache. Control logic and Test. Control registers. TMS320C67XX Block Diagram Central Processing Unit (CPU): The TMS320C67X CPU showed above contains Program fetch unit. each with four functional units. instruction dispatch and instruction decode units can deliver upto eight 32-bit instructions to the functional units every CPU clock cycle.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
4. thirty two 32-bit registers. Peripherals such as a direct memory access (DMA) controller. which.
Maharaj Vijayaram Gajapathi Raj College of Engineering. on some devices. Vizianagaram
24
.
Fig. TMS320C67XX Architecture
Aim: To study the architectural details of floating point Digital Signal Processor TMS320C6713 and instruction set. while peripherals such as serial ports and host ports are on only certain devices. Two data paths. emulation. Architecture: The block diagram for TMS320C67xx DSP is shown the figure below. and external memory interface (EMIF) usually come with the CPU. The C6000 devices come with program memory. Instruction decode unit.

these spaces are unified on most devices to a single memory space via the external memory interface (EMIF). send synchronization events to the DMA/EDMA controller and power-down logic allows reduced clocking to reduce power consumption.S. and . The expansion provides two distinct areas of functionality (host port and I/O port) which can co-exist in a system.
Maharaj Vijayaram Gajapathi Raj College of Engineering. McBSP (multichannel buffered serial port) is based on the standard serial port interface found on the TMS320C2000 and C5000 platform devices. E1. Program cache and 2-level caches. The host and the CPU can exchange information via internal or external memory. count events. The DMA controller has four programmable channels and a fifth auxiliary channel. interrupt the CPU. Internal (onchip) memory is organized in separate data and program spaces. A control register file provides the means to configure and control various processor operations. Expansion bus is a replacement for the HPI. with an instruction-fetch width of 256 bits. EDMA Controller performs the same functions as the DMA controller. In addition. The TMS320C67x have a single internal port to access internal program memory. The host device has ease of access because it is the master of the interface. as well as a RAM space to hold multiple configurations for future transfers. 32-bit EMIF supports SDRAM. the port can buffer serial samples in memory automatically with the aid of the DMA/EDNA controller. Timers in the C6000 devices are two 32-bit general-purpose timers used for time events. SCSA. SRAM and other asynchronous memories for a broad range of external memory requirements and maximum system performance. . generate pulses. HPI is a parallel port through which a host processor can directly access the CPU’s memory space. A&B each of which contains four functional units . The EDMA has 16 programmable channels.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
The processing of instructions occurs in each of the two data paths. and MVIP networking standards. When off-chip memory is used. Internal Memory: The TMS320C67x have a 32-bit. Vizianagaram
25
. as well as an expansion of the EMIF. In addition. SBSRAM.D and sixteen 32-bit general-purpose registers for TMS320C67xx. Large on-chip RAM up to 7Mb. Memory and Peripheral Options: A variety of memory and peripheral options are available for the C6000 platform.L. . The TMS320C67xx have two 32-bit internal ports to access internal data memory. DMA Controller transfers data between address ranges in the memory map without intervention by the CPU. byte-addressable address space. It also has multichannel capability compatible with the T1. the host has direct access to memory-mapped peripherals.M.

such as 40-bit long and 64-bit float quantities. The C67x general-purpose register files support data ranging in size from packed 16-bit data through 40-bit fixed-point and 64-bit floating point data. are stored in register pairs.D2) 3. . Two data address paths (DA1 and DA2) 6.L2.S2. Maharaj Vijayaram Gajapathi Raj College of Engineering. and . .D1. . Two store-to-memory data paths (ST1 and ST2) 5. Two general-purpose register files (A and B) 2.M2. . A0-A15 for file A and B0-B15 for file B. or condition registers. The general-purpose registers can be used for data. Vizianagaram 26
. TMS320C67xx CPU Data Path General-Purpose Register Files: There are two general-purpose register files A & B in the C6000 data paths. .L1. For the C67x™ DSPs. Eight functional units (.Department of Electronics and Communication Engineering Paths and Control: The components of the data path for TMS320C67X™ are: 1. Values larger than 32 bits. each of these files contains 16 32-bit registers.M1. Two register file data cross paths (1X and 2X).
Digital Signal Processing Lab
Fig.S1. . data address pointers. Two load-from-memory data paths (LD1 and LD2) 4.

Register A A1:A0 A3:A2 A5:A4 A7:A6 A9:A8 A11:A10 A13:A12 A15:A14 Files B B1:B0 B3:B2 B5:B4 B7:B6 B9:B8 B11:B10 B13:B12 B15:B14
Fig.S1. Vizianagaram 27
. These cross paths allow functional units from one data path to access a 32-bit operand from the opposite side register file. The . Because each unit has its own 32-bit write port. All units ending in 1 (for example. and all units ending in 2 write to register file B. .L1. and some support long (40bit) and double word (64-bit) operands.L1. Functional Units: The eight functional units in the C6000 data paths can be divided into two groups of four.D1. when performing 32-bit operations all eight units can be used in parallel every cycle. and .L1 and . . In case of . .L2. Register storage scheme for 40-bit long data. There are 16 valid register pairs for 40-bit and 64-bit data in the C67x cores In assembly language syntax.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
In these the 32 LSBs of data are placed in an even-numbered register and the remaining 8 or 32 MSBs in the next upper register (which is always an odd-numbered register). . or four 16-bit values in a 64-bit register pair. . .S2 units’ src2 units are selectable between the cross path and the same side register file.S1 and . Packed data types store either four 8-bit values or two 16-bit values in a single 32-bit register. a colon between the register names denotes the register pairs. Maharaj Vijayaram Gajapathi Raj College of Engineering.L2. Each functional unit has its own 32-bit write port into a general-purpose register file. and the odd-numbered register is specified first.S2) have an extra 8-bit-wide port for 40-bit long writes. Register File Cross Paths: Each functional unit reads directly from and writes directly to the register file within its own data path. That is. . Each functional unit has two 32-bit read ports for source operands src1 and src2. The register files are connected to the opposite-side register file’s functional units via 1X and 2X cross paths.M1. as well as an 8-bit input for 40bit long reads. both src1 and src2 inputs are also selectable between the cross path and the same-side register file.M1 units write to register file A and the . .M2. and 2X cross path allows the functional units of data path B to read their source from register file A. via a cross path.L2.D2. On C67X 6 of the 8 functional units have access to register file on the opposite side.M2 units write to register file B.S1.L1) write to register file A. . and . the . each functional unit in one data path is almost identical to the corresponding unit in the other data path.S2. Most data lines in the CPU support 32-bit operands. The 1X cross path allows the functional units of data path A to read their source from register file B. Four units (. and .

Load. TMS320C64x™. T1 consists of the DA1 address path and the LD1 and ST1 data paths. However. All of the instructions valid for the C62x™ are also valid for the C64x™ and C67x™. because the C67x is a floating-point device. Data Address Paths: The data address paths DA1 and DA2 are each connected to . and the TMS320C67x™ share an instruction set. A 2-bit field for each register selects the address modification mode: linear (the default) or circular mode. can get an operand from the opposite register file. For side A.D units in both data paths. for storing register values to memory from each register file. the AMR specifies the addressing mode. In addition. LD2a is the load path for the 32 LSBs and LD2b is the load path for the 32 MSBs.D Unit Addressing Modes: ADD STB (15-bit offset)‡ ADDAB STH (15-bit offset)‡ ADDAH STW (15-bit offset)‡ ADDAW SUB LDB SUBAB LDBU SUBAH
Maharaj Vijayaram Gajapathi Raj College of Engineering. Memory.S SET SHL SHR SHRU SSHL SUB . There are also two 32-bit paths. and Store Paths: The C67x has a second 32-bit load path for both register files A and B. the field also specifies which BK (block size) field to use for a circular buffer. For side B. LD1a is the load path for the 32 LSBs and LD1b is the load path for the 32 MSBs. B4–B7) that can perform linear or circular addressing. or a total of two cross path source reads per cycle. Data addresses generated by any one path can access data to or from any register. there are some instructions that are unique to it and do not execute on the fixed-point device. Mapping Between Instructions and Functional Units: Instruction to Functional Unit Mapping
.M Unit MPY MPYU MPYUS MPYSU MPYH MPYHU ADD ADDK ADD2 AND B disp B IRP† . Addressing Mode Register (AMR): For each of the eight registers (A4–A7. In the C67x only one functional unit per data path. 1X and 2X exist in the C6000 architecture. the buffer must be aligned on a byte boundary equal to the block size Legend: R Readable by the MVC instruction W Writeable by the MVC instruction +0 Value is zero after reset TMS320C67x Fixed-Point Instruction Set: The TMS320C62x™. The DA1 and DA2 resources and their associated data paths are specified as T1 and T2 respectively. ST1 and ST2. Vizianagaram
28
. This allows the LDDW instruction to simultaneously load two 32-bit values into register file A and two 32-bit values into register file B. Thus the limit is one source read from each data path’s opposite register file per cycle. per execute packet. With circular addressing.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
Only two cross paths.L Unit ABS ADD ADDU AND CMPEQ CMPGT .

Department of Electronics and Communication Engineering
CMPGTU CMPLT CMPLTU LMBD MV NEG NORM NOT OR SADD SAT SSUB SUB SUBU SUBC XOR ZERO MPYHUS MPYHSU MPYHL MPYHLU MPYHULS MPYHSLU MPYLH MPYLHU MPYLUHS MPYLSHU SMPY SMPYHL SMPYLH SMPYH B NRP† SUBU LDH
Digital Signal Processing Lab
SUBAW ZERO
B reg SUB2 LDHU CLR XOR LDW EXT ZERO LDB (15-bit offset)‡ EXTU LDBU (15-bit offset)‡ MV LDH (15-bit offset)‡ MVC† LDHU (15-bit offset)‡ MVK LDW (15-bit offset)‡ MVKH MV MVKLH STB NEG NOT OR STH STW
† S2 only ‡ D2 only INSTRUCTION SET:
Maharaj Vijayaram Gajapathi Raj College of Engineering. Vizianagaram
29
.

Vizianagaram
30
.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
Maharaj Vijayaram Gajapathi Raj College of Engineering.

Department of Electronics and Communication Engineering
Digital Signal Processing Lab
Maharaj Vijayaram Gajapathi Raj College of Engineering. Vizianagaram
31
.

Vizianagaram
32
.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
Maharaj Vijayaram Gajapathi Raj College of Engineering.

Vizianagaram
33
.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
Maharaj Vijayaram Gajapathi Raj College of Engineering.

Department of Electronics and Communication Engineering
Digital Signal Processing Lab
Maharaj Vijayaram Gajapathi Raj College of Engineering. Vizianagaram
34
.

Vizianagaram
35
.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
Maharaj Vijayaram Gajapathi Raj College of Engineering.

Vizianagaram
36
.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
Maharaj Vijayaram Gajapathi Raj College of Engineering.

Department of Electronics and Communication Engineering

Digital Signal Processing Lab

Maharaj Vijayaram Gajapathi Raj College of Engineering, Vizianagaram

37

Department of Electronics and Communication Engineering

Digital Signal Processing Lab

2. Linear convolution

Aim: To compute the response of a discrete a LTI system with input sequence x[n] and impulse response h[n] by using linear convolution. Theory: Linear Convolution involves the operations, 1.Folding, 2.Multiplication, 3. Addition and 4. Shifting. These operations are represented by a mathematical expression,

y[n] =

k = −∞

∑ x[k ]h[n − k ]

∞

**x[k]= Input signal Samples h[k] = Impulse response co-efficient. y[n]= Convolution output.
**

Algorithm:

Step 1: Enter the sequence x[n]. Step 2: Find the length of sequence,N1. Step 3: Enter another sequence h[n]. Step 4: Find the length of sequence N2. Step 5: Find N=N1+N2-1. Step 6: Append N2-1 zeros to x[n]. Step 7: Append N1-1 zeros to h[n]. Step 8: Fold the h[n] and shift by delay l. Step 9: Multiply h[n-l] by x[n] and sum all the values to obtain y[n] Step 10: Repeat the steps 8& 9 for values of l=N1+N2-1. Step 11: Plot the output y[n].

Program:

x=input('Enter any sequence X:') h=input('Enter any sequence H:') n1=length(x) n2=length(h) j=0:1:n1-1; l=0:1:n2-1; p=n1+n2-1 x=[x zeros(1,p-n1)] h=[h zeros(1,p-n2)] for t=1:p sum=0 for k=1:t

Maharaj Vijayaram Gajapathi Raj College of Engineering, Vizianagaram

38

Department of Electronics and Communication Engineering

Digital Signal Processing Lab

%if((t-k+1)>0) sum=sum+[x(k)*h(t-k+1)] %end end y(t)=sum end subplot(311) stem(x) axis([0 6 0 5]) xlabel('n'),ylabel('x(n)') subplot(312) stem(h) axis([0 6 0 5]) xlabel('n'),ylabel('h(n)') subplot(313) stem(y) axis([0 10 0 10]) xlabel('n'),ylabel('y(n)') Inputs: Enter any sequence X:[1 2 3 4] Enter any sequence H:[4 3 2 1]

Output: y = 4 11 20 30 20 11

4

Maharaj Vijayaram Gajapathi Raj College of Engineering, Vizianagaram

39

Department of Electronics and Communication Engineering

Digital Signal Processing Lab

3. Circular Convolution

Aim: To compute circular convolution of the two input sequences x[n] and h[n]. Theory: The circular convolution of two sequences is given as

N −1

**y (n ) = ∑ x(m ) h((n − m )) N Where h((n − m ))N is a circular shift of h(n).
**

Algorithm: Step 1: Enter the sequence x[n]. Step 2: Find the length of sequence (N1). Step 3: Enter another sequence h[n]. Step 4: Find the length of sequence (N2). Step 5: Find N = maximum of N1 and N2. Step 6: if N2>N1, append N2-N1 zeros to x[n]. Step 7: if N1>N2, append N1-N2 zeros to h[n]. Step 8: Fold h[n] and apply circular shift by a number l. Step 9: Multiply h[n-l] by x[n] and sum all the values to obtain y[n] Step 10: Repeat the steps 8 & 9 for values of l=N1+N2-1. Step 11: Plot the output y[n]. C Program:

m =0

#include<stdio.h> main() { int lenx, lenh, i, j, p, t, k, sum; int x[50], h[50], y[50]; printf("enter the length of sequence X:"); scanf("%d", &lenx); printf("enter the length of sequence h:"); scanf("%d",&lenh); for(i=0;i<lenx;i++) { printf("x[%d]=",i); scanf("%d",&x[i]); } for(i=0;i<lenh;i++) { printf("h[%d]=",i); scanf("%d",&h[i]); } if(lenx>lenh) { P=lenx; for(i=1;i<=(p-lenh);i++)

Maharaj Vijayaram Gajapathi Raj College of Engineering, Vizianagaram

40

i. for(i=0. for(i=1.i. } else { P=lenh. i.t<p. for(k=0. printf("\n"). } for(i=0.x[i]). for(i=0. sum=sum+(x[k]*h[z]). printf("\n").h[i]).i<p.i++) printf("\n y[%d]=%d".i++) printf("\n h[%d]=%d".i++) printf("\nx[%d]=%d". Vizianagaram
41
.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
h[lenh-1+i]=0. } for(t=0.i<p. }
Input:
Enter The Length Of Sequence X: 4 Enter The Length Of Sequence H: 4 Enter The Sequence X: X[0] = 1 X[1] = 1 X[2] = 1 X[3] = 2 Enter The Sequence H: H[0] = 2 H[1] = 1 H[2] = 3 H[3] = 2
Output: Y[0] = 9 Y[1] = 11 Y[2] = 10 Y[3] = 10
Maharaj Vijayaram Gajapathi Raj College of Engineering.t++) { sum = 0. } y[t]=sum.K<t. if(z>=p) z=z-p. y[i]).k++) { z=p+t-k.i++) x[lenx-1+i]=0.i<=(p-lenx).i<p. printf("\n").

Wc=input('Enter cutoff freq in rad/sec: ').5 cos 2π n/(N-1) for |n| ≤ (N-1)/2 = 0 for |n| > (N-1)/2
MATLAB program:
N=input('Enter the order: '). w(n) = 1 |n| ≤ (N-1)/2 = 0 for |n| > (N-1)/2 For triangular or Bartlett window. w(n) =1 – 2 |n| / (N – 1) for |n| ≤ (N-1)/2 = 0 for |n| > (N-1)/2 For Hanning window. w(n) = 0. end end
Maharaj Vijayaram Gajapathi Raj College of Engineering. Vizianagaram
42
. filtyp=input('Enter 1/2 for LP/HP: ').Department of Electronics and Communication Engineering
Digital Signal Processing Lab
4.5 + 0. Theory: The design of FIR filter using windowing method involves finding:
h(n) = hd(n)w(n) for all |n| ≤ (N-1)/2 = 0 for |n| > (N-1)/2
1 H (e jw )e jwn dw 2π −∫ π w(n) is a weighing sequence or window and it is defined as
π
where hd(n) is obtained as hd (n ) =
w(n) = w(-n) ≠ 0 for |n| ≤ (N-1)/2 = 0 for |n| > (N-1)/2 For rectangular window. a=(N-1)/2. switch(filtyp) case 1 for n=1:N if((n-1)==a) hd(n)=Wc/pi. else hd(n)=(sin(Wc*((n-1)-a)))/(pi*((n-1)-a)). Design of FIR Filter
Aim: To design coefficients of a low pass or high pass FIR filter using windowing technique.

h(n)=hd(n)*W(n).Department of Electronics and Communication Engineering
Digital Signal Processing Lab
case 2 for n=1:N if((n-1)==a) hd(n)=1-Wc/pi. for n=1:N.2 or 3 for Rec/Triang/Kaiser: ').0*abs(n-1-(N-1)/2. for n=1:N. end disp('The FIR filter coefficents are') disp(h)
Result:
Enter the order: 5 Enter cutoff freq in rad/sec: pi/4 Enter 1/2 for LP/HP: 2 Enter 1. end case 2 disp('You have selected Triangular Window '). W(n)=1. Vizianagaram
43
. W(n)=1.1125 0
Maharaj Vijayaram Gajapathi Raj College of Engineering. end end end sel=input('Enter 1.2 or 3 for Rec/Triang/Kaiser: 2 You have selected Triangular Window The FIR filter coefficents are 0 -0. end for n=1:N.7500 -0.0)/(N-1)). end case 3 disp('You have selected Kaiser Window '). switch(sel) case 1 disp('You have selected Rect Window '). else hd(n)=(sin(pi*(n-a))-sin(Wc*((n-1)-a)))/(pi*((n-1)-a)).1125 0. W=kaiser(N).0-(2.

Equipment needed:
1. (refer the topic: Configuration of 6713Codec using BSL) Step 2 .Perform filter operation using above said difference equation and store filter Output at a memory location . cf=[2500/12000].24000 order = 2. 3. Step 1 .cf). Step 3 .Go to step 3. These coefficients are calculated using MATLAB.Output the value to codec (left channel and right channel) and view the output at Oscilloscope. Step 6 . Oscilloscope and Function generator. Since Codec is stereo .a2 are feed forward and feedback word coefficients respectively [assume 2nd order of filter].Take sampled data from codec while input is fed to DSP kit from the signal generator. Store sampled data at a memory location Step 4 .Initialize the McBSP.Initialize the discrete time system.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
5. the DSP board and the on board codec. specify the initial conditions. a0 . take average of input data read from left and right channel . A direct form I implementation approach is taken.
ALGORITHM:
The Butterworth bandpass IIR filter is realized by implementing the difference equation: y[n] = b0x[n] + b1x[n-1]+b2x[n-2]-a1y[n-1]-a2y[n-2] where b0 – b2. that is.den_bw1]=butter(order.
MATLAB program to generate filter coefficients:
% IIR Low pass Butterworth filter % sampling rate . Vizianagaram
44
. TMS320C6713 DSP Starter Kit (DSK).2500 [num_bw1. PC 2. Real Time Implementation of IIR Filter
Aim: To design and implement a Digital IIR Filter & observe its frequency response.
Maharaj Vijayaram Gajapathi Raj College of Engineering. % cutoff frequency . Generally zero initial conditions are assumed. Step 5 .

465153 15241 0.y[-1]a1 .den_bw1]=butter(order.y[-2]a2
Write ‘output’ to analog i/o.
Do y[-3] = y[-2].620204 10161[A1/2] 0.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
Start
Flow Chart: Initialize the DSP Board
Set initial conditions of discrete time system by making x[0]-x[2] and y[0]y[2] equal to zeros and a0-a2.465153 15241 1.398152 2366 2366[B1/2] 2366 32767 -18179[A1/2] 13046 Fc=800Hz Floating Fixed Point Point Values(Q15) Values 0.000000 32767 -1.743655 24367 Fc=8000Hz Floating Fixed Point Point Values(Q15) Values 0.072231 1.009526 312 0.2500 [num_bw1. x[-3] = x[-2].24000 order = 2.b0-b2 with MATLAB filter coefficients
Take a new input and store it in x[0]. cf=[2500/12000].
output = x[0]b0+x[-1]b1+ x[-2]b2 . when asserted proceed.
MATLAB code to get filter coefficients:
Stop
% IIR Low pass Butterworth filter % sampling rate .240408 7877
Maharaj Vijayaram Gajapathi Raj College of Engineering. % cutoff frequency .cf). Vizianagaram
45
.072231 0.y[-2]=y[-1] and Y[-1] = output .109229 0.019052 312[B1/2] 0.000000 32767 0.930306 15241[B1/2] 0.144462 0. -27943[A1/2] 0. x[-2]=x[-1] x[-1]=x[0] Poll for ready bit Poll the ready bit. IIR_BUTTERWORTH_LP FILTER CO-EFFICIENTS:
Fc=2500Hz Floating Point Fixed Point Values Values(Q15) B0 B1 B2 A0 A1 A2 0.009526 312 1.705552.000000 -1.

int l_input. /* Read a sample to the right channel */ while (!DSK6713_AIC23_read(hCodec. while(1) { /* Read a sample to the left channel */ while (!DSK6713_AIC23_read(hCodec.h" #include "dsk6713. /* Send a sample to the right channel */ while (!DSK6713_AIC23_write(hCodec. &r_input)).21137 /*HP 2500 */ } .l_input). } DSK6713_AIC23_closeCodec(hCodec). hCodec = DSK6713_AIC23_openCodec(0. r_output)). must be called first */ DSK6713_init(). /* 4 DSK6713_AIC23_ANAPATH Analog audio path control */ \ 0x0000.2767. /* Close the codec */ }
Maharaj Vijayaram Gajapathi Raj College of Engineering.Main code routine.h" #include "dsk6713_aic23. r_output. &l_input)). l_output.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
Note: Floating Point Values are multiplied with 32767(215) to get Fixed Point Values. r_input. /* 5 DSK6713_AIC23_DIGPATH Digital audio path control */ \ 0x0000.-12730. Vizianagaram
46
. /* 8 DSK6713_AIC23_SAMPLERATE Sample rate control */ \ 0x0001 /* 9 DSK6713_AIC23_DIGACT Digital interface activation */ \ }. /* Send a sample to the left channel */ while (!DSK6713_AIC23_write(hCodec. r_output=l_output. /* Codec configuration settings */ DSK6713_AIC23_Config config = { \ 0x0017. /* Start the codec */ DSK6713_AIC23_setFreq(hCodec. &config). /* 7 DSK6713_AIC23_DIGIF Digital audio interface format */ \ 0x0081. /* 0 DSK6713_AIC23_LEFTINVOL Left line input channel volume */ \ 0x0017. initializes BSL and generates tone */ void main() { DSK6713_AIC23_CodecHandle hCodec.h" const signed int filter_Coeff[] = { 12730. /* 1 DSK6713_AIC23_RIGHTINVOL Right line input channel volume */\ 0x00d8.
C Program to implement IIR filter:
#include "filtercfg. l_output)). /* 3 DSK6713_AIC23_RIGHTHPVOL Right channel headphone volume */ \ 0x0011. /* 2 DSK6713_AIC23_LEFTHPVOL Left channel headphone volume */ \ 0x00d8.-18324. /* Initialize the board support library.12730. l_output=IIR_FILTER(&filter_Coeff . 3). / * main() . /* 6 DSK6713_AIC23_POWERDOWN Power down control */ \ 0x0043.

temp += ( (int)h[1] * x[1]). /* x(n). 0 }. 0 }. /* y(n-2) = y(n-1) */ y[1] = y[0]. 0. 0. /* B0 * x(n) */ /* B1/2 * x(n-1) */ /* B1/2 * x(n-1) */ /* B2 * x(n-2) */ /* A1/2 * y(n-1) */ /* A1/2 * y(n-1) */ /* A2 * y(n-2) */
/* Divide temp by coefficients[A0] */
if ( temp > 32767 ) { temp = 32767. 0. temp += ( (int)h[2] * x[2]). 0. 0. x(n-1). /* x(n-1) = x(n) */ return (temp<<2). /* Copy input to x[stages][0] */ temp = ( (int)h[0] * x[0]) . 0. signed int x1) { static signed int x[6] = { 0. temp += ( (int)h[1] * x[1]). Must be static */ static signed int y[6] = { 0. /* Shuffle values along one place for next time */ y[2] = y[1]. temp -= ( (int)h[5] * y[2]). Must be static */ int temp=0. Vizianagaram
47
. /* y(n-1) = y(n) */ x[2] = x[1]. /* y(n).Department of Electronics and Communication Engineering
Digital Signal Processing Lab
signed int IIR_FILTER(const signed int * h. temp -= ( (int)h[4] * y[1]). 0. 0. temp = (short int)x1. /* Copy input to temp */ x[0] = (signed int) temp. /* x(n-2) = x(n-1) */ x[1] = x[0]. } y[0] = temp . temp >>= 15. y(n-2). } else if ( temp < -32767) { temp = -32767. temp -= ( (int)h[4] * y[1]). x(n-2). y(n-1). /* temp is used as input next time through */ }
Maharaj Vijayaram Gajapathi Raj College of Engineering.

Maharaj Vijayaram Gajapathi Raj College of Engineering. Debug → connect. Click on the Icon
to launch DSK 6713 Code Composer Studio
2.Department of Electronics and Communication Engineering PROCEDURE:
Digital Signal Processing Lab
1. Vizianagaram
48
. Connect the target processor.

file → new → DSP/BIOS Configuration
Maharaj Vijayaram Gajapathi Raj College of Engineering. Vizianagaram
49
.
4.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
3. Select the target as TMS 320C67XX which is your DSP processor. Create a new project from project → new . Create a new BIOS configuration.

Maharaj Vijayaram Gajapathi Raj College of Engineering. Example: code.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
5. Vizianagaram
50
.cdb and save it with .cdb
6. Select dsk6713. Save the created .cdb extension.cdb file in your project directory.

Project → add files to project
8.cdb file to your project. Vizianagaram
51
. Select the .
Maharaj Vijayaram Gajapathi Raj College of Engineering.cdb file and click on open. Add the created .Department of Electronics and Communication Engineering
Digital Signal Processing Lab
7.

10. file → new → source file. here it is codecfg.h in source code **** is the name of the . Add the created source file to your project. 11. Copy the dsk6713.cdb file.h
12.h files in C:\CCstudio\dsk6713\ include and paste them in your project folder. Note: Do not cut or add these files to your project
Maharaj Vijayaram Gajapathi Raj College of Engineering.h and dsk6713_aic23. Project → add files to project. Include the header file ****cfg. Create new source file. Ex: filter. Enter the source code and save it in your project directory.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
9. Vizianagaram
52
.c.

out
17. • This creates . Load the program from file → Load program
18. 15. Rebuild the program. Project → compile.
Maharaj Vijayaram Gajapathi Raj College of Engineering. Compile the program. After loading the program run the program. Build the program.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
13. Project → rebuild all. 16.lib. Add dsk6713bsl. Verify the output on CRO. Project → Build. 19. Vizianagaram
53
. Debug → Run.out executable file in debug folder with project name.lib to your project Path: C:\CCstudio\dsk6713\lib\ dsk6713bsl.
14.

Maharaj Vijayaram Gajapathi Raj College of Engineering. /* Calculate the number of points */ n = 1.float *y) { long n.tx. Fast Fourier Transform
Aim: To obtain Fast Fourier Transform of a given sequence.i1.i++) n *= 2. In general. Theory: A fast Fourier transform (FFT) is an efficient algorithm to compute the discrete Fourier transform (DFT) and its inverse. from digital signal processing and solving partial differential equations to algorithms for quick multiplication of large integers.i2. FFTs are of great importance to a wide variety of applications.j. float c1. any FFT algorithm can easily be adapted for it as well.z. such algorithms depend upon the factorization of N.i.u2.c2.i<m.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
6. but there are FFTs with O(N log N) complexity for all N. even for prime N. for (i=0.float *x.ty.u1.h> short FFT(short int dir. Evaluating the sums of DFT directly would take O(N 2) arithmetical operations.t2. Vizianagaram
54
.l.l1.t1.k.h> #include<stdio. Since the inverse DFT is the same as the DFT.l2.long m. but with the opposite sign in the exponent and a 1/N factor. An FFT is an algorithm to compute the same result in only O(N log N) operations.
C Program:
#include<math.

x[i1] = x[i] . ty = y[i].i<n-1.l++) { l1 = l2.u2 * c2. u1 = z.0.j++) { for (i=j. x[i] = x[j].Department of Electronics and Communication Engineering
Digital Signal Processing Lab
/* Do the bit reversal */ i2 = n >> 1. l2 = 1. u2 = u1 * c2 + u2 * c1.u2 * y[i1].i++) { if (i < j) { tx = x[i]. x[i] += t1. t2 = u1 * y[i1] + u2 * x[i1]. } z = u1 * c1 . for (i=0. u2 = 0. y[i] += t2.t1. for (l=0. y[j] = ty.0. u1 = 1.l<m.i+=l2) { i1 = i + l1. } j += k. } k = i2. c2 = 0. } /* Compute the FFT*/ c1 = -1.0. for (j=0. t1 = u1 * x[i1] .t2. l2 <<= 1.0.i<n.j<l1. }
Maharaj Vijayaram Gajapathi Raj College of Engineering. while (k <= j ) { j -= k. y[i] = y[j]. k >>= 1. x[j] = tx. Vizianagaram
55
. j = 0. y[i1] = y[i] .

scanf("%d". q=&x[0]. }
Maharaj Vijayaram Gajapathi Raj College of Engineering. printf("enter no's").&x[i]). float *q. printf("\t2 --------> ifft"). printf("enter no of t point dft"). scanf("%ld".&dir).i<n. printf("\n\nenter your choice").i++) { x[i] /= n. for(i=0.i<j.*w.&y[i]).&t).0). long m.i++) { scanf("%f". for(i=0. m=log(t)/log(2). } printf("\n\t1 --------> fft\n"). if (dir == 1) c2 = -1*c2.i++) { printf("%f + %fi\n". c1 = sqrt((1.0).c1) / 2. int i.j=1. } } return(1).w).m. printf("\n o/p of given sequence\n\n").i<m.0 + c1) / 2.i++) j*=2. Vizianagaram
56
. } void main() { short int dir.q.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
c2 = sqrt((1.y[i]). float x[10]. } /* Scaling for forward transform */ if (dir == 2) { for (i=0. y[i] /= n.t. scanf("%f".x[i]. clrscr(). FFT(dir. for(i=0. w=&y[0].0 .i<j.y[10].

000000i 0.000000 + 0.000000 + 0.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
getch().000000i 0.8 11 11 11 11 11 11 11 11 1 --------> fft 2 --------> ifft Enter your choice:-1 o/p of given sequence 8. Vizianagaram
57
.000000i 0.000000 + 0.000000 + 0. }
Result:
Enter no of t point dft:.000000 + 0.000000i 0.000000 + 0.000000 + 8.000000i 0.000000i 0.000000 + 0.000000i 0.000000i
Maharaj Vijayaram Gajapathi Raj College of Engineering.

Addition of two sinusoidal signals
Aim: To write a MATLAB program for addition of two sinusoidal signals. Step 2: Take the input values.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
7. Step 5: Plot the output. Vizianagaram
58
. number of cycles of both sinusoids Step 3: Generate the sinusoids using function sin (x) Step 4: Add the two sinusoids. Algorithm:
Step 1: Get the number of samples for both sinusoids.
Model Output:
First Signal 1 Amplitude 0 -1
0
10
20
30
40 50 60 Discrete time Second Signal
70
80
90
100
Amplitude
1 0 -1 0 10 20 30 40 50 60 Discrete time SUM=x1+x2 Signal 70 80 90 100
2 Amplitude 0 -2
0
10
20
30
40 50 60 Discrete time
70
80
90
100
Maharaj Vijayaram Gajapathi Raj College of Engineering.

an=angle(h).1.wn]=buttord(w1.'s'). Chebyshev. and rolls off towards zero in the stopband.…
w1=input('enter pass band cutoff frequency:').a.rp. the Butterworth filter has a slower roll-off. However.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
8.'s'). The Butterworth is the only filter that maintains this same shape for higher orders (but with a steeper decline in the stopband) whereas other varieties of filters (Bessel. Compared with a Chebyshev Type I/Type II filter or an elliptic filter. The magnitude function of the Butterworth lowpass filter is given by
H ( jΩ ) =
MATLAB program:
[1 + (Ω / Ω ) ]
c
1
2N 1 / 2
N = 1.w). Butterworth filters have a monotonically changing magnitude function with ω.p. Vizianagaram
59
.k). subplot(2. fs=input('enter the sampling frequency'). rp=input('enter pass band ripple in db'). w2=2*ws/fs.3. Butterworth filter will have a more linear phase response in the passband than the Chebyshev Type I/Type II and elliptic filters. [b. [N.1).a]=zp2tf(z. rs=input('enter stop band ripple in db').
Maharaj Vijayaram Gajapathi Raj College of Engineering. %[z. and thus will require a higher order to implement a particular stopband specification.omega]=freqs(b. gain=20*log10(abs(h)).p. Frequency response of analog IIR low pass filters
Aim: To find frequency response of IIR Butterworth analog LP filter Theory:
The Butterworth filter is designed to have a frequency response which is as flat as mathematically possible in the passband.01:pi. %[b. The frequency response of the Butterworth filter is maximally flat (has no ripples) in the passband.w2. elliptic) have different shapes at higher orders. Another name for this filter is 'maximally flat magnitude' filters. w=0:0. w2=input('enter stop band cutoff frequency:'). w1=2*wp/fs.2. title('mag res of lpf').a]=butter(N. [h.rs.k]=butter(N.wn).wn.

0000 1. xlabel('normalized frequency------>'). plot(omega/pi. ylabel('phase in radians---->')
Result:
enter pass band cutoff frequency:1500 enter stop band cutoff frequency:3000 enter pass band ripple in db10 enter stop band ripple in db40 enter the sampling freqency7000 b = 0 0 0 0 0 0 0.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
plot(omega/pi.0040
Maharaj Vijayaram Gajapathi Raj College of Engineering. Vizianagaram
60
.0040 a = 1. subplot(2.an). title('p res lpf').5757 0.5372 1.1870 0.gain).0385 0.2). ylabel('gain in db-------->').1. xlabel('normalized frequency---->').1815 0.

512) Pyy = y. Power spectrum of a signal
Aim: To obtain power spectrum of given signal using MATLAB. the spectral density captures the frequency content of a stochastic process and helps identify periodicities. Vizianagaram
61
. It is often called simply the spectrum of the signal.*conj(y)/512. xlabel('Frequency (Hz)'). subplot(212) plot(f. or energy per Hz. subplot(211) plot(1000*t(1:50). The PSD is the FT of autocorrelation function. MATLAB Program:
t = 0:0.6 x = sin(2*pi*50*t)+sin(2*pi*120*t) y = x+2*randn(size(t)).001:0. f = 1000*(0:256)/512. or a deterministic function of time.y(1:50)) title('signal corrupted with noise') xlabel('time (milliseconds)') y = fft(y. which has dimensions of power per Hz.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
9.
Output:
Maharaj Vijayaram Gajapathi Raj College of Engineering. R(τ) of the signal if the signal can be treated as a wide-sense stationary random process. Intuitively. Pyy(1:257)) title('Power spectrum of y'). Theory: In statistical signal processing the power spectral density is a positive real function of a frequency variable associated with a stationary stochastic process.

Select number of points for FFT Step 2 – Generate a sine wave of frequency ‘f ‘ (eg: 10 Hz with a sampling rate = No. 3 = 011 goes to 110 = 6 3.
Maharaj Vijayaram Gajapathi Raj College of Engineering. Step 4 – Use Graph option to view the Input & Output. Bit reverse the input sequence. Step 3 .Take sampled data and apply FFT algorithm . 4.g. e. e. 5. of N samples. Vizianagaram
62
. Until all the samples combine into one N-sample DFT
ALGORITHM :
Step 1 . with ZERO's until the number of samples is the nearest power of two. Theory: The DFT Equation is
FFT Algorithm:
Decimation In Time method: 1. Pad input sequence. of points of FFT using math library function.Repeat Step-1 to 4 for different number of points & frequencies.g. Compute (N / 4) four sample DFT's from the two sample DFT's. Step 5 . Real Time implementation Fast Fourier Transform (FFT)
Aim: To find the FFT of given 1-D signal and plot. Compute (N / 2) eight sample DFT's from the four sample DFT's.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
10. 500 samples are padded to 512 (2^9) 2. Compute (N / 2) two sample DFT's from the shuffled inputs.

real + samples[i].0).0. int n).imag). i<PTS .real=0.imag=0. //imag components = 0 FFT(samples. //call function FFT. //FFT prototype float iobuffer[PTS]. i++) // set up twiddle constants in w { w[i]. i < PTS . //set to 1 by ISR when iobuffer full COMPLEX w[PTS].> freq. i < PTS . samples[i]. //twiddle constants stored in w COMPLEX samples[PTS]. //buffer with new data } for (i = 0 . Vizianagaram
63
.c: #define PTS 64 //# of points for FFT typedef struct {float real.c (fft 256./*10. i < PTS .h> #define PTS 64 //# of points for FFT #define PI 3.
Maharaj Vijayaram Gajapathi Raj College of Engineering.imag. void FFT(COMPLEX *Y.imag.0)). i < PTS . //general purpose index variable short buffercount = 0.imag*samples[i]. //primary working buffer
main() { for (i = 0 . i++) //swap buffers { samples[i]. //number of new samples in iobuffer short flag = 0.real = cos(2*PI*i/(PTS*2. //as input and output buffer float x1[PTS].} COMPLEX.14159265358979 typedef struct {float real. } for (i = 0 . //Im component of twiddle constants } for (i = 0 .real*samples[i].PTS).} COMPLEX.c): #include <math. /* 64 -> sampling freq*/ samples[i].imag = 0. } } //end of main fft.0. i++) //compute magnitude { x1[i] = sqrt(samples[i].0)).imag =-sin(2*PI*i/(PTS*2. //intermediate buffer short i. i++) //swap buffers { iobuffer[i] = sin(2*PI*10*i/64.c for (i = 0 .0. i++) samples[i].Department of Electronics and Communication Engineering
Digital Signal Processing Lab
C PROGRAM: Main.real=iobuffer[i]. //Re component of twiddle constants w[i].

imag.imag = temp1.real . for (j = 0. //step between values in twiddle. Vizianagaram
64
. i++) //for N-point FFT { index = 0.real = temp2. //index of upper/lower butterfly leg int leg_diff.real.temp2. i < (N-1).Department of Electronics and Communication Engineering
Digital Signal Processing Lab
extern COMPLEX w[PTS]. //index/step through twiddle constant i = 1. //difference between upper&lower legs step = (PTS*2)/N. temp2. j < leg_diff. j++) { for (upper_leg = j.real + (Y[lower_leg]). i = i*2.real. lower_leg.h for (i = 0. temp1. upper_leg += (2*leg_diff)) { lower_leg = upper_leg+leg_diff.real.imag*(w[index]).imag.(Y[lower_leg]). //number of FFT stages (iterations) int index.imag = temp2. (Y[upper_leg]). int N) //input sample array. (Y[lower_leg]). step. (Y[upper_leg]). //difference between upper/lower leg int num_stages = 0.imag. //log(base2) of N points= # of stages do { num_stages +=1.imag . } j = 0. temp1.real -temp2. for (i = 1. i++) //bit reversal for resequencing data {
Maharaj Vijayaram Gajapathi Raj College of Engineering. (Y[lower_leg]).imag*(w[index]).real = (Y[upper_leg]).imag = (Y[upper_leg]). temp2.real*(w[index]). //temporary storage variables int i. } index += step.i < num_stages. upper_leg < N. leg_diff = N/2.imag + (Y[lower_leg]).imag.j. # of points { COMPLEX temp1.real = (Y[upper_leg]). step *= 2.real = temp1.real.k.real*(w[index]). //loop counter variables int upper_leg.imag = (Y[upper_leg]).imag +temp2. } leg_diff = leg_diff/2.
//twiddle constants stored in w
void FFT(COMPLEX *Y.(Y[lower_leg]). }while (i!=N).

real. temp1. k = k/2.imag.imag.imag = (Y[i]).real = (Y[i]). while (k <= j) { j = j . (Y[j]).imag = temp1.real. } } return.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
k = N/2.k. } j = j + k.real.real = temp1. (Y[i]).imag = (Y[j]).}
Input:
Output:
Maharaj Vijayaram Gajapathi Raj College of Engineering. (Y[i]). (Y[j]).real = (Y[j]). if (i<j) { temp1.imag. Vizianagaram
65
.

1 Sine waveform 2 Saw tooth waveform 3 Square waveform Theory:
Waveform means the shape and form of a signal such as a wave moving in a solid. the term 'waveform' refers to the shape of a graph of the varying quantity against time or distance. Additional Experiments 1. Algorithm:
Step 1: Take inputs. Step 2: Generate Sine waveform using function. An instrument called an oscilloscope can be used to pictorially represent the wave as a repeating image on a CRT or LCD screen. frequency and time . square(x) Step 4: Generate sawtooth waveform using function. Saw tooth wave: This looks like the teeth of a saw and found often in time bases for display scanning. Square wave: This waveform is commonly used to represent digital information. In these cases. Periodic waveform generation
Aim: To generate the following periodic waveforms for the given number of cycles and frequency respectively using MATLAB. Vizianagaram
66
. In many cases the medium in which the wave is being propagated does not permit a direct visual image of the form. Triangle wave: This is the integral of the square wave. sawtooth (x) Step 5: Plot the output
Maharaj Vijayaram Gajapathi Raj College of Engineering. sin(x) Step 3: Generate Square waveform using function.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
5. It is used as a saw tooth wave of constant period. liquid or gaseous medium. Common periodic waveforms include
Sine wave: The amplitude of the waveform follows a trigonometric sine function with respect to time.

06 ---------->time 0. Theory:
In general.08 0.02 0.02 0.06 ---------->time 0.1
------->amplitude
sawtooth waveform 1 0 -1 0 0. raising e to a positive integer exponent has a simple interpretation in terms of repeated multiplication of e.07 0.04 0. to define and understand a complex number exponent of e. c is the complex number and to plot the real and imaginary parts of y using MATLAB. However.04 0. and an irrational number exponent can be defined by finding rationalnumber exponents that are arbitrarily close to the irrational-number exponent. Complex exponential series
Aim: To generate a complex exponential series of the form y = kecn where k is constant.1
square waveform ------> m litu e a p d 1 0 -1 0 0.01 0.04 0.07 0. Vizianagaram
67
.01 0.07 0.06 ---------->time 0.
Maharaj Vijayaram Gajapathi Raj College of Engineering.09 0.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
Model Output:
------->amplitude
sinusoidal waveform 1 0 -1 0 0.03 0.09 0.03 0. Raising e to zero or a negative integer exponent can be understood as repeated division. a different type of generalization is required for the concept of exponentiation.02 0.05 0.03 0.09 0.05 0.08 0.08 0. in a limit process.1
2.01 0.05 0. A rational number exponent can be defined by radicals of e.

the magnitude and phase of the Fourier transforms of the system input and output are related by |Y(ejw)|=|H(ejw)⏐ ⏐X(ejw)⏐ ∠ Y(ejw)= ∠ H(ejw)+ ∠ X(ejw)
Maharaj Vijayaram Gajapathi Raj College of Engineering.2 0 -0.6 0.
Model Output:
real part 0.8 --amplitude 0.4 --amplitude 0. Magnitude and phase response of a system
Aim: To obtain the pole–zero plot and magnitude and phase responses of a LTI system. Vizianagaram
68
. where Y(ejw) and X(ejw) are the Fourier transforms of system input and output and the complex frequency response of a LTI system is given as:
With the frequency response expressed in polar form.Department of Electronics and Communication Engineering Algorithm:
Digital Signal Processing Lab
Step 1: Get a complex number as input Step 2: Get a constant value (K) as another input Step 2: Generate exponential series using the form of Y = Kecn Step 3: Separate the real and imaginary parts Step 3: Plot the real and imaginary sequences separately.2 0 0 2 4 6 8 10 12 --------->n 14 16 18 20
4. Theory:
The Fourier transform of a LTI system input and output are related by
Y(ejw)=H(ejw) X(ejw).4 0 2 4 6 8 10 12 --------->n imaginary part 14 16 18 20
0.2 -0.4 0.

freqz( ). Impulse and Step responses of a LTI system
Aim: To obtain unit impulse and unit step responses of a LTI system. Step 7: Plot the response. Step 6: Find the response of a LTI system by using function filter(). b of an LTI system. Step 5: Take Step as input. Algorithm:
Step 1: Take coefficients a.
Maharaj Vijayaram Gajapathi Raj College of Engineering. Step 3: Obtain the magnitude response using the function.2 -0. abs( ) Step 4: Get the phase response using function.4 0 0.
Model Output:
magnitude response 2 amplitude 1 0
0
0. angle( ) Step 4: Plot the pole-zero plot and responses separately.5
3
amplitude
0 -0. Step 4: Plot the response. Vizianagaram
69
.5 1 1. Step 2: Take Impusle as input.5
1
1.5 interval phase response
2
2.5 interval Z-plane 2 2.5 3
1 Imag(Z) 0 -1 -5 0 Real(Z) 5
5.Department of Electronics and Communication Engineering Algorithm:
Digital Signal Processing Lab
Step1: Take input for coefficients a and b Step 2: Get the frequency response using the function. Step 3: Find the response of a LTI system by using function filter().

Program:
r= 50.'x[n]').m..5. legend('d[n]'.m.'-'. Vizianagaram
70
. m=0:1:r-1.^m). x=s+d'.9.x. d= rand(r. Moving Average Filter
Aim: To write a MATLAB program for moving average filter to filter a corrupted exponential sequence.'--'.':'). s=2*m. grid
Maharaj Vijayaram Gajapathi Raj College of Engineering. Theory: The general moving average system is defined by equation
Y[n]= 1/(M1+M2+1)*
k = − M1
∑ X[n − k]
M2
= 1/(M1+M2+1) *{X[n+M1]+X[n+M1-1] +….'s[n]'..d.s.+X[n]+X[n-1] +…+ X[n-M2]} This system computes the nth sample of the output sequence as the average of (M1+M2+1) samples of the input sequence around the nth sample. plot(m.*(0.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
MATLAB Output:
6.1)-0.

Vizianagaram
71
.s. legend('s[n]'.
input:
Number of input samples: 5
Output:
8 7 6 5 amplitude 4 3 2 1 0 -1 d[n] s[n] x[n]
0
5
10
15
20
25 30 time index
35
40
45
50
Input and corrupted signals
8 7 6 5 Amplitue 4 3 2 1 0 s[n] y[n]
0
5
10
15
20
Corrupted and filtered signals
25 ------> n
30
35
40
45
50
Maharaj Vijayaram Gajapathi Raj College of Engineering.1. b=ones(n.'--'). ylabel ('amplitude'). pause n=input('Number of input samples:').y.x).Department of Electronics and Communication Engineering
Digital Signal Processing Lab
xlabel('time index'). grid xlabel('------> n'). ylabel('Amplitue'). y=filter(b.'-'.1)/n.'y[n]'). plot(m.m.

Step 4: Create another sequence h[n]=x[n].p-n2) h] for t=1:p sum=0 for k=1:t sum=sum+[x(k)*h(k-t+p)] end y(t)=sum end subplot(311) stem(x) axis([0 7 0 5]) xlabel('n'). Step 5: Obtain h[n-l] by shifting the sequence right by delay l. or identifying the missing fundamental frequency in a signal implied by its harmonic frequencies. such as time domain signals. More precisely. it is the cross-correlation of a signal with itself. It is used frequently in signal processing for analyzing functions or series of values. Step 2: Find the length of sequence. Algorithm:
Step 1: Enter the sequence x[n]. Informally.ylabel('x(n)') subplot(312) stem(h) axis([0 7 0 5])
Maharaj Vijayaram Gajapathi Raj College of Engineering.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
7. Vizianagaram
72
. N. Step 3: Add N-1 zeros to the given sequence. Step 6: Multiply h[n-l] by x[n] and sum all the values to obtain y[l] Step 7: Repeat the steps 5 & 6 for all values of l.p-n1)] h=[zeros(1. Theory: Autocorrelation is a mathematical tool for finding repeating patterns. such as the presence of a periodic signal which has been buried under noise. Auto correlation
Aim: To find the auto correlation of two given sequences. it is the similarity between observations as a function of the time separation between them.
Program:
x=input('Enter any sequence X:') h=x n1=length(x) n2=length(h) p=n1+n2-1 x=[x zeros(1. Step 8: Plot the output y[n].

ylabel('h(n)') subplot(313) stem(y) axis([0 10 0 40]) xlabel('lag index'). Vizianagaram
73
.ylabel('y(n)')
Inputs:
Enter any sequence X: [1 2 3 4]
Output:
4 11 20 30 20 11
Output:
4
5 x(n) 0 0
1
2
3 n
4
5
6
7
5 h(n) 0 0
1
2
3 n
4
5
6
7
40 y(n) 20 0
0
1
2
3
4
5 lag index
6
7
8
9
10
Maharaj Vijayaram Gajapathi Raj College of Engineering.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
xlabel('n').

p=n1+n2-1. commonly used to find features in an unknown signal by comparing it to a known one.p-n1)]. for t=1:p. n2=length(h). end
Maharaj Vijayaram Gajapathi Raj College of Engineering. The cross-correlation is similar in nature to the convolution of two functions. Step 6: Multiply y[n-l] by x[n] and sum all the values to obtain γ[l] Step 7: Repeat the steps 5& 6 for all values of l. is sometimes called the sliding dot product.
MATLAB Program:
x=input('Enter any sequence X:'). sum=sum+[x(k)*h(k-t+p)]. Step 2: Find the length of sequence (N). x=[x zeros(1. n1=length(x).
γ yx(l) = ∑y(n+l)x(n)
n=−∞
∞
Algorithm:
Step 1: Enter the sequence of x[n]. Correlation only involves shifting it and multiplying (no reversing) whereas convolution involves reversing a signal. then shifting it and multiplying by another signal. j=0:1:n1-1. Theory: The cross-correlation is a measure of similarity of two signals. and has applications in pattern recognition and cryptanalysis. for k=1:t. Cross correlation
Aim: To obtain the cross correlation of two given sequences by using MATLAB and C. Step 8: Plot the output γ[n]. Step 5: Obtain y[n-l] by shifting the sequence right by delay l. h=input('Enter any sequence H:'). It is a function of the relative time between the signals. end y(t)=sum. Step 4: Enter another sequence y[n]. sum=0.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
8. h=[zeros(1. Vizianagaram
74
. l=0:1:n2-1. Step 3: Add N-1 zeros to the given sequence.p-n2) h].

xlabel('lag index'). stem(h). xlabel('n'). subplot(313).ylabel('x(n)'). stem(y).ylabel('h(n)').Department of Electronics and Communication Engineering
Digital Signal Processing Lab
subplot(311). Vizianagaram
75
.ylabel('y(n)'). axis([0 6 0 5]). xlabel('n'). title('Cross Correlation'). subplot(312). axis([0 6 0 5]).
Input:
Enter any sequence X: [1 2 3 4] Enter any sequence H: [4 3 2 1]
Outputs:
1
4 10 20 25 24 16
Output:
x(n)
5
0
0
1
2
3
4 n
5
6
7
8
h(n)
5
0
0
1
2
3
4 5 n Cross Correlation
6
7
8
30 y(n) 20 10 0 0 1 2 3 4 5 lag index 6 7 8 9 10
Maharaj Vijayaram Gajapathi Raj College of Engineering. axis([0 10 0 10]). stem(x).

like a person's voice. i.i++) { printf("enter the x[%d]=". scanf("%d". }
Maharaj Vijayaram Gajapathi Raj College of Engineering.14285714*n*k)/len). sumi=0.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
9. } for(k=0. Such inputs are often created by sampling a continuous function.h> #include<conio. yi[10].i<Len.n. sumi=0. for(i=0.
C Program:
#include<stdio.14285714*n*k)/len). Discrete Fourier Transform
Aim: To obtain the discrete fourier transform (DFT) of a given input discrete time sequence.14285714*n*k)/len Step 4: Find the sum of imaginary values by using X[n]*sin((2*3. sumi = sumi+(x[n]*sin((2*3. But the DFT requires an input function that is discrete and whose non-zero values have a limited (finite) duration. or simply the DFT.len.k<len.14285714*n*k)/len Step 5: Add the real and imaginary parts to get the result.&x[i]). int x[10].n++) { sumr = sumr+(x[n]*cos((2*3.n<len. Step 2: Take input values of X[n] Step 3: Find the sum of real values by using X[n]*cos((2*3. for(n=0.i). Vizianagaram
76
. Algorithm :
Step 1: Take length of input sequence.k++) { sumr=0.k. &len). printf("enter the length of sequence:"). sumr=0. which is called the frequency domain representation. the DFT is ideal for processing information stored in computers. Since the input function is a finite sequence of real or complex numbers. Theory: The DFT transforms one function in time domain into another. scanf("%d".h> void main() { double yr[10]. of the original function (which is often a function in the time domain).

yi[k]=-1*sumi.i.995573 .0.001264j yr[3] + j yi[3] = 3. printf("\n"). for(i=0. } printf("the result is :\n").000007 .
Maharaj Vijayaram Gajapathi Raj College of Engineering.000000j yr[1] + j yi[1] = 2.i++) { if(yi[i]>=0) { printf("yr[%d]+jyi[%d] = %lf+%lfj". printf("\n").3.yi[i]).002525j yr[2] + j yi[2] = -0. Step 5: Plot the output.000000 + 0.992379j
10.i. Algorithm:
Step 1: Take passband.i.i<len. Specify the type of filter (LPF. Butterworth Lowpass filter
Aim: To obtain frequency response characteristics of Butterworth Lowpass filter. } else { printf("yr[%d]+jyi[%d] = %lf%lfj". } } }
Input:
Enter The Length Of Sequence : 4 Enter the x[0]: 1 Enter the x[1]: 1 Enter the x[2]: -2 Enter the x[3]: -2
Output:
yr[0] + j yi[0] = -2. buttord( ) Step 3: Calculate system function (a and b coefficients) using a function. butter( ).i. stopband frequencies and attenuations.yi[i]).yr[i].013263 + 2. HPF or BPF).yr[i].Department of Electronics and Communication Engineering
Digital Signal Processing Lab
yr[k]=sumr. Step 2: Find cutoff frequency and order of the filter by using the function. Vizianagaram
77
. Step 4: Obtain the frequency response using the function freqz( ).

Theory: Type I chebyshev filters are all pole filters that exhibit equi ripple behavior in the passband and a monotonic characteristic in the stopband.9
1
4 Phase in radians 2 0 -2 -4 0 0. stopband frequencies and attenuations.
Maharaj Vijayaram Gajapathi Raj College of Engineering. Step 5: Plot the output. The analog lowpass type I chebyshev filter is optimum all pole filter because for given order N and given passband and stopband constrains.8 0.2 0.4 0.5 0. Chebyshev type-I bandpass filter
Aim: To obtain frequency response charcterstics of IIR chebyshev type1 bandpassfilter.5 0.2 0.1 0.8
Digital Signal Processing Lab
Gain in dB
0.9 1
11.Department of Electronics and Communication Engineering Model output:
200 0 -200 -400 -600 0 0.1 0.6 Normailzed frequency 0.3 0.7 0. Vizianagaram
78
.) Step 4: Obtain the frequency response using the function.(Specify which type of filter characteristics. freqz( ). Its magnitude response is given by (H (jΩ 2 =1/( +ε2T2N(Ω Ω ) )) 1 / P a Where ε is a constant parameter of the filter related to the ripple in the passband Algorithm:
Step 1: Take the passband.4 0.6 Normailzed frequency 0. cheb1ord ( ).7 0.3 0. no other all-pole filter has narrower transition bandwidth. Step 2: Find the cutoff frequency and order of the filter by using function. Step 3: Calculate system function using cheby1 command.

namely type I and type II. stopband frequencies and attenuations.) Step 4: Obtain the frequency response using freqz command. Algorithm:
Step 1: Take passband.
Maharaj Vijayaram Gajapathi Raj College of Engineering. Vizianagaram
79
.Department of Electronics and Communication Engineering Model output:
1 --------->gain
Digital Signal Processing Lab
0. Theory: There are two types of chebyshev filters.(Specify which filter characteristics. The type II chebyshev filters contain both poles and zeros and exhibit monotonic behavior in the passband and equi-ripple behavior in the stopband. Step 3: Calculate system function using cheby2 command. Step 5: Plot the output.5
0
0
100
200
300
400 500 600 --------->frquency
700
800
900
1000
--------->phase in degrees
4 2 0 -2 -4 0 100 200 300 400 500 600 --------->frquency 700 800 900 1000
12. Step 2: To find cutoff frequency and order of the filter by using cheb2ord command. IIR Chebyshev type-II highpass filter
Aim: To obtain frequency response charcterstics of IIR chebyshev type2 highpassfilter.

l1 a6.s1 12349532h. Program:
. Addition of two 32-bit numbers
Aim: To add two 32 bit fixed point numbers using assembly language program.s1 9532h.s1 3250h.s1 00013250h. Vizianagaram
80
.a9:a8 b b3 nop 5
Output:
A6:0001 3250 A2:1234 9532 A8:1235 C782
Maharaj Vijayaram Gajapathi Raj College of Engineering.a2.a6 mvkl .Department of Electronics and Communication Engineering Model output:
Digital Signal Processing Lab
13.a6 mvkh .a2 mvkh .global _main _main: mvkl .a2 addu .

s2 0000h.s1 5688h. Vizianagaram
81
. Program:
.b1 mvkh .b0 b b3 nop5
Output:
A2:5688h B1:1469h B0:0000421F
Maharaj Vijayaram Gajapathi Raj College of Engineering.global _main _main: mvkl .s2 1469h.b1 sub .a2 mvkh . Subtraction of two 16-bit numbers
Aim: To subtract two 16 bit numbers using assembly language program.l2 a2.s1 0000h.a2 mvkl .b1.Department of Electronics and Communication Engineering Register output in CCS Simulator:
Digital Signal Processing Lab
14.

B = FIR1(N. PC 2. Oscilloscope and Function generator. Wc .b0 b b3 nop 5 Output: A2:6178h B1:2121h B0:0C9D0878
16. Compute the desired Impulse Response h d (n) using particular Window Eg: b_rect1=fir1(order. TMS320C6713 DSP Starter Kit (DSK). The cut-off frequency must be 0 < Wn < 1. Compute the cut-off frequency Wc Eg: Wc = 2*pie* fc / Fs.m2 a2. Sampling Rate = 8000 samples/sec. MATLAB program to generate ‘FIR Filter-Low Pass’ Coefficients: % FIR Low pass filters using rectangular window % sampling rate . = 400 Hz. Eg: Order = 30.boxcar(31)).0.s1 6178h. = 2*pie* 400/8000 = 0.0 corresponding to half the sample rate. Program:
. cf = 2 * 500/8000.b1 mpy . with Wn = 1.8000 order = 30. 2.Wn. Equipment needed: 1.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
15.a2 mvkl .Wn.cf(1). % Rectangular
Maharaj Vijayaram Gajapathi Raj College of Engineering. Clearly specify the filter specifications. Multiplication of two 16-bit numbers
Aim: To obtain multiplication of two 16 bit numbers using assembly language program. Vizianagaram
82
. cf--> cut-off frequency [Wc ]
b_rect1=fir1(order.boxcar(31)). Design of FIR filter: 1.Wn) designs an Nth order lowpass FIR digital filter and returns the filter coefficients in length N+1 vector B.'high') designs a highpass filter and B = FIR1(N.s2 2121h. 4.global _main _main: mvkl . Real Time Implementation of FIR Filter
Aim: To design and implement a Digital FIR Filter & observe its frequency response.'stop') is for a bandstop filter if Wn = [W1 W2]. Cut off Freq. 'high'.1*pie 3. Convolve input sequence with truncated Impulse Response x (n)*h (n) Determination of filter coefficients: B = FIR1(N. 3.b1.

when asserted proceed.
Write the value ‘Output’ to Analog output of the codec
Maharaj Vijayaram Gajapathi Raj College of Engineering. Vizianagaram
83
. Yes Output += coeff[0]*data Put the ‘data’ in ‘val’ array.
Take a new input in ‘data’ from the analog in of codec
Initialize Counter = 0 Initialize Output = 0 .Department of Electronics and Communication Engineering
Digital Signal Processing Lab
Flow Chart to implement FIR filter:
Start
Initialize the DSP Board. i = 0
Output += coeff[N-i]*val[i] Shift the input value by one
No Is the loop Cnt = order Poll the ready bit.

0.000000.000000. while(1)
Maharaj Vijayaram Gajapathi Raj College of Engineering. r_input. must be called first */ DSK6713_init().000000. &config).002423.0.018003.0.011139.-0.000000. static short in_buffer[100].031505. /* 6 DSK6713_AIC23_POWERDOWN Power down control */\ 0x0043.000000.220534. 0.-0.031505. DSK6713_AIC23_setFreq(hCodec.Main code routine.-0.0.000000. /* * main() .001591. -0. DSK6713_AIC23_Config config = {\ 0x0017.005728. Uint32 l_input.-0.005728.000000.-0.033416.220534.0.011139.-0.001591.010502.018003.h" #include "dsk6713. 0.0. /* 0 DSK6713_AIC23_LEFTINVOL Leftline input channel volume */\ 0x0017. 0. r_output. /* 1 DSK6713_AIC23_RIGHTINVOL Right line input channel volume*/\ 0x00d8.l_output. /* 4 DSK6713_AIC23_ANAPATH Analog audio path control */\ 0x0000. Vizianagaram
84
.144802.-0.h" float filter_Coeff[] ={0.-0. /* 8 DSK6713_AIC23_SAMPLERATE Sample rate control */\ 0x0001 /* 9 DSK6713_AIC23_DIGACT Digital interface activation */ \ }.063010. /* 5 DSK6713_AIC23_DIGPATH Digital audio path control */\ 0x0000.-0.000000 }. 1).002423.Department of Electronics and Communication Engineering C Program:
Digital Signal Processing Lab
#include "filtercfg.-0.033416.0. /* Start the codec */ hCodec = DSK6713_AIC23_openCodec(0.-0.0.262448.0.0.h" #include "dsk6713_aic23. /* Initialize the board support library.0. /* 7 DSK6713_AIC23_DIGIF Digital audio interface format */\ 0x0081.144802.0.0.063010.0. /* 3 DSK6713_AIC23_RIGHTHPVOL Right channel headphone volume */\ 0x0011.010502. initializes BSL and generates tone */ void main() { DSK6713_AIC23_CodecHandle hCodec.0. /* 2 DSK6713_AIC23_LEFTHPVOL Left channel headphone volume */\ 0x00d8.

i--) in_buffer[i] = in_buffer[i-1]. Vizianagaram
85
. l_output=(Int16)FIR_FILTER(&filter_Coeff . l_output)). &l_input)). in_buffer[0] = x. signed long output=0. &r_input)). /* Send a sample to the right channel */ while (!DSK6713_AIC23_write(hCodec.i>0. signed int x) { int i=0.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
{ /* Read a sample to the left channel */ while (!DSK6713_AIC23_read(hCodec. return(output).i++) output = output + h[i] * in_buffer[i]. } /* Close the codec */ DSK6713_AIC23_closeCodec(hCodec). }
Maharaj Vijayaram Gajapathi Raj College of Engineering. /* new input at buffer[0] */ for(i=30.i<31. /* Send a sample to the left channel */ while (!DSK6713_AIC23_write(hCodec. r_output)). r_output=l_output.l_input). /* Read a sample to the right channel */ while (!DSK6713_AIC23_read(hCodec. /* shuffle the buffer */ for(i=0. } signed int FIR_FILTER(float * h.

of Input samples h = No. 4} . of zero’s
Maharaj Vijayaram Gajapathi Raj College of Engineering. 10.
Algorithm:
Eg:
x[n] = {1.
NOTE: At the end of input sequences pad ‘n’ and ‘k’ no. 3. of Impulse response co-efficient. 24.
Where: n=4. 4. k=4. Addition 4. 3. 4} h[k] = {1. n = No. 25. 20.Values of n & k should be a multiple of 4. If n & k are not multiples of 4. 2. 1. 2. Folding 2. Theory: Linear Convolution Involves the following operations. 16}.
r= 0 1 2 3 4 5 6 n= 0 x[0]h[0] x[0]h[1] x[0]h[2] x[0]h[3] 1 x[1]h[0] x[1]h[1] x[1]h[2] x[1]h[3] 2 x[2]h[0] x[2]h[1] x[2]h[2] x[2]h[3] 3 x[3]h[0] x[3]h[1] x[3]h[2] x[3]h[3] Output: y[r] = { 1.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
17. r = n+k-1 = 4+4-1 = 7. Size of output sequence. pad with zero’s to make multiples of 4 . y[ ]= Convolution output. Vizianagaram
86
. Shifting
These operations can be represented by a Mathematical Expression as follows:
y[n] =
k = −∞
∑ x ( k ) h( n − k )
∞
x[ ]= Input signal Samples h[ ]= Impulse response co-efficient. Linear Convolution
Aim: To verify Linear Convolution of two sequences using assembly language program and to view graphical output using CCS. Multiplication 3.

for(j=0.*A5[A3] ADD . for(i=0.3.A8 ADD .0.L1 A8.I=0 LL2: ZERO .2.0.S2 7.A7 ADD .0.R=M+N-1
.S1 X.0. R=M+N-1
.2 .3.B7 LDH .A3.j++) MV .B5 .J=0.0 .OUTPUT. MOVE THE VALUE OF ‘R’TO B2 FOR DIFFERENT LENGTH OF I/P SEQUENCES ZERO .0 .S2 LL1 NOP 5 STH .POINTER TO H .A7.L1 A2.A4 MVKH .0.1.B2 .L1 A3.1.4.B2.i++) LL1: LDH .S2 H.
Maharaj Vijayaram Gajapathi Raj College of Engineering.half 1.D2 *B4[B7].4.A5 MVK . Vizianagaram
87
. N=4 .L2 A3.M1X A6.L2X B5.0.S2X A8.A3 CMPLT .bss Y.j<=i.A2 CMPLT .S1 Y.A4 MVKL .B4 MVKH .A6 .POINTER TO X .B0 [B0] B .A2 [A2] B .input1.S1 X.global _main .S1 LL2 NOP 5 B B3 NOP 5 To View output graphically Select view graph time and frequency. y[i]+=x[j]*h[i-j].14.L1 A3 . M=4 .i<m+n-1.half 1.POINTER TO Y .L1 A2 ZERO .B6 NOP 4 MPY .D1 *A4[A8].L1 A7 ZERO . of zero’s _main: MVKL .A5 MVKH .2.L1X A3.input2.L1 A8 .D1 A2.Department of Electronics and Communication Engineering ASSEMBLY PROGRAM:
Digital Signal Processing Lab
X H
.S1 Y. At the end of input sequences pad ‘M’ and ‘N’ no.S2 H. SUB .B5.B4 MVKL .B6.

3. 4. 2. 4. 3.0} OUTPUT:
Maharaj Vijayaram Gajapathi Raj College of Engineering.Department of Electronics and Communication Engineering
Digital Signal Processing Lab
Configure the graphical window as shown below
INPUT x[n] = {1.0} h[k] = {1. 2. Vizianagaram
88
.0.0.0.0.0.0.