Hindu College, Amritsar.

Intel 8086 CPU: An Introduction
8086 Features
• 16-bit Arithmetic Logic Unit
• 16-bit data bus • 20-bit address bus - 220 = 1,048,576 = 1 meg

The address refers to a byte in memory. In the 8086, bytes at even addresses come in on the low half of the data bus (bits 0-7) and bytes at odd addresses come in on the upper half of the data bus (bits 8-15). The 8086 can read a 16-bit word at an even address in one operation and at an odd address in two operations. The least significant byte of a word on an 8086 family microprocessor is at the lower address.
Hindu College, Amritsar.

Amritsar.the Instruction Pointer CS .the Extra Segment Register The BIU fetches instructions using the CS and IP. reads and writes data. Hindu College. and computes the 20-bit address.the Data Segment Register SS .8086 Architecture • The 8086 has two parts.the Stack Segment Register ES . Data is fetched using a segment register (usually the DS) and an effective address (EA) computed by the EU depending on the addressing mode. the Bus Interface Unit (BIU) and the Execution Unit (EU). written CS:IP. . • The BIU fetches instructions.the Code Segment Register DS . to construct the 20-bit address. • The EU decodes and executes the instructions using the 16-bit ALU. • The BIU contains the following registers: IP .

8086 Block Diagram Hindu College. Amritsar. .

DL Hindu College.8086 Architecture ] The EU contains the following 16-bit registers: AX .BL CX --> CH.the Accumulator BX .the Base Pointer SI . they often have a special-purpose use for some instructions.the Stack Pointer BP .AL BX --> BH.the Data Register Default to stack segment SP .CL DX --> DH.the Base Register CX . although. and DX registers can be considered as two 8-bit registers. CX. the 8080 and 8085. The 8-bit registers are: AX --> AH. BX.the Destination Register These are referred to as general-purpose registers.the Source Index Register DI . Amritsar. a High byte and a Low byte.the Count Register DX . as seen by their names. This allows byte operations and compatibility with the previous generation of 8-bit processors. . The AX.

OF Overflow Flag Bits 1. 12-15 are undefined. The condition bits are set or cleared by the execution of an instruction. Bit 0 . 5.ZF Zero Flag .PF Parity Flag .DF String Instruction Direction Flag Bit 11 .SF Sign Flag = msb of result Bit 8 . 3.for BCD arithmetic Bit 6 . Hindu College.Set by carry out of msb Bit 2 .Set if result has even parity Bit 4 .8086 Architecture The EU also contains the Flag Register which is a collection of condition bits and control bits.CF Carry Flag .TF Single Step Trap Flag Bit 9 . . The control bits are set by instructions to control some operation of the CPU.IF Interrupt Enable Flag Bit 10 .Set if result is zero Bit 7 .AF Auxiliary Flag . Amritsar.

8086 Programmer’s Model 16-bit Registers BIU registers (20 bit adder) ES CS SS DS IP AX BX CX DX AH BH CH DH AL BL CL DL Extra Segment Code Segment Stack Segment Data Segment Instruction Pointer Accumulator Base Register Count Register Data Register Stack Pointer Base Pointer Source Index Register Destination Index Register EU registers 16 bit arithmetic SP BP SI DI FLAGS Hindu College. . Amritsar.

0FFFFFH . Amritsar.Segments Segment Starting address is segment register value shifted 4 place to the left. can overlap. Hindu College. start at an address that ends in 0H. MEMORY Address 000000H CODE 64K Data Segment STACK DATA EXTRA  CS:0 64K Code Segment Segment Registers Segments are < or = 64K.

Hindu College. SS: 0B200H STACK 0CF000H 0DEFFFH 0FF000H 0FFFFFH . Amritsar.8086 Memory Terminology Segment Registers DS: 0100H Memory Segments 000000H DATA 001000H 10FFFH 0B2000H 0C1FFFH ES: 0CF00H EXTRA CS: 0FF00H CODE Segments are < or = 64K and can overlap. Note that the Code segment is < 64K since 0FFFFFH is the highest address.

The physical address is also called the absolute address Hindu College. . The offset is given by the IP for the Code Segment. Amritsar.The Code Segment 000000H CS: 0400H IP 0056H 4000H 4056H CS:IP = 400:56 Logical Address Memory Left-shift 4 bits Segment Register Offset Physical or Absolute Address + 0400 0 0056 0FFFFFH 04056H The offset is the distance in bytes from the start of the segment. Instructions are always fetched with using the CS register.

Amritsar. Hindu College. . The EA depends on the addressing mode.The Data Segment 000000 H DS: 05C0 EA 0050 05C00H 05C50H DS:EA Memory Segment Register 05C0 0 Offset Physical Address + 0050 05C50H 0FFFFFH Data is usually fetched with respect to the DS register. The effective address (EA) is the offset.

Addressing Modes Assembler directive. The offset of SAM is just a number. DATA2 is not a memory location but a constant. 25H is put in AX. The CPU goes to memory to get data. MOV AX. a memory location that contains 25H.DATA1 [DATA1]  AX.. OFFSET DATA1 The assembler knows which mode to encode by the way the operands SAM and FRED are defined. Does not go to memory to get data. Hindu College. 20H is put in AX. i. the contents of DATA1 is put into AX. Data is in the instruction. DW = Define Word DATA1 DW 25H DATA1 is defined as a word (16-bit) variable. Immediate Addressing MOV AX.e. . Amritsar.DATA2 DATA2 = 20H  AX. DATA2 EQU 20H Direct Addressing MOV AX.

SAM[BX][DI] EA = BX + DI + offset SAM Hindu College. . Amritsar.Based Addressing (BP defaults to SS) or DI or SI -.[BX] AX DS:BX Can use BX or BP -.SAM[BX] AX DS:BX + Offset SAM AX DS:EA where EA = BX + offset SAM EA = BX + SI Based-Indexed Addressing MOV AX.Addressing Modes Register Addressing MOV AX.[BX][SI] Based-Indexed w/Displacement MOV AX.BX AX BX Register Indirect Addressing MOV AX.Indexed Addressing The offset or effective address (EA) is in the base or index register. Register Indirect with Displacement Indexed with displacement Based with displacement MOV AX.

Intrasegment (CS does not change) FAR Intersegment (CS changes) Direct -. Hindu College. Indirect -. Indirect -.new CS and IP are encoded in the instruction.new CS and IP are in memory. All addressing modes apply except immediate and register. .Addressing Modes Branch Related Instructions NEAR JUMPS and CALLS Direct -. All addressing modes apply. Amritsar.IP relative displacement new IP = old IP + displacement Allows program relocation with no change in code.new IP is in memory or a register.

The assembler outputs a listing of the addresses and machine code along with the source code and a binary file (object file) with the machine code. • The first pass determines the locations of the labels or identifiers. • The second pass generates the code. .Assembly Language The Assembler is a program that reads the source program as data and translates the instructions into binary machine code.called a two-pass assembler. Hindu College. Amritsar. Most assemblers scan the source code twice -.

. Hindu College. This counts the number of bytes required by each instruction. the location counter is zero. • When the program starts a segment. Amritsar. • If a previous segment is re-entered. The offsets are used in the second pass to generate operand addresses. • The location counter can be set to any offset by the ORG directive. the counter resumes the count. the assembler uses the location counter to construct a symbol table which contains the offsets or values of the various labels.Assembly Language To locate the labels. In the first pass. the assembler has a location counter.

Amritsar.Instruction Set adc Add with carry flag add and call cbw Add two numbers Bitwise logical AND Call procedure or function Convert byte to word (signed) cli cwd cmp dec div idiv imul in inc int Clear interrupt flag (disable interrupts) Convert word to doubleword (signed) Compare two operands Decrement by 1 Unsigned divide Signed divide Signed multiply Input (read) from port Increment by 1 Call to interrupt procedure Hindu College. .

) iret j?? jmp lea mov mul neg nop not or Interrupt return Jump if ?? condition met Unconditional jump Load effective address offset Move data Unsigned multiply Two's complement negate No operation One's complement negate Bitwise logical OR out pop popf push Output (write) to port Pop word from stack Pop flags from stack Push word onto stack Hindu College.Instruction Set (Contd. Amritsar. .

. Amritsar.Instruction Set (Contd.) pushf ret sal sar sbb Push flags onto stack Return from procedure or function Bitwise arithmetic left shift (same as shl) Bitwise arithmetic right shift (signed) Subtract with borrow shl shr sti sub test xor Bitwise left shift (same as sal) Bitwise right shift (unsigned) Set interrupt flag (enable interrupts) Subtract two numbers Bitwise logical compare Bitwise logical XOR Hindu College.

Conditional Jumps Name/Alt JE/JZ JNE/JNZ JL/JNGE JNL/JGE JG/JNLE JNG/JLE JB/JNAE JNB/JAE JA/JNBE JNA/JBE JS JNS JO JNO JP/JPE JNP/JPO JCXZ Meaning Jump equal/zero Jump not equal/zero Jump less than/not greater than or = Jump not less than/greater than or = Jump greater than/not less than or = Jump not greater than/ less than or = Jump below/not above or equal Jump not below/above or equal Jump above/not below or equal Jump not above/ below or equal Jump on sign (jump negative) Jump on not sign (jump positive) Jump on overflow Jump on no overflow Jump parity/parity even Jump no parity/parity odd Jump on CX = 0 Hindu College. Amritsar. Flag setting ZF = 1 ZF = 0 (SF xor OF) = 1 (SF xor OF) = 0 ((SF xor OF) or ZF) = 0 ((SF xor OF) or ZF) = 1 CF = 1 CF = 0 (CF or ZF) = 0 (CF or ZF) = 1 SF = 1 SF = 0 OF = 1 OF = 0 PF = 1 PF = 0 --- .

Amritsar. Current location count Hindu College. Give source module a name.More Assembler Directives ASSUME SEGMENT ENDS ORG END NAME Tells the assembler what segments to use. Equate or equivalence LABEL $ Assign current location count to a symbol. End of source code. Defines the segment name and specifies that the code that follows is in that segment. . End of segment Originate or Origin: sets the location counter. DW DB EQU Define word Define byte.

. Amritsar.Hindu College.

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