P. 1
Eca Lab Manual

Eca Lab Manual

|Views: 51|Likes:
Published by Nageswariah.M

More info:

Published by: Nageswariah.M on May 02, 2012
Copyright:Attribution Non-commercial

Availability:

Read on Scribd mobile: iPhone, iPad and Android.
download as DOC, PDF, TXT or read online from Scribd
See more
See less

05/07/2012

pdf

text

original

Draft copy for adoption: LABORATORY MANUAL

ELECTRONIC CIRCUITS ANALYSIS B.Tech II nd yr ECE

Prepared at siddarth institute of engineering and technology

Design and review by.

A.KARUNAKAR M.Tech., Assistant professor. s.HARI PRASAD B.Tech, Assistant professor. Department of E.C.E

LIST OF EXPERIMENTS

1.Common emitter amplifier 2. Common source amplifier 3.A two stage RC coupled amplifier 4.Current shunt and voltage series feedback amplifier 5.Cascade amplifier 6.Wien bridge oscillator using transistors 7.RC phase shift oscillator using transistors 8.Class A power amplifier 9.Class B complimentary symmetry amplifier 10.High frequency common base (BJT)/common gate (JFET) amplifier

ELECTRONIC CIRCUITS LAB
EXP . NO. 1. TWO STAGE RC-COUPLED AMPLIFIER 1. AIM: To Design and study the response of a two stage RC-coupled amplifier and calculation of gain and band width. 2. EQUIPMENTS AND COMPONENTS: i.APPARATUS 1. CRO (Dual channel)DC-20 MHz 2. Bread Board 3. Regulated power supply- 0-30v 1 A, 4. DMM 3 ½ Digit LCD hand held 5. Function generator ! MhZ ii.COMPONENTS: 1. 62kΩ Resistor – 2 No. 2. 4.7kΩ Resistor – 3 No. 3. 1.5Ω Resistor – 2 No 4. 33kΩ Resistor – 2 No 5. 1kΩ Resistor – 2 No 6. 10 μ F/ 16 V Electrolytic Capacitor – 3 No. 7. 0.1 μF/16 V Electrolytic Capacitor – 2 No 8. Transistors – BC107 – 2 No. • All resistors are carbon / metal film ¼ W 5% unless otherwise specified. 1 No ! No. . 1 No. 1No 1 No.

3. THEORY: As the gain provided by a single stage amplifier is usually not sufficient to drive the load, so to achieve extra gain multi-stage amplifier are used. In multi-stage amplifiers output of one-stage is coupled to the input of the next stage. The coupling of one stage to another is done with the help of some coupling devices. If it is coupled by RC then the amplifier is called RC-coupled amplifier. Frequency response of an amplifier is defined as the variation of gain with respective frequency. The gain of the amplifier increases as the frequency increases from zero till it becomes maximum at lower cut-off frequency and remains constant till higher cut-off frequency and then it falls again as the frequency increases.

At high frequencies the reactance of inter electrode capacitance is very small and behaves as a short circuit. So.7 k . At mid frequencies the effect of coupling capacitors is negligible and acts like short circuit.0u 4.0k 6.5 k 1.0k T1 !NPN 245mv 33 .0k 62 . CIRCUIT DIAGRAM: Vcc 12. where as inter electrode capacitors acts like open circuit.0k 100.63v 4.7k 100. This increases the loading effect on next stage and service to reduce the voltage gain due to these reasons the voltage gain drops at high frequencies. the circuit becomes resistive at mid frequencies and the voltage gain remains constant during this range.0n 842mv 6.0 k 4. 4.0n 1.5 k 10 .63v 10.7 k Vin V 1.0u 10 .0u 842mv T2 !NPN 245mv Vout+ 1.0k 33 .0 62 .At low frequencies the reactance of coupling capacitor CC is quite high and hence very small part of signal will pass through from one stage to the next stage.

0k 10.2 k 47 .0k 1.2 k 8.0k 2.0 u 10 .94v 10. vi.0 cc 47 . Observed voltages 10 .05v T2 !NP N 2.0u 8. Vc2.4v Vout+ 10 0. iv.Vc1. vary the frequency from zero to 1 MHz.ALTERNATE CIRCUIT : V 12..94v 10.0 k V 10 0.C voltages of both stages and compare against estimated values. By keeping the amplitude of the input signal constant. Estimated voltages Vb1 .emitter and collector D. ii.0 u 5.0k 2. v. PROCEDURE: i.0k Vin 1. Ve1 Vb2.0k 10.0k 1.0u 10. Connect the circuit on bread board as shown in the circuit diagram.0u T1 !NPN 10 .2 k 1. Note down the amplitude of the output signal for corresponding values of input frequencies.0u 2.05v 10 . Ve2 iii.4v 2.0 k . Measure base . Plot in semi-log graph between gain vs frequency and calculate the band width. Calculate the voltage gain in decibels.

Calculate Band width. GRAPH: .6. OBSERVATIONS: S. CALCULATIONS: i. ii. Determine lower cut-off frequency and upper cut-off frequency from the graph.NO FREQUENCY VOUT GAIN= VOUT /VIN GAIN in dB 7. 8.

Radio Transmitters and Receivers. Band width = 10. Test Transistors before assembling the circuits Mark polarities of electrolytic capacitors and connect. Audio amplifiers 2. iv.Check the continuity of the connecting wires. PRECAUTIONS: i. Lower cut-off frequency = Upper cut-off frequency = iii. If you face any problem with signal on CRO due to wrong settings of the controls check up connections to CRO vi Resistors should be connected properly with out interchanging the values. INFERENCES: This circuit is useful for amplification by providing higher gain in the range __________ 11. Apply voltage from the power supply and proceed further only after obtaining expected DC voltages at base emitter collector of the transistors. 13. APPLICATIONS: 1. 12.9. vii . ii. If above are correct you can apply signal from function generator and monitor the output on CRO and adjust signal amplitude such that output seen in CRO is free from rounding and clipping of the signals. iii. RESULT: i. v. EXTENSIONS: . ii.

2. Check entire circuit for connections. Repeat this step towards high frequency end until amplitude falls by 30%. (2) Measure input impedance of amplifier (3) Study effect on overall LF cutoff due to individual RC couplings at the input and emitter by capacitors.In general multi-stage amplifiers are used to provide high overall gain for the applied input signal.NO 1. In order to avoid this effect intentionally a large capacitors of 0.Let this be f2. We can extend low frequency range by increasing coupling and bypass capacitors. . Special tip to measure Bandwidth without graph.Let this be f1. we can ensure constant gain against device parameters. By employing negative feedback. This experiment is carried on with two stages of amplifiers operating with low current. 14. FAULT If there is no output If the output is distorted If DC voltages differ very much DIAGNOSIS Check Vcc and all DC voltages. 3. Check Vcc and all DC voltages Check amplitude of input signal. TROUBLE SHOOTING: S. 15. RC coupling can be made between amplifiers with any type of biasing methods instead of voltage divider bias as shown. graph. An alternate circuit is shown to enlarge this scope of study of RC amplifier (1) study effect of individual LF cutoff on the overall cutoff. (4) Apply small square wave and measure rise times on individual stages and verify formula on rise times. Note amplitude at mid band and vary frequency towards low frequency till amplitude falls by 30% . Check CRO connections.1 microfarad or the like is connected such that high frequency cutoff falls well below 1 megahertz. we verified this with two stages coupled with resistors and capacitors. Check function generator. We can extend the circuit diagram with one or more stages cascading with the given two stages RC coupled amplifier. resistance values and placements Check Transistors. Band width is f2-f1. In this experiment. (5) Since high frequency cutoff is determined by output capacitance of transistors 1:1 probes used on CRO can lower HF cutoff.

3. AIM: To design a transistorized series voltage regulator and study the regulation action for i. CRO (Dual channel)DC-20 MHz Bread Board Regulated power supply. . What are the advantages and disadvantages of multi-stage amplifiers? Why gain falls at HF and LF? Why the gain remains constant at MF? Explain the function of emitter bypass capacitor. 2.0-30v 1 A. if three identical stages are cascaded? Mention the applications of two-stage RC-coupled amplifiers. By how many times effective upper cut-off frequency will be reduced. ix. 1No .2 SERIES VOLTAGE REGULATOR 1. 2. when N-number of stages are cascaded. DMM 3 ½ Digit LCD hand held 1 No ! No. v. EXP. ii. ii Different values of input voltages Different values of load resistors and also to find percentage regulation. iv.15. EQUIPMENTS AND COMPONENTS: i. QUESTIONS: i.NO.APPARATUS 1. Ce? How the band width will effect as more number of stages are cascaded? Define frequency response? Give the formula for effective lower cut-off frequency. Explain the effect of coupling capacitors and inter-electrode capacitances on overall gain. x. viii. 4. vi. 1 No. vii. iii.

ii. 4. So. must be operated in reverse break down region. THEORY: Voltage regulator is a device designed to maintain the output voltage as nearly constant as possible. where it provides constant voltage irrespective of changes in applied voltages. 2. Similarly. COMPONENTS: 1. 4.The output voltage of the series voltage regulator is Vo = Vz – Vbe. Since. CIRCUIT DIAGRAM: . 5. this increase in load causes an increase in Vo and makes Vo as constant. 1kΩ Resistor – 1 No. 3. 1k . the regulation action happens when Vo increases also. 10k (load resistors ) – 1 No each. Transistor – SL100 – 1 No. In transistorized series voltage regulator the control element is a transistor which is in series with load. Zener diode – 1 No. when Vo decreases Vbe increases. Vz is constant. 4.7k. 3. any change in Vo must cause a change in Vbe in order to maintain the above equation. It monitors the output voltage and generates feed back that automatically increases are decreases the supply voltage to compensate for any changes in output voltage that might occur because of change in load are changes in load voltages. • All resistors are carbon / metal film ¼ W 5% unless otherwise specified. 560Ω Resistor – 1 No. which causes the transistor to conduct more and to produce more load current. 2k .

C voltages and compare against estimated values. For a specific value of load resistor.0 30v V 5. V NL − V FL x100 Percentage regulation = V FL Plot the graph for load regulation and line regulation. v.0k 10 Vin 1.560. Ve1 Vz iv. Measure base . vi. 6. Observed voltages viii. Apply the input voltage from power supply. OBSERVATIONS: . Estimated voltages Vb1 . Change the load resistor and repeat steps 2 and 3. vary the input voltage from 10 to a maximum of 20 volts and not the values of output voltage. iii.0 1. Find percentage regulation.Vc1. Connect the circuit as shown in the circuit diagram. ii.emitter and collector D. vii.0k T1 !NPN Z1 BZD27 -C5 V1 Vout + 1. PROCEDURE: i. Remove the load resistor and note down the voltage at no load.

GRAPH: . CALCULATIONS: Percentage load regulation = V NL − V FL x100 = V FL Percentage Line Regulation = (change in output ) / (change in input) X 100 8.S.no Vin RL= Output voltage RL= RL= 7.

zener diode before assembling in the circuits. Regulating range is____________ For RL = ----------------. INFERENCES: This Series Regulator is useful for the input voltage range ______________ 11. Regulating range is____________ 10. RESULT: For RL = ----------------.9. Test Transistors. PRECAUTIONS: i. . Regulating range is____________ For RL = ----------------.

v. Apply voltage from 15 V and ensure the DC voltages as shown the circuit are obtained. Low current applications.1 volts respectively. The series transistor would be a power transistor with high current capacity and would be mounted to heat sink. For example. TROUBLE SHOOTING: . we can use the same circuit with two Zener diodes of values 3. EXTENSIONS: The main function of voltage regulator is to regulate the changes in output voltage for the changes occur either in input voltage variations or output load variations. variable regulated voltage can be obtained from circuit given below. iii. The experiment is conducted is of simplest type to demonstrate use of zener and series pass transistor without any unregulated voltage power supply. 3. One can obtain different fixed voltages by suitably changing the zener diode. In real application regulated power supply used at the input of this experiment will be replaced by a full wave or bridge rectifier with capacitor input filter suitable to the load and ripple voltages expected. In this experiment we have verified for one particular value of output voltage. 12. to obtain voltage regulation at 8. Check circuit connections and components if expected voltages are not obtained. Don't short the output as this would result in large current through the series transistor which will lead to burning of the same due to overheat. If Zener is reversed no damage will occur but output voltage will fall down to 0 V. 14. One can obtain higher current ratings by employing suitable series power transistor and heat sinks.1 volts and 5. Check resistor values properly otherwise power supply may be over loaded due to small values.2 volts. must be connected in series. 2. Ripple can be simulated by change in input and the corresponding change in output at a constant load current. iv. By employing a series regulator with error amplifier . We can obtain voltage regulation at higher voltages with the help of more number of Zener diode operating in break down region. 13.ii. APPLICATIONS: 1. Fixed voltage applications Extention of zener regulator for higher currents.

. Define voltage regulator. Explain the feed back mechanism in series voltage regulator. . What is ideal value ?. viii. 2. iii.. x.S. Which element determines output ripple ? What determines maximum load current allowed in this circuit ? Mention the applications of series voltage regulator. iv. If DC voltages differ very much Check entire circuit for connections. Define no load voltage and full load voltage. vi. v. In series voltage regulator which is control element and explain its function. ix. Give the advantages of series voltage regulator. Explain the term percentage regulation. Define load and line regulation. Check CRO connections. FAULT If there is no output DIAGNOSIS Check Vi and all DC voltages. . 15. vii. resistance values and placements Check Transistors. ii.NO 1. QUESTIONS: i.

which is in shunt with load voltage. 1k .COMPONENTS: 1. EQUIPMENTS AND COMPONENTS: i. In shunt voltage regulator transistor Q1 acts as control element. 3. 4. 1No ii. Transistor – SL100 – 2No. DMM 3 ½ Digit LCD hand held 1 No ! No. 5.7k. 2. 3. The output voltage is given as Vo = Vz + VR1 = Vz + Vbe1 + Vbe2 The regulation action of the circuit is explained below : Since Vz is constant. As a result the base current of Q1 decreases which allows the load . voltage across R1 decreases which in turn decreases the base voltage of Q2. 3. THEORY: A voltage regulator is a device or a combination of devices. design to maintain the output voltage of a power supply as nearly constant as possible even if there are changes in load or in input voltage.1No. ii Different values of input voltages Different values of load resistors and also to find percentage regulation. 2. 10k (load resistors ) – 1 No each. 4. CRO (Dual channel)DC-20 MHz Bread Board Regulated power supply. any changes in output voltage reflects a propositional change in R1. AIM: To design a transistorized shunt voltage regulator and observing the regulation action for i. 3 SHUNT VOLTAGE REGULATOR 1. 1kΩ Resistor – 1 No. If the output voltage decreases. Zener diode – IN 4007 . 4. • All resistors are carbon / metal film ¼ W 5% unless otherwise specified. .NO. 1 No.0-30v 1 A.APPARATUS 1. 2k . 2. 560Ω Resistor – 1 No.EXP .

4.7k .2k .0 1N3 78 5 Vz = 6.0 k 1.voltage to rise and makes it constant the same regulation action follows even if the output voltage increases.10k 1.3v Vdc 2 0. CIRCUIT DIAGRAM: R + 5 6 S + 0 E + D 1 V R 0 0+ L z U S n r e g u l a t e d u p p l y P Q S L o w 2 1 0 0+ e r S Q L 1 1 V o V b e 2 V b e 1 R 1 1 k - - ALTERNATE CIRCUIT : 180. 4.0 k .0 T1 !NPN R L = 1k.

Percentage regulation = vii. Ve2 Vz iv. v. vary the input voltage from zero to a maximum of 20 volts and note the values of output voltage. Connect the circuit as shown in the circuit diagram. ii. Find percentage regulation.emitter and collector D. Remove the load resistor and note down the voltage at no load.Vc2. Measure base . V NL − V FL x100 V FL Plot the graph for load regulation and line regulation. For a specific value of load resistor. Estimated voltages Vb1 . iii. Apply the input voltage from power supply. Change the load resistor and repeat steps 2 and 3.5. PROCEDURE: i. Observed voltages . iv.C voltages and compare against estimated values. Ve1 Vb2 .Vc1. vi.

OBSERVATIONS: VOLTAGE AT NO-LOAD = S.6. GRAPH: V NL − V FL x100 V FL .no Vin RL= Output voltage RL= RL= 7. CALCULATIONS: Percentage regulation = 8.

Proceed on the experiment only after obtaining expected DC voltages do not apply more than 20 V without connecting load on the output as this would result in maximum current in shunt transistors. 2. Low current applications. EXTENSIONS: The main function of voltage regulator is to regulate the changes in output voltage for the changes occur either in input voltage variations or output load variations. Reversing the zener may not damage the circuit but result in output voltage to drop 2 V or less. 12. For example. PRECAUTIONS: i. Shorting the output will result in overheating series resistors which may burn at high voltage.1 volts respectively. must be connected in series.2 volts. ii. Regulating range is____________ For RL = ----------------. iii. we can use the same circuit with two Zener diodes of values 3. INFERENCES: This Shunt Regulator is useful for the input voltage range ______________ 11. RESULT: For RL = ----------------. Regulating range is____________ 10. We can obtain voltage regulation at higher voltages with the help of more number of Zener diode operating in break down region. In this experiment we have verified for one particular value of output voltage. . Regulating range is____________ For RL = ----------------.9. to obtain voltage regulation at 8.1 volts and 5. Fixed voltage applications 13. APPLICATIONS: 1.

If DC voltages differ very much Check entire circuit for connections. .The experiment is conducted is of simplest type to demonstrate use of zener and series pass transistor without any unregulated voltage power supply. 15. Mention the differences between shunt and series voltage regulators. ii. vi. Can you do the experiment without Q2 ?. If there is no output DIAGNOSIS Check Vi and all DC voltages. 2. What is current through zener in this circuit ? When is dissipation maximum in this circuit ? In the circuit of shunt voltage regulator which element is considered control element and explain its function. resistance values and placements Check Transistors. ix.4 v for input of 20v what was the wrongly connected ? Mention the applications of shunt voltage regulator.NO FAULT 1. How can you increase current range of regulator ? If output is 1..Ripple can be simulated by change in input and the corresponding change in output at a constant load current. . . viii. Check CRO connections. One can obtain higher current ratings by employing suitable series power transistor and heat sinks. iii. QUESTIONS: i. And load regulation. TROUBLE SHOOTING: S. What is the function of Q1 and Q2 in the shunt regulator . 14. iv.circuit ? Define the line regulation. One can obtain different fixed voltages by suitably changing the zener diode. v. The series transistor would be a power transistor with high current capacity and would be mounted to heat sink. In real application regulated power supply used at the input of this experiment will be replaced by a full wave or bridge rectifier with capacitor input filter suitable to the load and repule voltages expected. x. vii.

. In class-A power amplifiers. NO. Transistor – SL100 – 1No. It is also called as direct coupled amplifier.1 μF/16 V Electrolytic Capacitor – 2 No. ii. To deliver more power it requires large input signals. EQUIPMENTS AND COMPONENTS: i. 4. 0. AIM: To design a series fed class-A power amplifier in order to achieve max out put ac power and efficiency.EXP. ICQ = Zero signal collector current VCEQ = Zero signal collector to emitter voltage Power amplifiers are mainly used to deliver more power to the load. • All resistors are carbon / metal film ¼ W 5% unless otherwise specified. 3. 3. 1 No. Under zero signal condition. Q-point is located in the middle of DC-load line.APPARATUS 1. 1kΩ Resistor – 2 No. 2. so generally power amplifiers are preceded by a series of voltage amplifiers. DMM 3 ½ Digit LCD hand held Function generator ! MhZ 1 No ! No. The maximum theoretical efficiency is 25%. maximum power dissipation occurs across the transistor. 20kΩ Resistor – 1 No. CRO (Dual channel)DC-20 MHz Bread Board Regulated power supply. . 3. As the input signal amplitude increases power dissipation reduces. 5. 1No 1 No. THEORY: The above circuit is called as “series fed” because the load RL is connected in series with transistor output. 4. COMPONENTS: 1. 4 SERIES FED CLASS-A POWER AMPLIFIER 1. 2.0-30v 1 A. 2. So output current flows for complete cycle of input signal.

PROCEDURE: i. Keep the input signal at constant frequency under mid frequency region and adjust the amplitude such that output voltage undistorted.Vc1.0 2. Calculate the power efficiency and compare it with theoretical efficiency.C voltages of both stages and compare against estimated values. ii. Ve1 iii.CIRCUIT DIAGRAM: 20 . Apply the input at input terminals of the circuit from the function generator.0 k Vcc 5.0n T1 !NPN 666mv A 1.0k 1. v.0n + 100. Make the connections as per the circuit diagram. Measure base . iv. Estimated voltages Vb1 .emitter and collector D.0 k iL + V Vout Vin 5.83v 100. OBSERVATIONS: Efficiency is defined as the ratio of AC output power to DC input power DC input power = Vcc x ICQ . i. Observed voltages 6.4.

VBE ) / RB ICQ = β x IBQ VCE = Vcc . GRAPH: .AC output power = VP-P2 / 8RL 7. CALCULATIONS: Under zero signal condition: Vcc = IBRB + VBE IBQ =( Vcc .ICRC 8.

6 V. Hence. RESULT: The maximum input signal amplitude which produces undistorted output signal is _________ The practical efficiency of the circuit is ________ 10. It is a necessary to find a suitable RB required for biasing the amplifier collector at the centre of voltage VCC/2 i. the circuit will not give that efficiency to all its input signals of different amplitudes. PRECUATIONS: i.e. where high efficiency is not required. iii.e. depending on the input signal we have to choose Vcc to obtain a particular efficiency. 13. . APPLICATIONS: This is used for low power linear applications in audio and wideband RF range. 12. ii. While observing on CRO at collector of the transistor you can verify whether you are getting undistorted peak to peak signal of at least 10 to 11 V Since AC and DC load lines are different peak to peak signal without connecting capacitor and load on the collector of transistor will be different than the reading with above connected. EXTENSIONS: In series fed class-A power amplifier we have calculated the efficiency i. INFERENCES: The efficiency observed is ___________ against theoretical maximum of 25%. this shall be done by trial and error or using a decade resistance box. efficiency can be improved to 50%. .9. how efficiently DC-power is converted into AC-power depending on the magnitude of input signal Once we design a power amplifier for a particular efficiency. since ___________________ 11. By employing Transformer coupling.

iv. TROUBLE SHOOTING: S. FAULT If there is no output If the output is distorted If DC voltages differ very much DIAGNOSIS Check Vcc and all DC voltages. 15. viii. Actual power amplifiers operate at 1 watt to 100 watts. vi. iii. ii. resistance values and placements Check Transistors. ix. 5 TRANSFORMER COUPLED CLASS-A POWER AMPLIFIER . 2. Check function generator. v. This will call for operating transistors high current and small value resistors of greater than 1/4 to 1 watt which are used in the laboratory. DC load line?. Check entire circuit for connections. Differentiate between voltage amplifier and power amplifier Why power amplifiers are considered as large signal amplifier? When does maximum power dissipation happen in this circuit ?. QUESTIONS: i. vii.The experiment is conducted using low power transistors like BC107. How do you locate the Q-point ? What are the applications of class-A power amplifier? EXP. What is the maximum theoretical efficiency? Sketch wave form of output current with respective input signal. What are the different types of class-A power amplifiers available? What is the theoretical efficiency of the transformer coupled class-A power amplifier? What is difference in AC. Check Vcc and all DC voltages Check amplitude of input signal. SL100 only to get familiarity in biasing and measurement. 3.NO 1. NO. 14. Actual power amplifiers use heat sinks on the transistors. Check CRO connections. x.

Transistor – SL100 – 1No. ii. 3. To achieve maximum efficiency we can use transformer to couple the load. Since transformer is used for impudence matching which facilitates the coupling between lower resistance and source impudence? Due to AC coupling no DC power is wasted in the load resistor. The load DC resistance of transformer primary allows any desired level of collector current. CRO (Dual channel)DC-20 MHz Bread Board Regulated power supply. By this way the efficiency is increased.AIM: To design a transformer coupled class-A power amplifier in order to achieve maximum out put AC power and efficiency. 1kΩ Resistor – 1No. 10kΩ Resistor – 1No. 2. 2. • All resistors are carbon / metal film ¼ W 5% unless otherwise specified. 5. 3. 6. EQUIPMENTS AND COMPONENTS: i. while transferring only variations to RL. 5. 0. THEORY: In direct coupled class-A power amplifier. Impedance matching Transformer – 1 No.0-30v 1 A. 3. COMPONENTS : 1. 4. DMM 3 ½ Digit LCD hand held Function generator ! MhZ 1 No ! No. 1No 1 No. Efficiency is defined as the ratio of AC output power to DC input power .1.APPARATUS 1. 4.1 μF/16 V Electrolytic Capacitor – 1 No. 1 No. . power is wasted in load resistance which leads to decrease in efficiency. The maximum theoretical efficiency of transformer coupled power amplifier is 50%. 100KΩ Resistor – 1No. 2.

Keep the input signal at constant frequency under mid frequency region and adjust the amplitude such that output voltage undistorted. Apply the input at input terminals of the circuit from the function generator. ii. Measure base. Estimated voltages Vb1 . Make the connections as per the circuit diagram. PROCEDURE: i.0 10 0.0k 11. iv. Ve1 iii. Observed voltages .DC input power = Vcc x ICQ AC output power = VP-P2 / 8RL 4.0 k A Ic T/ F 1. CIRCUIT DIAGRAM: + Vcc 12.0n 10 .C voltages and compare against estimated values.49v 626m v T1 !NPN Vin 5.0 k Vout + V 100.Vc1. emitter and collector D.

v. GRAPH: OutputACpower InputDCpower . CALCULATIONS: Input DC power = Vcc x ICQ Output AC power = Vrms x Irms = VPP2 / 8RL η= 8. 6. Calculate the power efficiency and compare it with theoretical efficiency. OBSERVATIONS: Efficiency is defined as the ratio of AC output power to DC input power DC input power = Vcc x ICQ AC output power = VP-P2 / 8RL 7.

iv. how efficiently DC-power is converted into AC-power depending on the magnitude of input signal. depending on the input signal we have to choose Vcc to obtain a particular efficiency. PRECUATIONS: i. the circuit will not give that efficiency to all its input signals of different amplitudes. since ___________________ 11. v. Check the circuit connections before switching on the power supply. EXTENSIONS: In Transformer coupled class-A power amplifier we have calculated the efficiency i. Once we design a power amplifier for a particular efficiency. Check the continuity of the connecting wires. INFERENCES: The efficiency observed is ___________ against theoretical maximum of 50%. RESULT: a) The maximum input signal amplitude which produces undistorted output signal is _________ b) The practical efficiency of the circuit is ________ 10. By employing Transformer coupling. vi.9. iii. Power handling capacity of resistor should be kept in mind Control wires must be checked before use Maximum forward current should not exceed value given in data sheet Resistors should be connected properly with out interchanging the values. 12.e. 13. APPLICATIONS: This circuit is used for Impedance matching and DC isolation. Hence. SL100 only to get famimiliarity in biasing and measurement. efficiency can be improved to 50%. Actual power amplifiers operate at 1 watt to . ii. The experiment is conducted using low power transistors like BC107.

Check entire circuit for connections. v. Check transformer. viii. vi. Check CRO connections. What is collector voltage of transistor with no and maximum signal? How is DC and AC power measured in this circuit? For class-A operation how did you locate the Q-point.. This concept can be applied for RF and Impedance matching. QUESTIONS: i. 2. Differentiate between voltage amplifier and power amplifier Explain impedance matching provided by transformer? How do you determine ratings for transistor in this circuit ?. 14. .100 watts. iv. TROUBLE SHOOTING: S. ii. What is the maximum theoretical efficiency of this amplifier ? What is the range of conduction angle of output current with respective input signal? Sketch DC load line and AC load line for this amplifier. Check transistors. iii . Actual power amplifiers use heat sinks on the transsistors. 3. vii. Check function generator.NO 1. ix. FAULT If there is no output DIAGNOSIS Check Vcc and all DC voltages. This will call for operating transistors high current and small value resistors of greater than 1/4 to 1 watt which are used in the laboratory. resistance values and placements. Check Vcc and all DC voltages Check amplitude of input signal. If the output is distorted If DC voltages differ very much 15.

What are the applications of class-A power amplifier? EXP. DMM 3 ½ Digit LCD hand held Function generator ! MhZ 1 No ! No.x. AIM: To design a complementary-symmetry class-B push-pull power amplifier in order to achieve maximum out put AC power and efficiency. .0-30v 1 A.COMPONENTS: . 2. 1No 1 No. 6 COMPLEMENTARY-SYMMETRY CLASS-B POWER AMPLIFIER 1. 5. 3. NO. 2. 1 No. ii. 4. EQUIPMENTS AND COMPONENTS: i.APPARATUS 1. CRO (Dual channel)DC-20 MHz Bread Board Regulated power supply.

3. In class-B power amplifier Q-point is located either in cut-off region or in saturation region. Transistors . that only 180o of the input signal is flowing in the output. 3. NPN and PNP are used. These transistors acts as emitter follower with both emitters connected together. THEORY: Power amplifiers are designed using different circuit configuration with the sole purpose of delivering maximum undistorted output power to load. Since. So. 2. the two transistors are complement of each other and they are connected symmetrically so.SL100 – 1 No. 8Ω ¼ W 5% CF Resistor – 1 No. 1 μ F /16 V Electrolytic Capacitor – 1 No. In complementary-symmetry class-B power amplifier two types of transistors. during the positive half cycle of input signal NPN transistor conducts and during the negative half cycle PNP transistor conducts.1. the name complementary symmetry has come Theoretically efficiency of complementary symmetry power amplifier is 78. In complementary-symmetry power amplifier. Push-pull amplifiers operating either in class-B are class-AB are used in high power audio system with high efficiency.5%.CIRCUIT DIAGRAM: . 4. 4. Transistor – SK 100 – 1 No.

0u V in S 100 !P K NP V 5.V 5.0 cc S L100 !NP N 1.0 ee 0v V out 8.0 + V ALTERNATE CIRCUIT : .

Connect the circuit has shown in the circuit diagram.3 Vout 1.0u V -658mv SK100 !PNP 22 0.0 k Vin 18 . Ve2 Observed voltages iii.Vcc 12. Estimated voltages Vb1 .0u 22 0.0 k 10.0 10. . Vc2. Apply the input at input terminals of the circuit from the function generator.0k 18 .0k 658mv SL100 !NPN 4. Ve1 Vb2. Measure base .C voltages of both transistors and compare against estimated values.3 4. ii.Vc1.emitter and collector D.0k + 1.0 5.0k Vee 12. PROCEDURE: i.

6. CALCULATIONS: Input DC power = Vcc x ICQ Output AC power = Vrms x Irms = VPP2 / 8RL η= OutputACpower InputDCpower 8. Calculate the power efficiency and compare it with theoretical efficiency. GRAPH: . OBSERVATIONS: Efficiency is defined as the ratio of AC output power to DC input power DC input power = Vcc x ICQ AC output power = VP-P2 / 8RL 7. Keep the input signal at constant frequency under mid frequency region and adjust the amplitude such that output voltage undistorted. v.iv.

SK100. Transistors recommended are SL100. ii. Use matched pair NPN & PNP transistors for this experiments. 11. because of ______________. PRECUATIONS: i. . INFERENCES: The practical efficiency of the circuit is ________. Matching can be done by observing hfe of the transistor using DMM.9. RESULT: The maximum input signal amplitude which produces undistorted output signal is _________ The practical efficiency of the circuit is ________ 10.

. Do not short the output which will result in burning of the transistors. 2. 3. Actual amplifier circuits of above type can be found in audio systems. crossover distortion and driving small loads without transformer. Transistors heat up at large signal which is necessary to obtain high efficiency. In view of large power involved special ICs. Transistors with heat sinks are common. 14. Check Vcc and all DC voltages Check amplitude of input signal. ensure obtaining expected DC voltages and proceeds after that. Check CRO connections.NO 1. These drive loud speakers directly without any transformers. Check function generator.iii. FAULT If there is no output If the output is distorted If DC voltages differ very much DIAGNOSIS Check + and – ve DC voltages. v. vi. resistance values and placements Check Transistors. EXTENSIONS: This experiment is designed with low power and low load current only to demonstrate basic principles of maximum efficiency. Present audio systems have power ratings as much as 1000 watts and radios have above 10 watts. Check entire circuit for connections. iv. In the absence of signal DC voltage at emitters is 0 V. APPLICATIONS: This circuit is used to drive low impedance without Transformer. These use complementary class B power amplifiers in the basic are modified forms. TROUBLE SHOOTING: S. 13. When alternate circuit uses series resistors to compensate any difference in VBE of transistors. radio output stages of modern designs. 12. This circuit is used to drive low impedance from DC onwards.

Iii . ? How can you reduce cross over distortion? . ix. vii.15. x. QUESTIONS: i. v. viii. iv. How do you measure DC and AC out put of this amplifier? Is this amplifier working in class A or B. ii. vi. Differentiate between voltage amplifier and power amplifier Explain impedance matching provided by transformer? Under what condition power dissipation is maximum for transistor in this circuit? What is the maximum theoretical efficiency? Sketch current waveform in each transistor with respective input signal? How do you test matched transistors required for this circuit with DMM?. What is the theoretical efficiency of the complementary stage amplifier.

To couple the power to load The resonant circuits in tuned power amplifier are called tank circuits. 7 CLASS-C TUNED POWER AMPLIFIER 1. 10kΩ Resistor – 1 No. 4. 4. EQUIPMENTS AND COMPONENTS: i. NO. 0. 5. 3. ii.APPARATUS 1. 2. 1 No.1 μF/16 V Electrolytic Capacitor – 1 No. To provide correct load impedance to the amplifier. 3. 4.EXP. Transistor – SL100 – 1No. Since efficiency is high and harmonic distortion will not be a problem since only one frequency is to be amplified and the tuned circuit will reject the other frequencies. To reject unwanted harmonics. The function of resonant circuits are: 1. But the difficulty with class-C operation is harmonic distortion is more. 3. 1No 1 No. THEORY: The efficiency of output circuit of an amplifier increases as the operation is shifted from class-A to B and then to C. • All resistors are carbon / metal film ¼ W 5% unless otherwise specified. It is tuned amplifier and only one frequency fo is to be amplified and power to be handled Po is large. AIM: To design class-C tuned power amplifier and to study the class-c tuned power amplifier.0-30v 1 A.10 nF/16 V Electrolytic Capacitor – 1 No. 2. 10 mH Inductor – 1 No 6. 3. 2. . 5. .COMPONENTS : 1.7kΩ Resistor – 1 No. CRO (Dual channel)DC-20 MHz Bread Board Regulated power supply. DMM 3 ½ Digit LCD hand held Function generator ! MhZ 1 No ! No. In class-C amplifiers efficiency approaches 100%. 2.

Connect the circuit as shown in diagram. Apply the DC voltage (Vcc) from regulated power supply. CIRCUIT DIAGRAM: Vcc=+5V 10nF 10k SL 100 DC INPUT VOLTAGE Vin 5. PROCEDURE: i. ii. Adjust the input frequency such that output voltage is a perfect since sinusoidal waveform at a fixed frequency.. iv. 4.7k + + Vout 100nF 10 m H . iii.4. The input terminals are connected to function generator and output terminals are connected to CRO.

Plot the waveforms of both input and output The frequency at which the voltage is max and the frequency should be compared with theoretical values. vii. OBSERVATIONS: The value of Resonant frequency at which maximum gain occurred is _________. Note down corresponding output voltages at different frequencies. vi. 7.v. GRAPH: . 6. CALCULATIONS: Theoretical value of resonant frequency =____________________ 8.

10. ii.9. Check the circuit connections before switching on the power supply. PRECUATIONS: i. INFERENCES: This circuit can be used as class – C tuned power amplifier at the resonant frequency possible is _________________ 11. . Check the continuity of the connecting wires. RESULT: The frequency at which the maximum amplification possible is _________.

NO 1.with multi meter before putting in circuits. check all diodes transistors. donot proceed unless you get expected dc voltages. 15. To make measurements simple the resonant frequency is chosen around 10 to 20 Khz. EXTENSIONS: This experiment is conducted with simplest circuit to demonstrate class C operation and small power. 12. vi. In real application class C amplifiers are used at higher power and frequencies of RF range which will call for low values of inductance and high quality capacitors and transistors. Real circuits employing class C operations are found in radio transmitters. Check if signal around resonance freq 2. vii.O .iii.R. But real application load is a part of resonant circuit to reflect load on tank circuit to determine Q of the circuit. TROUBLE SHOOTING: S. 14. viii. iv. v. coils . Radio transmitters operate at 10 to 30 Kwatts employing vaccum tubes. Power handling capacity of resistor should be kept in mind Control wires must be checked before use Maximum forward current should not exceed value given in data sheet Resistors should be connected properly with out interchanging the values. APPLICATIONS: This is mainly used In radio transmitters and radio receivers 13. By changing value of the load one can obtain different band width as employed in the circuit used. Small output Check function generator output. ultrasonic cleaners. FAULT If no output DIAGNOSIS Check whether C. QUESTIONS: .

How is class C operation obtained in this circuit ? v. Specify the applications of Tuned amplifiers. What is Q of Tuned circuit employed in circuit ? iv. Differentiate between Narrow band and Wideband tuned amplifiers ? vii.NO. x. How is harmonic distortion is reduced in class-C Tuned amplifiers? viii. What are the different types of tuned circuits ? ii. State relation between resonant frequency and bandwidth of a Tuned amplifier. Sketch current waveform in the transistor.8 VARIABLE SERIES VOLTAGE REGULATOR .i.. EXP. Calculate bandwidth of a Tuned amplifier whose resonant frequency is 15KHz and Q-factor is 100. vi. ix. How do you measure DC and AC power in the class C amplifier ? iii.

3. 1. AIM: To design a transistorized variable series voltage regulator and study the regulation action for i. In transistorized series voltage regulator the control element is a transistor which is in series with load. 3.1. 4.8kΩ Resistor – 1 No. 2. Zener diode – IN 5253 – 1 No. 1k . Different values of input voltages ii Different values of load resistors And also to find percentage regulation. EQUIPMENTS AND COMPONENTS: i. COMPONENTS: 1. THEORY: Voltage regulator is a device designed to maintain the output voltage as nearly constant as possible. The main element used for regulation of output voltage is Zener diode. Transistor – SL100 – 2 No.7k. 2. 10kΩ variable Resistor – 1 No 5. 1No ii. 10kΩ Resistor – 1No 4. where it provides constant voltage irrespective of changes in applied voltages. 4. 10k (load resistors ) – 1 No each. 7. 3. 1 No. The output voltage of the series voltage regulator is Vo = Vz – Vbe. DMM 3 ½ Digit LCD hand held 1 No ! No. 6.0-30v 1 A. 4.7kΩ Resistor – 1 No. It monitors the output voltage and generates feed back that automatically increases are decreases the supply voltage to compensate for any changes in output voltage that might occur because of change in load are changes in load voltages. 2.APPARATUS 1. CRO (Dual channel)DC-20 MHz Bread Board Regulated power supply. 2k . • All resistors are carbon / metal film ¼ W 5% unless otherwise specified. . . which must be operated in reverse break down region.

Remove the load resistor and note down the voltage at no load.emitter and collector D. Measure base . Apply the input voltage from power supply. V ou t 15-30V SL100 RL 0.C voltages and compare against estimated values.7k 1. v. which causes the transistor to conduct more and to produce more load current. Vz is constant. this increase in load causes an increase in Vo and makes Vo as constant.1V 5.8k 10. Connect the circuit as shown in the circuit diagram. Similarly. iv. when Vo decreases Vbe increases. any change in Vo must cause a change in Vbe in order to maintain the above equation.0 . Change the load resistor and repeat steps 2 and 3. Estimated voltages Vb1 . vi. the regulation action happens when Vo increases also. Ve1 Vz iii. iii. Observed voltages vii. CIRCUIT DIAGRAM: SL100 4. For a specific value of load resistor.0k 10. vary the input voltage from 10 to a maximum of 20 volts and not the values of output voltage. PROCEDURE: i. Find percentage regulation.0k 5. ii. 4. V NL − V FL x100 Percentage regulation = V FL Plot the graph for load regulation and line regulation. So.Vc1.Since.

GRAPH: . CALCULATIONS: Percentage load regulation = V NL − V FL x100 = V FL Percentage Line Regulation = (change in output ) / (change in input) X 100 8.no Vin RL= Output voltage RL= RL= 7. OBSERVATIONS: S.6.

Regulating range is____________ For RL = ----------------. PRECAUTIONS: . Regulating range is____________ For RL = ----------------. Regulating range is____________ 10. RESULT: For RL = ----------------.9. INFERENCES: This Series Regulator is useful for the input voltage range ______________ 11.

Check resistor values properly otherwise power supply may be over loaded due to small values. iii. One can obtain higher current ratings by employing suitable series power transistor and heat sinks. Check circuit connections and components if expected voltages are not obtained. For example. In this experiment we have verified for one particular value of output voltage. . 13. Low current applications. If Zener is reversed no damage will occur but output voltage will fall down to 0 V.i. The series transistor would be a power transistor with high current capacity and would be mounted to heat sink. Apply voltage from 15 V and ensure the DC voltages as shown the circuit are obtained.2 volts. We can obtain voltage regulation at higher voltages with the help of more number of Zener diode operating in break down region. v.Ripple can be simulated by change in input and the corresponding change in output at a constant load current. must be connected in series. ii. Fixed voltage applications Extension of zener regulator for higher currents. 2. variable regulated volatage can be obtained from circuit given below. iv. we can use the same circuit with two Zener diodes of values 3. One can obtain different fixed voltages by suitably changing the zener diode. to obtain voltage regulation at 8. EXTENSIONS: The main function of voltage regulator is to regulate the changes in output voltage for the changes occur either in input voltage variations or output load variations. In real application regulated power supply used at the input of this experiment will be replaced by a full wave or bridge rectifier with capacitor input filter suitable to the load and repule voltages expected.1 volts respectively.1 volts and 5. zener diode before assembling in the circuits. APPLICATIONS: 1. The experiment is conducted is of simplest type to demonstrate use of zener and series pass transistor without any unregulated voltage power supply. 3. By employing a series regulator with error amplifier . 12. Don't short the output as this would result in large current through the series transistor which will lead to burning of the same due to overheat. Test Transistors.

15. QUESTIONS: i. vi. . FAULT If there is no output If DC voltages differ very much DIAGNOSIS Check Vcc and all DC voltages. v. Check entire circuit for connections. Define voltage regulator. Which element determines output ripple ? What determines maximum load current allowed in this circuit ? Mention the applications of series voltage regulator. vii. viii. TROUBLE SHOOTING: S. Define load and line regulation. ix.. . Give the advantages of series voltage regulator.. Explain the term percentage regulation. iv. 2. In series voltage regulator which is control element and explain its function. x. iii. . Explain the feed back mechanism in series voltage regulator. ii. Define no load voltage and full load voltage. What is ideal value ?.NO 1. resistance values and placements Check Transistors.14.

Current measurements. 1 1. Low battery. Functional Buttons: Below table indicates the functional button operations Buttons POWER (Yellow Switch) Operation Performed Turn the Meter ON and OFF . A and COM): Test leads are inserted into these jacks for Voltage. DCA.APPENDIX . Diode. mA. Continuity & Diode checks. 2. and features symbols indicating ranges.I : INTRODUCTION TO INSTRUMENTS USED 1. DCV. Input Socket for Transistor Test: NPN or PNP transistors are inserted in the sockets provided to measure their ratings. Input Jacks (VΩ. Function Selector: To select ACV. THE MULTIMETER STRUCTURE Fig. 3. Continuity & Transistor test. ACA. Resistance. 4. Resistance. LCD Display: A 3 ½ digit display (maximum reading 1999) indicates measured values.

3  .+ 1 MEANING Indicates negative reading The battery is low. which could lead to possible electric shock or personal injury. Warning: 2 ! To avoid false readings. Indicates the range in which the switch position is placed. 2 SYMBOL — . replace the battery as soon as the battery indicator appears. Rotate the SWITCH to turn ON the Meter  Rotate the SWITCH to OFF position to turn OFF the Meter Display Symbols: Fig.

15 Vpp. attenuation amounts to 60 dB (factor 1000). mV & V. 50 Ω / 600 Ω: Push button when pressed selects 600 Ω else 50Ω in released position. When both push buttons are activated.5 V (o. 11. the corresponding LED lit up. DC (On).2. 6. 12. 8. Max output amplitude is 30 Vpp (o. The output impedance is 50Ω switch selectable. -20dB (Push button): Two fixed attenuators. FVAR (adjusting knob): Continuous and linear frequency adjustment from 1 Hz to 1 MHz in steps. This DC voltage can be superimposed on the output signal. AMP (adjusting knob): Continuous adjustment of the output amplitude from 0 – 20 dB when terminated with 50Ω.sine triangle – square desired function selection indicated by glowing LEDs. 5. This voltage is also available in DC mode. LED indicators for Hz. They can be used separately. FUNCTION GENERATOR FRONT PANEL CONTROLS 1.c. 2. –20dB. FREQ/AMP: Selects display of frequency or amplitude.c. Desired frequency selection indicated by glowing LEDs. Digital Display: (7-segment LED): 4-digit frequency / amplitude meter. and the output amplifier is overdriven either in positive or in negative direction. VAR: When trigger output is selected in CMOS output can be set with VAR. Including the amplitude control for the max. to approx.25 V respectively when terminated with 50Ω. a total attenuation of –40 dB results. -20dB each. Power: Push button switch for supplying power to instrument. Output (BNC connector): Short-circuit-proof signal output of the generator. Over drive (LEDs): When working in the offset mode. . 10. Frequency: Frequency coarse adjustment from 1 Hz to 1 MHz in 7 decade steps. selected with frequency range. 4. The max offset voltage is ± 12. 13. 3. (Attention! Do not apply any DC voltage to the output socket) 7. Offset (adjusting knob): Adjustment of the positive or negative offset voltage.) or 15 Vpp when terminated with 50Ω. 9.) or ± 6. KHz. Function: Mode selection DC.

14. It is switch selectable TTL/CMOS and has a duty-factor or approx 50%. -x- . Trig output (BNC connector): This short-circuit-proof output supplies square waves signal in synchronous with the output signal.

AMPL (adjusting knob): Attenuation of input voltage for FM-input. TECHNICAL SPECIFICATIONS Operating Modes: Sine – Square – Triangle – DC.1 Hz to 100 KHz : max. 16.1 Hz – 1 MHz in 7 decade steps variable control between steps. KHz. FM in (BNC connector): Applying a DC voltage to this input will vary the oscillator frequency linearly to max. This permits the user to change the sweep width.5% 100 KHz to 500 KHz : max. TTL/CMOS: Switch selects trigger output TTL or CMOS. 1. Waveform Characteristics Sine wave distortion: 0. 17. 0. Free running or external frequency modulated. Display: Display switch able for frequency and amplitude. 3% Square wave rise time: Max. with or without DC offset.15. 1:100. The maximum allowable input voltage is +30V. Frequency: 4 digit 7 segment LED up to 100 KHz : ± 1% ±LSD up to 1 MHz : ± 3% ±LSD Amplitude: 3 digit 7 segment LED . mV and V. Frequency Range: 0. with automatically positioned decimal point LED indicator for Hz. 70ns (10 to 90%) Overshoot: ≤5% (when output is terminated with 50 Ω Triangle Non-linearity: ≤1% (upto 100 kHz) approx.5% 500 KHz to 1 MHz : max.

Accuracy: 3Vpp-30Vpp : ± 3% 300mVpp – 3Vpp : ± 5% 30mVpp – 300mVpp : ± 5% Amplitude: 3 digit 7 Segment LED Accuracy: 3Vpp – 30Vpp : ± 3% 300mVpp – 3Vpp : ± 5% 30mVpp – 300mVpp : ± 5% Overdrive: Indicates with two LEDs -xi- .

1 : 100 Input Impedance : 100kΩ || 25pF Input voltage : max ± 30 Vpp General Information: Supply Power Consumption Operating Conditions Dimensions (mm) Weight : 220 V AC ± 10%.2dB each.5 kg (approx. ± 12. ± 6. 50 Hz : 20 VA (approx.2 dB 100 KHz to 1 MHz max. 0.25 V into 50Ω Max. 15 Vpp into 50Ω. 30 Vpp open circuit Attenuation : 2 steps: 20dB ± 0.) : 0-50˚C. 0.5 V open circuit Trigger output: Switch selectable TTL/CMOS TTL more than 4V CMOS level adjustable up to 14V (approx.1 Hz to 100 KHz max.5 dB DC offset : Continuously variable (switch able) Offset range : max.) FM input / External Sweep: Frequency change : approx.) . 95% RH : W196 x H80 x D 262 : 2. 0.Outputs: Signal output : short-circuit proof Impedance : 50 Ω / 600 Ω switch able Output voltage: max. Variable attenuation: 0 to 20 dB total of 60dB Amplitude Flatness: (sine/triangle) with 50 Ω termination.

-xii- .

5mm. Deflection coefficients: 12 calibrated steps 2mV/cm-10V/cm(1-2-5 sequence) Input Impedance: 1 M Ω || 25 pF. Ch II. Trigger System: Modes: automatic or variable trigger level Source: Ch I. Channel I & II alternate / chopped (approx. With variable control to 40 ns/cm.6 Vrms (Open) Test Current: Max 8 mA rms (Shorted) Test Frequency: 50Hz.3.) Trigger Bandwidth: 40 MHz Horizontal Deflection (x): Bandwidth: DC – 2. Component Tester: Test Voltage: Max 8.) Deflection coefficients: 12 calibrated steps 2mV/cm – 10V/cm (1-2-5 sequence) Accuracy: ± 3% Input Impedance: 1 MΩ || 25 pF. Ext 0. Test circuit grounded to chassis. 500 KHz) X – Y (Ratio 1:1 input via CH II). Slope: Positive or Negative Coupling: AC Sensitivity: Int. X – Y mode: Phase shift < 3˚ at 60 KHz. ALT Ch I / Ch II. CATHODE RAY OSCILLOSCOPE TECHNICAL SPECIFICATIONS Operating modes: Channel I.) Hold-Off: Variable control for stable trigger.8 V (approx.5 µs/cm – 0. . Vertical deflection (y): (Identical channels) Bandwidth: DC-20 MHz (-3 dB) DC-28 MHz (-6dB) Rise Time: 17. 0. Input coupling: DC-AC-GND Input voltage: Max. Time base: Time coefficients: 18 calibrated steps. Line.5 ns (approx. Channel II. Accuracy: ± 3% (in cal position) Ramp output: 5 Vpp (approx. Ext. Invert CH II. Add/Sub.2s/cm (1-2-5 sequence) with magnifier x 5 to 100ns/cm.3 MHz (-3 dB). 400V (DC + Peak AC).

2V ±1% for probe compensation.) General Information: Cathode Ray Tube: Rectangular medium short persistence (P-31) Accelerating potential: 2000 VDC (approx. .5 kg.).) Power Consumption: 33 VA (approx. Dimensions (mm): W285 x H145 x D380 Operating Temperature: 0-40˚. SPECIFICATION FOR LOGIC SCOPE : Logic Inputs: 8 Nos.) Weight (approx): 7.) Display: 8 x 10 cm Trace rotation: Adjustable on front panel Calibrator: Square wave generator 1KHz (approx. 0.Continuity Tester: Beeper sounds < 75Ω (approx. 50Hz Mains fluctuations: ±10% (max. Z Modulation: TTL level Stabilized Power Supply: All operating voltages including the EHT Mains Voltage: 220 V. 95% RH Finish: Off white with handle and tilt stand. (TTL timing diagrams) Output: To oscilloscope.

horizontal signal to be fed through CH II (used for X-Y display) Switch when out selects & triggers CH I and when pressed. mode Socket provided for square wave output 200 m V. Switch selects the dual operation Switch selects alternate or chopped in DUAL mode. Input Cal out Push buttons switch for supplying power to instrument. Switch when pushed inwards gives 5 times magnification of the X signal. used for probe compensation and checking vertical . In NORM the trigger level can be varied from the positive peak to negative peak with LEVEL control Controls the trigger level from peak to peak amplitude of signal Socket provided to feed external trigger signal in EXT. If mono is selected then this switch enables addition or subtraction of channel i. Switch when pressed cuts off the time base & allows access the ext.PANEL CONTROLS 1 2 3 4 5 6 7 8 Power On/Off X5 XY CH-I/CH-II Trig I/Trig II Mono/Dual ALT/CHOP/ADD Time/Div AT/Norm 9 10 11 Level Trig. CHI ± CHII Switch selects time base speeds Switch selects Auto/Normal position. selects & triggers CH II.e. Auto is used to get trace when no signal is fed at the input.

Controls hold of time between sweeps. Normal position = full ccw Controls Horizontal position of the trace Switch when pressed allows external triggering signal to be fed from the socket marked TRIG. etc. INP.12 13 14 Hold Off X-POS Ext. sensitivity. -xv- .

put one test probe in this socket and connect the other test probe in ground socket.e. II Intensity TR Focus CT DC/AC/GD Ch. Terminals provided for feeding logic levels (Timing Diagram) use 1 mm patch cords (bunch of 8) Connect output to CH I or CH II of oscilloscope by using 1 mm patch cord 350 mA fuse is provided at the back panel. Spare fuses are provided inside the instrument Banana socket provided for modulating signal input i. (At CAL pos) Switch when pressed displayed signal gets synchronized with mains line frequency Selects alternate trigger mode from CH I & CH II Switch selects the slope of triggering.15 Variable Controls the time speed in between two steps of TIME/DIV switch. BNC connectors serve as input connection for CH I & CH II Channel II input connector also serves as Horizontal external signal. To test any components in the CT mode. I(Y) & Ch. In AC the signal is coupled through 0.1 MFD capacitor. whether positive going or negative going Switch when pressed inverts the CH II Controls the brightness of the trace Controls the alignment of the trace with gratitude (Screw driver adjustment) Controls the sharpness of the trace Switch when pressed starts CT operation Input coupling switch for each channel. 16 17 18 19 20 21 22 23 24 25 26 27 28 Line Alt +/Inv Ch. II(X) CT-IN Volts/Div Y POS I & II LOGIC SCOPE 29 Inputs 30 Output Back Panel Controls 31 Fuse 32 Z mod . Switches select the sensitivity of each channel Controls provided for vertical deflection of trace for each channel. Z-modulation. For calibration put this fully anticlockwise.

When pushbuttons are pressed. 9 OUTPUT + 5 V (fixed) (4mm banana sockets): Output terminals for 4mm banana plugs or cable connection for the fixed +5V output. in CV mode. 3 & 6 V/mA (Push button): For switching the display from voltage to current reading or vice versa. The mA LED flashes when the 0 – 30VDC output is used in constant current mode. POWER: Push button switch for supplying power to instrument.1 V. In released position voltages across the terminals 12 & 17 are displayed with a resolution of 0. The corresponding values for the terminals 4 are indicated on the right side of the display. On the left side of the instrument the voltage and current readings for terminals 3 is indicated. OUTPUT ON: Push button for switching On / Off all the three output voltages. 4 & 7 DIGITAL DISPLAYS (7-Segment LED): Dual display with two 3-digit readout for output voltage and current. or output current required is in excess of specified value. the current supplied from the terminals 12 & 17 is displayed with a resolution of 1mA.4. The output voltage is short circuit protected. 5 & 8 V & mA INDICATORS: Two LEDs indicate the unit of the display. 2. REGULATED POWER SUPPLY 1. .

05% Temperature coefficient: ≤ 0.2V Internal resistance: ≤ 0. continuously variable by means of coarse and fine controls Resolution: ≤ 0.DC Output: 2 x 0 – 30V. 500 mA Current limit: 10mA to 500mA continuously adjustable Resolution: ≤1% +5V Fixed Output Tolerance: ± 0. 500 mA 1 x 5V fixed. 1A Output Voltage Range: 0-30V.06Ω Stability: ≤ 5mV at line voltage variations of up to 10% Recovery time: ≤ 100 µs Temperature coefficient: ≤ 0. 1A Display 2 x 3-digit 7-segment LED display for Voltage & Current. .1% Internal resistance: ≤ 15mΩ (typical 7mΩ) Stability: ≤ 2.: 2 x 200mA) at line voltage variations of up to 10% Recovery time: ≤ 80µs Load regulation: ≤ 0. Two LED (for V and mA) indicate the unit of display.5mV (max.1%/˚C Ripple and noise: ≤ 1mVrms Output current: max.1%/˚C Ripple and noise: ≤ 5mVrms Output current: max.

Supply: 230 V AC ± 10%.9 Kgs . Built-in overheat protection. 95% RH Dimension (mm): W 196. H80.General Information All outputs are floating. Outputs are switch able from front panel. D262 Weight: 3. 50 Hz Operating Conditions: 0-40˚C.

base . ii. It will be a good practice to test diodes and transistors with DMM before using . vii. Polarity marking of the electrolytic capacitors must be observed . viii. iii. 100 percent knowledge about diode and zener lead connections i. vi. iv. 100 percent knowledge about color code of Resistors is required.e.APPENDIX II GENERAL PRECAUTIONS IN ASSEMBLING CIRCUITS : i. anode and cathode connections. After completing assembly – before connecting RPS . ensure that supply and ground leads of the circuit are not shorted . This can be verified by multi meter . while connecting. Full knowledge about bread board and contact information is required. 100 percent knowledge about transistor lead connections i. v. emitter and collector connections. .e. Test connecting leads and probes before using.

ii. iv. wrong setting of channels . ii. Select sine / square / triangular waveform with desired frequency . . Generally CRO must in AUTO mode of sweep. vii. See to which channel you are applying input . vi. FUNCTION GENERATOR : i. Obtain trace on channel and set position control to get the trace to the middle .APPENDIX III : GENERAL PRECAUTIONS IN USING INSTRUMENTS : Regulated Power supply : i. iii. before connecting to the circuit. viii. Touch the probe with hand to know whether it is responding. v. ensure that supply and ground leads of the circuit are not shorted . Set volts/div and time/div as required. One should also know component tester mode of CRO. ii. AC and DC coupling of input . positive / negative level settings must be understood. Set current setting to mid or less than the mid position. CRO : i. Set voltage controls to zero reading . iii. Before connecting RPS . Set the output controls to minimum before connecting to circuit. Learn how to trigger the CRO and set controls to get stable trace and full control with level and slope . This can be verified by multi meter . This will detect broken probes .

e. MOVING COIL AMMETERS AND VOLTMETERS : i.iii. polarity of connections to above must be perfectly correct. Turning knobs with voltages / currents ON will damage DMM’s. set to proper function i. One should know attenuator . The proper ( Full Scale reading )rated meters must be used . . ii. otherwise meters will be damaged due to wrong connections. iv. ii. otherwise meters will be damaged by over currents / voltages. DC offset settings and output terminals properly. DIGITAL MULTIMETERS : i. V-A-R ac or dc and range . Before connecting and switching on . Applying voltages in resistance mode will damage DMM’s. iii. SET THE RANGE AND APPLY VOLTAGE OR CURRENT.

VCBO max = 60V Collector – emitter voltage (open base). Junction temperature at 25 oC Forward Current Gain VCBO max = 60V VCEO max.APPENDIX – IV : Specifications of BC 107: Collector –base voltage (open emitter). Max.) Total Power dissipation .c.). = 45V VEBO max = 5 V IC max = 1A 2W 150 oC 20 VEBO max = IC max 5V = 200mA Ptot max = 250 mW = = 150 oC 150 Ptot max = = = . Total Power dissipation. Max. VCEO max. Junction temperature at 25 oC Forward Current Gain Specifications of SL100 : Collector –base voltage (open emitter) Collector – emitter voltage (open base) Emitter base voltage (open collector) Collector current (d. = 45V Emitter base voltage (open collector) Collector current (d.c.

7 to 33 volts 300mW 1500C APPENDIX IV : . Vz = P max = T max = 4. Maximum Junction temp.SPECIFICATIONS OF ZENER DIODE IN5253 : Working Zener voltage range. Maximum power consumption at room temp.

SPICE PROGRAMS OF ECA LAB EXPERIMENTS : 1. TWO STAGE RC COUPLED CE AMPLIFIER : ** two stage RC coupled amplifier vcc 4 0 dc 12v vin 1 0 ac 50mv rb1 1 2 4.7k cb1 2 3 10u r11 3 4 62k r12 3 0 4.7k rc1 4 5 33k re1 6 0 560 ce1 6 0 10u q1 5 3 6 bc107 .model bc107 npn (bf=100) cc1 5 7 0.1u rb2 7 8 1k r21 8 4 62k r22 8 0 4.7k rc2 9 4 33k re2 10 0 560 ce2 10 0 10u cc2 9 11 10u q2 9 8 10 bc107a .model bc107a npn (bf=100) rl 11 0 1k csh 11 0 5n .ac dec 10 50hz 100khz .print ac v(11) .plot ac V(11) .probe .end

1.B. ALTERNATE TWO STAGE RC COUPLED AMPLIFIER **alternate circuit for two stage RC coupled CE amplifier vin 0 12 ac 10mv sin(0 10mv 15khz) rb 12 1 10k cb1 1 2 10u vcc 5 0 dc 12v r11 2 5 47k r12 2 0 10k rc1 3 5 2.2k re1 4 0 1k ce1 4 0 100u q1 3 2 4 bc107 .model bc107 npn (bf=100) cc1 3 6 10u rb2 6 0 10k cb2 7 8 10u rb1 6 7 10k r21 8 5 47k r22 8 0 10k rc2 9 5 2.2k re2 10 0 1k ce2 10 0 100u q2 9 8 10 bc107a .model bc107a npn (bf=100) cc3 9 11 10u rl 11 0 2.2k csh 11 0 2n .ac dec 10 10hz 100khz .print ac v(11) .plot ac V(11) .probe .end

2. SIMPLE SERIES VOLTAGE REGULATOR : **SERIES VOLTAGE REGULATOR vin 1 0 dc 20v r1 1 2 560 r2 2 3 1k q1 2 3 4 sl100 .model sl100 npn ( bf=20) d1 0 3 dname .model dname d(bv=5.1v) rl 4 0 1k .dc vin 0 30v 1v .plot dc v(4) v(1) .print dc v(4) v(1) .probe .end

3.SHUNT VOLTAGE REGULATOR : **SHUNT VOLTAGE REGULATOR VIN 1 0 20V R1 1 2 560 Q1 2 4 3 SL100A .MODEL SL100A NPN (BF=20) Q2 2 3 0 SL100B .MODEL SL100B NPN (BF=20) D1 4 2 DNAME .MODEL DNAME D(BV=6.8V) R2 4 0 1K RL 2 0 1K .dc vin 0 30v 1v .plot dc v(2) v(1) .print dc v(2) v(1) .probe .end

probe .end 4. SERIES FED CLASS – A POWER AMPLIFIER : **series fed class-A power amplifier vcc 3 0 dc 5v vin 1 0 sin(0 10mv 1khz) rb 3 2 20k c1 1 2 0.1u rc 3 4 1k q1 4 2 0 sl100 .probe .end .8v) q1 2 3 0 sl100 .dc vin 0 30v 1v .plot dc v(2) v(1) .model dname d(bv=6.model sl100 npn (bf=20) r2 3 0 1k rl 2 0 2k .print dc v(2) v(1) .tran 10us 10ms 10us .model sl100 npn (bf=20) c2 4 5 0.print dc i(rc) .3A . SIMPLE SHUNT VOLTAGE REGULATOR **simple shunt voltage regulator vin 1 0 20v r1 1 2 180 d1 3 2 dname .1u rl 5 0 1k .

end 6.model sl100 npn (bf=20) q2 5 2 4 sk100 .probe .model sl100 npn (bf=20) q2 9 4 8 sk100 .1u c2 2 4 0.3 r7 8 7 4.end . ALTERNATE CIRCUIT FOR CLASS-B COMPLIMENTARY SYMMETRY POWER AMPLIFIER **alternate circuit for class-B com-sym power amplifier vin 1 0 sin(0 2v 10khz) r1 1 2 1k c1 2 3 0. COMPLIMENTARY – SYMMETRY CLASS – B POWER AMPLIFIER : ** complimentary symmetry class-B power amplifier vin 1 0 sin(0 2v 1khz) q1 3 2 4 sl100 .probe .tran 10us 2ms 10us .3 rl 7 0 1k .model sk100 pnp (bf=20) c1 1 2 1u rl 4 0 8 vcc 3 0 5v vee 0 5 5v .1u r2 3 5 220k r3 3 0 18k r4 4 0 18k r5 4 9 220k vee 0 9 dc 12v vcc 5 0 dc 12v q1 5 3 6 sl100 .5.tran 10us 2ms 10us .model sk100 pnp (bf=20) r6 6 7 4.

model dname d(bv=5.plot dc v(1) v(3) .7k r2 1 4 1.7k q1 3 2 0 sl100 .probe . CLASS – C TUNED POWER AMPLIFIER : **class .model sl100 npn (bf=20) l1 4 3 10mh c2 4 3 10n rl 3 0 10k .model sl100b npn (bf=20) d1 0 4 dname .1v) .ac dec 100 1khz 100khz .probe .end 8.tran 10us 2ms 10us .model sl100a npn (bf=20) q2 2 5 4 sl100b .7.8k r3 3 5 10k r4 5 0 10k rl 3 0 2k q1 1 2 3 sl100a .dc vin 0 30v 1v .print dc v(1) v(3) .1u r1 2 0 4.end .9khz) vcc 4 0 dc 5v c1 1 2 0. VARIABLE SERIES VOLTAGE REGULATOR : ** variable series voltage regulator vin 1 0 dc 20v r1 1 2 4.C tuned power amplifier vin 1 0 ac 2v sin(0 2v 15.

You're Reading a Free Preview

Download
scribd
/*********** DO NOT ALTER ANYTHING BELOW THIS LINE ! ************/ var s_code=s.t();if(s_code)document.write(s_code)//-->