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EXHIBIT G-1

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Trial Volume 7 May 8,2003

In The Matter Of:

RAMBUS, INC.

MAITER NUMBER D09302

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Word Index included with this Min-U.Script®

EXHIBIT G-1

RAMBUS, INC.

MAlTER NUMBER D09302

Trial Volume 1 May 8, 2003

Paga1311

FEDERAL TRADE COMMISSION INOEX(PUBLIC RECORD)

III 121 PI

III WITNESS: DIRECT CROSS REDIRECT RECROSS

(5) Sussman 1313 1463

181

[71 EXHIBITS 181 CX

[9J Number 20 IIOJ Number 1454 1"1

112J AX 1131 None (14)

(15) JX

[18] Number 7 (17) Number 12 [18] NUmber 27 [IG)

(20) OX

(21) Number 13 (221

(23)

(24)

(2S)

FOR 10 IN EVID WITHDRAWN

1372 1462

1356 1384 1426

1437

UNITED STATES OF AMERICA FEDERAL TRADE COMMISSION

II) 121 (3)

14) In lhe Malter of: 151 Rambus, Inc.

) Docket No. 9302

161 [71 (8) [9J (10)

III) 1'2) 1131 [141 (15) (18) 1'71 lIB) IIG) (20) (21) (221 [231 ~I (25J

Thursday, May 8, 2003 9:30a.m.

TRIAL VOLUME 7 PART 1 PUBLIC RECORD

BEFORE THE HONORABLE STEPHEN J. McGUIRE CIlIel Admlnls1raUv8 Law Judge

Fadatal Trade Commission

GOO Pennaylvanta Avenue, N. W.

Washlnglon. D.C.

Reported by' Susama Burgling, RMR

For The Record, Inc. (301)810-8025

Pagal309

(14)
(15)
[IGI
[171
[IB)
[IG)
(20)
121)
(221
[23)
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[25J
Page 1310 Min-U-Script®

I') APPEARANCES: 121

(3) ON EIBiAI..F OF THE FEDERAL TRADE COMMISSION:

141 M. SI:AN ROYALL. AIIomey

(5) GEOFFREY OUVER, AIIomay

[8] [7) [B) [9J

JOHN C. WEBER, AIIomay Federal Trade Commission eOI New Jersey Avenue, N.W. WashJngIon. D.C. 20560-0000

(10) (202) 328-3663

(II)

(121

(131 ON BEHALF OF THE RESPONDENT:

GREGORY P. STONE, Attorney STEVEN M. PERRY,Allomey PETER A, DETRE. AIIomay SEAN GATES, Anomey Munger. Tolles & Olson UP

355 South Grand Avenue, 35th Floor Los Angelas, CalHomfa 90071-1560 (213) 683-9255

(II APPEARANCES: 121

PION BEHALF OF THE RESPONDENT:

141

(5) A. DOUGlAS MELAMED, AIIomay

(8J [7) (8] (8] 110)

lit) [121 (13) 1'41 (IS] (18] [171 118) 119) (20) 1211 (22) [231 (24) (251

WIlmer, Culler & Pickering 2445 M Stram, N.W. Waslllnglon, D.C. 20037-1420 (202) Il83-609O

Page 1312

(3) Page 1309 - Page 1312

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RAMBUS, INC.

MAnER NUMBER D09302

Trial Volume 7 May8,2003

PBge1463

I'I BY MR. WEBER:

(2) Q: Why do you say no?

(31 A: That they did not act in good faith, and Your

141 Honor, can I embellish or -

(SI JUDGE McGUIRE: No, you cannot.

(6J THE WITNESS: Okay.

[7J BY MR. WEBER:

(81 Q: Going back a minute to the]EDEC SDRAM standard

(81 you were involved in, when you were doing your work (101 developing the ]EDEC SO RAM standard, sir, did you steal (III any features from Rambus technology and incorporate (121 them in the JEDEC standard?

(13] A: I'm sorrv for the laughter. The answer to that

(14) one is no.

(151 Q: Did anyone from Rambus ever suggest to you that

(16] you stole their technology?

(17) A: No, sir.

(18) Q: To the best of your knowledge, did ]EDEC

(18) knowingly incorporate Rambus proprietary technology (2OJ years later when it adopted the DDR SDRAM standard?

121) A: I do not think so.

I22l MR. WEBER: Your Honor, I have no further

[23J questions. I would like [0 offer CX·1454 into

(241 evidence, and I don't know what we're doing with the (25) demonstratives -

Page 1462

(II JUDGE McGUIRE: We are just having them marked,

121 that's aU.

(3)

[.) [51 (6) [7J

Any objection?

MR. DETRE: Which document is that? MR. WEBER: CX·1454, the patent. MR. DETRE: No objection.

JUDGE McGUIRE: So entered.

(CX Exhibit Nwnber 1454 was admitted into

(81 (81 evidence.)

(IOf JUDGE McGUIRE: Does that conclude your

(III examination?

(121 MR. WEBER: Yes, Your Honor.

(131 JUDGE McGUIRE: Okay, we will take break at

("I 1 :00. We will reconvene at 2: 15 or do the parties want (151 2:30, because 1 don't want to go too late in the

(16] afternoon.

(17) MR. DETRE: 2:15 is tine ,Your Honor.

(181 JUDGE McGUIRE: Okay, 2:15, we will reconvene.

(191 The hearing is adjourned.

(2OJ (Whereupon, at 1:00 p.m., a lunch recess was

[211 taken.)

[22J

(231

(241

(251

Page 1461

I'I AFTERNOON SESSION

(2) (2:15 p.rn.)

(31 JUDGE McGUIRE: This hearing is now in order

~I and convened at 2:15.

(51 At this time we will entertain the cross

(61 examination of the witness, Mr. Detre,

[7J MR. DETRE: Thank you,YourHonor.

(81 CROSS EXAMINATION

(81 BY MR. DETRE:

(IOf Q: Good afternoon, Mr. Sussman.

(II) At the very end of Mr. Weber's examination, Mr.

[121 Weber asked you whether to the best of your knowledge, (13) you knew that)EDEC - Mr.Weberaskedyouthequestion (141 to the best of your knowledge, did ]EDEC knowingly

[151 incorporate Rambus proprietary technology when it

(16) adopted the DDR SDRAM standard.

(17) Do you recaU that question?

(16) A: Yes, I do.

(18) Q: And you answered, "I do not think so."

(2OJ Do you recaU that?

(21) A: Yes,l do.

[22J Q: Now, Micron was aJEDEC member during the [23J period thatJEDEC was standardizing the DDR SDRAM (241 standard, correct?

(2Sl A: Correct.

Page 1464

(I) Q: I want to show you Exhibit 9 - RX-920, which

[2J are some emails sent to and fromTerryWalther,Terry I3J Lee, Kevin Ryan and others at Micron. Could we pull (41 that up, please? Let me hand you a copy of this, Mr.

(51 Sussman.

[S) A: Thank you.

[7J Q: And if I could direct your attention to the

(81 third email down in this email stream, do you see there [9J that Mr. Walther writes, "does Rambus believe they have [IOf a patent on changing data on both edges of the clock?"

[111 Do you see that?

[121 A: Yes.

(13) Q: And then Mr. Weinstock replies to Mr. Walther,

[141 and Mr. Lee and Mr. Ryan are copied there, and says,

(15) "Terry:Yes, Rambus feels DDR for any memory is under (18) their patent coverage."

(17) Do you see that?

(18) A: Yes, I do.

(IG! Q: And the date on that email is April 17th,1997,

(2OJ correct?

(21) A: Correct.

[22J Q: Now, did anyone from Micron teU you in 1997 or [23J 1998 that they had heard that Rambus believed they had (241 intellectual property covering DDR on any memory

[251 device?

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Trial Volume 7 May 8, 2003

RAMBUS, INC.

MAnER NUMBER D09302

Page 1465

Pege 1467

(1) A: Not to my knowledge. (11 other. So, it mayor may not be exactly one to one,

(2J Q: Now, if you could find in your stack Exhibit (2J this same signal and the inverse of that same signal.

[3] CX·1454.That's the international patent application 13] It doesn't have to be. It doesn't say. It can be. It

(4] that you said you flipped through. (4] could be.

(5] A:. Okay, umhum. (5] Q: And when you looked at Figure 13, if we could

(8] Q: And if you could turn to one of the figures (8J go two pages further down to 136, you saw that those

(7) that Mr. Weber was asking you about, and it's on page [7] clock signals in Figure 10 are identified as internal

(8J 134, and it's Figure Number 10 at the top of the page. (8J clock and internal dock complement?

(8J A: Okay. (9] A: That is correct.

(10] Q: Now, I believe you testified that when you (10) Q: And did - and at that point, of course, you

(I I) looked at the figure, you understood that the clock - (I II understood, since the figure shows it, that the rising

(121 the symbol CLK, standing for dock, and then the symbol (121 edge of internal clock corresponds to the falling edge

(13] CLK with a bar on top of it standing I think usually (13) of internal clock complement, correct?

(14] for clock bar, represented a differential clock. Is (14] A: They are related. They may not still be

(15] that right? (151 identical, but continue, please. .-

(18] A: It could. (18) Q: They were lined up on this figure. You saw

(17) Q: And - well, that's the way dock and clock bar (17) that, right?

118] are used in, for example, the DDR SDRAM standard, (18) A: They were lined up on this figure.

(191 correct? (19) Q: Now, if we stay on that figure and we look at

[2OJ A: Yes. [2OJ the very bottom row there, do you see, marked Input

(21) Q: And - and you see that there are two input (21) Sample?

(22J receivers, right? (22J A: Input Sample? Ah, okay.

(23) A: It says so, yes, two blocks. (23) Q: At the time that you were reviewing this in

(24) Q: Okay. And did you - did you understand when ~) 1992 and 1993, did you notice that there were two

~[2SJ:!....!y.:.o=u....:w:...:ere==-=10:..:0=k=ing~a:.:t..:this=·:::-=ba=ck:::;_in_;_I-=9.:..9_2~0_r_1.:..9.:..9:__3tha_t_0_D_e __ I[2SJ samples being input there for each clock cycle?

Page 1466

(I) of those input receivers was governed by clock and the (2J other input receiver was governed by dock bar?

(3) A: The input is clock and the input is clock bar; (4) it doesn't say it's governed by.

I5J Q: There is - the clock symbol is going into one

(61 input receiver, and the clock bar is going Into the

(7) other input receiver. Did you see that back in 1992 (B) and 1993?

(B) A: rm sure I did.

(10) Q: Now, if this represented a differential clock,

(III then you would have understood at the time that the

(121 rising edge of the clock would have corresponded to the (13] faI.l4lg edge of the clock bar. Is that right?

(14) MR. WEBER: Objection, hypothetical.

lIS} MR. DETRE: Let me rephrase it, Your Honor.

(16) JUDGE McGUIRE: Sustained.

(17) BY MR. DETRE:

(18] Q: Did you understand back at the time you were

(19) looking at this in 1992 and 1993 that the rising edge I20J of the signal dock would correspond to the falling (21) edge of its complement, the signal clock bar?

(22l A: In this case, I would assume normally that

(23) clock and dock bar arc the true and complement of the (24) same.A little bit later in this same document you're

(2SJ showing like bus docks that are offset from each

Page 1468

(I) A:Ah-

(2J Q: See input sample 127, then input sample 125 are

[3J both being input on the same clock cycle? Did you

(4) notice that back when you were looking at this in 1992 (5] and 1993?

(8] A: I don't know for '92-'93, but that is what the

(7J document shows, yes.

(8) Q: And that's double data rate, isn't it?

(9) A: That is Input being sampled on the high and low

(101 edge of the clock.

(1 I) Q: And at least for inputs, that's what the DDR

[121 SDRAM standard refers to as a double data rate input, (13) correct?

(14) A: A3 a double data rate input, correct.

(151 Q: Now, you testified, Mr. Sussman, that you first

(16) started thinking about Synchronous D¥Ms in 1988, (17) correct?

[18] A: Correct.

(UII Q: And you were prompted to begin this

(201 investigation because clock speeds were increasing, and (21) youfclt that developing a Synchronous DRAM would bea (22j way for memory to keep up with those increasing dock (23] speeds. Is that right?

(2') A: That is correct. We used to have clock

[2SJ memories a couple generations prior, and it was time to

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For The Record, Inc. (301)870-8025

Min-U-Script®

RAMBUS, INC.

MAlTER NUMBER D09302

TrW Volume 7 MayS, 2003

Page 1471

(II pick it up again.

(21 Q: Now - and the memories 1 believe you also

(3l testified in use at the time, fast page mode and EDO, (41 they were asynchronous memories, right?

(5] A: This is before the fast page mode and EDO.The (61 first part I worked on was using a four-phase clock. (7J Everything was running off that clock.

1111 Q: No. I'm sorry, at that time -

I9l A: So, this is a takeoff on things we had before,

(101 and it is time to pick it up again.

(III Q: In the 1988-1989 time frame when you were

112) developing your Synchronous DRAM, isn't it the case (131 that the type of memories in common use at the time, (141 the fast page mode and EDO, were asynchronous?

(15)

A: That is correct.

Q: And at that time, you also considered ways in

116) (171 wh ich you might improve those asynchronous memories to (181 keep up with faster clock speeds, correct?

(IOJ A: That is true.

(20) Q: But you ultimately decided that the better way

~I) to go was simply to move to a synchronous memory,

_. l22l correct?

(23) A: Let me take your question, which I think - can

~') I expand on what you've asked,because you've made some (25) statements I don't 100 percent agree on, but you're

(II close.

(21 Q: Why don't you go ahe:ad.

(3) A: Thank you.

141 The: original fast - page mode or fast page

15) mode part, we put a register on the output of it. That III) register is internally clocked or clocked by CAS, as

(7) the case be.There:'s some parts that have been

(8] recommended for one, the other one was standard, so we I9l are going from totally asynchronous to something that 110) is more: synchronous.

(III Within the device, within these old page mode

1121 parts, we had a number of dock drivers, and I think (131 some of the documentation that you've gotten from 114) previous from me, as I emptied my file cabinet, is

115] talking on some of these old Mostek parts that very 116) clearly shows the: internal clock drivers on the parts. (17) So, clocks are not new in memory. We are just moving 118) forward one more thing.

IIOJ Q: And you decided that the - after having

~ considered improving the asynchronous memories of that (211 time, you decided to develop your synchronous memory, l22l correct?

(23) A: Correct.

~') Q: Now, you testified about a presentation at the

(25] December 1991 ]EDEC meeting of IBM's high-speed toggle

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Page 1470

II) mode. Do you recall that? 121 A: December?

[3J Q: 1991.

141 A: '91, HSr, okay ..

I5J Q: Do you recaU that?

(II] And that was the proposal for an asynchronous (7) type of memory, correct?

181 A: That's a hybrid. The - the initial turning on

I9l of the memory is asynchronous, and then data is

110) synchronous with their - I'm calling it a dock, but (II) basicaUy both on the rise and the !al1ing edge of

112) their input signal, whatever we are going to call it, I (131 have data.

(14) Q: The control signals going to mM's high-speed (15) toggle DRAM are asynchronous, correct?

1181 A: No. They are both. I have an asynchronous, an

117) asynchronous first CAS, and then I'm taking data out (IB) synchronously with CAS.That's the high-speed toggle (IOJ mode.And in our history, there's nothing that says

~ the clock is always free running, that a clock is

~I) always equal periods. This is basicaUy a - to me a l22l hybrid part.

(23J Q: If - you've been handed a copy of your

(24) deposition in this case, I believe.

(25) A: Yes, sir.

Page 1472

II) Q: Could you turn to page 92 of that deposition.

121 Arc you there, Mr. Sussman?

(3) A: Yes, I am.

14) Q: And you were asked at that time, beginning at

15] line 7-

16) MR. WEBER: Do we have a line - okay.

(7) BY MR. DElRE:

III) Q: - beginning at line 7:

(II] ·QUESTION: Now, mM's toggle mode was a

(10) proposal for an asynchronous type of memory. Is that III) right?

(121 • ANSWER: That is correct."

(13) Did 1 read that correctly?

(14) A: You did read it correctly.

115] Q: Now, isn't it the case that you kllJed the idea

1181 of using both edges of the clock in your Synchronous

(17) DRAM device at the noo-JEDEC meeting inBoxborough in 118) August of 1991?

(ID) A: It was - to me, yes, but it was still proposed

(2OJ in some of the other documents that have been shown ~I) here this morning. For instance, the mM Austin

(22] gentleman is still asking for a RAS/CAS with the

(23J synchronous data.

~.) Q: And that's -

~5] A: So, it's not killed. It's still under

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