Analog & Digital VLSI Circuit & Systems

MVLSI 302 , Total lecture Hrs: 40, Credits :

1) Introduction to Mixed Signal Design 2) Circuit Characterization & Performance Estimation  Delay Estimation  Logical Effort & Transistor Sizing  Power Dissipation  Interconnect

1P 4P

3) Logic Level Synthesis & Verification  Introduction to Synthesis  Transistor & Logic Level Synthesis  Combinational Logic Synthesis  Algorithms & Boolean Space  Binary Decision Diagram(BDD,ROBDD)  Sequential Logic Optimization

4P

4) High-Level Synthesis  Hardware Models for High-level Synthesis  Internal Representation Of The Input Algorithm  Allocation, Assignment & Scheduling :Some Algorithms

4P

5) Digital System Using Verilog  Introductions & Verilog Naming Conventions  Structural Gate Level Modeling  Switch Level Modeling  Design Hierarchies  Behavioral & RTL Modeling: Blocking & Non-blocking Assignments 6P 6) Digital Circuit Simulation using VLSI CAD Tools (SIMUCAD/SILVACO)—Lab 6P 7) VLSI Testing & Verification  Testing: Why test? Difference between testing & verification.  Physical faults & their modeling: Fault equivalence.  Fault simulation: parallel . Built . DFT 8) Advancement In Modern Digital Devices 6P  Fundamental concepts of quantum structures. dominance & collapsing. deductive & concurrent techniques 6P  Test pat tern generation for combinational circuits : Boolean difference. SET.in self test techniques . Podem  Test pattern generation for sequential circuits : ad-hoc and structures techniques scan path and boundary scan. D-algorithm. Carbon Nan tubes (CNT).  Biomedical Electronics  Spintronics  Molecular Electronics .

DE-AMP and OP-AMP 6P .9) Frequency response. Current Source Load . stability and noise issues in amplifiers: Diode Connected Load. cascode circuits.

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