Chapter 8: Memory Management Mono-programming  In uni-processor systems, main memory is divided into two parts as shown

below:

Multi-programming  In multiprogramming systems, user part of memory must be subdivided to accommodate multiple processes.

Prepared by Dr. Amjad Mahmood

8.1

Memory Management  Main memory is a resource that must be allocated and deallocated

 Memory Management Techniques determine: − How the memory is to be (logically) subdivided? − Where and how a process resides in memory? − How addressing is performed? − How process can be relocated? − How memory is to be protection? − How memory can be shared by processes? − How to logical and physically organize memory Addressing Requirements of a Process

Prepared by Dr. Amjad Mahmood

8.2

The Basics  Program must be brought into memory and placed within a process for it to be run.  Input queue – collection of processes on the disk that are waiting to be brought into memory to run the program.  Normally, a process is selected from the input queue and is brought into the memory for execution. During execution of a process, it accesses instruction and data from the memory.  Most systems allow a user process to be loaded in any part of the memory. This affects the addresses that a user program can access.  User programs go through several steps before being run.

Prepared by Dr. Amjad Mahmood

8.3

Loading and Loader  A loader is responsible to place a load module in main memory at some starting address. Addresses may be represented during these steps. It is useful when large amounts of code are needed to handle infrequently occurring cases. − Addresses in the source program are generally symbolic (variable name). compile time or assembly time. the compiler or assembler must generate relative addresses. No special support from the operating system is required implemented through program design.4 . − Relocatable loading – The loader places a module in any desired location of the main memory.  There are three approaches. Prepared by Dr. The address binding can be done at programming time. − A compiler typically binds these addresses to relocatable addresses (in terms of offsets).Routine is not loaded until it is called resulting in better memory-space utilization (unused routine is never loaded). − The linkage editor or loader binds relocatable addresses to absolute addresses (physical addresses). − Dynamic loading . All references in the load module must be absolute memory addresses. Amjad Mahmood 8. − Absolute loading – A given module is always loaded into the same memory location. To make it possible. which can be used for loading.

• Dynamic linking is particularly useful for libraries. Amjad Mahmood 8.  The linking can be done either statically or dynamically.  In each object module. used to locate the appropriate memory-resident library routine.5 . Prepared by Dr. − Static linking – A linker generally creates a single load module that is the contiguous joining of all the object modules with references properly changed. • Operating system needed to check if routine is in processes’ memory address.Linking and Linker  The function of a linker is to take as input a collection of object modules and produce a load module consisting of an integrated set of programs and data modules to be passed to the loader. All external references are not resolved until the CPU executes the external call. there may be symbolic reference to location in other modules. This is called static − Dynamic linking – Linking is postponed until execution time. stub. • Small piece of code. • Stub replaces itself with the address of the routine. and executes the routine.

absolute code can be generated. Amjad Mahmood 8. Logical vs. − Logical address – generated by the CPU. Physical Address Space The concept of a logical address space that is bound to a separate physical address space is central to proper memory management. − Physical address – address seen by the memory unit.6 . − Load time: The compiler must generate relocatable code if memory location is not known at compile time. − Execution time: Binding delayed until run time if the process can be moved during its execution from one memory segment to another. base and limit registers). − Compile time: If memory location known a priori. also referred to as virtual address.g..  Logical and physical addresses are the same in compile-time and load-time address-binding schemes.Binding of Instructions and Data to Memory  Address binding of instructions and data to memory addresses can happen at three different stages. must recompile code if starting location changes. Need hardware support for address maps (e. The final binding is delayed until load time. logical (virtual) and physical addresses differ in execution-time address-binding scheme.  Prepared by Dr.

Prepared by Dr. the value in the relocation register is added to every address generated by a user process at the time it is sent to memory. Dynamic relocation using a relocation register Overlays  Overlay is one of the techniques to run a program that is bigger than the size of the physical memory. In a simple MMU scheme.(MMU)    MMU is a hardware device that maps virtual to physical address at run-time.  The idea of overlays is to keep in memory only those instructions and data that are needed at any given time.Memory Management Unit . The user program deals with logical addresses. it never sees the real physical addresses.7 .  The basic idea is to divide the program into modules in such a way that not all modules need to be in the memory at the same time. Amjad Mahmood 8.

However. 8. Programmer specifies which modules can overlay each other  The linker inserts commands to invoke the loader when modules are referenced  Used in DOS as an alternative to Expanded memory Overlays for a two-pass assembler  Advantages − Reduced memory requirements  Disadvantages − Overlap map must be specified by programmer − Programmer must know memory requirements − Overlapped modules must be completely disjoint Swapping  A process needs to be in the memory to be executed. Amjad Mahmood . and then brought back into memory for continued execution.8 Prepared by Dr. a process can be swapped temporarily out of memory to a backing store.

Note that context switching time in this scheme is quite high. we must be sure that it is completely idle. UNIX.  Major part of swap time is transfer time.  Roll out. total transfer time is directly proportional to the amount of memory swapped.e.9 . Swapping needs a backing store – fast disk large enough to accommodate copies of all memory images for all users. Swapping of two processes using a disk as a backing store Prepared by Dr. lower-priority process is swapped out so higher-priority process can be loaded and executed. roll in – swapping variant used for prioritybased scheduling algorithms. Amjad Mahmood 8. must provide direct access to these memory images. i.  Modified versions of swapping are found on many systems. Linux..  If we want to swap out a process. and Windows.

Amjad Mahmood 8. Single-partition Allocation  A single processes in loaded into the memory at a time. − User processes then held in high memory.10 . usually held in low memory with interrupt vector. − Every process is loaded into a single contiguous partition of the memory.Contiguous Allocation Techniques  Main memory usually divided into two partitions: − Resident operating system.  Advantages: − Simplicity − No special hardware required  Disadvantages: − CPU wasted − Main memory not fully used − Limited job size Prepared by Dr.

 There might be a separate process queue (need absolute addressing) for each partition or a single queue for all partitions (need dynamic addressing).  A simple multi-partition scheme is to divide the memory into fixed size partitions. No longer in use now.  Each process is loaded into a single partition.  This scheme was originally used in IBM OS/360.  In this scheme.Multiple-Partition Allocation – Fixed Partitions  Desirable in multiprogramming environment.11 . Prepared by Dr. the degree of multiprogramming is bounded by the number of partitions. Amjad Mahmood 8.

works as follow: − Operating system maintains information about: • Allocated partitions • Free partitions (hole). it is checked whether there is a process waiting for memory and whether this newly freed hole and Prepared by Dr. we search for a hole large enough for the process. If a hole is found. it is allocated to the process. − When a process arrives. it is split into two: one part is allocated to the arriving process. If we find a hole. Amjad Mahmood 8. − When a process completes. which is too large. At this point.Multiple-partition Allocation – Dynamic Partitions  Partitions are of variable length and number  Process is allocated exactly as much memory as required  MVT. all the memory is available and is considered as a single block (one big hole). If the new hole is adjacent to other holes. they are packed in the set of holes. Initially. the memory is freed and is placed in to the set of holes.12 . a dynamic partition scheme. the other is returned to the set of holes.

Amjad Mahmood 8.recombined memory could satisfy the demands of any of the waiting processes.13 . Prepared by Dr.

but most common are as follows: − First-fit: Allocate the first hole that is big enough.Merging of holes Pros and Cons of Dynamic Allocation  Advantages − Efficient use of memory  Disadvantages − Partition management − Compaction or external fragmentation − Internal fragmentation Dynamic Allocation Placement Algorithms How to satisfy a request of size n bytes from a list of free holes?  There are many solutions to this problem.  Prepared by Dr. Amjad Mahmood 8. The search can start either at the beginning of the set of holes or where the previous first-fit search was ended.14 .

 First-fit and best-fit better than worst-fit in terms of speed and storage utilization. Worst-fit: Allocate the largest hole.− − Best-fit: Allocate the smallest hole that is big enough. Prepared by Dr. Amjad Mahmood 8. Produces the smallest leftover hole. must search entire list.15 . must also search entire list. unless ordered by size. Produces the largest leftover hole.

but not being used. − Compaction is possible only if relocation is dynamic. Reduce external fragmentation by compaction.  Prepared by Dr. and is done at execution time. this size difference is memory internal to a partition.Example Fragmentation   External Fragmentation – total memory space exists to satisfy a request. Amjad Mahmood 8. − I/O problem • Latch job in memory while it is involved in I/O. but it is not contiguous.16 . Internal Fragmentation – allocated memory may be slightly larger than requested memory. − Shuffle memory contents to place all free memory together in one large block.

 Logical memory is also divided into blocks of same size called pages. The page size is defined by the hardware and is typically a power of 2 varying between 512 bytes and 16 megabytes per page.  Physical memory is divided into fixed-sized blocks called frames (size is power of 2.  High cost of  compaction. Amjad Mahmood 8. Prepared by Dr. logical address space of a process can be noncontiguous. The selection of a power of 2 as a page size makes the translation of logical address into a page number and offset easy. between 512 bytes and 8192 bytes).• Do I/O only into OS buffers.17 . Paging  Another possible solution to external fragmentation is paging.  In paging. process is allocated physical memory whenever the latter is available.

− If the process has n pages then n frames must be available in the physical memory. in pages.  The first page of the process is then loaded into the first available frame.  Since OS is managing the physical memory.  Memory Allocation in Paging  When a new process arrives. need to find n free frames and load program.18 .  Set up a page table (for each process) to translate logical to physical addresses. its size.  Internal fragmentation is possible. the next into next available frame and so on. it must be aware of the allocation details of physical memory (allocated and free frames). Amjad Mahmood 8. is determined. This information is generally kept in a data structure known as frame table which has one entry for each frame and Prepared by Dr.To run a program of size n pages.

indicates whether it is free or not and if allocated to which page of which process. Amjad Mahmood 8.19 . Prepared by Dr.

Amjad Mahmood 8.20 .Free frames – (a) before allocation (b) after allocation Address Translation  Address generated by CPU is divided into: − Page number (p) – used as an index into a page table which contains base address of each page in physical memory. − Page offset (d) – Byte within the page Address translation architecture Prepared by Dr.

21 .  The two memory access problem can be solved by the use of a special fast-lookup hardware cache called associative memory or translation look-aside buffers (TLBs). Amjad Mahmood 8. Prepared by Dr.Implementation of Page Table  Page table for each process is kept in main memory.  In this scheme every data/instruction access requires two memory accesses. One for the page table and one for the data/instruction.  Page-table length register (PTLR) indicates size of the page table.  Page-table base register (PTBR) points to the page table.

Associative memory         Associative memory allows parallel search Contains page table entries that have been most recently used Functions same way as a memory cache Given a virtual address. Amjad Mahmood 8. the frame number is retrieved and the real address is formed If page table entry is not found in the TLB (a miss). for example). the page number is used to index the process page table First checks if page is already in main memory − if not in main memory a page fault is issued The TLB is updated to include the new page entry  Note that TLB must be flushed every time a new page table is selected (during context switching. Prepared by Dr.22 . processor examines the TLB If page table entry is present (a hit).

ration related to number of associative registers. Amjad Mahmood 8. and protection bits can be checked at the address translation time. Valid-invalid bit. is also attached to each entry in the page table: − “valid” indicates that the associated page is in the process’ logical address space. Since every reference to a memory location is through the page table. One bit can define a page to be read and write or read-only. and is thus a legal page.  One more bit. − “invalid” indicates that the page is not in the process’ logical address space. Prepared by Dr. An illegal operation causes a trap.  Hit ratio = α  Effective Access Time (EAT) EAT = (1 +ε) α + (2 +ε)(1 – α) =2+ε–α  Memory Protection  Memory protection implemented by associating protection bit with each frame.Effective Access Time Associative Lookup = ε time unit  Assume memory cycle time is 1 microsecond  Hit ratio – percentage of times that a page number is found in the associative registers.23 . Normally these bits are kept in the page table.

Two Level Paging Example  A logical address (on 32-bit machine with 4K page size) is divided into: − a page number consisting of 20 bits. − a page offset consisting of 12 bits.  Since the page table is paged. Amjad Mahmood 8.Valid and invalid bit in a page table Page Table Structure Hierarchical Paging  Hashed Page Tables Inverted Page Tables Hierarchical Page Tables  Break up the logical address space into multiple page tables.  A simple technique is a two-level page table. the page number is further divided into: − a 10-bit page number. Prepared by Dr.24 .

a logical address is as follows: Page number P1 10 P2 10 Page offset d 12 where pi is an index into the outer page table.25 .− a 10-bit page offset. and p2 is the displacement within the page of the outer page table. Amjad Mahmood 8. Address Translation Scheme Address-translation scheme for a two-level 32-bit paging architecture Prepared by Dr.  Thus.

Hash page table Inverted Page Table  One entry for each real page of memory. If a match is found. but increases time needed to search the table when a page reference occurs.  Virtual page numbers are compared in this chain searching for a match.  Decreases memory needed to store each page table.  Entry consists of the virtual address of the page stored in that real memory location with information about the process that owns that page.26 . the corresponding physical frame is extracted.  The virtual page number is hashed into a page table. Amjad Mahmood 8.Hashed Page Tables  Common in address spaces > 32 bits. Prepared by Dr. This page table contains a chain of elements hashing to the same location.

Prepared by Dr. Use hash table to limit the search to one — or at most a few — page-table entries. Amjad Mahmood 8.27 .

Prepared by Dr.e. Amjad Mahmood 8.28 . − The pages for the private code and data can appear anywhere in the logical address space. − Shared code must appear in same location in the logical address space of all processes.Inverted page table architecture Shared Pages  Shared code − One copy of read-only (reentrant) code shared among processes (i.. text editors. window systems). compilers. Private code and data − Each process keeps a separate copy of the code and data.

A segment is a logical unit such as: main program.  A program is a collection of segments.Pros and Cons of Paging  Advantages: − Efficient memory use − Simple partition management due to discontinuous loading and fixed partition size − No compaction is necessary − Easy to share pages  Disadvantages − Job size <= memory size − Internal fragmentation − Need special hardware for address translation − Some main memory is used for page table − Address translation lengthens memory cycle times Segmentation  Memory-management scheme that supports user view of memory. symbol table. Amjad Mahmood 8. arrays Prepared by Dr.29 . method. procedure. object. local variables. stack. common block. function. global variables.

each table entry has: − base – contains the starting physical address where the segments reside in memory. Prepared by Dr. offset>. Amjad Mahmood 8. Segment table – maps two-dimensional physical addresses. <segment-number.30 .1 1 2 3 4 4 2 3 user space Address Mapping in Segmentation physical memory space  The user specifies each address by two quantities: segment name/number and offset.   Mapping from logical address to physical address is done with the help of a segment table.

− Segment number s is legal if s < STLR. Segment-table length register (STLR) indicates number of segments used by a program. Amjad Mahmood 8. − Segmentation Example Prepared by Dr.  limit – specifies the length of the segment. Segment-table base register (STBR) points to the segment table’s location in memory.31 .

Amjad Mahmood 8.Comparison of Paging and Segmentation Prepared by Dr.32 .

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