PIC microcontroller- Architecture of PIC 16c6x/7x- FSR- Reset action- Oscillatory connection- Memory organization- Instructions- Addressing modes- I/O ports- Interrupts-Timers- ADC- Assembly language programming. PIC MICROCONTROLLER & its features: 1. Peripheral Interface Controller from Micro Chip technologies. 2. Family includes controllers from 16c61/62/64/71/74/710/715 etc. 3. They are RISC processors and uses Harvard architecture. 4. Different bus widths of data and program memory. Data memory is 8 bit wide where as program memory is 12,14,16 bits wide. 5. The instruction holds immediate data along with instruction code. 6. Only 35instructions. 7. Most instructions take 0.2 microseconds to execute when operated at 20 MHz. 8. Machine cycle consist of 4 clock pulses. 9. Instruction set is highly orthogonal. 10. 1-3 Timers with 8/16 bit pre scalar. 11. Watch Dog timer (WDT) 12. 13-33 I/O pins. 13. 3-12 interrupt Sources. 14. 4/8 Channel, 8 bit on chip ADC. 15. Power on Reset. (POR) 16. Brown out Reset (BOR). 17. Capture/Compare/ PWM modules. 18. USART 19. Synchronous serial port (SSP) with SPI and I2C. 20. Power saving SLEEP mode. 21. Wide operating Voltage range 2.5 V to 6.0 V. Very Low power consumption. 22. Commercial, Industrial and Extended Temperature ranges. 23. Parallel slave port (PSP),8 bits wide with external RD,WR and CS controls.

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ARCHITECTURE 1. ALU   Size is 8 bit. Performs operations with temporary working register and (W register) and any register file.

2. W register    8 bit wide. It contains one of source operands during execution of instruction and may serve as the destination for the result of operation. Used only for ALU operations.


    

C- Carry Bit DC – Digits Carry (same as AC) Z = Zero TO= Reset status bit ( Time out bit) PD= Reset status bit ( Power down) These bits are used along with SLEEP mode. After coming out from SLEEP processor checks these bits to determine which kind of event is responsible for bringing out of SLEEP mode.

RP0= Register Bank Select bit.If0 selects bank 0 otherwise bank 1.

4. FSR Register : (File Selection Register) FSR is a pointer used for indirect memory addressing in the whole register file. In indirect addressing mode one has to write address byte in FSR and then use INDF ( Indirect thro FSR).INDF is used in instruction. 5. PCLATH (PC Latch)    Can be independently read or written like any other register. It’s different from PC and is separate entity. It is 5 bit.
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This is added with PCL (Program Counter Lower) so as to get 13 bit address. PIC RESET ACTIONS

1. PIC reset action takes place due to different mechanisms. Those are Power-on-Reset (POR), MCLR reset during the normal operation, MCLR during sleep mode, Watch dog timer reset during normal operation, Brown-out –Reset (BOR). 2. BOR is not available in 16C6X. POWER-ON-RESET [POR]:     PIC reset function is very simple. MCLR is the master clear pin, which when made low causes PIC to reset. A power-on-reset pulse is generated when VDD rise is detected. The range of VDD through which it should rise is from 1.5 to 2.1 V. A very simple reset circuit can be a pull up resistor through which the MCLR is tied to VDD. A power up timer operating on the internal RC oscillator generates 72ms fixed delay on power-up. This time delay allows VDD to rise to the required level. Simple Reset Circuit PIC Reset Circuit

   

The reset function will set the program counter to the starting address of the program. The starting address for 16C71 is 000H. The first instruction to be executed will appear at the reset vector. When powered most of the hardware registers are initialized , however RAM locations are not initialized. A reset cycle will initialize the RAM locations and some more bits. Therefore reset and power on are different in PIC.

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  

Normally, an RC circuit is not necessarily needed, but it is recommended by Microchip to have a reset circuit using external RC components. The value of R must than 40KΩ to make sure that the voltage drop across R does not exceed the electrical specifications. 1KΩ resistor again limits the current into MCLR pin.

BROWN-OUT-RESET [BOR]:       16C61 and 16C71 does not support this feature. PIC can be rest automatically in running condition due to brown-out, which is not possible in many other microcontrollers. Brown-out-reset takes place when the supply voltage falls below 4V. The device remains in the brown-out –reset condition till the power supply voltage is restored. However, there will be a power up timer killing 72ms more again. It is recommended that the power-up timer should be enabled when the brown-out-reset is enabled. In case, during the power-up timer delay of 72ms, if the supply voltage falls below 4V, the CPU will have brown-out-reset once again. OSCILLATOR CONNECTIONS

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2. Data Memory :

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INSTRUCTIONS   Each PIC16CXX instruction is a 14-bit word divided into an opcode which specifies the instruction type and one or more operands which further specify the operation of the instruction. For Byte-oriented instructions ‘f’ represents a file register & ‘d’ represents a destination. The file register designator specifies which file register is to be used by the instruction. If ‘d’ is zero, the result is placed in W register and if it is one, the result is placed in file register.   For Bit-oriented instructions ‘b’ represents a bit field designator which selects the number of the bit affected by the operation, while ‘f’ represents the number of the file in which the bit is located. For Literal and control operations , ‘k’ represents an eight or eleven bit constant or literal value.


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ADDRESSING MODES 1. Direct addressing: It uses 7 bits of instruction and the 8th bit from RP0. If bit is 0 then bank 0 otherwise bank 1. Fig : Bank Selection

2. Indirect addressing:

Fig : Direct/Indirect addressing I/O PORTS 1. PORT A & TRIS A REGISTER:     RA0 to RA4 (5 lines)(Address 05). RA4 has alternate function. TRIS A (85H) is SFR used to configure these lines individually as either inputs or outputs. Setting bit in TRIS will configure as input and 0 will configure as output.

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2. PORT B & TRIS B REGISTER:    RB0 to RB7 (8 lines). TRIS B has weak internal pull up which is to be enabled. POR disables pull ups.




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INTERRUPTS  The PIC 16C6X family has 11 sources of interrupts.

 

3Interrupt Sources for 16C61. External Interrupt–Due to external source. Edge Sensitive RB0/INT causes this interrupt. This interrupt wakes up processor from SLEEP. This must be set before going into SLEEP mode.

  

Timer 0–Timer 0 overflow. FF to 00 overflow. Port B Change Interrupt–A change from high to low or low to high on port B pins RB4 to RB7 causes this interrupt. This interrupt can wake device from SLEEP. ADC–For 16C71 series as EOC. TIMERS

   

It has three timer modules except for PIC16C61, which has only one module. Timer 0 module Timer 1 module and Timer 2 module.

Timer 0 Module:    Timer 0 module is a simple 8-bit overflow counter. The clock source can be either the internal system clock (FOSC/4) or an external clock. When the clock source is an external clock, the timer 0 module can be selected to increment on either the rising or falling edge. The Timer 0 module also has a programmable prescaler option. This prescaler can be assigned to either the Timer 0 module or the Watchdog Timer.

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Timer 1 Module:    Timer 1 is a 16-bit timer/counter. The clock source can be either the internal system clock (FOSC/4), an external clock, or an external crystal. Timer 1 can operate as either a timer or a counter. When operating as a counter (external clock source), the counter can either operate synchronized to the device or asynchronously to the device. Asynchronous operation allows Timer 1 to operate during sleep, which is useful for applications that require a real-time clock as well as the power savings of sleep mode. Timer 2 Module:   Timer 2 is a 8-bit timer with a programmable prescaler and a programmable post scaler, as well as an 8-bit period register(PR2). Timer 2 can be used with the CCP module(in PWM mode) as well as the baud rate generator for synchronous serial port(SSP).

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