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MEWAR UNIVERSITY M. Tech.

IIIrd Sem (VLSI) Sub:-VLSI Physical Design Assignment:2


Instructor: Rajshekar Kadiyam

1. Define Floor planning. Why is it important and explain the different approaches for floor planning. 2 3 4 5 6 7 8 9 Explain cluster Growth approach and explain its algorithm with the help of an example. Define Linear Ordering. Explain it algorithm with an example. Explain the General floor planning by simulated annealing sequence-pair representation . Explain Stockmeyer algorithm with an example. Explain Annealing using Polish expression representation. Explain about pin assignment. Explain breuers algorithm with an example. Explain Terminal propagation algorithm with an example.

10 Explain Gordan and Time wolf(TW) algorithms Reference Book: Algorithms for VLSI physical Design- Naveed Sherwani

MEWAR UNIVERSITY M. Tech. IIIrd Sem (VLSI) Sub:-VLSI Physical Design Assignment:3
Instructor: Rajshekar Kadiyam

1. Explain the design style specific global routing problems. 2. Write the classification of global routing algoritms. 3. Explain Maze routing algorithm. 4. Explain Lee Algorithms. 5. Explain Hadlocks Algorithm. 6. Explain Soukups Algorithm. 7. Explain Mikami- Tabuchis Algorithm. 8. Explain Hightowers Algorithm. 9. Explain Shortest Path based algorithm. 10. Explain LEA based Algorithm and Base left-Edge algorithm. 11. Explain Steiner Tree based algorithm and L- shaped Steiner routing algorithm Reference Book: Algorithms for VLSI physical Design- Naveed Sherwani

MEWAR UNIVERSITY M. Tech. IIIrd Sem (VLSI) Sub:-VLSI System and Sub-System Design(VSSD) Assignment:2
Instructor: Trailokya Nath Sasamal

1. Explain need of IP core and different types of IP cores? 2. Difference between ASIC chip designs or FPGA logic designs? 3. What is FSM and discuss different groups of state machines? 4. Describe soft processors with example? 5. Discuss architecture of FPGA in detail? 6. Discuss single internal data bus based processor architectures? 7. Discuss the three phases in soft processor generation? 8. Explain single internal data bus based processor architectures with example. 9. Discuss single and multi cycle FSM processor and explain why it implemented on FPGA? Reference Book: Digital Design- M. Morris Mano

MEWAR UNIVERSITY M. Tech. IIIrd Sem (VLSI) Sub:-VLSI System and Sub-System Design(VSSD) Assignment:3
Instructor: Trailokya Nath Sasamal

1. Difference between PLD, Semi-custom, Full-custom IC technology? 2. Discuss different types of PLD? 3. Discuss difference between PLA & PAL? 4. Discuss building block of CPLD? 5. Discuss building block of FPGA? 6. Discuss architecture of FPGA- XILINX 3E series? 7. Discuss advantages of FPGA over ASIC? 8. Discuss the reconfigurable feature of FPGA? 9. Discuss the methods for storing data in an integrated circuit have been adapted for use in PLDs? 10. Explain how ROM can be used as a PLD with example? Reference Book: Digital Design- M. Morris Mano