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250 MHz to 2400 MHz RF Variable Gain Amplifier ADL5592

FEATURES
Output frequency range: 250 MHz to 2400 MHz Noise figure: 5.7 dB at 1960 MHz OIP3 at 1960 MHz: 29 dBm at PIN = 0 dBm per tone 2 digital attenuators, each with 31 dB range 1 dB attenuation step size Single SPI port Single supply: 4.5 V to 5.5 V 40-lead, 6 mm × 6 mm LFCSP package

FUNCTIONAL BLOCK DIAGRAM
RFOUT RFIN

LOIP LOOP EN

ATTENUATOR CONTROL CIRCUITRY

ADL5592
LOOP OUT SPI PORT*
06662-001

APPLICATIONS
GSM/EDGE and cellular communications systems

*COMPRISES THE DATA, CLK, AND LE PINS.

Figure 1.

GENERAL DESCRIPTION
The ADL5592 is a digitally programmable variable gain amplifier (VGA) designed for use from 250 MHz to 2400 MHz. Two digitally programmable attenuators are cascaded with a high linearity fixed-gain amplifier. The device also includes a mixer, which can be used to mix the transmitted signal into an adjacent receive band for loopback testing. The ADL5592 can be used in conjunction with a direct-to-RF modulator, such as ADL537x and ADL539x, in cellular communications systems such as GSM/EDGE. The ADL5592 is available in a 6 mm × 6 mm, 40-lead exposedpaddle LFCSP package. The device operates from the −40°C to +85°C temperature range.

Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

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ADL5592 TABLE OF CONTENTS
Features .............................................................................................. 1  Applications ....................................................................................... 1  Functional Block Diagram .............................................................. 1  General Description ......................................................................... 1  Revision History ............................................................................... 2  Specifications..................................................................................... 3  Absolute Maximum Ratings............................................................ 6  ESD Caution .................................................................................. 6  Pin Configuration and Function Descriptions ............................. 7  Typical Performance Characteristics ............................................. 8  Theory of Operation ...................................................................... 11  Input Switch ................................................................................ 11  Digital Attenuator....................................................................... 11  SPI Interface ................................................................................ 11  Fixed-Gain Amplifier................................................................. 11  Loopback Mixer.......................................................................... 11  Applications Information .............................................................. 12  Basic Connections ...................................................................... 12  Programming the SPI Port ........................................................ 12  GSM/EDGE Transmit Application .......................................... 14  Soldering Information ............................................................... 14  Evaluation Board ............................................................................ 15  Characterization Setup .............................................................. 15  Schematic and Layout ................................................................ 16  Configuration Options .............................................................. 18  Outline Dimensions ....................................................................... 19  Ordering Guide .......................................................................... 19 

REVISION HISTORY
6/08—Revision 0: Initial Version

Rev. 0 | Page 2 of 20

Table 1. 270 nH choke inductor Variation within TA = 0°C to 85°C Variation within transmit band Two tones with Δ = 1 MHz.8 −9.6 16. Frequency OIP3 Noise Figure Return Loss Modulation Spectrum 28 Variation within transmit band TA = 0°C to 85°C RFIN = 4 dBm. Frequency Gain vs.0 dB dB dB dB dB dB dBm dB dB dB dB dBm dB dB dB 8 −72 −84 −88 dBc dBc dBc .8 1. 8 PSK 270 nH choke inductor 400 kHz carrier offset 600 kHz carrier offset 1. Frequency Gain vs.3 1 0.2 10.02 12.8 −9. Temperature VGA RF Output Power vs. Frequency Dynamic Range Variation vs. 270 nH choke inductor 400 kHz carrier offset 600 kHz carrier offset 1.0 dB dB dB dB dB dB dBm dB dB dB dB dBm dB dB dB 8 −72 −85 −88 0.7 2. Parameter OPERATING FREQUENCY RANGE DIGITAL ATTENUATORS—fRF = 460 MHz to 496 MHz Attenuation Range Attenuator Step Size Relative Step Accuracy Absolute Step Accuracy Step Size Variation vs.0 V.0 ±4. TA = 25°C. 8 PSK.02 0.8 ±1. Temperature RFOUT Power vs.ADL5592 SPECIFICATIONS Measured at VCC = 5.2 28.1 dBc dBc dBc % % Error Vector Magnitude (EVM) DIGITAL ATTENUATORS—fRF = 869 MHz to 960 MHz Attenuation Range Attenuator Step Size Relative Step Accuracy Absolute Step Accuracy Step Size Variation vs. 8 PSK RMS Peak 30. POUT = 12 dBm.3 0.1 1 −0.3 0.2 MHz carrier offset POUT = 12 dBm.0 ±4.02 27.3 −10 −15 ±1. Frequency Dynamic Range Variation vs.03 0.5 4. 0 | Page 3 of 20 30. 270 nH choke inductor Variation within TA = 0°C to 85°C Variation within transmit band Two tones with Δ = 1 MHz.5 −0. Temperature vs. minimum attenuation Variation within transmit band Minimum attenuation.2 MHz carrier offset Rev. Temperature vs. 0 dBm per input tone Minimum attenuation RFIN at minimum attenuation RFOUT at minimum attenuation Relative to carrier in 30 kHz. unless otherwise noted.5 1 −0.03 0. 0 dBm per input tone Minimum attenuation RFIN at minimum attenuation RFOUT at minimum attenuation Relative to carrier in 30 kHz.4 −0. minimum attenuation Variation within transmit band Minimum attenuation. Frequency OIP3 Noise Figure Return Loss Modulation Spectrum Conditions Min 250 Typ Max 2400 Unit MHz 28 Variation within transmit band TA = 0°C to 85°C RFIN = 4 dBm. POUT = 12 dBm.7 4.6 14.02 0.8 0.

2 8. 8 PSK 33 nH choke inductor 400 kHz carrier offset 600 kHz carrier offset 1.1 ±1.0 dB dB dB dB dB dB dBm dB dB dB dB dBm dB dB dB 8 −71 −86 −88 0. CLK.9 1.1 −13.02 0.0 ±4.1 13.8 1990 1910 −13 −16 −8 95 0 −13. LE 2. Frequency OIP3 Noise Figure Return Loss Modulation Spectrum 28 Variation within transmit band TA = 0°C to 85°C RFIN = 4 dBm.0 −12.9 0. Frequency vs.24 −0.4 −11.7 −16.9 13 dBc dBc dBc % % MHz V V MHz MHz dB dB dB MHz dBm dBm dBm dBm dB dB dBm dBm dBm dBc/Hz V Error Vector Magnitude (EVM) LOGIC INPUTS Clock Speed Input Logic Low Input Logic High RF LOOP MIXER Input Frequency Output Frequency Input Return Loss Output Return Loss LOIP Frequency Range LOIP Power LOOP OUT Power DATA.5 1 −0. minimum attenuation Variation within transmit band Minimum attenuation. 0 dBm per input tone Minimum attenuation RFIN at minimum attenuation RFOUT at minimum attenuation Relative to carrier in 30 kHz. 8 PSK RMS Peak Min Typ 0.02 0. 0 dBm per input tone 450 MHz to 486 MHz 824 MHz to 915 MHz 1710 MHz to 1910 MHz Carrier offset > 400 kHz Rev. 0 | Page 4 of 20 0. Frequency Dynamic Range Variation vs. 33 nH choke inductor Variation within TA = 0°C to 85°C Variation within transmit band Two tones with Δ = 1 MHz. Temperature OIP3 Output Noise Density Loop Enable Control .1 0. Temperature RFOUT Power vs. 8 PSK RMS Peak 30.7 Max Unit % % DIGITAL ATTENUATORS—fRF = 1805 MHz to 1990 MHz Attenuation Range Attenuator Step Size Relative Step Accuracy Absolute Step Accuracy Step Size Variation vs.5 460 450 RFIN with loop enable active low at 1960 MHz LOIP at 80 MHz LOOP OUT at 1880 MHz 10 −6 RFIN = 5 dBm 450 MHz to 486 MHz 824 MHz to 915 MHz 1710 MHz to 1910 MHz Within a received band Variation within TA = 0°C to 85°C Two tones with Δ = 1 MHz.7 12.6 1.2 29 5.8 13 10. POUT = 12 dBm.2 MHz carrier offset POUT = 12 dBm.ADL5592 Parameter Error Vector Magnitude (EVM) Conditions POUT = 12 dBm.9 2. Frequency Gain vs.1 −132 Output Power Flatness vs. Temperature vs.5 0.7 1.

RFIN = 4 dBm. RF loop output = −11 dBm At carrier frequency. at RF input frequency.ADL5592 Parameter Input Logic Low Input Logic High Switching Time ISOLATION LOOP OUT to RFOUT Conditions Loopback active Loopback inactive Enable/disable Loopback mode.5 Loopback active at TA = 25°C TA = −40°C to +85°C Loopback inactive at TA = 25°C TA = −40°C to +85°C Min 2.0 230 255 189 208 5. RFIN = 4 dBm. POUT = 15 dBm Transmit mode. transmit mode.5 V mA mA mA mA Rev.8 500 −68 Unit V V ns dBm RFIN to RFOUT −50 dBm RFOUT to LOOP OUT RFIN to LOOP OUT POWER SUPPLIES Voltage Supply Current −50 −50 dB dB 5. RF loop output = −11 dBm Loopback mode. maximum attenuation set on ATTN 1 and ATTN 2.4 Typ 0 5 Max 0. maximum attenuation set on ATTN 1 and ATTN 2. PINATT1 = 4 dBm VCC pins 4. at loop output frequency. maximum attenuation set on ATTN 1 and ATTN 2. minimum attenuation set on ATTN 1 and ATTN 2. 0 | Page 5 of 20 .

ADL5592 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltage VCC RFIN LOIP LOOP EN. functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied.5 V 1650 mW 47°C/W 150°C −40°C to +85°C −65°C to +150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only. DATA.5 V 15 dBm 10 dBm 5. 0 | Page 6 of 20 . CLK. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. LE Internal Power Dissipation θJA (Exposed Paddle Soldered Down) Maximum Junction Temperature Operating Temperature Range Storage Temperature Range Rating 5. ESD CAUTION Rev.

14. Connect to a low impedance ground plane. 32. SPI Clock Input. NC = NO CONNECT 2. Should be ac-coupled. Should be ac-coupled to ground. The pad for Pin 28 and Pin 31 must remain free of traces to avoid stray capacitances. Nominally equal to 5 V. 37. Rev. 33. 38 15. Data is clocked on the rising edge of CLK. 36.ADL5592 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS LOIP 1 LOIN 2 VCC 3 LOOP OUT 4 LOOP EN 5 DATA 6 CLK 7 LE 8 DVCC 9 GND 10 40 39 38 37 36 35 34 33 32 31 NC RFIN GND GND NC GND NC NC GND NC* ADL5592 (Not to Scale) 30 29 28 27 26 25 24 23 22 21 GND NC NC* NC GND GND GND NC GND VCC *THE PADS FOR PIN 28 AND PIN 31 MUST REMAIN FREE OF TRACES TO AVOID STRAY CAPACITANCE. Common. Pin Function Descriptions Pin No. 11. EP Exposed Paddle. Loopback Mixer Differential LO Input. 06662-002 Figure 2. 23. NOTES 1. RF Output. RF Input. 40 Mnemonic LOIP LOIN VCC LOOP OUT LOOP EN DATA CLK LE DVCC RFOUT RFIN GND Description Loopback Mixer Differential LO Input. Pin Configuration (Top View) Table 3. 17. 19. 20. 13. 30. SPI Data Input. Nominally equal to 5 V. Both attenuators are programmed with a single 10-bit word. NC No Connection. Loopback Mixer Enable. Positive Supply. 35. 27 to 29. Apply logic high for normal transmit mode. Connect to a low impedance ground plane. VCC and DVCC must be connected together externally and be properly bypassed. Data is latched on the falling edge of LE. 0 | Page 7 of 20 GND RFOUT GND GND NC NC GND NC GND NC 11 12 13 14 15 16 17 18 19 20 . 24 to 26. Single-ended 50 Ω output. Loopback Mixer RF Output. Digital Positive Supply. Should be ac-coupled to the source of the mixer local oscillator signal. Apply logic mode low for loopback mode. 31. CONNECT EXPOSED PADDLE TO A LOW IMPEDANCE GROUND PLANE. 16. 1 2 3. SPI Latch Enable. Should be ac-coupled. 22. 18. 34. 21 4 5 6 7 8 9 12 39 10.

at Maximum Gain Rev. Output P1dB Compression vs. RFOUT. Frequency by Gain Code. 0 dBm per Input Tones with 1 MHz Spacing 20 10 0 0dB OUTPUT P1dB COMPRESSION (dBm) 30 25 –40°C –25°C 0°C +25°C +85°C GAIN (dB) –10 –20 –30 –40 –50 250 31dB 20 15 06662-004 500 750 1000 1250 1500 1750 FREQUENCY (MHz) 2000 2250 500 750 1000 1250 1500 1750 FREQUENCY (MHz) 2000 2250 Figure 4. and LOOP OUT Figure 8. Gain vs. Return Loss vs. Frequency Across Temperature.ADL5592 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C. Maximum Gain 0 –5 –10 10 20 8 NOISE FIGURE (dB) 16 NOISE FIGURE GAIN (dB) 06662-008 RETURN LOSS (dB) –15 –20 –25 –30 –35 –40 –45 –50 250 500 750 RFIN 0dB ATTENUATION RFIN 31dB ATTENUATION RFOUT 0dB ATTENUATION RFOUT 31dB ATTENUATION LOOP OUT 06662-005 6 12 4 GAIN 8 2 4 1000 1250 1500 1750 FREQUENCY (MHz) 2000 2250 0 250 500 750 1000 1250 1500 1750 FREQUENCY (MHz) 2000 2250 0 Figure 5. Noise Figure and Gain vs. All Output Attenuator (ATTN 2) Code Steps Figure 7. Frequency Across Temperature. 0 | Page 8 of 20 06662-007 10 250 06662-006 20 250 . Frequency. Output Third-Order Intercept vs. 20 10 0 0dB 40 OUTPUT THIRD-ORDER INTERCEPT (dBm) 35 –40°C –25°C 0°C +25°C +85°C GAIN (dB) –10 –20 –30 –40 –50 250 31dB 30 25 06662-003 500 750 1000 1250 1500 1750 FREQUENCY (MHz) 2000 2250 500 750 1000 1250 1500 1750 FREQUENCY (MHz) 2000 2250 Figure 3. Maximum Gain. unless otherwise noted. Frequency by Gain Code. VS = 5. RFIN. All Input Attenuator (ATTN 1) Code Steps Figure 6. Frequency. Gain vs.0 V.

1 –0.2 0. Frequency = 1960 MHz (Each Attenuator Is Swept Independently from 0 to 31) Figure 14.1 0 –0. Frequency = 492 MHz (Each Attenuator Is Swept Independently from 0 to 31) Figure 12.2 –0.25 0 06662-010 –40°C –25°C 0°C +25°C +85°C ATTENUATOR 1 –0.25 0 –0.2 0.4 0.25 32 06662-011 –40°C –25°C 0°C +25°C +85°C ATTENUATOR 1 –0.3 RELATIVE STEP ACCURACY (dB) ABSOLUTE STEP ACCURACY (dB) 0.2 –0.50 1.4 0 8 16 24 GAIN CODE 32 0 ATTENUATOR 2 8 16 24 GAIN CODE ATTENUATOR 1 0 8 16 24 GAIN CODE 32 0 ATTENUATOR 2 8 16 24 GAIN CODE 32 –0.ADL5592 0. Frequency = 1960 MHz (Each Attenuator Is Swept Independently from 0 to 31) Rev.50 0.50 0.3 –40°C –25°C 0°C +25°C +85°C 2. Frequency = 492 MHz (Each Attenuator Is Swept Independently from 0 to 31) 0.50 1.25 Figure 10.75 0.1 –0.00 1. Frequency = 925 MHz (Each Attenuator Is Swept Independently from 0 to 31) Figure 13.75 1.1 0 –0.4 0.75 0.1 0 –0.00 0.1 –0.00 0. Absolute Gain Error Across Temperature.25 06662-009 –40°C –25°C 0°C +25°C +85°C ATTENUATOR 1 –0. Gain Step Error Across Temperature. 0 | Page 9 of 20 . Absolute Gain Error Across Temperature.75 0. Frequency = 925 MHz (Each Attenuator Is Swept Independently from 0 to 31) 0. Gain Step Error Across Temperature.25 0 –0.25 1.2 0.25 1.4 0 8 16 24 GAIN CODE 32 0 ATTENUATOR 2 8 16 24 GAIN CODE 32 ATTENUATOR 1 0 8 16 24 GAIN CODE 32 0 ATTENUATOR 2 8 16 24 GAIN CODE 32 –0.3 –40°C –25°C 0°C +25°C +85°C 2.4 0.3 RELATIVE STEP ACCURACY (dB) ABSOLUTE STEP ACCURACY (dB) 0.50 1. Gain Step Error Across Temperature.25 1.50 Figure 11.75 1.4 0 8 16 24 GAIN CODE 32 0 ATTENUATOR 2 8 16 24 GAIN CODE 32 ATTENUATOR 1 0 8 16 24 GAIN CODE 32 0 ATTENUATOR 2 8 16 24 GAIN CODE 32 06662-012 06662-014 06662-013 –0. Absolute Gain Error Across Temperature.00 1.3 –40°C –25°C 0°C +25°C +85°C 1.75 1.50 Figure 9.2 –0.50 0.00 0.3 RELATIVE STEP ACCURACY (dB) ABSOLUTE STEP ACCURACY (dB) 0.

50 4.4MHz 12 925.50 Figure 15.00 SUPPLY VOLTAGE (V) 5. Supply Voltage at Maximum Gain 06662-015 Rev. 0 | Page 10 of 20 .2MHz 10 1960MHz GAIN (dB) 8 6 4 2 0 4.25 5.ADL5592 14 492.75 5. Gain vs.

The input is fed from the SPDT GaAs pHEMT switch. single-ended output. Simplified Schematic FIXED-GAIN AMPLIFIER The output of the input attenuator (ATTN 1) is connected to a fixed-gain amplifier that drives the output attenuator (ATTN 2). SPI INTERFACE ATTENUATOR CONTROL CIRCUITRY LOIP LOOP EN ADL5592 LOOP OUT SPI PORT* 06662-016 *COMPRISES THE DATA. 8 dB. By controlling the states of the FET switches through the Si CMOS control lines. Rev.ADL5592 THEORY OF OPERATION Figure 16 shows a simplified schematic of the ADL5592. which are used to program a 10-bit shift register and to control the loading of a 10-bit parallel latch. 3-wire serial interface. RFOUT RFIN state (n dB). 0 | Page 11 of 20 . each attenuation block can be set to be in the pass state (0 dB) or the attenuation LOOPBACK MIXER The loopback mixer is a Si CMOS Gilbert-cell mixer designed to provide 10 MHz to 100 MHz of frequency translation from the RF input to the mixer output. 4 dB. The mixer has 50 Ω loads at the output for a broadband. The Si CMOS interface internally level-shifts the SPI signals. INPUT SWITCH The high performance single-pole. 50 Ω. The mixer LO input is designed to operate from 10 MHz to greater than 100 MHz. DIGITAL ATTENUATOR The digital attenuator consists of five attenuation blocks—1 dB. Because the passive attenuators are linear and contribute minimal noise. CLK. Figure 16.shaped attenuator. The ADL5592 includes a SPI-compatible. and 16 dB—each separately controlled by a Si CMOS control circuit. the fixed-gain amplifier is the major source of nonlinear distortion and noise. double throw (SPDT) GaAs pHEMT switch is connected to the RF input pin of the ADL5592 to switch the input signal between the VGA and the mixer. The fixed-gain amplifier provides 14 dB of gain and broadband. The overall mixer gain is typically −17 dB. in 1 dB increments. The switch-state control signal is provided by a Si CMOS control circuit. singleended input and output impedances. which convert the logic-level outputs of the latches to signals appropriate for driving the attenuators. The various combinations of the five blocks provide the attenuation states from 0 dB to 31 dB.or a T. This results in a constant OIP3 and noise figure throughout the different attenuation stages. Each attenuation block consists of field effect transistor (FET) switches and resistors that form either a pi. AND LE PINS. 2 dB. The outputs of the latch are fed into drivers. this SPDT switch exhibits low insertion loss and high isolation in the operating frequency range. To diminish the impact of the switch on the performance of the VGA and the mixer.

900MHz BANDS NC ADL5592 RFOUT GND GND NC GND GND GND NC NC RF OUTPUT Figure 17. DATA is clocked on the rising edge of CLK. 850MHz.25 V is applied to the VCC pins.1µF 1000pF LOOP OUT MIXER ENABLE SPI DATA SPI CLOCK SPI LATCH VPOS 0.1µF 100pF 100pF LOIP LOIN VCC LOOP OUT LOOP EN DATA CLK LE DVCC GND NC NC GND NC NC NC GND GND GND NC GND VCC VPOS 100pF 10µF CHOKE INDUCTOR (COILCRAFT 0603CS) 33nH FOR 1800MHz. The five least significant bits (LSBs) set the input attenuator. One of the supply pins (Pin 21) also requires biasing of an open-collector using an RF choke (Coilcraft 0603CS). The timing requirements indicated in Figure 19 are described in Table 5. 850 MHz. 0 | Page 12 of 20 06662-017 1000pF NC NC . 1900MHz BANDS 270nH FOR 450MHz. PROGRAMMING THE SPI PORT Both attenuators are programmed with a single 10-bit word. RFOUT. The data is latched and the attenuation is updated on the falling edge of LE (the latch enable pin). The RFIN. and LOOP OUT pins have 50 Ω impedances and must be ac-coupled. Table 4 lists the 10-bit words corresponding to the various gain levels. The value of the inductor is dictated by the frequency band of operation: 270 nH for the 450 MHz. RFIN ATTN 1 AMP ATTN 2 RFOUT 06662-018 Figure 18.75 V and 5.ADL5592 APPLICATIONS INFORMATION RF INPUT 1000pF 0. ATTN 1 and ATTN 2. The five most significant bits (MSBs) set the output attenuator.1µF LO INPUT RFIN GND GND GND GND NC 0. A single power supply between 4. These capacitors should be located as close as possible to the device. Figure 18 shows the input and output attenuators. respectively. ATTN 2. Rev. ATTN 1.1µF VPOS 0. Basic Connections BASIC CONNECTIONS Figure 17 shows the basic connections for the ADL5592. Block Diagram of Attenuator Chain Figure 19 shows the timing diagram of the SPI port transmission. Each power supply pin should be decoupled using a 100 pF capacitor in addition to either a 0. All the VCC pins must be connected to the same potential. and 900 MHz bands and 33 nH for the 1800 MHz and 1900 MHz bands.1 μF or 10 μF capacitor.

Timing Diagram of SPI Port Transmission Table 4. Time between valid serial data and rising clock edge. Note that this time applies to all bits in the serial data stream Serial data hold time. Time after rising clock edge during which the serial data line cannot change in value. Note that this time applies to all bits in the serial data stream Latch enable hold time. Serial data setup time. 06662-019 Figure 19. Time between latch enable active (high) and first rising edge of serial clock. Clock period. 10-Bit Gain Words for SPI Port ATTN 2 D9 D8 D7 D6 D5 D4 D3 ATTN 1 D2 D1 D0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 0 0 0 0 1 0 1 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 0 0 0 0 0 1 0 0 1 0 0 0 1 0 0 0 0 0 0 1 0 1 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 1 0 1 1 0 0 0 0 0 0 0 0 0 1 0 0 1 1 0 0 0 0 0 0 0 0 1 0 0 0 1 1 0 0 0 0 0 0 0 1 0 0 0 0 1 1 ATTN 1 (dB) 0 0 0 0 0 0 0 1 2 4 8 16 31 31 Resulting Attenuation ATTN 2 (dB) Total Attenuation (dB) 0 0 1 1 2 2 4 4 8 8 16 16 31 31 0 1 0 2 0 4 0 8 0 16 0 31 31 62 Table 5. D9 TRANSFER DATA FROM SERIAL REGISTER TO PARALLEL LATCHES ON LE FALLING EDGE. Min 15 15 15 15 15 Max Unit ns ns ns ns MHz Rev.ADL5592 1 LE 0 1 CLK 0 t0 t1 t2 t3 1 DATA 0 D0 LOAD DATA INTO SERIAL REGISTER ON RISING EDGE. 0 | Page 13 of 20 . Timing Requirements for the SPI Port Mnemonic t0 t1 t2 t3 fCLK Description Latch enable setup time. Time after final falling clock edge during which the latch enable must remain active (high).

8 MHz EDGE Signal.5 OUTPUT (dBm) 15. 270 nH RF Choke. there is an exposed compressed paddle.8 dBc. 0 | Page 14 of 20 06662-022 –100 7. Figure 21. At an output of 12 dBm at 925.0 Figure 20.5 –100 7.2 MHz sit at −72. 5 4 3 2 1 1. EVM and Spectral Mask vs. 33 nH RF Choke.0 12. the levels of the spectral mask and EVM decrease as the input attenuation of ATTN 1 is increased. EVM and Spectral Mask vs.2 dBc. the spectral mask expands and the EVM increases.5 1. It is also recommended that the ground planes on all layers under the paddle be stitched together with vias to reduce thermal impedance.0 12. EVM and Spectral Mask vs. At low output power levels. respectively.01 dBc.5 MHz. both the spectral mask and EVM remain flat.5 MHz EDGE Signal. the peak and rms EVM are 0. and −88.5 EVM (%) 6 06662-021 On the underside of the chip scale package. the levels of the spectral mask and EVM remain flat.2MHz OFFSET 0 17.56% and 1. Output Power. and Figure 22 show effects of different input power levels on the spectral mask and EVM. Increasing the input attenuation of ATTN 1 causes less power to be presented to the amplifier stage. 600 kHz.5 EVM (%) SOLDERING INFORMATION 6 06662-020 –100 7.0 Figure 21. and 1. 270 nH RF Choke. −84. 488.ADL5592 GSM/EDGE TRANSMIT APPLICATION Figure 20. respectively.0 Figure 22. This paddle is internally connected to the chip’s ground. The spectral mask offsets at 400 kHz. At higher output power levels. Minimum Attenuation Rev.2MHz OFFSET 0 17.5 OUTPUT (dBm) 15. Solder the paddle to the low impedance ground plane on the printed circuit board to ensure specified electrical performance and to provide thermal relief.5 1. Minimum Attenuation 0 –10 –20 10 9 8 7 SPECTRAL MASK (dB) –30 –40 –50 PEAK EVM –60 –70 –80 –90 600kHz OFFSET RMS EVM 400kHz OFFSET 5 4 3 2 1 10. As the output attenuation of ATTN 2 is increased. 0 –10 –20 10 9 8 PEAK EVM 7 SPECTRAL MASK (dB) –30 –40 –50 –60 –70 –80 –90 600kHz OFFSET 400kHz OFFSET 5 4 3 RMS EVM 2 1 10. Output Power. Note that the minimum attenuation setting results in the highest spectral mask and EVM values (excluding noise floor limitations).5 EVM (%) 6 .5 OUTPUT (dBm) 15. The gain code is held constant at the minimum attenuation (corresponding to Code 0 for both attenuators). 925.0 12. Minimum Attenuation 0 –10 –20 10 9 8 7 PEAK EVM SPECTRAL MASK (dB) –30 –40 –50 –60 –70 –80 –90 600kHz OFFSET RMS EVM 400kHz OFFSET 10. 1960 MHz EDGE Signal. Output Power.2MHz OFFSET 0 17.51%. Therefore. however.

R&S SMT 03 SIGNAL GENERATOR RFIN LOIP R&S SMT 03 SIGNAL GENERATOR ADL5592 RFOUT LOOP OUT VCC R&S FSIQ7 SPECTRUM ANALYZER RF SWITCH DATA CLK LE GPIB INTERFACE INSTRUMENT CONTROLLER Figure 23. A Rohde & Schwarz SMT 03 signal generator was used to drive the amplifier with a 4 dBm input. An Agilent Visual Engineering Environment (VEE) program controlled the test instruments through the general-purpose interface bus (GPIB) interface. 0 | Page 15 of 20 06662-026 TEKTRONIX DG2020A DATA GENERATOR AGILENT 6624A DC POWER SUPPLY . A separate SMT 03 was used to generate the mixer local oscillator signal (LO input signal) when the loopback mixer was enabled. DATA. and output compression of the amplifier. linearity. The DG2020A generated all three of the SPI input signals: CLK. This setup was used to measure the frequency response.) The gain control data was generated by a Tektronix DG2020A data generator. For the linearity measurement.ADL5592 EVALUATION BOARD CHARACTERIZATION SETUP The primary setup used to characterize the ADL5592 is shown in Figure 23. Characterization Bench Setup Rev. The output of the ADL5592 was connected to a Rohde & Schwarz FSIQ7 spectrum analyzer through an RF switch matrix unit. and LE. two SMT 03 signal generators were used to generate the two-tone RF input signal. (The same SMT 03 is used for both amplifier and mixer characterization.

25 V range. Table 6 details the various configuration options of the evaluation board.1 μF or 10 μF capacitor.75 V to 5.1µF VPOS C7A 0. Evaluation Board Schematic Rev. C2A 0. and LOOP OUT pins have 50 Ω impedances and must be ac-coupled. The board is powered by a single supply in the 4. IN_ATTA C17A 1000pF C9A OPEN RFIN GND GND GND GND NC NC NC NC MX_OUTA NC GND NC NC NC GND GND GND NC GND VCC L2A 33nH OR 270nH (COILCRAFT 0603CS) C10A 100pF C11A 10µF VPOS C8A OPEN ADL5592 SW2A SPI_DATA-A R9A 0Ω R10A 0Ω GND SPI_CLK-A R3A OPEN TP1A VPOS R2A OPEN R1A OPEN TP1A TP2A SPI_SEL-A C14A 1000pF C4A 100pF RF_OUTA Figure 24.1µF R5A 0Ω C6A 100pF LOIP C1A 1000pF LBENBA SW1A R12A 10kΩ R8A 0Ω 0 0 TO HEADER R11A 0Ω VPOS LOIN VCC LOOP OUT LOOP EN DATA CLK LE DVCC RFOUT GND GND GND GND GND NC NC NC NC The RFIN.1µF LOPA C3A 0. The value of the inductor is dictated by the frequency band of operation: 270 nH for the 450 MHz. and 900 MHz bands and 33 nH for the 1800 MHz and 1900 MHz bands. One of the supply pins (Pin 21) requires supply biasing using an RF choke (Coilcraft 0603CS). 850 MHz. Each power supply pin should be decoupled using a 100 pF capacitor in addition to either a 0.ADL5592 SCHEMATIC AND LAYOUT Figure 24 shows the schematic and Figure 25 and Figure 26 show the layout of the ADL5592 evaluation board. 0 | Page 16 of 20 06662-023 C5A R4A 0.1µF 0Ω VPOS . RFOUT.

Component Side Figure 26. Evaluation Board Layout.ADL5592 Figure 25. Circuit Side Rev. 0 | Page 17 of 20 06662-025 06662-024 . Evaluation Board Layout.

a logic low voltage must be applied to the LOOP EN pin by setting both Switch SW1A and Switch SW2A to the positions closest to the O labels. R5A Component Name Supply and ground vector pins Power supply decoupling Description The nominal power supply decoupling is accomplished by using a 100 pF (C4A. C17A Input and output interfaces C1A to C3A Mixer input and output interfaces SW1A. and C10A) in addition to either a 0. The signal is driven from the LBENBA SMA. R12A = 10 kΩ (Size 0402) R1A. setting Switch SW1A to the position opposite Label O. L2A. L2A. To use this function. C5A. Default Conditions Not applicable L2A = 270 nH or 33 nH (Size 0603) (Coilcraft 0603CS). A 25-pin D-subadapter and cable are required to connect the PC to the SPI port test points on the evaluation board. A series inductor. The SMA labeled RF_OUTA corresponds to the RF output. R9A. R5A = 0 Ω (Size 0402). C1A to C3A are dc blocks. In some cases. C2A. C6A. SW1A. R9A to R11A Serial control interface C14A and C17A are dc blocks. SW2A = installed. is used to bias the open collector at Pin 21. Switch SW1A must be set to the position closest to the O label and Switch SW2A must be set to the opposite position. For the high bands (1800 MHz and 1900 MHz). TP2A L1A. R11A = 0 Ω (Size 0402) Rev. R8A. 850 MHz. the loopback mode must be enabled. The SMA labeled IN_ATTA is used to drive the RF input. To tune the ADL5592 for the low bands (450 MHz. C17A = 1000 pF (Size 0402) C1A = 1000 pF (Size 0402). For loopback mode. R12A Loopback enable interface R1A to R3A. R8A = 0 Ω (Size 0402). SPI_DATA-A. The SMA labeled LOPA drives the balanced differential mixer input with a single-ended LO source. the value should be 270 nH. The SMA labeled MX_OUTA corresponds to the mixer output. R3A = open (Size 0402). C4A to C11A. SPI_CLK-A. R4A.1 μF (Size 0402) C14A. and SPI_SEL-A. C8A. The unused differential input is ac-coupled to ground. the inductor should be changed to 33 nH.1 μF (Size 0402). C4A. C3A = 0. 0 | Page 18 of 20 . C10A = 100 pF (Size 0402). C11A = 10 μF (Size 0402). Evaluation Board Configuration Options Component Designator TP1A. R4A. R10A. C7A = 0. SW2A. C9A = open (Size 0402) C14A. and 900 MHz).1 μF (C5A and C7A) or a 10 μF (C11A) capacitor at each power supply pin.ADL5592 CONFIGURATION OPTIONS Table 6. The addition of 50 Ω values for R1A to R3A allow for SPI port control from digital generators driven from the SMAs connectors. the quality of the PC port signals can be improved by adding capacitance to R1A to R3A. To exercise the control function from an external source. The evaluation board can be controlled using most PCs. Windows®based control software is shipped with the evaluation kit. C6A. R2A. Normal transmit mode is exercised by applying a logic high voltage to the LOOP EN pin.

20 MIN 0.70 SEATING PLANE 0. 0 | Page 19 of 20 . 7" Tape and Reel Evaluation Board Package Option CP-40-2 Ordering Quantity 3.05 MAX 0.ADL5592 OUTLINE DIMENSIONS INDEX AREA 6.15 SQ 4.25 0.25 4. 061108-A COMPLIANT TO JEDEC STANDARDS MO-220-WJJD-2 Figure 27.30 21 20 BOTTOM VIEW 0. Rev.75 0.18 0. Very Very Thin Quad (CP-40-2) Dimensions shown in millimeters ORDERING GUIDE Model ADL5592ACPZ-R7 1 ADL5592-EVALZ1 1 Temperature Range −40°C to +85°C Package Description 40-Lead LFCSP_WQ.30 0.02 NOM 0.00 BSC SQ 31 30 40 1 PIN 1 INDICATOR 0. 40-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 6 mm × 6 mm Body.40 0.20 REF THE EXPOSED METAL PADDLE ON THE BOTTOM OF THE LFCSP PACKAGE MUST BE SOLDERED TO PCB GROUND FOR PROPER HEAT DISSIPATION AND ALSO FOR NOISE AND MECHANICAL STRENGTH BENEFITS.80 0.000 Z = RoHS Compliant Part.00 10 11 TOP VIEW 0.50 0.50 BSC EXPOSED PAD 4.

Inc. All rights reserved. D06662-0-6/08(0) Rev. Trademarks and registered trademarks are the property of their respective owners.ADL5592 NOTES ©2008 Analog Devices. 0 | Page 20 of 20 .