S-Domain Analysis

s-Domain Circuit Analysis
Time domain
(t domain)
Complex frequency
domain (s domain)
Linear
Circuit
Differential
equation
Classical
techniques
Response
waveform
Laplace Transform
Inverse Transform
Algebraic
equation
Algebraic
techniques
Response
transform
L
L
-1
Laplace Transform
L
Transformed
Circuit
Kirchhoff’s Laws in s-Domain
t domain s domain
Kirchhoff’s current law (KCL)
Kirchhoff’s voltage law (KVL)
) (
1
t i
) (
4
t i
) (
2
t i
) (
3
t i
0 ) ( ) ( ) ( ) (
4 3 2 1
· + − + t i t i t i t i 0 ) ( ) ( ) ( ) (
4 3 2 1
· + − + s I s I s I s I
0 ) ( ) ( ) (
3 2 1
· + + − t v t v t v 0 ) ( ) ( ) (
3 2 1
· + + − s V s V s V
− + ) (
2
t v − + ) (
4
t v

+
) (
1
t v

+
) (
3
t v

+
) (
5
t v
Signal Sources in s Domain
L
L
t domain s domain
) (t v
_
+
) (t v
S
_
+
) (t i
circuit on
depends ) (
) ( ) (
·
·
t i
t v t v
S
Voltage Source:
_
+
) (s V ) (s V
S
_
+
) (s I
Voltage Source:
circuit on
depends ) (
) ( ) (
·
·
s I
s V s V
S
+
_
) (t v ) (t i
S
) (t i
circuit on
depends ) (
) ( ) (
·
·
t v
t i t i
S
Current Source:
) (s V ) (s I
S
+
_
) (s I
Current Source:
circuit on
depends ) (
) ( ) (
·
·
s V
s V s I
S
Time and s-Domain Element Models
Impedance and Voltage Source for Initial Conditions
Time Domain
L
L
L
s-Domain
_
+
) (t v
R
R
) (t i
R
) ( ) ( t Ri t v
R R
·
Resistor:
_
+
) (s V
R
R
) (s I
R
) ( ) ( s RI s V
R R
·
Resistor:
_
+
) (t v
L
L
) (t i
L
dt
t di
L t v
L
L
) (
) ( ·
Inductor:
_
+
_
+
) (s V
L
Ls
) 0 (
L
Li
) (s I
L
) 0 (
) ( ) (
L
L L
Li
s LsI s V − ·
Inductor:
_
+
) (t v
C
C
) (t i
C
) 0 (
) (
1
) (
0
C
t
C C
v
d i
C
t v
+
·

τ τ
Capacitor:
_
+
_
+
) (s V
C
Cs 1
s
v
C
) 0 (
) (s I
C
s
) ( v
s I
Cs
s V
C
C C
0

) (
1
) ( + ·
Capacitor:
Impedance and Voltage Source for Initial
Conditions
R
s I
s V
s Z
R
R
R
· ·
) (
) (
) (
0 ) 0 ( th wi
) (
) (
) ( · · ·
L
L
L
L
i Ls
s I
s V
s Z
0 0 th wi
1
) (
) (
) ( · · · ) ( v
Cs s I
s V
s Z
C
C
C
C
• Impedance Z(s)
with all initial conditions set to zero
ansform current tr
transform voltage
) ( · s Z
• Impedance of the three passive elements
Time and s-Domain Element Models
Admittance and Current Source for Initial Conditions
Time Domain
L
L
L
s-Domain
_
+
) (t v
R
R
) (t i
R
) (
1
) ( t v
R
t i
R R
·
Resistor:
_
+
) (s V
R
R
) (s I
R
) (
1
) ( s V
R
s I
R R
·
Resistor:
_
+
) (t v
L
L
) (t i
L
Inductor:
) 0 (
) (
1
) (
0
L
t
L L
i
d v
L
t i
+
·

τ τ
_
+
) (t v
C
C
) (t i
C
dt
t dv
C t i
C
C
) (
) ( ·
Capacitor:
Inductor:
s
) ( i
s V
Ls
s I
L
L L
0

) (
1
) ( + ·
_
+
) (s V
L
Ls
s
i
L
) 0 (
) (s I
L
) 0 (
) ( ) (
C
C C
Cv
s CsV s I − ·
Capacitor:
_
+
) (s V
C
Cs 1
) 0 (
C
Cv
) (s I
C
Admittance and Current Source for Initial
Conditions
R s V
s I
s Y
R
R
R
1
) (
) (
) ( · ·
0 ) 0 ( th wi
1
) (
) (
) ( · · ·
L
L
L
L
i
Ls s V
s I
s Y
0 0 th wi
) (
) (
) ( · · · ) ( v Cs
s V
s I
s Y
C
C
C
C
with all initial conditions set to zero
) (
1
transform voltage
ansform current tr
) (
s Z
s Y · ·
• Admittance of the three passive elements
Example: Solve for Current Waveform i(t)
L
_
+
) (t u V
A
R
) (t i
L
_
+
) (s V
L
) 0 (
L
Li
− + ) (s V
R
_
+
s
V
A
R
) (s I
Ls
_
+
0 ) ( ) ( · + + − s V s V
s
V
L R
A
By KVL:
) ( ) ( s RI s V
R
· Resistor: ) 0 ( ) ( ) (
L L
Li s LsI s V − · Inductor:
0 ) 0 ( ) ( ) ( · − + + −
L
A
Li s LsI s RI
s
V
L R s
i
L R s
R V
s
R V
L R s
i
L R s s
L V
s I
L A A
L A
+
+
+
− ·
+
+
+
·
) 0 (
) 0 (
) (
) (
) ( ) 0 ( ) ( t u e i e
R
V
R
V
t i
t
L
R
L
t
L
R
A A
1
]
1

¸

+ − ·
− −
Inverse Transform:
forced response
natural response
Series Equivalence and Voltage Division
) ( ) ( ) ( ) ( ) (
1 1 1 1
s I s Z s I s Z s V · ·
) ( )) ( ) ( (
) ( ) ( ) (
2 1
2 1
s I s Z s Z
s V s V s V
+ ·
+ · KVL:
) (
) (
) (
) (
) (
) (
) (
) (
2
2
1
1
s V
s Z
s Z
s V
s V
s Z
s Z
s V
EQ
EQ
·
·
) ( ) ( ) ( ) ( ) (
2 2 2 2
s I s Z s I s Z s V · ·
) ( ) ( ) (
2 1
s Z s Z s Z
EQ
+ ·
Rest
of
Circuit
Z
1
Z
2
− + ) (
1
s V

+
) (
2
s V

+
) (s V
) (s I
) (
1
s I
) (
2
s I
Rest
of
Circuit
Z
EQ

+
) (s V
) (s I
2 1
Z Z Z
EQ
+ ·
Parallel Equivalence and Current Division
) ( ) ( ) (
1 1
s V s Y s I ·
) ( )) ( ) ( (
) ( ) ( ) (
2 1
2 1
s V s Y s Y
s I s I s I
+ ·
+ · KCL:
) (
) (
) (
) (
) (
) (
) (
) (
2
2
1
1
s I
s Y
s Y
s I
s I
s Y
s Y
s I
EQ
EQ
·
·
) ( ) ( ) (
2 2
s V s Y s I ·
) ( ) ( ) (
2 1
s Y s Y s Y
EQ
+ ·
Rest
of
Circuit
Y
EQ

+
) (s V
) (s I
2 1
Y Y Y
EQ
+ ·
Rest
of
Circuit
Y
1
Y
2

+
) (s V
) (s I
) (
2
s I ) (
1
s I
) (
1
s V
1 EQ
Z
_
+
_
+
Ls
) (
2
s V
A
B EQ
Z
) (
1
s V
_
+
A
B
EQ
Z
) (
1
s V
1 EQ
Z
_
+
_
+
Ls
) (
2
s V
A
B EQ
Z
Example:
Equivalence Impedance and Admittance
1
1
) ( ) (
2
1
+
+ +
·
+
+ · + ·
RCs
R Ls RLCs
RCs
R
Ls s Z Ls s Z
EQ EQ
R
RCs
Cs
R s Z
s Y
EQ
EQ
1 1
) (
1
) (
1
1
+
· + · ·
L
Find equivalent impedance at A and B
Solve for v
2
(t)
Inductor current = 0
capacitor voltage = 0
at t = 0
) (
1
t v
R C _
+
_
+
L
) (
2
t v
A
B
) (
1
s V
R
Cs
1
_
+
_
+
Ls
) (
2
s V
A
B
) (
1
s V
1 EQ
Z
_
+
_
+
Ls
) (
2
s V
A
B
) (
) (
) (
) (
1
2
1
1
2
s V
R Ls RCLs
R
s V
Z
s Z
s V
EQ
EQ
+ +
·
·
) (
1
s V
R
Cs
1
_
+
_
+
Ls
) (
2
s V
A
B
1 EQ
Z
General Techniques for s-Domain Circuit
Analysis
• Node Voltage Analysis (in s-domain)
– Use Kirchhoff’s Current Law (KCL)
– Get equations of node voltages
– Use current sources for initial conditions
– Voltage source current source
• Mesh Current Analysis (in s-domain)
– Use Kirchhoff’s Voltage Law (KVL)
– Get equations of currents in the mesh
– Use voltage sources for initial conditions
– Current source voltage source
(Works only for “Planar” circuits)
Formulating Node-Voltage Equations
Step 0: Transform the circuit into the s domain using current
sources to represent capacitor and inductor initial conditions
Step 1: Select a reference node. Identify a node voltage at each
of the non-reference nodes and a current with every element
in the circuit
Step 2: Write KCL connection constraints in terms of the
element currents at the non-reference nodes
Step 3: Use the element admittances and the fundamental
property of node voltages to express the element currents in
terms of the node voltages
Step 4: Substitute the device constraints from Step 3 into the
KCL connection constraints from Step 2 and arrange the
resulting equations in a standard form
Example: Formulating Node-Voltage Equations
L
) (t i
S
R C
L
t domain
) (s I
S
R
Cs
1
Ls
s domain
s
i
L
) 0 (
) 0 (
C
Cv
) (s V
A
) (
2
s I
) (
1
s I
) (
3
s I
) (s V
B
Reference
node
Step 0: Transform the circuit into the s domain using
current sources to represent capacitor and
inductor initial conditions
Step 1: Identify N-1=2 node voltages and a current
with each element
Step 2: Apply KCL at nodes A and B:
0 ) ( ) (
) 0 (
) 0 ( : B Node
0 ) ( ) (
) 0 (
) ( : A Node
3 1
2 1 S
· − + +
· − − −
s I s I
s
i
Cv
s I s I
s
i
s I
L
C
L
Step 3: Express element equations in terms of node
voltages
[ ] [ ]
) ( ) ( ) ( ) (
1 where ) ( ) ( ) ( ) (
) ( ) (
1
) ( ) ( ) ( ) (
3
2
1
s CsV s V s Y s I
R G s GV s V s Y s I
s V s V
Ls
s V s V s Y s I
B B C
A A R
B A B A L
· ·
· · ·
− · − ·
Formulating Node-Voltage Equations (Cont’d)
Step 2: Apply KCL at nodes A and B:
0 ) ( ) (
) 0 (
) 0 ( : B Node
0 ) ( ) (
) 0 (
) ( : A Node
3 1
2 1 S
· − + +
· − − −
s I s I
s
i
Cv
s I s I
s
i
s I
L
C
L
Step 3: Express element equations in terms of node voltages
[ ] [ ]
) ( ) ( ) ( ) (
1 where ) ( ) ( ) ( ) (
) ( ) (
1
) ( ) ( ) ( ) (
3
2
1
s CsV s V s Y s I
R G s GV s V s Y s I
s V s V
Ls
s V s V s Y s I
B B C
A A R
B A B A L
· ·
· · ·
− · − ·
Step 4: Substitute eqns. in Step 3 into eqns. in Step 2 and collect
common terms to yield node-voltage eqns.
s
i
Cv s V Cs
Ls
s V
Ls
s
i
s I s V
Ls
s V
Ls
G
L
C B A
L
S B A
) 0 (
) 0 ( ) (
1
) (
1
: B Node
) 0 (
) ( ) (
1
) (
1
: A Node
+ ·

,
_

¸
¸
+ +

,
_

¸
¸

− ·

,
_

¸
¸

,
_

¸
¸
+
Solving s-Domain Circuit Equations
• Circuit Determinant:
Ls
G Cs GLCs
Ls Ls Cs Ls G
Ls Cs Ls
Ls Ls G
s
+ +
·
− + + ·
+ −
− +
· ∆
2
2
) 1 ( ) 1 )( 1 (
1 1
1 1
) (
Depends on circuit element parameters: L, C, G=1/R,
not on driving force and initial conditions
• Solve for node A using Cramer’s rule:
G Cs GLCs
Cv LCsi
G Cs GLCs
s I LCs
s
Ls Cs Cv s i
Ls s i s I
s
s
s V
C L S
C L
L S
A
A
+ +
+ −
+
+ +
+
·

+ +
− +
·

·
2 2
2
) 0 ( ) 0 ( ) ( ) 1 (
) (
1 ) 0 ( ) 0 (
1 ) 0 ( ) (
) (
) (
) (
Zero State
when initial condition
sources are turned off
Zero input
when input sources
are turned off
Solving s-Domain Circuit Eqns. (Cont’d)
• Solve for node B using Cramer’s rule:
G Cs GLCs
Cv GLs GLi
G Cs GLCs
s I
s
Cv s i Ls
s i s I Ls G
s
s
s V
C L S
C L
L S
B
B
+ +
+ +
+
+ +
·

+ −
− +
·

·
2 2
) 0 ( ) 1 ( ) 0 ( ) (
) (
) 0 ( ) 0 ( 1
) 0 ( ) ( 1
) (
) (
) (
Zero State Zero input
Network Functions
• Driving-point function relates the voltage and
current at a given pair of terminals called a port
Transform Signal Input
Transform Response state - Zero
function Network ·
) (
1
) (
) (
) (
s Y s I
s V
s Z · ·
• Transfer function relates an input and response at
different ports in the circuit
) (
) (
Function Transfer Voltage ) (
1
2
s V
s V
s T
V
· ·
Circuit
in the
zero-state

+
) (s V
) (s I
Circuit
in the
zero-state
1 1
or I V
2 2
or I V
Input Output
_
+
1
V

+
2
V
) (s T
V
In Out
) (
) (
Function Transfer Current ) (
1
2
s I
s I
s T
I
· ·
) (
) (
Admittance Transfer ) (
1
2
s V
s I
s T
Y
· ·
) (
) (
Impedance Transfer ) (
1
2
s I
s V
s T
Z
· · _
+
1
V
2
I
) (s T
Y
In Out
1
I

+
2
V
) (s T
Z
In Out
1
I ) (s T
I
In Out
2
I
Calculating Network Functions
Z
1
Z
2

+
) (
2
s V
) (
1
s V
_
+
Y
1
Y
2
) (
1
s I
) (
2
s I
) ( ) ( ) (
2 1
s Z s Z s Z
EQ
+ ·
) ( ) (
) (
) (
) (
) (
2 1
2
1
2
s Z s Z
s Z
s V
s V
s T
V
+
· ·
• Driving-point impedance
• Voltage transfer function:
) (
) ( ) (
) (
) (
1
2 1
2
2
s V
s Z s Z
s Z
s V
1
]
1

¸

+
·
) ( ) ( ) (
2 1
s Y s Y s Y
EQ
+ ·
) ( ) (
) (
) (
) (
) (
2 1
2
1
2
s Y s Y
s Y
s I
s I
s T
I
+
· ·
• Voltage transfer function:
) (
) ( ) (
) (
) (
1
2 1
2
2
s Y
s Y s Y
s Y
s I
1
]
1

¸

+
·
Impulse Response and Step Response
T(s)
Circuit
) (s X ) (s Y
Input Output
) ( ) ( ) ( s X s T s Y ·
• Input-output relationship in s-domain
) ( 1 ) ( ) ( s T s T s Y · × ·
• When input signal is an impulse
– Impulse response equals network function
– H(s) = impulse response transform
– h(t) = impulse response waveform
s
s H
s
s T
s G
) ( ) (
) ( · ·
• When input signal is a step
– G(s) = step response transform
– g(t) = step response waveform
) ( ) ( t u t x ·
) ( ) ( t t x δ ·
(=) means equal almost everywhere,
excludes those points at which g(t)
has a discontinuity
dt
t dg
t h d h s g
t
) (
) )( ( , ) ( ) (
0
· ·

τ τ

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