= = (2)
KCL at v
1
:
1
1
1 1 1 1 1 1
6 0
8 16 32 8 32 16
7 4 12.............(3)
oc o
oc o
v v v
or
v v v
 
+ + =

\ .
=
Subst. Eqns. (1) and (2) into (3) yields:
12 V
oc
v =
In order to find R
th
, 1 A test source can be used.
V
th
R
th
R
6 V
16
8
10
10
32
R
6 V
16
8
10
10
32
6 V
v
1
v
oc
v
oc
v
o
EEE 223 Circuit Theory I Final Examination
M. K. Uygurolu January 10, 2005
KCL at the inverting terminal:
1 1 1
0
10 10 10
2 ..................(4)
o
o
v v
v v
 
+ =

\ .
=
KCL at the noninverting terminal:
1
1
1 8........(5)
8
v v
v v
= =
KCL at v
1
:
1
1
1 1 1 1 1
0
8 16 32 8 32
7 4 0.............(6)
o
o
v v v
or
v v v
 
+ + =

\ .
=
Subst. Eqns. (4) and (5) into (6) yields:
56 V
56
1
th
v
v
R
=
= =
Therefore when R = 56 it absorbs maximum power and the maximum power is:
( )
2
max
12 144 9
4 56 224 14
P W = = =
16
8
10
10
32
v
1
v
o
v
v
1 A
EEE 223 Circuit Theory I Final Examination
M. K. Uygurolu January 10, 2005
3. For the circuit shown in (a), the source voltage is given in (b). Find the current i if
(0) 1
L
i = A for (a) 0 1 t < < s and (b) 1 2 t < < s.
0
1
(0)
2 0.5
t
g
R L g L
v
i i i v dt i = + = + +
where
2 2 0 1
( ) 2 2 1 2
2 6 2 3
g
t t
v t t t
t t
+ < <
= < <
+ < <
0 1: t < <
( )
2
0
2
2 2 1
2 2 1 1 2 2 1
2 0.5
2 3
t
R L
t
i i i t dt t t t
i t t A
+
( = + = + + = + + +
= +
1 2: t < <
( )
2
1
2
2
2 2 1
2 2 (1) 1 2 2 1 2 1
2 0.5
(1) 2(1) 3(1) 1
2 3 2
t
R L L
L
t
i i i t dt i t t t
where i
i t t A
( = + = + + = + + +
= + =
= +
2 0.5 H
i
i
L
v
g
2
1 2 3
v
g
(V)
t (s)
(a) (b)
i
R
EEE 223 Circuit Theory I Final Examination
M. K. Uygurolu January 10, 2005
4. Find v for t > 0 if the circuit is under dc condition at t = 0.
At t = 0
Using voltage division principle:
24
(0) 20 12
24 16
v V = =
+
For t > 0:
It is known that
  ( ) ( ) (0) ( )
t
v t v v v e
= +
1 1
6
36 6
8 24
8// 24 6
8 24
eq
eq
R C s
R
= = =
= = =
+
At t = the circuit is under dc
conditions.
24
( ) 8 6
32
v V = =
Therefore
  ( )
6 6
( ) 6 12 6 6 1
t t
v t e e V
= + = +
t = 0
+
v

16
8
20V 8 V
24 1/36 F
+
v

16
8
20V 8 V
24
+
v

16
8
20V 8 V
24 1/36 F
+
v

16
8
20V 8 V
24
EEE 223 Circuit Theory I Final Examination
M. K. Uygurolu January 10, 2005
5. Find i for t > 0 if the circuit is under dc conditions at t = 0

.
At t = 0.
9
5
9
1 1// 4
5
T
T
T
i A
R
R
= =
= + =
Using current division principle:
For t > 0:
1
C
v
i =
KCL at node a:
0.5
c
L c
dv
i v
dt
= + ..(1)
At t=0
(0) (0) 0.5 (0) (0) 0
c c
L c
dv dv
i v
dt dt
= + =
KVL around the outer loop:
4 2 0
L
L C
di
i v
dt
+ + = (2)
Subst. Eqn(1) into (2) yields:
2
2
4 0.5 2 0.5 0
4 5 0
C C
C C C
C C
C
dv dv d
v v v
dt dt dt
d v dv
v
dt dt
   
+ + + + =
 
\ . \ .
+ + =
4
1
1
2 H
9 V
t = 0
0.5 F
i
i
L
+
v
C
_
4
1
1
9 V
i
i
L
+
v
C
_
i
T
4
(0) (0) 5 4
4 1
(0) 4(1) 4
L
C
i i A
v V
= = =
+
= =
4
1
2 H
0.5 F
i
i
L
+
v
C
_
a
EEE 223 Circuit Theory I Final Examination
M. K. Uygurolu January 10, 2005
Characteristic equation
2
1,2
4 5 0
4 16 20
2 1 Complex conjugate natural frequencies
2
s s
s j
+ + =
= =
Therefore
( )
2
1 2
( ) cos sin
t
C
v t e A t A t
= +
In order to find A
1
and A
2
initial conditions will be used.
1
(0) 4
C
v A = =
( ) ( )
2 2
1 2 1 2
1 2
2
2 cos sin sin cos
(0) 2 0
8
t t C
C
dv
e A t A t e A t A t
dt
dv
A A
dt
A
= + + +
= + =
=
( )
2
( ) 4cos 8sin
t
C
v t e t t V
= +