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OPA132 OPA2132 OPA4132
SBOS054A – JANUARY 1995 – REVISED JUNE 2004
High-Speed FET-INPUT OPERATIONAL AMPLIFIERS
q FET INPUT: IB = 50pA max q WIDE BANDWIDTH: 8MHz q HIGH SLEW RATE: 20V/µs q LOW NOISE: 8nV/√Hz (1kHz) q LOW DISTORTION: 0.00008% q HIGH OPEN-LOOP GAIN: 130dB (600Ω load) q WIDE SUPPLY RANGE: ±2.5 to ±18V q LOW OFFSET VOLTAGE: 500µV max q SINGLE, DUAL, AND QUAD VERSIONS
Offset Trim –In +In V– 1 2 3 4 8-Pin DIP, SO-8 8 7 6 5 Offset Trim V+ Output NC OPA132
The OPA132 series of FET-input op amps provides highspeed and excellent dc performance. The combination of high slew rate and wide bandwidth provide fast settling time. Single, dual, and quad versions have identical specifications for maximum design flexibility. High performance grades are available in the single and dual versions. All are ideal for general-purpose, audio, data acquisition and communications applications, especially where high source impedance is encountered. OPA132 op amps are easy to use and free from phase inversion and overload problems often found in common FET-input op amps. Input cascode circuitry provides excellent common-mode rejection and maintains low input bias current over its wide input voltage range. OPA132 series op amps are stable in unity gain and provide excellent dynamic behavior over a wide range of load conditions, including high load capacitance. Dual and quad versions feature completely independent circuitry for lowest crosstalk and freedom from interaction, even when overdriven or overloaded. Single and dual versions are available in 8-pin DIP and SO-8 surface-mount packages. Quad is available in 14-pin DIP and SO-14 surface-mount packages. All are specified for –40°C to +85°C operation.
Out A –In A +In A V–
1 2 3 4 8-Pin DIP, SO-8 A B
8 7 6 5
V+ Out B –In B +In B
OPA4132 Out A –In A +In A V+ +In B –In B Out B 1 2 A 3 4 5 B 6 7 14-Pin DIP SO-14 C 9 8 –In C Out C D 12 11 10 +In D V– +In C 14 13 Out D –In D
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 1995-2004, Texas Instruments Incorporated
. 4132 www.............................................................. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions..... Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications....................................................................... 2 OPA132.................. 2132...................... 300°C NOTE: (1) Short-circuit to ground...................... one amplifier per package.... Continuous Operating Temperature .........7V Output Short-Circuit(1) .............. PACKAGE/ORDERING INFORMATION For the most current package and ordering information......... see the Package Option Addendum located at the end of this data sheet......................................... –55°C to +125°C Junction Temperature . ESD damage can range from subtle performance degradation to complete device failure.........7V to (V+) +0...................... –40°C to +125°C Storage Temperature ...ABSOLUTE MAXIMUM RATINGS Supply Voltage................... Failure to observe proper handling and installation procedures can cause damage...................... 36V Input Voltage ..com SBOS054A ...... (V–) –0......... 10s) .......ti.... V+ to V– .......... ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD.................... 150°C Lead Temperature (soldering...........
VO = –13.0 (V–)+1.5V to +13.5 (V–)+2.8 +85 +125 ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ nV/√Hz nV/√Hz nV/√Hz nV/√Hz fA/√Hz V dB Ω || pF Ω || pF dB dB dB MHz V/µs µs µs µs % % V V V V V V mA VCM = –12.3 (V+)–1.5 96 CONDITION MIN TYP ±0.5V to +12.5V RL = 10kΩ. CL = 100pF G = –1. OPA132P. Positive Negative Positive Negative Positive Negative Short-Circuit Current Capacitive Load Drive (Stable Operation) POWER SUPPLY Specified Operating Voltage Operating Voltage Range Quiescent Current (per amplifier) TEMPERATURE RANGE Operating Range Storage Thermal Resistance. 10V Step.9 (V–)+0.5 (V+)–1.5Vrms RL = 2kΩ RL = 600Ω RL = 10kΩ RL = 2kΩ RL = 600Ω OUTPUT Voltage Output.5 0. θJA 8-Pin DIP SO-8 Surface-Mount 14-Pin DIP SO-14 Surface-Mount ✻ Specifications same as OPA132P. VO = 3.00009 (V+)–1. 4132 SBOS054A www. OPA132U. f = 10Hz f = 100Hz f = 1kHz f = 10kHz Current Noise Density. VO = –12. G = 1.1% 0.25 ±2 5 0. VO = –14. VS = ±15V.2 MAX ±0.2 (V–)+0.9 ±40 See Typical Curve ±15 ±4 ✻ ✻ ✻ ✻ ✻ ✻ 104 104 104 (V+)–2.01% Overload Recovery Time Total Harmonic Distortion + Noise G = –1. CL = 100pF G = ±1 1kHz.7 1 0. 10V Step.5V FREQUENCY RESPONSE Gain-Bandwidth Product Slew Rate Settling Time: 0.5 ±10 15 MIN OPA132PA.9 (V+)–2. ±2.2 (V+)–2.5V RL = 600Ω.00008 0.8V to +12. UA TYP ±0. OPA132. U PARAMETER OFFSET VOLTAGE Input Offset Voltage vs Temperature(1) vs Power Supply Channel Separation (dual and quad) INPUT BIAS CURRENT Input Bias Current(2) vs Temperature Input Offset Current(2) NOISE Input Voltage Noise Noise Density. f = 1kHz INPUT VOLTAGE RANGE Common-Mode Voltage Range Common-Mode Rejection INPUT IMPEDANCE Differential Common-Mode OPEN-LOOP GAIN Open-Loop Voltage Gain (V–)+2. U OPA2132P. 2132. UA OPA2132PA.SPECIFICATIONS At TA = +25°C.2 (V+)–0.ti. (2) High-speed test at TJ = 25°C.5 ✻ 86 ✻ ✻ ✻ ✻ ✻ ✻ 94 ✻ ✻ ✻ 120 120 ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ±18 ±4.5 ✻ ✻ ✻ ✻ ✻ ✻ MAX ±2 ✻ 30 UNITS mV µV/°C µV/V µV/V pA pA Operating Temperature Range VS = ±2.2 (V–)+0.5V VCM = –12.8V RL = 2kΩ. unless otherwise noted.5 IO = 0 –40 –40 V V mA °C °C °C/W °C/W °C/W °C/W 100 150 80 110 NOTES: (1) Guaranteed by wafer test.5V to ±18V RL = 2kΩ VCM = 0V VCM = 0V +5 ±50 See Typical Curve ±2 ±50 ✻ ✻ 23 10 8 8 3 ±13 100 1013 || 2 1013 || 6 110 110 110 120 126 130 8 ±20 0.5 (V–)+1.com 3 .8V to +13. UA OPA4132PA.5V to +12.
100 1k Frequency (Hz) RL = 2kΩ 100 Current Noise 1 1 10 100 1k Frequency (Hz) 10k 100k 1M 80 10k 100k INPUT BIAS CURRENT vs TEMPERATURE 100k 10k High Speed Test Warmed Up Input Bias Current (pA) INPUT BIAS CURRENT vs INPUT COMMON-MODE VOLTAGE 10 9 8 7 6 5 4 3 2 1 0 High Speed Test Input Bias Current (pA) 1k 100 Dual 10 1 0.ti.com SBOS054A . VS = ±15V. RL = 2kΩ. all channels. G = 1. 2132. unless otherwise noted.TYPICAL PERFORMANCE CURVES At TA = +25°C. CMR (dB) φ 80 60 40 20 +PSR CMR –135 –180 0 10M 10 100 1k 10k 100k 1M Frequency (Hz) Frequency (Hz) INPUT VOLTAGE AND CURRENT NOISE SPECTRAL DENSITY vs FREQUENCY 1k CHANNEL SEPARATION vs FREQUENCY 160 RL = ∞ Channel Separation (dB) Voltage Noise (nV/√Hz) Current Noise (fA/√Hz) 140 100 Voltage Noise 10 120 Dual and quad devices. 4132 www.1 –75 –50 –25 0 25 50 75 100 125 Ambient Temperature (°C) Single Quad –15 –10 –5 0 5 10 15 Common-Mode Voltage (V) 4 OPA132.1 1 10 100 1k 10k 100k 1M G –90 Phase Shift (°) 100 PSR. OPEN-LOOP GAIN/PHASE vs FREQUENCY 160 140 0 POWER SUPPLY AND COMMON-MODE REJECTION vs FREQUENCY 120 100 –PSR 120 –45 Voltage Gain (dB) 80 60 40 20 0 –20 0. Quad measured channel A to D or B to C—other combinations yield improved rejection.
0 7.5 3.001 G = +10 Output Voltage (Vp-p) THD+Noise (%) MAXIMUM OUTPUT VOLTAGE vs FREQUENCY 30 VS = ±15V Maximum output voltage without slew-rate induced distortion 20 0.5 8.5 6. CMR.01 RL 2kΩ 600Ω 0.0 3. PSR (dB) 120 Open-Loop Gain 4. PSR vs TEMPERATURE 130 Quiescent Current Per Amp (mA) 4.5Vrms 0. dual and quad units included.3 QUIESCENT CURRENT AND SHORT-CIRCUIT CURRENT vs TEMPERATURE 60 AOL.5 4.1 ±ISC ±IQ 40 110 PSR 4.0 4.9 20 3. VS = ±15V. RL = 2kΩ. dual and quad units included.0 30 100 CMR 90 –75 –50 –25 0 25 50 75 100 125 Ambient Temperature (°C) 3. CMR.00001 10 100 1k Frequency (Hz) 10k 100k 10 VS = ±5V VS = ±2. 12 10 Percent of Amplifiers (%) OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION Typical production distribution of packaged units. unless otherwise noted. Single.5 7.com 5 Short-Circuit Current (mA) 4.0 0. 8 6 4 2 0 0.0 2.0001 G = +1 VO = 3.5 5.5 1.5V 10k 100k Frequency (Hz) 1M 10M 0 OPA132.5 2.TYPICAL PERFORMANCE CURVES (Cont. 2132.0 Offset Voltage (µV) Offset Voltage Drift (µV/°C) TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 0.0 6. Single.2 50 .ti. AOL.) At TA = +25°C.0 1.8 –75 –50 –25 0 25 50 75 100 125 Ambient Temperature (°C) 10 OFFSET VOLTAGE PRODUCTION DISTRIBUTION 12 10 Percent of Amplifiers (%) 8 6 4 2 0 0 200 400 600 800 1000 1200 –1400 –1200 –1000 –800 –600 –400 –200 1400 Typical production distribution of packaged units.0 5. 4132 SBOS054A www.
CL = 100pF LARGE-SIGNAL STEP RESPONSE G = 1. RL = 2kΩ. 4132 www.ti. VS = ±15V.1% 1 0.01% 40 30 20 10 FPO 0. unless otherwise noted.) At TA = +25°C.TYPICAL PERFORMANCE CURVES (Cont.1 ±1 ±10 ±100 ±1000 Closed-Loop Gain (V/V) G = ±10 0 100pF 1nF Load Capacitance 10nF OUTPUT VOLTAGE SWING vs OUTPUT CURRENT 15 14 Output Voltage Swing (V) VIN = 15V –55°C 25°C 25°C 125°C 85°C 125°C 85°C 13 12 11 10 –10 –11 –12 –13 –14 –15 0 VIN = –15V 10 20 30 40 25°C –55°C 50 60 Output Current (mA) 6 OPA132. CL = 100pF 50mV/div 200ns/div 5V/div 1µs/div SETTLING TIME vs CLOSED-LOOP GAIN 100 60 50 Settling Time (µs) SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE G = +1 G = –1 Overshoot (%) 10 0. 2132. SMALL-SIGNAL STEP RESPONSE G = 1.com SBOS054A .
junction temperature rise should be minimized. OPERATING VOLTAGE OPA132 series op amps operate with power supplies from ±2. Although specifications are production tested with ±15V supplies.” The OPA132 series may be operated at reduced power supply voltage to minimize power dissipation and temperature rise. OPA132 series op amps are free from this undesirable behavior. Use offset adjust pins only to null offset voltage of op amp—see text. Input stage cascode circuitry assures that the input bias current remains virtually unchanged throughout the full input common-mode range of the OPA132 series. a warmed-up quad will have higher input bias current than a warmed-up single. Furthermore. most behavior remains unchanged throughout the full operating voltage range. Offset voltage can be adjusted by connecting a potentiometer as shown in Figure 1.APPLICATIONS INFORMATION OPA132 series op amps are unity-gain stable and suitable for a wide range of general-purpose applications. Temperature rise can be minimized by soldering the devices to the circuit board rather than using a socket. assuring normal behavior when one amplifier in a package is overdriven or short-circuited. 10nF V+ Trim Range: ±4mV typ 100kΩ 7 2 3 10nF 1 8 OPA132 4 6 OPA132 single op amp only. an SOIC will generally have higher junction temperature than a DIP at the same ambient temperature because of a larger θJA. The OPA132 (single op amp version) provides offset voltage trim connections on pins 1 and 8. Parameters which vary significantly with operating voltage are shown in the typical performance curves. the effect is usually small. Wide copper traces will also help dissipate the heat by acting as an additional heat sink.5V to ±18V with excellent performance.” OPA132. Nulling offset could degrade the offset voltage drift behavior of the op amp. Refer to the specifications table. Thus. This can occur in voltage-follower circuits. INPUT BIAS CURRENT The FET-inputs of the OPA132 series provide very low input bias current and cause negligible errors in most applications. 4132 SBOS054A www. causing serious problems in control loop applications. Many FET-input op amps exhibit phase-reversal of the output when the input common-mode voltage range is exceeded. not to adjust system offset or offset produced by the signal source.com 7 . See the typical performance curve “Input Bias Current vs CommonMode Voltage. The input bias current of FET-input op amps increases with temperature as shown in the typical performance curve “Input Bias Current vs Temperature. Circuit board layout can also help minimize junction temperature rise. Power supply pins should be bypassed with 10nF ceramic capacitors or larger. V– FIGURE 1.ti. OPA132 op amps are free from unexpected output phasereversal common with FET op amps. leading to higher junction temperature. Using ±3V supplies reduces power dissipation to one-fifth that at ±15V. All circuitry is completely independent in dual and quad versions. The dual and quad versions have higher total power dissipation than the single. OPA132 Offset Voltage Trim Circuit. OFFSET VOLTAGE TRIM Offset voltage of OPA132 series amplifiers is laser trimmed and usually requires no user adjustment. This adjustment should be used only to null the offset of the op amp. While it is not possible to predict the exact change in drift. For applications where low input bias current is crucial. 2132.
ti.PACKAGE OPTION ADDENDUM www.com 4-Aug-2012 PACKAGING INFORMATION Orderable Device OPA132P OPA132P1 OPA132PA OPA132PA2 OPA132U OPA132U/2K5 OPA132U/2K5G4 OPA132U1 OPA132UA OPA132UA/2K5 OPA132UA/2K5E4 OPA132UA/2K5G4 OPA132UA2 OPA132UAE4 OPA132UAG4 OPA132UG4 OPA2132P OPA2132PA OPA2132PAG4 Status (1) Package Type Package Drawing PDIP PDIP PDIP PDIP SOIC SOIC SOIC PDIP SOIC SOIC SOIC SOIC PDIP SOIC SOIC SOIC PDIP PDIP PDIP P P P P D D D P D D D D P D D D P P P Pins 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 Package Qty Eco Plan TBD TBD TBD TBD (2) Lead/ Ball Finish Call TI Call TI Call TI Call TI MSL Peak Temp Call TI Call TI Call TI Call TI (3) Samples (Requires Login) OBSOLETE OBSOLETE OBSOLETE OBSOLETE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE 75 2500 2500 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR CU NIPDAU Level-3-260C-168 HR CU NIPDAU Level-3-260C-168 HR Call TI Call TI 75 2500 2500 2500 CU NIPDAU Level-3-260C-168 HR CU NIPDAU Level-3-260C-168 HR CU NIPDAU Level-3-260C-168 HR CU NIPDAU Level-3-260C-168 HR Call TI Call TI 75 75 75 50 50 50 CU NIPDAU Level-3-260C-168 HR CU NIPDAU Level-3-260C-168 HR CU NIPDAU Level-3-260C-168 HR CU NIPDAU N / A for Pkg Type CU NIPDAU N / A for Pkg Type CU NIPDAU N / A for Pkg Type Addendum-Page 1 .
ti.com 4-Aug-2012 Orderable Device OPA2132PG4 OPA2132U OPA2132U/2K5 OPA2132U/2K5E4 OPA2132U/2K5G4 OPA2132UA OPA2132UA/2K5 OPA2132UA/2K5E4 OPA2132UAE4 OPA2132UAG4 OPA2132UE4 OPA2132UG4 OPA4132PA OPA4132UA OPA4132UA/2K5 OPA4132UA/2K5E4 OPA4132UA/2K5G4 OPA4132UAE4 Status (1) Package Type Package Drawing PDIP SOIC SOIC SOIC SOIC SOIC SOIC SOIC SOIC SOIC SOIC SOIC PDIP SOIC SOIC SOIC SOIC SOIC P D D D D D D D D D D D N D D D D D Pins 8 8 8 8 8 8 8 8 8 8 8 8 14 14 14 14 14 14 Package Qty 50 75 2500 2500 2500 75 2500 2500 75 75 75 75 Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type CU NIPDAU Level-3-260C-168 HR CU NIPDAU Level-3-260C-168 HR CU NIPDAU Level-3-260C-168 HR CU NIPDAU Level-3-260C-168 HR Call TI Level-3-260C-168 HR CU NIPDAU Level-3-260C-168 HR CU NIPDAU Level-3-260C-168 HR Call TI Call TI Level-3-260C-168 HR Level-3-260C-168 HR CU NIPDAU Level-3-260C-168 HR CU NIPDAU Level-3-260C-168 HR Call TI Call TI 50 2500 2500 2500 50 CU NIPDAU Level-3-260C-168 HR CU NIPDAU Level-3-260C-168 HR CU NIPDAU Level-3-260C-168 HR CU NIPDAU Level-3-260C-168 HR CU NIPDAU Level-3-260C-168 HR Addendum-Page 2 .PACKAGE OPTION ADDENDUM www.
Pb-Free (RoHS Exempt). and peak solder temperature. Addendum-Page 3 . and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.The planned eco-friendly classification: Pb-Free (RoHS). or 2) lead-based die adhesive used between the die and leadframe.1% by weight in homogeneous materials.PACKAGE OPTION ADDENDUM www. NRND: Not recommended for new designs. TBD: The Pb-Free/Green conversion plan has not been defined. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. TI and TI suppliers consider certain information to be proprietary.ti. or Green (RoHS & no Sb/Br) . Device is in production to support existing customers. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.com 4-Aug-2012 Orderable Device OPA4132UAG4 Status (1) Package Type Package Drawing SOIC D Pins 14 Package Qty 50 Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) ACTIVE Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. OBSOLETE: TI has discontinued the production of the device. and a lifetime-buy period is in effect. (2) Eco Plan . including the requirement that lead not exceed 0. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. and thus CAS numbers and other limited information may not be available for release. Where designed to be soldered at high temperatures. -.1% by weight in homogeneous material) (3) MSL.please check http://www. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package. TI Pb-Free products are suitable for use in specified lead-free processes. TI bases its knowledge and belief on information provided by third parties. and makes no representation or warranty as to the accuracy of such information.ti. LIFEBUY: TI has announced that the device will be discontinued.com/productcontent for the latest availability information and additional product content details. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications. Efforts are underway to better integrate information from third parties. but TI does not recommend using this part in a new design. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible). Peak Temp.
4 6.2 9.0 330.0 8.2 5.1 2.1 P1 (mm) 8.1 2.0 8.0 12.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SOIC SOIC SOIC SOIC D D D D 8 8 8 14 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 330.0 8.2 5.4 12.0 Q1 Q1 Q1 Q1 OPA132U/2K5 OPA132UA/2K5 OPA2132UA/2K5 OPA4132UA/2K5 2500 2500 2500 2500 Pack Materials-Page 1 .0 W Pin1 (mm) Quadrant 12.PACKAGE MATERIALS INFORMATION www.0 330.0 K0 (mm) 2.4 6.ti.4 16.0 12.4 6.4 12.0 330.0 16.0 12.1 2.4 6.5 B0 (mm) 5.
0 Width (mm) 367.0 Pack Materials-Page 2 .0 367.0 367.com 14-Jul-2012 *All dimensions are nominal Device OPA132U/2K5 OPA132UA/2K5 OPA2132UA/2K5 OPA4132UA/2K5 Package Type SOIC SOIC SOIC SOIC Package Drawing D D D D Pins 8 8 8 14 SPQ 2500 2500 2500 2500 Length (mm) 367.0 35.ti.0 367.PACKAGE MATERIALS INFORMATION www.0 367.0 35.0 367.0 367.0 Height (mm) 35.0 38.
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