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Attribution Non-Commercial (BY-NC)

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2012-13: semester-I

M.Sachidananda

DIFFERENTIAL AMPLIFIER

Objectives: Design a differential amplifier using BJTs. Measure differential and common mode gains, Ad & Acm Measure distortion characteristics (THD) of the amplifier Replace the emitter resistor by a current source and study its effect on the Ad and Acm Comparison of measured results with the simulated and analytical results.

M.Sachidananda

DIFFERENTIAL AMPLIFIER Specifications: AV 100, Vom 5V, Ro 100 , Ri 10 k, BW - dc to 5 MHz Can we meet the specs with an RC coupled CE amplifier ?

M.Sachidananda

M.Sachidananda

` U0

CE amplifier: Output distortion vin = 5mV, 1 KHz sine wave, m = 0.2 HD2 = -28.3 dB acceptable (< 5%) Has a small Vom= 0.5V; HD2 is large

vin

84.6dB

vout

56.3dB

21.8dB

M.Sachidananda

M.Sachidananda

` U0

DIFFERENTIAL AMPLIFIER Specifications: AV 100, Vom 5V, Ro 100 , Ri 10 k, BW - dc to 5 MHz We need a differential amplifier configuration and may need more than one stage to meet all the specs. A differential amplifier has much larger Vom much lower harmonic distortion. can amplify dc onwards - fH is limited by the fT of the device. input stage can be designed to give high Ri output stage can be added to get a low Ro large gain can be obtained by adding multiple stages dc biasing can be designed to give Vo = 0 for Vi = 0

M.Sachidananda

I E1 = IE2 v v exp B1 E ; VT v v I = S exp B 2 E ; VT IS

+1

I C 1 = I E1 I E1 + I E 2 = I E

v v I E1 = exp B1 B 2 ; IE2 VT

I C1 =

IE

IC 2

v v 1 + exp B 2 B1 VT IE = v 1 + exp in VT

IE

v 1 + exp in VT

M.Sachidananda

` U0 0 i u u x { x

j S

f j i u i x { `

DIFFERENTIAL AMPLIFIER symmetry & linearity The region of linearity can be increased by adding emitter resistor, but at the expense of decreased gain, as shown

M.Sachidananda

vin = v1 v2 I E I C1 + I C 2 I C1 = I CQ + iC1 v iC1 = tanh in I CQ 2VT = 0.5 I E {exp(v1 / VT ) exp(v2 / VT )} I C1 =

IE

v 1 + exp in VT

let vin = pVT sin(t )

n =1 m =1

M.Sachidananda Department of Electrical Engineering, IIT Kanpur

10

` U0 0 i u u x { x

j S

f j i u i x { `

Total harmonic distortion (THD) is defined as the square root of the ratio of harmonic power to the fundamental power.

2 2 2 a3 + a5 + a7 + ... 2 2 2 a3 + a5 + a7 + ...

THD =

a1

THD (%) =

a1

100

For most THD calculations it is sufficient to consider up to 7th harmonic.

M.Sachidananda Department of Electrical Engineering, IIT Kanpur

11

v iC1 = tanh in I CQ 2VT

tanh ( A sin(t ) )

linear region

Note: Take Fourier transform and determine harmonic components to calculate THD.

M.Sachidananda Department of Electrical Engineering, IIT Kanpur

12

` U0 0 i u u x { x

j S

f j i u i x { `

M.Sachidananda

13

DIFFERENTIAL AMPLIFIER harmonic distortion Spectrum of Vo for vin = 47mV, THD = 5% (-26dB); f0 =10KHz

M.Sachidananda

14

` U0 0 i u u x { x

j S

f j i u i x { `

From the dc bias (VCE, ICQ) we get maximum swing limit as:

From the total harmonic distortion (THD 5%), the limit* is

I E RC 4VT

* - for single ended output; twice for differential output.

M.Sachidananda Department of Electrical Engineering, IIT Kanpur

15

vin= 47mV; vom = 4.15V for THD = 5%

vom = 8.3V (diff. output)

(4.15V, 5%)

(47mV, 5%)

M.Sachidananda

16

` U0 0 i u u x { x

j S

f j i u i x { `

AV = 40dB (mid. band) f = 3.75MHz (-3dB)

fT = 375MHz

Q1 & Q2 - 2N2222

M.Sachidananda

17

*Specs: AV 100, Vom 5V, Ro 100 , Ri 10 k, BW - dc to 10 MHz

AV =

vo g m RC I E RC = = vin 2 4VT

Rin = 2r =

4VT ; IE

R0 = RC

AV Rin = R0

Not possible to achieve all specs in one stage.

* - this is a sample specification for the design example. Lab handout has different specs.

M.Sachidananda Department of Electrical Engineering, IIT Kanpur

18

` U0 0 i u u x { x

j S

f j i u i x { `

Rin = 4VT IE IE 110 4 25(mV) = 1.1 mA 10k

RE = VEE 0.6 11.4(V) = = 11.4k IE 1(mA)

RC = 6.2(V) = 12.4k 0.5(mA)

We can add an emitter follower stage to lower R0 to 100

M.Sachidananda Department of Electrical Engineering, IIT Kanpur

19

R0 = RE || (rE 3 + RS / ) RS =

RC of diff. stage

Vo(dc) = (6.2- 0.7) = 5.5V; RE = (V0-VEE)/ICQ3 select ICQ3 = 2mA RE = 17.5V/2mV = 8.75k

rE 3 =

VT = 12.5 I CQ 3

eff = Q3 Q4

R0 = 8.75k||(12.5+12k/110) = 120

A Darlington pair* can be used to increase eff to reduce R0 further. It also reduces loading on Q2.

R0 is slightly higher than the required 100 . Alternatives are: re-design diff amp with an RC 10k so that RS / < (100 - rE) = 87.5 , or use a Darlington pair in the diff. amp to reduce the R0 . {This will lead to higher ICQ, hence is not preferred.}

M.Sachidananda Department of Electrical Engineering, IIT Kanpur

20

10

` U0 0 i u u x { x

j S

f j i u i x { `

vom = Min{6.7V; 5.7V; 5.358V} = 5.358 V > 5V

Note: *With CC stage loading Q2, output swing will be reduced, and V0 (dc) will also change because of DC coupling.

Band width :

For fT = 300MHz & AV =100, maximum 3dB BW 3MHz. To get 10 MHz BW, AV 30. Use feed back to reduce gain and increase BW. Add a second differential stage to increase the gain to 100.

M.Sachidananda

21

Differential Amplifier Gain Differential mode voltage gain, Ad : vd = vi1-vi2 ; vcm = (vi1+vi2)/2; gm=IC /VT

Ad = vc1 vc 2 = g m Rc vd differential output single ended output

Ad = g m Rc /2

vc1 = vc 2 = vCM Acm =

RC

2 RE + rE

vCM

RC

2 RE

CMRR =

Ad g m RE Acm

RC

2 RE

Ad = 120 (41.6dB) Acm = 0.5 (-6 dB) CMRR(dB) = 47.6dB

22

Acm = 0

M.Sachidananda

11

` U0 0 i u u x { x

j S

f j i u i x { `

Differential Amplifier CMRR CMRR can be improved by replacing RE by a current source The equivalent circuit of BJT current source is an ideal CS IE , shunted by RS

eq. ckt. of CS

ro =

Acm =

RC

2 RS

Department of Electrical Engineering, IIT Kanpur

23

M.Sachidananda

RS = r0 100k

RS = r0{1 + g m ( RE || r )}

RS = r0 / 2

M.Sachidananda

24

12

` U0 0 i u u x { x

j S

f j i u i x { `

gain Ad (dB)

Rin

M.Sachidananda

25

Spectrum, vin= 56 mV, THD = 5%

THD (%)

input

(56mV, 5%)

output

M.Sachidananda

26

13

` U0 0 i u u x { x

j S

f j i u i x { `

The End

M.Sachidananda

27

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