SRI GANESH COLLEGE OF ENGINEERING AND TECHNOLOGY

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

MICROPROCESSOR LAB MANUAL
SEMESTER-IV LAB CODE: IT P42 DEPARTMENT: IT DEPT. LIST OF EXPERIMENTS
NAME OF THE EXPERIMENT CYCLE I
1 2 3 4 5 6 7 8
STUDY OF MICROPROCESSOR KIT 8085 PROGRAM FOR 8 BIT ARITHMETIC OPERATIONS WITH 8085 MICROPROCESSOR PROGRAM FOR 16 BIT ARITHMETIC OPERATIONS WITH 8085 MICROPROCESSOR PROGRAM FOR 8 & 16 BIT BCD ARITHMETIC OPERATIONS WITH 8085 MICROPROCESSOR PROGRAM FOR BLOCK OPERATIONS WITH 8085 MICROPROCESSOR PROGRAM FOR CODE CONVERSIONS WITH 8085 MICROPROCESSOR PROGRAM FOR ARRAY OPERATIONS WITH 8085 MICROPROCESSOR PROGRAM FOR ARITHMETIC OPERATION USING 8086 MICROPROCESSOR

SL.NO

CYCLE II
9 10 11 12 13 14 15
PROGRAM FOR STEPPER MOTOR INTERFACE USING 8085 MICROPROCESSOR PROGRAM FOR SERIAL COMMUNICATION USING 8085 MICROPROCESSOR PROGRAM FOR ELEVATOR SIMULATION USING 8085 MICROPROCESSOR PROGRAM FOR ADC INTERFACE USING 8085 MICROPROCESSOR PROGRAM FOR DAC INTERFACE USING 8085 MICROPROCESSOR PROGRAM FOR DC MOTOR INTERFACE USING 8085 MICROPROCESSOR PROGRAM FOR TRAFFIC LIGHTCONTROL INTERFACE 8085 MICROPROCESSOR

H.O.D
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LAB INCHARGE

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SYLLABUS

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PICTORIAL REPRESENTATION OF 8085 MICROPROCESSOR 4 .

the auxillary flag is set. The result is stored in the accumulator and the flags are set or reset according to the result of the operation. The device has 40 pins. if the result has an even number of 1’s the flag is set. the carry flag is set. requires +5 V power supply and can operate with 3MHz single phase clock. Zero flag The zero flag is set if the ALU operation results in zero.logic operation if the bit D7 of the result is 1. If it has odd number of 1’s it is reset. ALU has the capability of performing several mathematical and logical operations. Carry flag If an arithmetic operation results in a carry.EXPT. temporary registers. They are as follows: Sign flag After the execution of the arithmetic . the sign flag is set.1 STUDY OF 8085 MICROPROCESSOR KIT INTRODUCTION INTEL 8085 is one of the most popular 8-bit microprocessor capable of addressing 64 KB of memory and its architecture is simple. This flag is modified by the result in the accumulator as well as in other registers. 5 flags and arithmetic and logic circuits. If it is 1. ALU (Arithmetic Logic Unit): The 8085A has a simple 8-bit ALU and it works in coordination with the accumulator. it is a positive number. The carry flag also serves as a borrow flag for subtraction. Auxillary carry flag In an arithmetic operation when a carry is generated by digit D3 and passed on to D4. The temporary registers are used to hold the data during an arithmetic and logic operation. it is a negative number and if it is 0. NO. 5 . This flag is used with signed numbers. Parity flag After arithmetic – logic operation. The flags are affected by the arithmetic and logic operation.

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they can be combined as BC. E. 7 . The result of an operation is stored in the accumulator. This register is used to store 8bit data and to perform arithmetic and logic operation.Timing and control unit This unit synchronizes all the microprocessor operation with a clock and generates the control signals necessary for communication between the microprocessor and peripherals. Program counter The program counter is a 16-bit register used to point to the memory address of the next instruction to be executed. These registers are identified as B. Stack pointer It is a 16-bit register which points to the memory location in R/W memory. Register array The 8085 has six general purpose registers to store 8-bit data during program execution. C. H and L. When an instruction is fetched from memory it is loaded in the instruction register. D. The decoder decodes the instruction and establishes the sequence of events to follow. DE and HL to perform 16-bit operation. called the Stack. Accumulator Accumulator is an 8-bit register that is part of the ALU. Instruction register and decoder The instruction register and decoder are part of the ALU. The control signals RD (read) and WR (write) indicate the availability of data on the data bus.

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Result Thus the 8085 Microprocessor concepts were studied 9 . Data bus – it is a group of 8 lines used for data flow and it is bidirectional. The microprocessor uses such signals for timing purpose. the bits flow in one direction from microprocessor to the peripheral devices. Control bus – it consist of various single lines that carry synchronizing signals. data bus and control bus. Address bus – it is a group of 16-bit lines generally identified as A0 – A15. The address bus is unidirectional i.. The data ranges from 00 – FF.e.Communication lines 8085 microprocessor performs data transfer operations using three communication lines called buses. It is capable of addressing 2 16 memory locations. They are address bus.

FLOW CHART FOR 8-BIT ADDITION START LOAD ADDRESS OF DATA IN HL PAIR CLEAR CREGISTER GET THE FIRST DATA IN A-REG INCREMENT HL PAIR ADD CONTENT OF MEMORY TO AREGISTER CHECK WHETHER CY=0 INCREMENT C-REGISTER ADD CONTENT OF MEMORY TO AREGISTER ADD CONTENT OF MEMORY TO AREGISTER STOP 10 .

Increment the C-Register 8. i) 8. Increment the pointer (HL pair) 5.M H M LOOP1 MVI C.EXPT. Increment the pointer and Store the sum 9. Power supply (+5V) 3. Move the first data from memory to accumulator 4. 00H LABEL MNEMONIC LXI OPERAND H.2. Clear C-Register 3. go to step8 7. Stop the process. Microprocessor kit 2. 4900 OPCODE COMMENTS . Add the content of memory addressed by HL with accumulator 6. Check for carry if carry=1. Load the address of the data memory in HL pair 2. Increment the pointer and store the carry 10. ADDRESS 4000 4001 4002 4003 4004 4005 4006 4007 4008 4009 400A 11 MOV INX ADD JNC A. go to step7 or if carry=0 . Op-code sheet . NO.BIT ADDITION ALGORITHM: 1.PROGRAM FOR 8 BIT ARITHMETIC OPERATIONS WITH 8085 MICROPROCESSOR AIM: To Perform 8-bit arithmetic operations using 8085 Microprocessor i) 8 bit addition iv) 8 bit division ii) 8 bit subtraction iii) 8 bit Multiplication APPARATUS REQUIRED: 1.

FLOW CHART FOR 8-BIT SUBTRACTION START GET THE SUBTRAHEND IN A-REGISTER SAVE CONENT OF A-REG IN B-REGISTER GET THE MINUEND IN A-REGISTER SUBTRACT THE CONTENT OF B-REGISTER FROM AREGISTER STOP 12 .

BIT SUBTRACTION ALGORITHM: 1. Stop the process. Subtract the content of B-register (subtrahend) from the content of accumulator(minuend) 4.A 4202 SUB STA B 4203 HLT 13 . ADDRESS 4000 4001 4002 4003 4004 4005 4006 4007 4008 4009 400A 400B LABEL MNEMONIC LDA OPERAND 4201 OPCODE COMMENT MOV LDA B. Load the minuend from memory to accumulator 3. Load the subtrahend (the data to be subtracted) from memory to accumulator and move it to B-register 2. Store the difference (accumulator) in memory 5.A H M.C HLT C H M.C ii) 8.400B 400C 400D 400E 400F 4010 LOOP1 INR INX MOV INX MOV M.

FLOW CHART FOR 8-BIT MULTIPLICATION START LOAD ADDRESS OF DATA IN HL PAIR INCREMENT THE POINTER USING HL AS ADDRESS POINTER GET IDATA IN B-REGISTER AND II-DATA IN C-REGISTER ADD THE CONTENT OF CREGISTER TO A-REGISTER DECREMENT B-REGISTER CHECK WHETHER ZF=0 YES NO STORE THE RESULT IN MEMORY STOP 14 .

BIT DIVISION ALGORITHM: 1. 8. Increment the pointer 4. or if ZF=1 go to next step. Store the result in memory 9. if ZF=0 repeat step5 through 7. Move the record data to D-register (multiplicand) 5. Otherwise go to next step 15 . Move the first data to B-register (count) 3. Load the divisor in accumulator and move it B-register Load the dividend in accumulator Clear C-register to account for quotient Check whether divisor is less than dividend.M A C B LOOP1 LABEL MNEMONIC LXI OPCODE H. 3. Check whether count has reached zero. Decrement B-register (count) 7. Add the content of D-register to accumulator 6. 4.BIT MULTIPLICATION ALGORITHM: 1. ADDRESS 4000 4001 4002 4003 4004 4005 4006 4007 4008 4009 400A 400B 400C 400D 400E 400F HLT STA 4902 LOOP1 MOV INX MOV XRA ADD DCR JNZ B. Stop the process. If divisor is less than dividend.iii) 8.4900 OPCODE COMMENTS iv) 8.M H C. go to step-8. Load the address of the first data in HL pair(pointer) 2. 2.

FLOW CHART FOR 8-BIT DIVISION START GET THE DIVISOR IN A-REGISTER AND MOVE TO B-REGISTER GET THE DIVIDEND IN AREGISTER CLEAR C-REGISTER (QUOTIENT) COMPARE B-REGISTER AND A-REGISTER CHECK WHETHER CY=0 NO SUBTRACT CONTENT OF BREG FROM A-REG INCREMENT QUOTIENT (C-REGISTER) YES STORE THE REMAINDER (A-REGISTER) IN MEMORY MOVE THE CONTENT OF C-REGISTER TO A-REGISTER AND STORE QUOTIENT IN MEMORY STOP 16 .

00H MOV LDA B.C 4202H STORE STA 4203H SUB INR JMP B C AGAIN AGAIN CMP JC B STORE MVI C. Store the content of accumulator (reminder) in memory 9. Subtract the content of B-register from accumulator 6. Increment the content of C-register (quotient) 7. ADDRESS 4000 4001 4002 4003 4004 4005 4006 4007 4008 4009 400A 400B 400C 400D 400E 400F 4010 4011 4012 4013 4014 4015 4016 4017 4018 4019 HLT MOV STA A. Move the content of C-register (quotient) to accumulator and store in memory 10.A 4200H LABEL MNEMONIC OPERAND OPCODE COMMENTS LDA 4201H 17 .5. Stop the process. Go to step4 8.

8 BIT MULTIPLICATION INPUT DATA 1 DATA 2 OUTPUT DATA 1 DATA 2 ADDRESS ADDRESS OBSERVATION .8 BIT DIVISION INPUT DATA 1 DATA 2 OUTPUT DATA 1 DATA 2 ADDRESS ADDRESS 18 .8 BIT SUBTRACTION INPUT ADDRESS DATA 1 DATA 2 OUTPUT ADDRESS DATA 1 DATA 2 OBSERVATION .8 BIT ADDITION INPUT DATA 1 DATA 2 OUTPUT DATA 1 DATA 2 ADDRESS ADDRESS OBSERVATION .OBSERVATION .

RESULT: Thus the 8-Bit ALP programs were executed and the results also verified by using 8085 Microprocessor 19 .

FLOW CHART FOR 16-BIT ADDITION START [L][4050H] [H][4051H] [DE][HL] [L][4052H] [H][4053H] [A]00H [HL][HL]+ [DE] IS THERE A CARRY NO [A][A]+1 YES [4054][L] [4055][H] [4056][A] STOP 20 .

16-BIT ARITHMETIC OPERATIONS 8085 MICROPROCESSOR AIM: To perform a 16 bit arithmetic operation using 8085 such as i) 16 bit addition iv) 16 bit division ii) 16 bit subtraction iii) 16 bit Multiplication APPARATUS REQUIRED: 1. Store the sum and carry in memory Stop the process i) 16.BIT ADDITION ALGORITHM: 1. 3. 8. 9.EXPT. 5. 3 . 6. Power supply (+5V) 3. 7. Load the address of data memory in HL pair Move the first data to DE register pair Load the second data in HL register pair Clear A-register for carry Add content of DE pair to HL pair Check for carry if carry=1.BIT ADDITION LABEL MNEMONIC OPERAND LHLD 4200H OPCODE COMMENTS ADDRESS 4100 4101 4102 4103 4104 4105 4106 4107 4108 XCHG LHLD 4202H XRA DAD A D 21 . 2. go to step7 or if carry=0 go to step8 Increment A-register to account for carry.NO. Op-code sheet i) 16. Microprocessor kit 2. 4.

FLOW CHART FOR 16-BIT SUBTRACTION START [L][4050H] [H][4051H] [DE][HL] [L][4052H] [H][4053H] [HL][HL].[DE] IS THERE A BORROW NO [C][C]+1 YES [4054][L] [4055][H] [4056][L] STOP 22 .

PROGRAM FOR 16.A 4200H LABEL MNEMONIC OPERAND LDA 4202H OPCODE COMMENTS 23 . 5. Store the difference and borrow in different memory location.BIT SUBTRACTION ADDRESS 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B LDA 4203H SUB STA B 4204H MOV LDA B. Get the minuend from memory and store it in another register pair. 4.4109 410A 410B 410C 410D 410E 410F 4110 4111 4112 4113 AHEAD JNC AHEAD INR SHLD A 4202H STA 4206H HLT ii) 16. 2. 3.BIT SUBTRACTION ALGORITHM: 1. Subtract the subtrahend from minuend. Initialize memory pointer to data location Get the subtrahend from memory and transfer it to register pair.

FLOW CHART FOR 16-BIT MULTIPLICATION START [L][4200H] [H][4201H] SPHL [L][4202H] [H][4203H] [DE][HL] [HL][0000] [BC][0000] [HL][HL]+ [SP] NO IS CARRY FLAG SET YES [BC][BC]+1 [DE][DE]+1 NO IS ZERO FLAG SET YES [4204][L] [4205][H] [4204][L] [4205][H] 24 STOP .

0000H SPHL LHLD 4202 LABEL MNEMONIC OPERAND LHLD 4200H OPCODE COMMENTS . 3. 2.A 4201H iii) 16. Get the multiplier and multiplicand Initialize a register to store partial product Add multiplicand.BIT MULTIPLICATION ALGORITHM: 1.BIT MULTIPLICATION ADDRESS 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 25 XCHG LXI H. 5. multiplier times Store the result in consecutive memory location. Stop the process PROGRAM FOR16.410C 410D 410E 410F 4110 4111 4112 4113 4114 4115 4116 HLT SUB STA B 4205H MOV LDA B. 4.

FLOW CHART FOR 16-BIT DIVISION START A [L][4200H] [H][4201H] [L][4054] [H][4055] HL [DE] AC [L][4050H] [H][4051H] [4056]A BC0000H AB AL: AAE: LA AH: AA-H-Br: HA [4057]A STOP [BC][BC]+1 NO IS CARRY FLAG SET YES [BC][BC]-1 HLHL+DE A 26 .

4. 5. till dividend becomes less than dividend. Count the numbers of subtraction which equals the quotient Store the result in memory Stop the process 27 . Get the multiplier and multiplicand Initialize the register for quotient Repeatedly subtract divisor from dividend. 2. 6. 3.C H.0000H iv) 16.410A 410B 410C 410D 410E 410F 4110 4111 4112 4113 4114 4115 4116 4117 4118 4119 411A 411B 411C 411D 411E 411F 4120 4121 HLT MOV MOV SHLD L.E D NEXT NEXT DAD JNC SP AHEAD LXI B.BIT DIVISION ALGORITHM: 1.B 4206H SHLD 4204H AHEAD INX DCX MOV ORA JNZ B D A.

16 BIT MULTIPLICATION INPUT ADDRESS DATA 1 DATA 2 OUTPUT ADDRESS DATA 1 DATA 2 OBSERVATION .OBSERVATION .16 BIT DIVISION INPUT DATA 1 DATA 2 OUTPUT DATA 1 DATA 2 ADDRESS ADDRESS 28 .16 BIT SUBTRACTION INPUT ADDRESS DATA 1 DATA 2 OUTPUT ADDRESS DATA 1 DATA 2 OBSERVATION .16 BIT ADDITION INPUT ADDRESS DATA 1 DATA 2 OUTPUT ADDRESS DATA 1 DATA 2 OBSERVATION .

L E L.C 4056 DCX DAD SHLD B D 4054 LOOP MOV SUB MOV MOV SBB MOV INX JNC A.0000H XCHG LHLD 4050 LABEL START MNEMONIC OPERAND LHLD 4052 OPCODE COMMENTS .PROGRAM FOR16.BIT DIVISION ADDRESS 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F 4110 4111 4112 4113 4114 4115 4116 4117 4118 4119 411A 411B 411C 411D 411E MOV STA A.A A.A B LOOP LXI B.B 4057 29 MOV STA A.H D H.

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411F 4120 4121 HLT RESULT Thus the 16-Bit ALP’s were performed and the outputs also verified by using 8085. 31 .

FLOW CHART FOR 8-BIT BCD ADDITION START GET THE I-DATA IN ‘A’ & MOVE IT TO B REGISTER GET II-DATA IN A-REGISTER CLEAR C-REGISTER FOR CARRY ADD THE CONTENT OF B-REGISTER TO A-REGISTER AND PERFORM DECIMAL ADJUST AFTER ADDITION CHECK WHETHER CY=0 NO INCREMENT C-REGISTER FOR CARRY YES STORE THE SUM IN MEMORY MOVE THE CONTENT OF CREGISTER TO A-REGISTER AND STORE IN MEMORY STOP 32 .

BCD ARITHMETIC OPERATION USING 8085 MICROPROCESSOR AIM: To perform BCD Arithmetic operations using 8085 microprocessor APPARATUS REQUIRED: 1. Add the content of B-register to accumulator 5.NO 4. go to step 8 7. content of accumulator in memory 9. if carry=1. Microprocessor kit 2. go to step 7 or if carry=0. Execute DAA instruction 6. Load the first data in accumulator and move it to B-register 2. Clear C-register for storing carry 4. Increment C-register to account for carry 8. Op-code sheet (i) 8-bit BCD Addition ALGORITHM 1.EXPT. Check for carry. Move the carry (content of C-register) to accumulator and store in memory 10.A 4201H LABEL MNEMONIC OPERAND LDA 4200H OPCODE COMMENTS 33 .00H MOV LDA B. Load the second data in accumulator 3. Power supply (+5V) 3. Stop PROGRAM: 8-BIT BCD ADDITION ADDRESS 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C ADD DAA JNC AHEAD B MVI C. Store for sum C.

FLOW CHART FOR 16-BIT BCD ADDITION START A GET THE LOW ORDER 2DIGITS OF I-DATA IN ‘A’ & MOVE IT TO B STORE THE SUM IN MEMORY GET THE LOW ORDER 2 DIGITS OF II-DATA IN A-REGISTER MOVE THE CONTENT OF CREGISTER TO A-REGISTER AND STORE IN MEMORY CLEAR C-REGISTER FOR CARRY ADD THE CONTENT OF B TO A AND PERFORM DAA STORE THE RESULT IN MEMORY STOP GET THE HIGH ORDER 2DIGITS OF I-DATA IN ‘A’ & MOVE IT TO B GET THE LOW ORDER 2 DIGITS OF II-DATA IN A-REGISTER ADD THE CONTENT OF B AND CARRY TO PERFORM DAA NO IS CARRY FLAG SET YES INCREMENT C-REGISTER A 34 .

Execute DAA instruction 11. go to step 12 or if carry =0 go to step 13 12. Add the content of B-register and carry to accumulator 10. Stop PROGRAM: 16-BIT BCD ADDITION ADDRESS 4100 4101 4102 4103 4104 4105 35 MOV LDA B. Load the low order two digits of first data in accumulator and move it to Bregister 2. Check for carry. Load the high order two digits of first data in accumulator and move it to Bregister 8. Increment C-register to account for final carry 13.A 4202H LABEL MNEMONIC OPERAND LDA 4200H OPCODE COMMENTS .410D 410E 410F 4110 4111 4112 4113 4114 4115 4116 HLT MOV STA A. Load the low order two digits of second data in accumulator 3.C 4203H AHEAD INR STA C 4202H (ii) 16-bit BCD Addition ALGORITHM 1. Add the content of B-register to accumulator 5. Clear C-register for storing carry 4. Store the low order two digits of the result in memory 7. Move the carry (contents of C-register) to accumulator and store in memory 15. Store the high order two digits of the result in memory 14. Execute DAA register 6. if carry=1. Load the high order two digits of second data in accumulator 9.

FLOW CHART FOR 8-BIT BCD SUBTRACTION START GET THE LOW BYTE OF SUBTRAHEND IN A AND MOVE TO ‘B’ GET THE LOW BYTE OF MINUEND IN ‘A’ PERFORM THE SUBTRACTION OF LOW BYTE AND STORE THE RESULT IN MEMORY GET THE HIGH BYTE OF SUBTRAHEND IN ‘A’ AND MOVE TO ‘B’ GET THE HIGH BYTE OF MINUEND IN ‘A’ SUBTRACT THE CONTENT OF BREGISTER AND CARRY FROM AREGISTER STORE THE RESULT IN MEMORY STOP 36 .

A 4203H LDA 4201H ADD DAA STA 4204H B MVI C. Move 99 to accumulator and subtract the content of B-register from accumulator 37 .C 4206H JNC AHEAD ADC DAA STA 4205H B MOV LDA B.00H (iii) 8-bit BCD subtraction ALGORITHM 1.4106 4107 4108 4109 410A 410B 410C 410D 410E 410F 4110 4111 4112 4113 4114 4115 4116 4117 4118 4119 411A 411B 411C 411D 411E 411F 4120 4121 4122 HLT AHEAD INR MOV STA C A. Load the Subtrahend in accumulator and move it to B-register 2.

OBSERVATION (i) 8-BIT BCD ADDITION INPUT ADDRESS DATA ADDRESS OUTPUT DATA (ii) 16-BIT BCD ADDITION INPUT ADDRESS DATA ADDRESS OUTPUT DATA (iii) 8-BIT BCD SUBTRACTION INPUT ADDRESS DATA ADDRESS OUTPUT DATA 38 .

39 .99H LABEL MNEMONIC OPERAND LDA 4201H OPCODE COMMENTS Result Thus the BCD ALP’s were performed and the outputs also verified by using 8085. 5. 8. 6. 7.A 4200H MOV MVI B.A A. Increment the accumulator Move the content of accumulator to B-register Load the minuend in accumulator Add the content of B-register to accumulator Execute DAA instruction Store the result in memory Stop PROGRAM: 8-BIT BCD SUBTRACTION ADDRESS 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F 4110 4111 HLT ADD DAA STA 4202H B SUB INR MOV LDA B A B. 9. 4.3.

PAIR DECREMENT HL REGISTER PAIR DECREMENT DE REGISTER PAIR DECREMENT C-REGISTER YES IF ZERO FLAG IS SET NO STOP 40 . STORE THE RESULT IN DE REG. TO A-REG.FLOW CHART FOR TRANSFER CONTENTS TO OVERLAPPING MEMORY BLOCKS START MOVE THE IMMEDIATE DATA OF 06H IN C-REGISTER LOAD THE CONTENT OF MEMORY LOCATION IN HL REGISTER PAIR LOAD THE CONTENT OF MEMORY LOCATION IN DE REGISTER PAIR MOVE THE CONTENT IN M-REG.

EXPT.NO 5- BLOCK OPERATION USING 8085 MICROPROCESSOR
AIM: To perform block operations using 8085 microprocessor APPARATUS REQUIRED:

1. Microprocessor kit
2. Power supply (+5V) 3. Op-code sheet

(i) Transfer contents to overlapping memory blocks
ALGORITHM 1. Move the immediate data in 06H in C-register 2. Load the content of memory location in HL register pair 3. Load the content of memory location in DE register pair 4. Move the content in M-register to A-register 5. Store the result in DE register pair 6. Decrement HL register pair 7. Decrement DE register pair 8. Decrement C-register 9. If CY=0 go to next step else go to step-4 10. Stop PROGRAM: ADDRESS LABEL 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C L1 MOV STAX DCX DCX DCX 41 A,M D H D C LXI D,4007 LXI H,4005

MNEMONIC OPERAND MVI C,06

OPCODE

COMMENTS

FLOW CHART FOR TRANSFER CONTENTS TO NON-OVERLAPPING MEMORY BLOCKS START

MOVE THE IMMEDIATE DATA OF 06H IN C-REGISTER

LOAD THE CONTENT OF MEMORY LOCATION IN HL REGISTER PAIR

LOAD THE CONTENT OF MEMORY LOCATION IN DE REGISTER PAIR

MOVE THE CONTENT IN M-REG. TO A-REG. STORE THE RESULT IN DE REG. PAIR

INCREMENT HL REGISTER PAIR

INCREMENT DE REGISTER PAIR

DECREMENT C-REGISTER

YES

IF ZERO FLAG IS SET NO STOP

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410D 410E 410F 4110

JNZ

L1

HLT

(ii) Transfer contents to Non-overlapping memory blocks
ALGORITHM 1. Move the immediate data in 06H in C-register 2. Load the content of memory location in HL register pair 3. Load the content of memory location in DE register pair 4. Move the content of B-register to A-register 5. Store the result in DE register pair 6. Increment HL register pair 7. Increment DE register pair 8. Decrement C-register 9. If Zero flag is set then go to next step else go to step-4 10. stop PROGRAM: ADDRESS 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D L1 MOV STAX INX INX DCR JNZ A,M D H D C L1 LXI D,4007 LXI H,4005 LABEL MNEMONIC OPERAND MVI C,06 OPCODE COMMENTS

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OBSERVATION (i) TRANSFER CONTENTS TO OVERLAPPING MEMORY BLOCKS INPUT ADDRESS DATA ADDRESS OUTPUT DATA (ii) TRANSFER CONTENTS TO NON.OVERLAPPING MEMORY BLOCKS INPUT ADDRESS DATA ADDRESS OUTPUT DATA 44 .

45 .410E 410F 4110 HLT RESULT Thus the block operation (overlapping & non-overlapping) by using 8085 microprocessor were verified and the output also verified.

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A 0F LABEL MNEMONIC LDA OPERAND 4200 OPCODE COMMENTS . Mark the upper nibble of the binary(hexa)data in A-register 3. If CY=0. Return to main program ADDRESS 4100 4101 4102 4103 4104 4105 4106 4107 4108 47 CALL SUB MOV ANI B. 10. Stop 8. go to next step. Microprocessor kit 2. Power supply (+5V) 3.EXPT. Move B-register to A-register and mask the lower nibble 5. Call subroutine SUB1 to get the ASCII code of upper nibble and store in memory 7. Compare the content of A-register with 0A 9. Load the given data in A-register and move to B-register 2. Call subroutine SUB1 to get ASCII code of the lower nibble and store in memory 4. Op-code sheet ALGORITHM (HEXA DECIMAL TO ASCII) 1. Add 07H to A-register 11. Add 30H to A-register 12. go to step11.PROGRAM FOR CODE CONVERSIONS WITH 8085 MICROPROCESSOR AIM: To perform code conversions using 8085 microprocessor i) HEXA DECIMAL TO ASCII ii) ASCII to HEXA DECIMAL iii) BINARY TO BCD CODE CONVERSION iv) BCD TO BINARY CODE CONVERSION APPARATUS REQUIRED: 1. Rotate the upper nibble to lower nibble position 6.NO 6. If CY=1.

FLOW CHART FOR HEXA TO ASCII CONVERSION START GET THE HEXA DATA IN A-REGISTER AND STORE IT IN B-REGISTER MASK THE UPPER NIBBLE OF THE DATA CALL SUBROUTINE SUB1 TO GET THE ASCII CODE FOR LOWER NIBBLE IN AREGISTER STORE ASCII CODE (A-REGISTER) IN MEMORY MOVE HEXA DATA FROM B-REGISTER TO AREGISTER AND MASK THE LOWER NIBBLE ROTATE THE CONTENT OF A-REGISTER. 4-TIMES LEFT CALL SUBROUTINE SUB 1 TO GET THE ASCII COE FOR UPPER NIBBLE IN AREGISTER STORE THE ASCII CODE (A-REGISTER) IN MEMORY STOP 48 .

Start the process.B F0 RLC RLC RLC RLC CALL SUB1 STA 4202 HLT CPI 0A JC SKIP ADI 07 ADI 30 RET ALGORITHM (ASCII to HEXA DECIMAL) 1. Get the ASCII code number in the accumulator through memory. 2.4109 410A 410B 410C 410D 410E 410F 4110 4111 4112 4113 4114 4115 4116 4117 4118 4119 411A 411B 411C 411D 411E 411F 4120 4121 4122 4123 SKIP SUB 1 STA 4201 MOV ANI A. 49 .

FLOW CHART FOR SUBROUTINE SUB1 (HEXA TO ASCII CODE) START COMPARE THE CONTENT OF A-REGISTER WITH 0AH CHECK WHETHER CY=1 NO ADD 07H TO A-REGISTER YES ADD 30H TO A-REGISTER RETURN TO MAIN PROGRAM 50 .

If the different is less than 0A go to step 6 If not. Jump to the step6 11.3. subtract 07 from first difference value. Increment D-register 14. Move the immediate data of 64H in B-register 3. 7. Store the difference in the specified memory location. Subtract 30 from the ASCII code number. Subtract the content of B-register with A-register 9. Compare B-register with accumulator 7. Move the content of d-register to A-register 51 . Then jump to step11 15. If CY=0 go to next step else go to step11 8. Compare C with A-register 12. Move the immediate data of 00H in D-register 5. Increment the E-register 10. Stop the process. 4. 5. Store the result in memory 16. Move the immediate data of 0AH in C-register 4. If CY=0 then go to next step else store the result in memory 13. Load the given data in A-register 2. Move the immediate data of 00H in E-register 6. LABEL MNEMONIC LDA OPERAND 4500 OPCODE COMMENTS ADDRESS 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F SUI 30 CPI 0A JC SUI 07 STA 4501 HLT ALGORITHM (BINARY TO BCD CODE CONVERSION) 1. 6.

FLOW CHART FOR ASCII TO HEXA CODE CONVERSION START LOAD THE GIVEN DATA IN A-REGISTER SUBTRACT 30H FROM A-REGISTER COMPARE THE CONTENT OF A-REGISTER WITH 0AH CHECK WHETHER CY=1 NO YES SUBTRACT 07H FROM A-REGISTER STORE THE RESULT STOP 52 .

Move the content of E-register to A-register 19.64H LABEL MNEMONIC LDA OPERAND 4200 OPCODE COMMENTS .00H MVI D. Store the result in memory 18.0AH MVI B.17.00H MVI C. Store the result in memory 20. Stop the process ADDRESS 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F 4110 4111 4112 4113 4114 4115 4116 4117 4118 4119 411A 411B 53 SUB INR JMP C D L2 L2 CMP JC C L3 SUB INR JMP B E L1 L1 CMP JC B L2 MVI E.

FLOW CHART FOR BINARY TO BCD CONVERSION START GET THE I-DATA IN A-REGISTER MOVE 64H IN B-REGISTER MOVE 0AH IN C-REGISTER MOVE 00H IN D-REGISTER MOVE 00H IN E-REGISTER COMPARE B-REGISTER WITH A-REGISTER IF CHECK CY=1 NO YES MOVE 0AH IN C-REGISTER INCREMENT E-REGISTER A JUMP B 54 .

5.411C 411D 411E 411F 4120 4121 4122 4123 4124 4125 4126 4127 4128 HLT MOV STA A. 2. 11. 7. BCD TO BINARY CONVERSION Load the given data in A-register Move the content of A-register to B-register Mask the upper nibble of the binary data in A-register Move the content of A-register to C-register Move the content of B-register to A-register Mask the lower nibble of the binary data in A-register Rotate the upper nibble to lower nibble position Move the content of A-register to B-register Move the immediate data of 00H to A-register Move the immediate data of 00H to D-register Add the content of D-register with A-register Decrement the B-register If zero flag is set then proceed to next step else go to step 11 Add the content of C-register with A-register Store the result in memory Stop LABEL MNEMONIC LDA OPERAND 4200 OPCODE COMMENTS ADDRESS 4100 4101 4102 4103 MOV B. 8.E 4203 MOV STA A. 9. 12. 16. 15.D 4202 L3 STA 4201 i) 1. 3. 10. 14. 4.A 55 . 13. 6.

B A COMPARE C-REGISTER WITH A-REGISTER CHECK IF. CY=1 NO SUBTRACT C-REGISTER WITH A-REGISTER INCREMENT D-REGISTER JUMP YES STORE THE RESULT IN MEMORY MOVE D-REGISTER TO A-REGISTER STORE THE RESULT IN MEMORY MOVE E-REGISTER WITH A-REGISTER STORE THE RESULT IN MEMORY STOP 56 .

4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F 4110 4111 4112 4113 4114 4115 4116 4117 4118 4119 411A 411B 411C L1 ANI OF MOV MOV ANI C.A A.0A ADD DCR JNZ D B L1 ADD STA C 4102 HLT Result Thus the code conversion was executed by using8085 microprocessor 57 .B OF RRC RRC RRC RRC MOV MVI B.A A.00H MVI D.

OBSERVATION .BCD TO BINARY CODE CONVERSION INPUT ADDRESS DATA 1 DATA 2 OUTPUT ADDRESS DATA 1 DATA 2 58 .CODE CONVERSION HEXA DECIMAL to ASCII ASCII to HEXA DECIMAL INPUT OUTPUT INPUT OUTPUT ADDRESS DATA ADDRESS DATA ADDRESS DATA ADDRESS DATA OBSERVATION .BINARY TO BCD CODE CONVERSION INPUT DATA 1 DATA 2 OUTPUT DATA 1 DATA 2 ADDRESS ADDRESS OBSERVATION .

Stop the process PROGRAM ADDRESS 4100 4101 4102 4103 REPEAT LABEL MNEMONIC LXI MOV DCR MOV OPERAND H.NO 7(a) – SORTING (ASCENDING) 8085 MICROPROCESSOR AIM: To write a program to arrange an array of data in ascending order using 8085 microprocessor APPARATUS REQUIRED: 1. Initialize HL pair as memory pointer 2. Decrement D-register content by 1 8. If they are out of order.EXPT. exchange the contents of A-register and memory 7. Repeat step 5&7 until the value of D-register becomes zero 9. Get the count at 4200 into C-register 3.M C D. Get the first value in A-register 5. Power supply (+5V) 3. Repeat steps 3 to 9 till the value in C-register becomes zero 11. Decrement C-register content by 1 10.4200 C. Compare it with the value at next location 6. Microprocessor kit 2. Op-code sheet ALGORITHM 1. Copy it in D-register 4.C OPCODE COMMENTS 59 .

OBSERVATION – Sorting (Ascending order) INPUT (Array size-5) ADDRESS DATA OUTPUT (Array size-5) ADDRESS DATA 60 .

M M.M H M SKIP B.4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F 4110 4111 4112 SKIP LOOP LXI MOV INX CMP JC MOV MOV DCX MOV INX DCR JNZ DCR JNZ HLT H.A H M. 61 .4201 A.B H D LOOP C REPEAT RESULT Thus the sorting (Ascending) was and executed and output also verified by using 8085 microprocessor.

OBSERVATION – Sorting (Descending order) INPUT (Array size-5) ADDRESS DATA OUTPUT (Array size-5) ADDRESS DATA 62 .

Power supply (+5V) 3. Repeat step 5&7 until the value of D-register becomes zero 9. Get the count at 4200 into C-register 3. Copy it in D-register 4. Microprocessor kit 2. Decrement C-register content by 1 10. Initialize HL pair as memory pointer 2. If they are out of order. Repeat steps 3 to 9 till the value in C-register becomes zero 11. exchange the contents of A-register and memory 7. Compare it with the value at next location 6.EXPT. Get the first value in A-register 5. Stop the process PROGRAM ADDRESS 4100 4101 4102 4103 REPEAT LABEL MNEMONIC LXI MOV DCR MOV OPERAND H.M C D.C OPCODE COMMENTS 63 .NO 7 (b) – SORTING (DESCENDING) 8085 MICROPROCESSOR AIM: To write a program to arrange an array of data in descending order using 8085 microprocessor APPARATUS REQUIRED: 1.4200 C. Decrement D-register content by 1 8. Op-code sheet ALGORITHM 1.

64 .

65 .4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F 4110 4111 4112 SKIP LOOP LXI MOV INX CMP JNC MOV MOV DCX MOV INX DCR JNZ DCR JNZ HLT H.4201 A.M H M SKIP B.M M.B H D LOOP C REPEAT RESULT Thus the sorting (Descending) was and executed and output also verified by using 8085 microprocessor.A H M.

OBSERVATION .LARGEST NUMBER INPUT ADDRESS DATA 1 DATA 2 OUTPUT ADDRESS DATA 1 DATA 2 66 .

5. Microprocessor kit 2. Check for zero. 10. PROGRAM ADDRESS LABEL MNEMONICS 4300 LXI H 4200 4301 4302 4303 MOV B .EXPT. Compare accumulator content with array element. Power supply (+5V) (i) ALGORITHM . 1. Stop the process. copy the memory content (Largest number) to accumulator. Increment the memory pointer & Decrement the count. M 430C YYY DCR B 430D JNZ XXX 430E 430F 4310 STA 4500 4311 4312 4313 HLT OP CODE COMMENTS 67 . 6. Store accumulator content (largest no) in the specified memory location. 4. If zero is not there means go to step5. 2.LARGEST ELEMENT IN AN ARRAY Start the process. Check for carry. 8.NO 7 (c) – ARRAY OPERATION USING 8085 MICROPROCESSOR AIM: To write a program to do Array operation such as i) Find the Largest Element in an Array ii) find the smallest element in an array APPARATUS REQUIRED: 1. M 4304 MVI A . Initialize accumulator to zero. Initialize memory for getting array of element(data) Get the block size in any register through accumulator from memory. 3. 00 4305 4306 XXX INX H 4307 CMP M 4308 JNC YYY 4309 430A 430B MOV A . 9. 7. If there is carry.

OBSERVATION .SMALLEST NUMBER INPUT DATA 1 DATA 2 OUTPUT DATA 1 DATA 2 ADDRESS ADDRESS 68 .

M 440C CCC DCR B 440D JNZ XYZ 440E 440F 4410 STA 4201 4411 4412 4413 HLT OP CODE COMMENTS RESULT Thus the array operation was and executed and output also verified by using 8085 microprocessor. 4200 4401 4402 4403 MOV B .(ii) 1. 7. If there is no carry. If there is no zero go to step5. Stop the process. FF 4405 4406 XYZ INX H 4407 CMP M 4408 JC CCC 4409 440A 440B MOV A . Store accumulator content (smallest t no) in the specified memory location. 10. Increment the memory pointer & Decrement the count.SMALLEST ELEMENT IN AN ARRAY Start the process. M 4404 MVI A . 3. 2. 4. 8. ALGORTITHM . Check for carry. 6. Check for zero. Initialize accumulator to FF. 69 . copy the memory content (smallest number) to accumulator. Compare accumulator content with array element. 9. 5. Initialize memory for getting array of element(data) Get the block size in any register through accumulator from memory. PROGRAM ADDRESS LABEL MNEMONICS 4400 LXI H .

70 .

[1200] MOV BX. BX MOV [1204].NO 8. Move the content of memory location to AX register Move the content of memory location to BX register Subtract the content of BX with AX Move the result in memory stop PROGRAM MOV AX. Power supply (+5V) 3. Op-code sheet (i) 16-bit addition ALGORITHM 1. [1200] MOV BX. 2. 2. [1202] ADD AX. 4. 4. 5. Move the content of memory location to AX register Move the content of memory location to BX register Add the content of AX with BX Move the content of AX register to memory location 1204 stop PROGRAM MOV AX. AX HLT 71 . [1202] SUB AX.ARITHMETIC OPERATION USING 8086 MICROPROCESSOR AIM: To perform 16-bit arithmetic operations using 8086 microprocessor APPARATUS REQUIRED: 1. 3. Microprocessor kit 2. AX HLT (ii) 16-bit subtraction ALGORITHM 1. BX MOV [1204]. 3. 5.EXPT.

FLOW CHART FOR 16-BIT ADDITION USING 8086 START MOVE THE CONTENT OF MEMORY LOCATION TO AX REGISTER MOVE THE CONTENT OF MEMORY LOCATION TO BX REGISTER ADD THE CONTENT OF AX WITH BX MOVE THE RESULT IN MEMORY STOP OBSERVATION (16-Bit addition) INPUT ADDRESS DATA OUTPUT ADDRESS DATA 72 .

stop PROGRAM MOV AX. Move the content of memory location to BX register 8. [1200] MOV BX. Move the content of memory location to AX register 7. [1202] SUB AX.(iii) 16-bit subtraction ALGORITHM 6. Subtract the content of BX with AX 9. BX MOV [1204]. AX HLT 73 . Move the result in memory 10.

FLOW CHART FOR 16-BIT SUBTRACTION USING 8086 START MOVE THE CONTENT OF MEMORY LOCATION TO AX REGISTER MOVE THE CONTENT OF MEMORY LOCATION TO BX REGISTER SUBTRACT THE CONTENT OF AX WITH BX MOVE THE RESULT IN MEMORY STOP OBSERVATION (16-Bit Subtraction) INPUT ADDRESS DATA OUTPUT ADDRESS DATA 74 .

3. 2.(iv) 16-bit Multiplication ALGORITHM 1. AX HLT 75 . Move the content of memory location to AX register Move the content of memory location to BX register Multiply BX with Accumulator Move the result in memory stop PROGRAM MOV AX. [1202] SUB AX. 4. BX MOV [1204]. [1200] MOV BX. 5.

FLOW CHART FOR 16-BIT MULTIPLICATION USING 8086 START MOVE THE CONTENT OF MEMORY LOCATION TO AX REGISTER MOVE THE CONTENT OF MEMORY LOCATION TO BX REGISTER MULTIPLY THE CONTENT OF AX WITH BX MOVE THE RESULT IN MEMORY STOP OBSERVATION (16-Bit Multiplication) INPUT ADDRESS DATA OUTPUT ADDRESS DATA 76 .

3.(v) 16-bit Division ALGORITHM 1. 5. 4. 2. [1200] MOV BX. Move the content of memory location to AX register Move the content of memory location to BX register Divide the content of BX with AX Move the content of AX register to memory stop PROGRAM MOV AX. AX HLT Result Thus the 16-but arithmetic operations was executed using 8086 microprocessor 77 . [1202] DIV BX MOV [1204].

FLOW CHART FOR 16-BIT DIVISION USING 8086 START MOVE THE CONTENT OF MEMORY LOCATION TO AX REGISTER MOVE THE CONTENT OF MEMORY LOCATION TO BX REGISTER DIVIDE THE CONTENT OF BX WITH AX MOVE THE RESULT IN MEMORY STOP OBSERVATION (16-Bit Division) INPUT ADDRESS DATA OUTPUT ADDRESS DATA 78 .

04.EXPT.STEPPER MOTOR INTERFACE USING 8085 MICROPROCESSOR AIM: To run a stepper motor in two directions using 8085 microprocessor APPARATUS REQUIRED: 1. LOOK UP OPCODE COMMENTS MVI B.0303H REPEAT LABEL START MNEMONIC LXI OPERAND H.M 0C0H 79 . Stepper motor 4. Microprocessor kit 2.H MOV OUT A. Op-code sheet Program ADDRESS 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C DELAY NOP DCX D LXI D.NO 9. Power supply (+5V) 3.

80 .

E D DELAY INX DCR JNZ H B REPEAT JMP START DB 09 05 06 0A RESULT Thus the serial communication was performed by using 8085 microprocessor.410D 410E 410F 4110 4111 4112 4113 4114 4115 4116 4117 4118 4119 411A 411B 411C 411D LOOK UP MOV ORA JNZ A. 81 .

82 .

Power supply (+5V) 3.4E OUT 0C8H MVI A.36 OPCODE COMMENTS 83 .NO 10.SERIAL COMMUNICATION USING 8085 MICROPROCESSOR AIM: To perform serial communication using 8085 microprocessor APPARATUS REQUIRED: 1. Microprocessor kit 2.EXPT.4E OUT 0C8H MVI A. Op-code sheet PROGRAM: ADDRESS 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F OUT 0C2H MVI A.0A OUT 0CEH LABEL START MNEMONIC MVI OPERAND A.

84 .

4110 4111 4112 4113 4114 4115 4116 4117 4118 ADDRESS 4200 4201 4202 4203 4204 4205 LABEL MVI A.37 OUT 0C2H MVI A. 85 .41 OUT 0C0H RST MNEMONIC IN 1 OPERAND 0C0H OPCODE DB C0 COMMENTS STA 4150 32 50 41 RST 1 CF Result Thus the serial communication was performed by using 8085 microprocessor.

OBSERVATION – Serial Communication INPUT ADDRESS DATA ADDRESS OUTPUT DATA 86 .

Op-code sheet 4.80H OUT STAT_OU MVI A. Microprocessor kit 2.03 OPCODE COMMENTS 87 . Interface UBMB-022 Program ADDRESS 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E OUT LIFT 1 MVI A.02 CALL DELAY OUT STAT_OU LABEL START MNEMONIC MVI OPERAND A. Power supply (+5V) 3. 11.EXPT.ELEVATOR SIMULATION USING 8085 MICROPROCESSOR AIM: To find the nearest lift for a request from any floor and service the request APPARATUS REQUIRED: 1.NO.

88 .

10H OUT LIFT1 CALL DELAY MVI A.0BH 89 .411F 4110 4111 4112 4113 4114 4115 4116 4117 4118 4119 411A 411B 411C 411D 411E 411F 4120 4121 4122 4123 4124 4125 4126 4127 4128 4129 412A 412B 412C 412D 412E 412F MVI A.01 OUT LIFT 2 CALL DELAY MVI A.20H OUT LIFT1 CALL DELAY MVI A.40H OUT LIFT 1 CALL DELAY MVI A.08H OUT LIFT1 MVI A.

90 .

4130 4131 4132 4133 4134 4135 4136 4137 4138 4139 413A 413B 413C 413D 413E 413F 4140 4141 4142 4143 4144 4145 4146 4147 4148 4149 414A RET DCR JNC LOOP2 DCX MOV ORA JNZ LOOP1 LXI DELAY HLT MVI OUT STAT_OU MVI A.03H CALL DELAY OUT STAT_OU Result Thus the output for elevator simulation is obtained and it was verified 91 .

LIFT 1 LIFT 2 STAT_IN STAT_OUT C0 C4 C8 CC DATA 80 40 20 10 08 04 02 01 LIFT POSITION GROUND FLOOR I-FLOOR II-FLOOR III-FLOOR IV-FLOOR V-FLOOR VI-FLOOR VII-FLOOR 92 .

10 OPCODE COMMENTS 93 .00 OUT 0D0H MVI A.01 OUT 0C8H MVI A. Microprocessor kit 2.NO 12.EXPT. Power supply (+5V) 3. Op-code sheet ADDRESS 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F 4110 4111 4112 OUT 0D0H XRA XRA XRA MVI A A A A.18 OUT 0C8H LABEL START MNEMONIC MVI OPERAND A.ADC INTERFACING USING 8085 MICROPROCESSOR AIM: To verify the digital data from the given analog signal using 8085 Microprocessor APPARATUS REQUIRED: 1.

94 .

Place the jumper J2 in A Position 2. Place the jumper J5 in A position 3.4113 4114 4115 4116 4117 4118 4119 411A 411B 411C 411D 411E 411F 4120 4121 LOP IN 0D8H ANI 01 CPI 01 JNZ LOP IN 0C0H STA 4150H HLT Procedure 1. Enter and execute the program 4. Vary the analog input(using trim pot) and verify the digital data displayed with that data stored in memory location 4150h Result Thus the digital data obtained from the given analog signal was verified using 8085 95 .

OBSERVATION – ADC Interfacing using 8085 INPUT MSB LSB ADDRESS OUTPUT DATA

96

EXPT.NO 13- DAC INTERFACING USING 8085 MICROPROCESSOR
AIM: To generate square wave at the DAC2 output using 8085 Microprocessor

APPARATUS REQUIRED: 1. Microprocessor kit 2. Power supply (+5V) 3. Op-code sheet ADDRESS 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F 4110 4111 4112 DELAY MVI B,05 JMP START CALL DELAY OUT 0C9H MVI A,0FF CALL DELAY OUT 0C8H LABEL START MNEMONIC MVI OPERAND A,00 OPCODE COMMENTS

97

98

0FF L2 DCR JNZ C L2 DCR JNZ B L1 RET RESULT Thus the square wave at the DAC2 out put was generated using 8085 99 .4113 4114 4115 4116 4117 4118 4119 411A 411B 411C 411D L1 MVI C.

OBSERVATION – ADC Interfacing using 8085 INPUT MSB LSB ADDRESS OUTPUT DATA 100 .

DC MOTOR INTERFACING USING 8085 MICROPROCESSOR AIM: To run the DC motor using 8085 Microprocessor APPARATUS REQUIRED: 1.30H CALL DELAY OUT 0D8H MVI A.EXPT.0FFH OUT 0CEH MVI A.NO 14. Power supply (+5V) 3. Microprocessor kit 2.00 OUT 0C0H LABEL MNEMONIC MVI OPERAND A. Op-code sheet PROGRAM ADDRESS 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F 4110 4111 4112 OUT 0C8H MVI A.0FFH OPCODE COMMENTS 101 .

102 .

00 STA 45H HLT MVI C.L 103 .4113 4114 4115 4116 4117 4118 4119 411A 411B 411C 411D 411E 411F 4120 4121 4122 4123 4124 4125 4126 4127 4128 4129 412A 412B 412C 412D 412E 412F 4130 4131 LOOP LO2 DELAY OUT 0C8H MVI A.03 LXI H.00 OUT 0D8H IN 0C8H STA 4500 MVI A.00 OUT 0D0H CALL DELAY MVI A.0A3C3H DCX MOV H A.

104 .

4132 4133 4134 4135 4136 4137 4138 4139 413A ORA JNZ H LOOP DCR JNZ C LO2 RET RESULT Thus the DC motor was ran using 8085 microprocessor. 105 .

106 .

Traffic Light controller interface Program: ADDRESS 4100 4102 4104 4107 410A 410D 410E 410F 4111 4114 4115 4116 4117 411A 411B 411C 411E REPEAT LABEL START MNEMONIC MVI OUT LXI LXI CALL XCHG MOV OUT CALL XCHG INX INX CALL XCHG MOV OUT CALL OPERAND A. Op-code sheet 4.DATA_E OUT A.TRAFFIC LIGHT CONTROLLER USING 8085 MICROPROCESSOR AIM: To perform traffic light controller operation using 8085 Microprocessor APPARATUS REQUIRED: 1.EXPT.M PORT B DELAY 1 107 .NO 15.M PORT A DELAY 1 D H OUT A. Power supply (+5V) 3. Microprocessor kit 2.80H CONTRL H.DATA_SQ OPCODE COMMENTS D.

108 .

4121 4122 4123 4124 4127 4128 4129 412B 412E 412F 4130 4131 4134 4135 4136 4138 4139 413A 413C 413F 4142 4143 4145 4146 4147 4149 414A 414B 414D 4150 4151 DELAY OUT XCHG INX INX CALL XCHG MOV OUT CALL XCHG INX INX CALL XCHG MOV OUT INX MOV OUT CALL JMP MOV OUT INX MOV OUT INX MOV OUT CALL RET PUSH A.M PORT C DELAY 1 D H OUT 109 .M PORT B H D H OUT A.M PORT A DELAY 1 REPEAT A.M PORT C H A.M PORT B H A.

110 .

0001FFH B.L H L1 H H H.4152 4155 4158 4159 415A 415B 415E 415F 4160 4161 4164 4165 4166 4167 416A 416D 416E 416F 4170 4173 4174 4175 4176 4179 417A 417B 4180 4185 4187 418C RESULT L2 LOOP2 DELAY1 LXI L1 LOOP LXI DCX MOV ORA JNZ DCX MOV ORA JNZ POP RET PUSH LXI LXI DCX MOV ORA JNZ DCX MOV ORA JNZ POP RET H.001FH B.B C LOOP2 H A.FFFFH B A.B C LOOP H A.L H L2 H DATA_SQDB DATA_EDB END Thus the traffic light controller was performed using 8085 microprocessor and the output was verified.FFFFH B A. 111 .

112 .

113 .

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