You are on page 1of 23

FACULTY OF ELECTRICAL ENGINEERING UNIVERSITI TEKNOLOGI MARA ________________________________________________________________ MICROPROCESSOR SYSTEMS LABORATORY (ECE365) EXPERIMENT 3 ARITHMETIC AND LOGIC

INSTRUCTIONS 1.0 OBJECTIVES i) To understand the 68HC12 instructions of performing arithmetic and logic operations. ii) To determine the contents inside the CPU registers and memory. iii) To write a proper programming for arithmetic and logic instructions. iv) To understand the functions of CCR. 2.0 LIST OF REQUIREMENTS 2.1 Equipments 1. Personal Computer 2. Software J2RE 3. Software MiniIDE 4. Software HC12SIM 5. Power supply 2.2 Depth understanding of : 1. Lab 1 Addressing Modes 2. Lab 2 Data Transfer and Manipulation Instructions 3. Topic on Arithmetic and Logic Instructions

3.0 THEORY Arithmetic instructions in 68HC12 perform mathematical operations such as addition, subtraction, multiplication and division whilst Logic and Bit Instructions perform Boolean logical operations such and gate, or gate, ex-or gate etc. Table 3.0a and Table 3.0b depict a summary of addition and subtraction instructions and summary of multiply and division instruction correspondingly. Arithmetic operations that require two operands will need one of the operands to be in accumulator and the result of the operation is written back into accumulator. In order to know what each instruction do, understanding of addressing modes is required. Knowing the addressing mode of an instruction will tell us where data is stored, how it is accessed and processed and finally where the result of the operation is kept. After an arithmetic operation is finished, the result will be stored in accumulator and some of the status flags will also be affected. The status flags are: S-Stop Disable, X-X Interrupt Mask, H- Half-Carry (from bit 3), N-Negative, Z-Zero, V-Overflow and CCarry/Borrow. These status flags will be stored in the Z80 CPU, in a register called the Condition Code Register (CCR). Most arithmetic instructions will affect the status flags. Common logic instructions include logic gate, bit test, shift and rotate is summarized in table 3.0c, Table 3.0d and Table 3.0e respectively. All the logic instructions will affect the status flags accordingly. When dealing with input and output port pins, we often need to change the values of a few bits. For these types of applications, Boolean logic instructions come in handy.Usually, one would use the AND instruction to clear one or a few bits and use the OR instruction to set one or a few bits. The exclusive OR instruction can be used to toggle (change from 0 to 1 and from 1 to 0) one or a few bits. The 68HC12 provides instructions for performing unsigned 8-bit by 8-bit and both signed and unsigned 16-bit by 16-bit multiplications. Since the 68HC12 is a 16-bit microcontroller, we expect that it will be used to perform complicated operations in many sophisticated applications. Performing 32-bit by 32-bit multiplication will be one of them. Since there is no 32-bit by 32-bit multiplication instructions, we will have to break a 32-bit number into two 16-bit halves and use the 16-bit by 16-bit multiply instruction to synthesize the operation. Assume M and N are the multiplicand and the multiplier, respectively. These two numbers can be broken down as follows: M = MHML N = NHNL

where, MH and NH are the upper 16 bits and ML and NL are the lower 16 bits of M and N, respectively. Four 16-bit by 16-bit multiplications are performed, and then their partial products are added together as shown in Figure 3.0.

Figure 3.0 Unsigned 32-bit by 32-bit multiplication The procedure is as follows: Step 1 Allocate eight bytes to hold the product. Assume these eight bytes are located at P, P+1, , and P+7. Step 2 Generate the partial product MLNL (in Y:D) and save it at locations P+4 ~ P+7. Step 3 Generate the partial product MHNH (in Y:D) and save it at locations P ~ P+3. Step 4 Generate the partial product MHNL (in Y:D) and add it to memory locations P+2 ~ P+5. The C flag may be set to 1 after this addition.

Step 5 Add the C flag to memory location P+1 using the ADCA (or ADCB) instruction. This addition may also set the C flag to 1. So, again, add the C flag to memory location P. Step 6 Generate the partial product MLNH (in Y:D) and add it to memory locations P+2 ~ P+5. The carry flag may be set to 1. So add the C flag to memory location P+1 and then add it to memory location P.

Table 3.0a

Table 3.0b

Table 3.0c

Table 3.0d

Table 3.0e

4.0 PROCEDURE 1 Multiprecision Addition

1. Program in Figure 4.0 is the instruction sequence to add two 4-byte numbers that are stored at $800~$803 and $804~$807, and store the sum at $910~$913. Write this program in MiniIDE with comments, translate to the list file and machine file.

Figure 4.0 2. Load the machine file to the HC12SIM, set PC to $0800, clear all the registers and CCR, and then use step execution to observe the contents of the CPU registers include CCR and memory. Refer to Appendix 12.0. 3. Write a discussion regarding to this procedure.

Solution: PROGRAMMING: 1: 2: 3: 4: 5: 6: 0800 FC 0802 0803 F3 0806 0806 7C 0912 LDD $0802 ;place the lowest two bytes of the first operand in D ADDD $0806 ;add the lowest two bytes STD $0912 ;save the sum of the lowest two bytes =00000800 ORG $0800

7: 8: 9: 10: 11: 12: 13: 14: 15:

0809 B6 0801 080C B9 0805 080F 7A 0911 0812 B6 0800 0815 B9 0804 0818 7A 0910

LDAA $0801 ;place the second-to-most-significant byte of the ; ADCA $0805 add the second-to-most-significant byte of the STAA $0911 ;save the sum of the second-to-most-significant bytes LDAA $0800 ;place the most-significant byte of the first ADCA $0804 ;add the most significant byte of the second STAA $0910 ;save the sum of the most-significant bytes END

first operand in A second operand and carry to A

operand in A operand and carry to A

Discussion : The programming that we used in this procedure is about multiprecision addition. It is the instruction sequence to add two 4-byte numbers that are stored at $800~$803 and $804~$807, and store the sum at $910~$913. We use instruction such as STAA, LDAA and ADCA. ADCA $0805 for example add the second-to-most-significant byte of the second operand and carry to A.

5.0 PROCEDURE 2 Multiprecision Subtraction


1. Program in Figure 5.0 is the instruction sequence to subtract the hex numbers stored at $804~$807 from the hex number stored at $800~$803, and save the difference at $900~$903. Write this program in MiniIDE with comments, translate to the list file and machine file.

Figure 5.0 2. Load the machine file to the HC12SIM, set PC to $0800, clear all the registers and CCR, and then use step execution to observe the contents of the CPU registers include CCR and memory. Refer to Appendix 12.0. 3. Write a discussion regarding to this procedure. Solution: PROGRAMMING: 1: 2: D 3: 4: 0803 B3 0806 0806 7C 0902 subd $806 ;subtarct the lowest two bytes of the std $902 ;save the lowest two bytes of the difference subtrahend from D =00000800 0800 FC 0802 org $800 ;starting address of the program ldd $802 ;place the lowest two bytes of the minuend in

5: 6: 7: 8: 9: 10:

0809 B6 0801 080C B2 0805 080F 7A 0901 0812 B2 0804 0815 7A 0900 END

ldaa $801 ;put the second-to-most-significant byte of the sbca $805 ;subtract the second-to-most-significant byte staa $901 ;save the second-to-most-significant byte of sbca $804 ;subtract the most significant byte of the STAA $900 ;save the most-significant byte of the

minuend in A of the subtrahend and the borrow from A the difference subtrahend and the borrow from A difference

Discussion: This procedure is about make an instruction in subtracting hex number. Multiprecision subtraction like procedure 1 also added. We used multiprecision subtraction, the instruction sequence to subtract the hex numbers stored at $804~$807 from the hex number stored at $800~$803, and save the difference at $900~$903. Examples such as sbca $805 instruction which is to subtract the second-to-most-significant byte and later staa $901 used to save the file.

6.0 PROCEDURE 3 Simple Multiplication and Division


1. Program in Figure 6.0 is instruction sequence to multiply the unsigned 16-bit number stored at memory locations $800~$801 by the 16-bit unsigned number stored at memory locations $802~$803, and store the product at memory locations $900~$903 and next instructions are to divide the unsigned 16-bit number stored at accumulator D by the 16-bit unsigned number stored at index register X, and store the quotient and remainder at $904~$905 and $906~$909, respectively. Write this program in MiniIDE with comments, translate to the list file and machine file.

Figure 6.0

2. Load the machine file to the HC12SIM, set PC to $0800, clear all the registers and CCR, and then use step execution to observe the contents of the CPU registers include CCR and memory. Refer to Appendix 12.0. 3. Write a discussion regarding to this procedure Solution: PROGRAMMING: 1: 2: 3: 4: 5: 6: 7: 8: 9: 10: 11: 12: 13: 080D CC 80E8 0810 CE 07D0 0813 1810 0815 7D 0908 end 0800 FC 0800 0803 FD 0802 0806 13 0807 7D 0900 080A 7C 0902 =00000800 org $800 ;unsigned 16bit multiply with 16bit ldd $800 ;d <= ($800) = $FC08 ldy $802 ;y <= ($802) = $00FD emul ;y x d sty $900 ; ($900) <= Y std $902 ; ($902) <= D ;unsigned 16bit divide by 16bit ldd #33000 ;d <= 33k (decimal) ldx #2000 ;x <= 2k (decimal) idiv ;($906 & $907) <= quotient of d/x sty $908 ;($908 & $909) <= remainder of d/x

Discussion :

In this procedure, the instruction sequence is about to multiply the unsigned 16-bit number. We used it to multiply the unsigned 16-bit number located at memory locations $800~$801 by the 16-bit unsigned number stored at memory locations $802~$803, and store the product at memory locations $900~$903. The next instructions are to divide the unsigned 16-bit number stored at accumulator D by the 16-bit unsigned number stored at index register X, and store the quotient and remainder at $904~$905 and $906~$909. We used the emul and idiv instruction, an specific instuction to multiply in divide in btween 16-bit number. 7.0 PROCEDURE 4 Extended Bits of Multiplication 1. Program in Figure 7.0 is instruction sequence to multiply the 32-bit unsigned integers stored at M~M+3 and N~N+3, respectively and store the product at memory locations P~P+7.Write this program in MiniIDE with comments, translate to the list file and machine file. org $800 M: dc.l $13281250 ; holds the multiplicand N: dc.l $321F1030 ; holds the multiplier P: rmb 8 ; reserved to hold the product org $900 ldd M+2 ; place ML in D ldy N+2 ; place NL in Y emul ; compute MLNL sty P+4 ; save the upper 16 bits of the partial product MLNL std P+6 ; save the lower 16 bits of the partial product MLNL ldd M ; place MH in D ldy N ; place NH in Y emul ; compute MHNH sty P ; save the upper 16 bits of the partial product MHNH std P+2 ; save the lower 16 bits of the partial product MHNH ldd M ; place MH in D ldy N+2 ; place NL in Y emul ; compute MHNL

; the following seven instructions add MHNL to memory locations P+2~P+5 addd P+4 ; add the lower half of MHNL to P+4~P+5 std P+4 ; tfr y,d ; transfer Y to D adcb P+3 stab P+3 adca P+2 staa P+2 ; the following six instructions propagate carry to the most significant byte ldaa P+1 adca #0 ; add C flag to location P+1 staa P+1 ; ldaa P adca #0 ; add C flag to location P staa P ; the following three instructions compute MLNH ldd M+2 ; place ML in D ldy N ; place NH in Y emul ; compute MLNH ; the following seven instructions add MLNH to memory locations P+2~P+5 addd P+4 ; add the lower half of MLNH to P+4~P+5 std P+4 ; tfr y,d ; transfer Y to D adcb P+3 stab P+3 adca P+2 staa P+2 ; the following six instructions propagate carry to the most significant byte ldaa P+1 adca #0 ; add C flag to location P+1 staa P+1 ldaa P adca #0 ; add C flag to location P staa P

end
Figure 7.0

2. Load the machine file to the HC12SIM (B32 Single Chip Mode), set PC to $900, clear all the registers and CCR, and then use Go execution to observe the executions of overall instructions affected to the contents of the memory. Refer to Appendix 12.0. 3. Write a discussion regarding to this procedure. Solution : 2: 3: 4: 5: 6: 7: 8: 9: 10: MLNL 11: MLNL 12: 13: 14: 15: MHNH 16: MHNH 17: 18: 19: 091A FC 0800 091D FD 0806 0920 13 ldd M ; place MH in D ldy N+2 ; place NL in Y emul ; compute MHNL 0917 7C 080A std P+2 ; save the lower 16 bits of the partial product 090D FC 0800 0910 FD 0804 0913 13 0914 7D 0808 ldd M ; place MH in D ldy N ; place NH in Y emul ; compute MHNH sty P ; save the upper 16 bits of the partial product 090A 7C 080E std P+6 ; save the lower 16 bits of the partial product =00000900 0900 FC 0802 0903 FD 0806 0906 13 0907 7D 080C org $900 ldd M+2 ; place ML in D ldy N+2 ; place NL in Y emul ; compute MLNL sty P+4 ; save the upper 16 bits of the partial product =00000800 0800 13281250 0804 321F1030 0808 +0008 org $800 M: N: P: dc.l $13281250 ; holds the multiplicand dc.l $321F1030 ; holds the multiplier rmb 8 ; reserved to hold the product

20: P+2~P+5 21: 22: 23: 24: 25: 26: 27: 28: significant byte 29: 30: 31: 32: 33: 34: 35: 36: 37: 38: 39: P+2~P+5 40: 41: 42: 43: 44: 45: 46: 47: significant byte 48: 49: 0960 B6 0809 0963 89 00 094C F3 080C 094F 7C 080C 0952 B7 64 0954 F9 080B 0957 7B 080B 095A B9 080A 095D 7A 080A 0945 FC 0802 0948 FD 0804 094B 13 0935 B6 0809 0938 89 00 093A 7A 0809 093D B6 0808 0940 89 00 0942 7A 0808 0921 F3 080C 0924 7C 080C 0927 B7 64 0929 F9 080B 092C 7B 080B 092F B9 080A 0932 7A 080A

; the following seven instructions add MHNL to memory locations addd P+4 ; add the lower half of MHNL to P+4~P+5 std P+4 ; tfr y,d ; transfer Y to D adcb P+3 stab P+3 adca P+2 staa P+2 ; the following six instructions propagate carry to the most ldaa P+1 adca #0 ; add C flag to location P+1 staa P+1 ; ldaa P adca #0 ; add C flag to location P staa P ; the following three instructions compute MLNH ldd M+2 ; place ML in D ldy N ; place NH in Y emul ; compute MLNH ; the following seven instructions add MLNH to memory locations addd P+4 ; add the lower half of MLNH to P+4~P+5 std P+4 ; tfr y,d ; transfer Y to D adcb P+3 stab P+3 adca P+2 staa P+2 ; the following six instructions propagate carry to the most ldaa P+1 adca #0 ; add C flag to location P+1

50: 51: 52: 53: 54:

0965 7A 0809 0968 B6 0808 096B 89 00 096D 7A 0808 end *00000800 *00000804 *00000808

staa P+1 ldaa P adca #0 ; add C flag to location P staa P

Symbols: m n p

Discussion In this procedure, extended bits is involved. The is instruction sequence to multiply the 32-bit unsigned integers stored at M~M+3 and N~N+3, respectively and store the product at memory locations P~P+7. Extended bits is involved in this procedure. We use combination of instruction such as addd P+4 which to add lower half of MNHL. All the instuction in this procedure is more complicated than the other procedures. 8.0 PROCEDURE 5 Boolean Logic and Shift 1. Program in Figure 8.0 is instruction sequence to perform Boolean logic and shift/rotate operations. Write this program in MiniIDE with comments, translate to the list file and machine file. org $800 ldaa #89 ldab #$FE anda $800 staa $850 orab $802 stab $851 eora $804 staa $852 nega staa $853 comb

stab $854 asla staa $855 asrb stab $856 rola staa $857 rorb stab $859 end

2. Load the machine file to the HC12SIM, set PC to $0800, clear all the registers and CCR, and then use step execution to observe the contents of the CPU registers include CCR and memory. Refer to Appendix 12.0.

3. Write a discussion regarding to this procedure.

Solution 1: 2: =00000800 0800 86 59 org $800 ldaa #89 ; load data and save into accumulator A

immediatelly 3: 4: 5: 6: 7: 8: 9: 10: 11: 0802 C6 FE 0804 B4 0800 0807 7A 0850 080A FA 0802 080D 7B 0851 0810 B8 0804 0813 7A 0852 0816 40 0817 7A 0853 ldab #$FE ;load data and store in accumulator B anda $800 ;AND accumulator A with memory staa $850 ;store data in A orab $802 ;logical OR accumulator B with memory stab $851 ;store accumulator B to memory eora $804 ; exclusive OR accumulator A with memory staa $852 ;store accumulator A to memory nega ;negate accumulator A staa $853 ;store accumulator A to memory

12: 13: 14: 15: 16: 17: 18: 19: 20: 21: 22:

081A 51 081B 7B 0854 081E 48 081F 7A 0855 0822 57 0823 7B 0856 0826 45 0827 7A 0857 082A 56 082B 7B 0859 end

comb

;complement accumulator B

stab $854 ;store accumulator B to memory asla ;arithmetic shift left accumulator A

staa $855 ;store accumulator A to memory asrb ;arithmetic shift right accumulator B

stab $856 ;store accumulator B to memory rola ;rotate accumulator A left through carrry

staa $857 ;store accumulator A to memory rorb ;rotate accumulator B through carry

stab $859 ;store accumulator B to memory

Discussion

This procedure is about using instruction sequence to perform Boolean logic and shift/rotate operations. This programming used logic gate to do operation such as OR and EXOR gate. New instruction such as eora, nega, comb, asla, asrb, rola and rorb are used. Instructon like
eora $804 is used to insert exclusive OR accumulator A with memory and rola is to rotate accumulator A left through carrry.

9.0 QUESTIONS
Answer all the questions. 1. Write an instruction sequence to add the two 24-bit numbers stored at $800-$802 and $803-$805, and save the sum at $900-$902. Solution ORG $0800 LDD $0801 ADD $0804 STD $0901 LDAA $0800

ADCA $0803 STAA $0900 END 2. Write an instruction sequence to subtract the 6-byte number stored at $800-$805 from the 6-byte number stored at $806-$80B and save the sum at $900-$905.

Solution ORG $0800 LDD $0804 SUBD $0804 STD $0904 SBCA $0803 STAA $0901 LDAA $0800 SBCA $0806 STAA $0900 END

3. Write a program to multiply two 3-byte numbers that are store at $800-$802 and $803$805, and save the product at $900-$905. Solution ORG $0800 LDD $0801 LDY $0803 EMUL STY $0900 STD $0804 LDD #33000

LDX #2000 IDIV STX $0906 STY $0908 END

4. Write a program to shift the 8-byte number located at $800-$807 to the left four places. ORG $0800 LDD $0801 LDY $0803
ASLA

END

Result

Conclusion -From this experiment,we manage to achieve the objectives stated. We slowly to understand
the 68HC12 instructions of performing arithmetic and logic operations by using the listed instruction. We also learnt to determine the contents inside the CPU registers and memory. We now know to write a proper programming for arithmetic and logic instructions and understand the functions of CCR.

11.0 REFERENCES
[1] S. F. Barret and D. J. Pack. (2005). Embedded Systems : Design and Application with the 68HC12 and HCS12. Available:

[2] M. G, "Experiment 2 Arithmetic and Logic Instruction," in KEC346, ed: FKE UiTM, Aug 2006. [3] H.-W. Huang. (2009). Introduction to the 68HC12 Microcontroller. [4] D. T. Li, "EEL 4744C lecture 5 68HC12 Instruction Set," ed. [5] H.-W. Huang. (2009). 68HC12 Assembly Programming.