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[I][B][COLOR="Red"][U]WARNING:[/U] The information on this thread is for educati onal purposes and following any instructions

may void your warranty and also cau se major damage to your notebook. If you don't know how to monitor system temper ature and what the tjmax of your CPU is then please skip this.[/COLOR][/B][/I] [SIZE="4"][URL=""][B ]---->NEW: SetPLL, free alternative to SetFSB<----[/B][/URL][/SIZE] [B][SIZE=4][COLOR="Blue"]How overclock a notebook with a TME-locked PLL or some other blockade [/COLOR][/SIZE][/B] [B]Successful PLL pinmods using ideas from this post is summarized below[/B] <table cellspacing=0 border=4 bgcolor="white" cellpadding=2 rules=cols><tbody><t r bgcolor=silver><td>[B]OC details link[/B]</td><td>[B]PLL[/B]</td><td>[B]Pinmod type[SIZE=1]^1[/SIZE][/B]</td><td>[B]Normal Speed[/B]</td><td>[B]OC Speed[/B]</ td></tr><tr bgcolor=#d9d9d9><td>[B]Calpella[/B]</td><td></td><td></td><td></td>< td></td></tr><tr><td>[URL=" &hl=en&ie=UTF-8&layout=2&eotf=1&sl=ru&tl=en&u=http%3A%2F%2Fpeople.overclockers.r u%2FPain_666%2Frecord9"]MSI GX740[/URL]</td><td>ICS9LPRS113AKLF</td><td>FSLx</td ><td>i5-430M-2.26@133</td><td>3.40@200</td></tr><tr <tr><td>[URL="http://transla 1&"]Acer AS5740 G[/URL]</td><td>SLGSP585</td><td>FSLx</td><td>i3-330M-2.13@133</td><td>2.62@167< /td></tr><tr <tr><td>[URL=" s=n&prev=_t&hl=en&ie=UTF-8&layout=2&eotf=1& topic_383%2F58%23post-265431"]Acer AS5740G[/URL]</td><td>ICS9LPRS3197</td><td>FS Lx</td><td>i3-330M-2.13@133</td><td>2.62@167</td></tr><tr bgcolor=#d9d9d9><td>[B ]Montevina[/B]</td><td></td><td></td><td></td><td></td></tr> <tr><td>[URL=http:/ / locked-p7805u-cpu-22.html#post6707815"]Gateway p7805u[/URL]</td><td>[URL=""]ICS9LPRS365BGLF[/URL]</td><td>TME-unlo ck</td><td>P8400-2.4@266</td><td>3.61@400</td></tr><tr><td>[URL=""]Dell Lat E4300 ^4[/URL]</td><td>SLG8LP554 </td><td>FSLx</td><td>P9400-2.53@266</td><td>3.16@333</td></tr><tr><td>[URL="htt p:// -pinmod-overclocking-methods-examples-48.html#post6462101"]Quanta TW8 [/URL] </t d><td>[URL=""]SLG8SP513V[/UR L]</td><td>FSLx</td><td>T4500-2.3@200</td><td>3.06@266</td></tr><tr><td>[URL="ht tp:// modifiche-hardware/159844-pll-pinmod-p8600-3ghz.html&ei=78TDTNyjE4uPcdDF0dgL&sa= X&oi=translate&ct=result&resnum=8&ved=0CFgQ7gEwBw&prev=/search%3Fq%3DTME%2BPLL%2 Boverclock%2Bpin%2Bmod%26hl%3Den%26lr%3D%26client%3Dfirefox-a%26hs%3D8vt%26pwst% 3D1%26rls%3Dorg.mozilla:en-GB:official%26tbs%3Dqdr:m%26prmd%3Dfd"]HP 6730P[/URL] </td><td>ICS9LPRS397DKLF</td><td>TME-unlock</td><td>P8600-2.4@266</td><td>3.06@3 33</td></tr><tr><td>[URL=" 11"]HP 8530W[SIZE=1]^3[/SIZE][/URL]</td><td>SLG8SP533V</td><td>TME-unlock</td><t d>P8600-2.4@266</td><td>3.06@333</td></tr><tr><td>[URL="http://forum.notebookrev"]HP dv6-1000^4[/URL]</td><td>SLG8sp513v</td><td>FSLx</ td><td>P8400-2.26@2.4</td><td>3.00@266</td></tr><tr<tr><td>[URL=" clocking-methods-examples-130.html#post8516127"]Dell E5400^4[/URL]</td><td>SLG8L P554V</td><td>FSLx</td><td>T7300-2.2@200</td><td>2.93@266</td></tr><tr <tr><td>[ URL=" book-2530p-owners-lounge-10.html#post7121833"]HP 2530P[/URL]</td><td>ICS9LPRS397 DKLF</td><td>TME-unlock</td><td>SL9600-2.13@266</td><td>2.90@323</td></tr><tr><t d>[URL=""]HP CQ45[ /URL] [URL=""]&[/URL] </t

d><td>SLG8SP553V</td><td>FSLx</td><td>P8400-2.26@266</td><td>2.82@333</td></tr> <tr><td>[URL=" -hp-elitebook-2530p-owners-lounge-10.html#post7121833"]HP 2530P[/URL]</td><td>IC S9LPRS397DKLF</td><td>TME-unlock + FSLx[SIZE="1"]^3[/SIZE]</td><td>SU9x00@200</t d><td>SU9x00@266Mhz+</td></tr><tr><td>[URL=" nware-m11x/463095-m11x-clock-generator-ics9lprs387bklf-20.html#post7028341"]Alie nware M11xR1[/URL]</td><td>[URL=" html"]ICS9LPRS387BKLF[/URL]</td><td>TME-unlock</td><td>SU7300-1.6@266</td><td>2. 00@333</td></tr><tr><td>[URL=""]Acer 1810T[/URL]</td><td>[URL=" /files/282479151/SLG8SP513V.pdf"]SLG8SP513V[/URL]</td><td>FSLx+BSEL & TME-unlock </td><td>SU4100-1.3@200</td><td>1.73@266</td></tr><tr><td>[URL="http://forum.not"]Acer 1810T[/URL] [URL=""]&[/URL] [URL="http://forum.notebookre"]&[/URL] [URL=" m/showpost.php?p=5324728&postcount=2398"]&[/URL]</td><td>[URL=" cts/getdoc.cfm?docid=18703881"]ICS9LPRS365[/URL]</td><td>FSLx+BSEL & TME-unlock< /td><td>SU3500-1.4@200</td><td>1.70@242</td></tr><tr <tr><td>[URL="http://forum. erclocking-methods-examples-121.html#post8385112"]Fujitsu Amilo Pi3560[/URL]</td ><td>ICS9LPRS365BKL</td><td>TME-unlock </td><td>@200</td><td>@233</td></tr><tr b gcolor=#d9d9d9><td>[B]Santa Rosa[/B]</td><td></td><td></td><td></td><td></td></t r><tr><td>[URL=""]D ell M1730[SIZE=1]*[/SIZE][/URL]</td><td>SLG8LP550 </td><td>FSLx</td><td>X9100-3. 0@200</td><td>4.0@266</td></tr><tr><td>[URL=" wthread.php?p=5003880"]Clevo M570RU[SIZE=1]^5[/SIZE][/URL] [URL=""]&[/URL]</td><td>ICS9LPR365DGLF</td><t d>FSLx</td><td>X9000-2.8@200</td><td>3.74@266</td></tr><tr><td>[URL="http://foru cket-p-explained-photos-36.html#post6503477"]Dell XPS M1330[/URL] [URL="http://f -socket-p-explained-photos-35.html#post6360837"]&[/URL]</td><td>SLG8LP550V</td>< td>FSLx</td><td>T9300-2.5@200</td><td>3.59@266</td></tr><tr><td>[URL="http://for -solution-53.html#post7323573"]Lenovo T61[SIZE="1"]^3^4[/SIZE][/URL]</td><td>[UR L=""]ICS954309[/URL]</td><td>FSLx< /td><td>T9300-2.7@200</td><td>3.59@266</td></tr><tr><td>[URL="http://forum.noteb -happy.html"]ACER 6920g[SIZE="1"]^3^5[/SIZE][/URL]</td><td>ICS9LPRS365BGLF</td>< td>TME</td><td>X9000-2.8@200</td><td>3.5+</td></tr><tr><td>[URL=" 1.html#post7298927"]HP HDX 9000[/URL] [URL=" nvy-hdx/515212-official-hp-hdx-9000-dragon-owners-lounge-2-a-54.html#post6946397 "]&[/URL]</td><td>[URL=""]I CS9LPRS501PGLF[/URL]</td><td>FSLx & TME-unlock</td><td>T9300-2.5@200</td><td>3.3 7@250</td></tr><tr><td>[URL=" 79433#post5879433"]Dell XPS M1730[SIZE=1]^3[/SIZE][/URL]</td><td>CY28547</td><td > FSLx</td><td>200Mhz PLL</td><td>266Mhz PLL</td></tr><tr><td>[URL="http://forum"]HP Pavilion dv9700t [/U RL] </td><td>RTM875T-606</td><td>TME-unlock</td><td>T9300-2.5@200</td><td>3.13@2 50</td></tr><tr><td>[URL=" termarket-upgrades/393027-pll-pinmod-overclocking-methods-examples-121.html#post 8385112"]Lenovo T61[/URL]</td><td>SLG8LP564V</td><td>FSLx</td><td>T8300-2.4@200< /td><td>3.2@266 </td></tr><tr><td>[URL=" ?hl=en&sl=de&tl=en& r-Power-f%25C3%25BCrs-X-Pinmod-an-X61%28s%29-inkl-Tablet"]Lenovo X61 ^4[/URL]</t d><td>SLG8LP564</td><td>FSLx</td><td>T7300-2.0@200</td><td>2.93@266 </td></tr><t r><td>[URL=" ades/393027-pll-pinmod-overclocking-methods-examples-130.html#post8513668"]Acer

6920^4[/URL]</td><td>ICS9LPRS365BGLF</td><td>TME-unlock</td><td>T8300-2.6@200</t d><td>3.0@233</td></tr><tr <tr><td>[URL=" grades/393027-pll-pinmod-overclocking-methods-examples-119.html#post8279313"]HP 8710P [/URL] </td><td>ICS9LPRS355 </td><td>TME-unlock</td><td>T8300-2.4@200</td> <td>2.92@243</td></tr> <tr><tr><td>[URL=" t-upgrades/393027-pll-pinmod-overclocking-methods-examples-92.html#post7232511"] Acer EX5620z[SIZE="1"]^4[/SIZE] [/URL] </td><td> ICS9LPRS502PGLF</td><td>TME-unl ock</td><td>T7500-2.4@200</td><td>2.88@240</td></tr><td>[URL="http://forum.noteb cking-methods-examples-43.html#post6282117"]Quanta TW7 [/URL] </td><td> [URL="ww"]ICS9LPRS365BGLF[/URL]</td><td>FSLx </td><td>T8100-2.1@200</td><td>2.80@266</td></tr><tr><td>[URL="http://forum.note ocking-methods-examples-60.html#post6804435"]Fujitsu U9200 [/URL] </td><td>[URL =""]ICS9LPRS365BGLF[/URL]</td><td> FSLx</td><td>T8100-2.1@200</td><td>2.80@266</td></tr><tr><td>[URL="http://forum."]Toshiba Tecra A9[/URL]</td><td>ICS9 LPR501SGL</td><td>TME-unlock</td><td>T7300-2.0@200</td><td>2.72@272</td></tr><tr ><td>[URL=" des/390696-bsel-mod-socket-p-explained-photos-35.html#post6360837"]Dell XPS M133 0[/URL]</td><td>SLG8LP550V</td><td>FSLx</td><td>T7300-2.0@200</td><td>2.66@266</ td></tr><tr><td>[URL=" arket-upgrades/429717-rtm875t-606-info-gathering-ocing-9.html#post6707491"]Acer Aspire 8920g [/URL]</td><td>RTM875T-606</td><td>TME-unlock</td><td>T8300-2.4@200 </td><td>2.60@217</td></tr><tr><td>[URL=" ead.php?p=5353672"]Dell Inspiron 1525[/URL] [URL=" m/showthread.php?t=421279 "]&[/URL]</td><td>[URL=""]ICS9LPRS 365BKL[/URL]</td><td>TME-unlock</td><td>T7250-2.0@200</td><td>2.50@250</td></tr> <tr><td>[URL=" t=result&resnum=3&ved=0CCcQ7gEwAg&prev=/search%3Fq%3DD630%2BT7100%2BPLL%26hl%3De n%26client%3Dfirefox-a%26hs%3DQQP%26rls%3Dorg.mozilla:en-GB:official"]Dell D630[ /URL]</td><td> SLG8LP550</td><td>FSLx</td><td>T7100-1.8@200</td><td>2.40@266</td ></tr><tr><td>[URL=" ket-upgrades/393027-pll-pinmod-overclocking-methods-examples-71.html#post6947718 "]HP G60[/URL]</td><td> ICS9LPR355BKL</td><td>TME-unlock</td><td>T4200-2.0@200</ td><td>2.40@240</td></tr><tr><td>[URL=" hl=en&sl=pl&u= e-bsK&sa=X&oi=translate&ct=result&resnum=2&ved=0CD8Q7gEwAQ&prev=/search%3Fq%3D%2 522TME%2Bunlock%2522%26hl%3Den%26lr%3D%26client%3Dfirefox-a%26hs%3DYl4%26rls%3Do rg.mozilla:en-GB:official%26tbs%3Dqdr:m%26prmd%3Divnsfd"]Compal FL90[/URL]</td>< td> [URL=""]ICS9LPRS365BGLF[/URL]< /td><td>TME-unlock</td><td>T7100-1.8@200</td><td>2.40@240</td></tr><tr><td>[URL= ""]HP Pavilion DV6871us[ /URL] [URL=""]&[/URL]</td ><td>RTM875T-606</td><td>TME-unlock</td><td>T5600-1.83@166</td><td>2.20@200</td> </tr><tr><td>[URL=""]HP P avilion DV2000[size=1]^3[/size][/URL]</td><td>ICS954305EKLF</td><td>FSLx</td><td >T2050-1.6@133</td><td>2.00@166</td></tr><tr><td>[URL="http://forum.notebookrevi"]Acer Aspire 5920g [/URL] </td><td>[ URL=""]ICS9LPRS365BGLF[/URL]</td>< td>TME-unlock</td><td>T5250-1.5@166</td><td>1.61@179</td></tr><tr><td>[URL="http :// ge-5.html#post4652114"]HP 2510P[/URL] [URL=" usiness-class-notebooks/352887-2510p-owners-lounge-30.html#post5545358"]&[size=1

]^2^4[/size][/URL]</td><td>[URL=""]ICS9LP RS355BGLF[/URL]</td><td>FSLx</td><td>U7600-1.33@133</td><td>1.60@160</td></tr><t r><td>[URL=" 510p-owners-lounge-55.html#post6961208"]HP 2510P[/URL]</td><td>[URL="http://stas"]ICS9LPRS355BGLF[/URL]</td><td>FSLx+BSEL</td><td>U7 600-1.2@133</td><td>1.2@200</td></tr><tr><td>[URL="http://forum.notebookreview.c om/hp-business-class-notebooks/461931-2710p-thread-3.html#post6627877"]HP 2710P[ SIZE=1]^3[/SIZE][/URL] </td><td>[URL=""]I CS9LPRS355BKL[/URL]</td><td>FSLx & TME-unlock</td><td>U7600-1.2@133</td><td>1.50 @166</td></tr></tbody></table> [SIZE=1]^1 FSLx or FSLx+BSEL mod means a large overclocking jump eg: 166/200/266 /333/400 FSB. TME-unlocked PLLs means can use 0.3Mhz increments up to the point of instability via setfsb software overclocking. ^2 not necessary other than for convenience. Could have just used setfsb overclo cking. ^3 theory requires implementation. ^4 running [URL="" ]DualIDA[/URL] capable bios and cpu gaining an extra half or full multiplier. Ap pears all recent [U]Dell[/U] systems can do dualIDA. ^5 [URL=" s/489140-how-unlock-core-2-extreme-multiplier-windows.html"]Throttlestop[/URL] c an unlock multipliers in the Core 2 Extreme CPUs making PLL overclock unnecessar y. * is BSEL pinmodded from 266->200 as described in [url]http://forum.notebookrevi l960-gl40-useful-info-pll-modders.html#post7838585[/url] [/SIZE] This thread will help people extract peak performance from their notebook by sho wing: - how to check if your PLL is TME-locked, indicating setfsb OC won't work - method 1: TME-unlock a PLL via a pinmod so setfsb/grub2-setfsb can program the PLL - method 2 and 3: FSLx or FSLx+BSEL overclocking via PLL pinmod for a faster FSB .<table><tbody><tr><td>Before attempting any of these PLL overclock methods it m ight be worthwhile seeing if you can BSEL pinmod the CPU. [URL="http://forum.not"]Naton explains[/URL] [click pic on rig ht for visual understanding] [I]The 200 -> 266 consists on connecting the two h oles A23 and B23 on the CPU socket with a copper wire, or B23 and B24 with a cop per wire[/I]. Though it will lock your multiplier to the lowest setting for all CPUs on Intel chipsets, except Celerons. AMD/NVidia chipsets allowing overclock ing without multiplier lockout.</td><td><a href=" 223/2425/200to266.jpg"><img height=120 src=" 425/200to266.jpg" border=0></a></td></tr></tbody></table> [B]1. Where can I get a schematic of my systemboard to identify my PLL and help if I need to pinmod?[/B] Try [URL=""]laptop desktopschematic[/URL], [URL="" ]lqv77[/URL], [URL=""]G SM-extreme[/URL], [URL=""]notebookschematic[/URL] an d a general google search. <b>2. How do I check TME_READBACK to see if I can overclock my PLL with software ? </b>[LIST][*][B]using setfsb (Windows)[/B][SPOILER]<table><tbody><tr><td>Right : the status of TME_READBACK tells us if TME is enabled. Screenshot shows it's s tatus on register 9 bit 6, shown as 65h=1<b><font color="Red">1</font></b>00101(

binary) <b><font color="Red">bit 6</font></b>=1, meaning no overclocking. In the next screenshot it is shown how to write a 0 to the PCI2 Output Enable register . If your system freezes after doing this then it uses the PCI2 signal for it's operation and it's not possible to pinmod the TME/PCI2 pin to remove the hardwir ed TME_Enabled mode, so continue to method 2. If the system works after the writ e, then refer to method 1 below. Both the <a href="" target="_blank">ICS9L PRS355</a> and <a href="" t arget="_blank">ICS9LPR501SGLF</a> PLLs read TME_READBACK in this way, so it's hi ghly likely other ICS PLLs do too. </td><td><a href="" target= "_blank"><img src="" bor der="0" alt="" /></a><br><br><a href=" eregister.gif" target="_blank"><img src=" /" border="0" alt="" /></a></td></tr></tbody></table> [/SPOILE R][*][B]using R-W Everything (Windows)[/B][SPOILER]1. Run r-w everything 2. Select Access-Clock Generator 3. Change byte 0C from 0D(13) to 16(22), click write close Clock Generator windo w 4. Select Access->Clock Geneator. It will open same window as before but present 22bytes of data rather than 13.[/SPOILER][*][B]using lmsensors (Linux)[/B][SPOI LER]Setfsb's Diagnosis window requires a PLL to use for it's operation. Since ne wer PLLs aren't being added, we need an alternative way of checking the TME_READ BACK flag using Linux. 1. Install lmsensors package. Available for various Linux flavors on the reposit ories. 2. Some distributions blacklist the i2c-dev or i2c-i801 module. Check your /etc/ modules and uncomment if blacklisted 3. Check that your bios has enabled the SMBUS device: [CODE]$ lspci | grep -i smbus 00:1f.3 SMBus: Intel Corporation 82801H (ICH8 Family) SMBus Controller (rev 03)[ /CODE] If not, need to switch on the bits to enable it as explained [URL="http://forum."]here[/URL]. 4. Load i2c modules [CODE]$ modprobe i2c-dev $ modprobe i2c-i801 $ ls /dev/i2c* /dev/i2c-0[/CODE] 5. Scan to identify devices on i2c bus. ICS PLL appears as device 0x69 [CODE] $ i2cdetect -y 0 0 1 2 3 4 00: -- -10: -- -- -- -- -20: -- -- -- -- -30: 30 -- -- -- -40: -- -- -- -- 44 50: 50 -- -- -- -60: -- 61 -- -- 64 70: -- -- -- -- --

5 ---------

6 ---------

7 8 9 a -- 08 -- --- -- -- --- -- -- --- -- -- --- -- -- --- -- -- --- -- 69 ---[/CODE]

b --------

c 0c ---4c ---

d -1d ------

e --------

f --------

6. Dump the PLL data [CODE]$ i2cdump -y 0 0x69 s 0 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: 31 85 fc 33 ff f0 90 11 d0 65 7d 00 0d $ i2cdump -y 0 0x69 s 0xd 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: cf 44 ef 2f a0 8f f2 23 00 ce 61 53 d8 0123456789abcdef 1??3.????e}.? 0123456789abcdef ?D?/???#.?aS?[/CODE]

7. Check the TME_Readback flag to see if TME is enabled (no software overclockin g) For ICS PLLs: - look at first dump, register 9, bit 6 - if bit6=1 then it's TME-locked (no overclocking) For CYxxx PLLS - look at first dump, register 15, bit 7 - If bit7=1 then it's TME-locked (no overclocking)[/SPOILER][/LIST][B]3. Is ther e any software method to bypass TME mode without using a pinmod?[/B][SPOILER]<ta ble><tbody><tr><td> setfsb's author Abo has successfully overcome the 2510P's ic s9LPRS355 PLL TME mode via software configuration only. As far as I know this is the only PLL he has done this for. I was able to visually compare PLL registers before and after the overclock, referring to the [URL=" 74/9LPRS355.pdf"]ics9lprs355 datasheet[/URL] to see what was done. We see that he swaps the main clock from PLL1 to PLL3, and the sata clock to PLL 2 below. Can perform these steps or some variation of them to see if can overcom e TME mode on the other PLLs are well. [I]Right: 2510P PLL registers before/after setfsb applies TME workaround (OD, OE sets FSB)[/I]</td><td>[URL=][IMG]ht tp://[/IMG][/URL]</td></tr></tbod y></table> <table><tbody><tr><td>[U]Step 1[/U]: set TME workaround[LIST=1][*]0h(0): 31->37 Sets source for SRC Main from PLL1 -> PLL3 Sets sata clock from SRC_Main to PLL2 [*]11h(17): A0->A4 VCO Frequency Control Register PLL3. M Div (5:0) [*]12h(18): 8F->F6 VCO Frequency Control Register PLL3 N Div (9:0) [*]15h(21): 00->01 M/N Enable[/LIST]</td><td>[U]Step 2[/U]: Set byte 0D and OE manually for your de sired FSB[SPOILER]{ FSB, Byte 0D, Byte OE} { 112, 0x88, 0x71}, { 117, 0x88, 0x87} { 125, 0x88, 0xA3} { 133, 0x88, 0xBF} { 142, 0x88, 0xDB} { 150, 0x88, 0xF7} { 158, 0x48, 0x13} { 167, 0x48, 0x2F} { 175, 0x48, 0x4B} { 183, 0x48, 0x67} { 190, 0x48, 0x7D} { 195, 0x48, 0x8E}

{ 200, 0x48, 0x9E} [/SPOILER]</td></tr></tbody></table>[U]NOTE:[/U] one undersir able behaviour that the ics9lprs355 PLL shows is that when the system is put int o standby/hibernate, it resumes in a state where the PLL won't respond to setfsb requests. It requires another quick standby to unfreeze it upon which it can re spond to software overclocking requests.[/SPOILER][B]4. What methods can I use t o overclock my PLL?[/B][LIST][*][B]Intro[/B][SPOILER]The PLL's FSLx and the CPU' s BSELx pins are tied. Method 2 is in effect a BSEL mod via the PLL's FSLx pins. Method 3 separates the PLL's FSLx signals and the CPU's BSEL signals to provide faster operation, a necessary workaround to prevent the CPU going into lowest m ultipler lockout when it's in an invalid (faster) BSEL setting. Software used for overclocking a PLL: [LIST] [*] [URL=""]setfsb[/URL] for Windows. [*] [URL=""]grub2 bootlo ader overclocking[/URL] for OS-independent overclocking. Only provision is would need Linux, prefereably Ubuntu 9.10 or newer, installed to be able to compile a nd use it.[/LIST] <img src="" border="0" alt= "" /><img width=97% src="" border= "0" alt="" /> PLL pins of interest: <b><font color="Blue">blue</font></b>: method 1 | <b><font color="Red">red</font></b>: method 2/3. From <a href=" ts/getdoc.cfm?docid=18688128" target="_blank">ICS9LPR501SGLF PLL datasheet</a>[/ SPOILER][*][B]RAM timing: how it affects overclocking potential[/B][SPOILER]Over clocking methods 1 and 3 below boot your system and set your northbridge, chipse t and CPU internally to *believe* they will be receiving 200Mhz timings. They j ust are being sent faster signals from the PLL instead (266Mhz in method 3's cas e!!). This could present a problem with your RAM. DDR2-667 RAM will now be recei ving timing signals for 266Mhz/887Mhz operation, yet still be using the SPD tabl e for 667Mhz operation. In which case, I hope you've got good ram to test, or ca n use <a href=" shtml" target="_blank">Thaiphoon Burner</a> or <a href="http://www.techpowerup.c om/spdtool/" target="_blank">SPDTool</a> to slow down *at least* the CAS timing in your RAM's eeprom SPD table by increasing it's value. I believe it's CAS=6 fo r 800Mhz operation. For example if you have 800mhz DDR2 ram with an SPD like this: [IMG][/IM G] If you want to run it at 333mhz with a CAS of 6, open SPDtool, File > Read > Mod ule X, then change "CAS Latencies Supported" from "4, 5, 6" to "6". Then just fi x the checksum (under the Edit menu) and write the SPD. Make sure you save a cop y of the original SPD in case you make a mistake. [IMG][/IMG] It's a good idea to try both thaiphoon burner and SPDtool, I don't think thaipho on burner works well with 64-bit operating systems. And SPDtool may have problem s with DDR3 ram. I have attached an older trial version of thaiphoon burner that has full functionality (does let you write the SPD). The latest trial version d oes not let you write the SPD, so I suggest using the latest trial version to mo dify the SPD and then use the old trial version to write the SPD. Unless you wan t to purchase thaiphoon burner. [/SPOILER][*]<b>Method 1: TME-unlock a PLL to allow software overclocking</b>[SP OILER]<a href="" target="_blank">setfsb homepage </a> informs us that a PLL ICS9LPR501HGLF is supported. So if the TME is disable

d by setting PCI2/TME pin4 logic to 0 (GND), then setfsb can all software overcl ocking. Only problem here is *IF* your system uses the PCI2 signal after boot, i n which case it won't work. I used setfsb setting ICS9LPRS355 PLL register 02, b it 2=0 to disable PCI2 output (enabled by default), and my system worked fine af terwards. This hardware TME-disabling hardware mod can be easily reversed: 1. lift right side of the resistor leading from pin4 (blue) as shown in above pi cture using a soldering iron. Right side has more room and is easier if your rig ht handed. Then can use the lifted resistor leg to attach a GND wire to. Try to minimise soldering iron contact with your multi-layered systemboard as much as i s conveniently possible. 2. Connect lifted resistor leg to a (logic 0) GND, found by continuity testing p oints against the system chassis. 3. Put some insulation tape below the lifted resistor end so it won't short the board if pressed down. 4. Test to see if it boots up. If not, reverse process and try method 2 or 3.[/S POILER][LIST][*][B]Example: TME-unlock applied to a Toshiba Tecra A9[/B][SPOILER ][B]Configuration used [/B] - Toshiba Tectra A9. T7300 2Ghz CPU. PM965 Santa Rosa Chipset using FSB=800Mhz. DDR2-800 RAM. - In my particular case I had a TME on my PLL enabled, which was disallowing ove rclocking of the PLL. [B]Requirements for overclocking[/B] - identify which PLL the notebook uses, then to download the datasheet for it. - Setfsb overclocking software. It's Diagnosis window useful to also read/write to the registers of the PLL. [B]Problem with setfsb[/B] First problem was setfsb didn't have an exact match for my system's PLL ICS9LPR5 01[COLOR="Red"][B]S[/B][/COLOR]GLF PLL. So the closely matched ICS9LPR501[COLOR= "Red"][B]H[/B][/COLOR]GLF was used instead. I press getfsb which does read the r ight frequency. Then I move the slider (top slider) a little bit and then press setfsb. The HDD lights up, I can move the mouse but not interact with anything. Then a few seconds later I get the BSOD and then the laptop restarts. This happe ns even if I don't move the slider, just press getfsb then setfsb. This also ha ppens when I "Select source for SATA clock" to be "Sata = PLL2" That is, change bit 1 of byte 0 to 1. Which is what setfsb tries to change, among other things, but this is where it goes wrong. So the reasons setfsb didn't work for me are: 1. My TME strap status (read only) reads 1 = no overclocking. 2. System would lock up due to setfsb's ICS9LPR501HGLF overclock changing the SA TA clock from PLL main to PLL2 [B] Hardware mod to disable TME mode [/B] I proceeded to use method 1 in Nando4's guide, requiring hardware modification t o overcome the TME mode. The method being preferred to method 2 as - pin4 TME/PCI pin was easier to pinmod than pin57 FSLb pin - setfsb allows 1Mhz overclocking increments whereas method 2 is less probable 3 3/66Mhz overclocking This also required Abo to supply a new setfsb for my ICS9LPR501SGLF to correct t he SATA clk issue.

Here are photos of my PLL: [URL=" _HaZaRd/different%20lighting/"]before[/URL] | [URL=" albums/ac167/moral_HaZaRd/tme/"]after[/URL] and after the modification. Basically as you can see from the photo I found that next to the resistor there was a GND pad and a pad that was connected to the TME pin (pin 4). I found this by using a multimeter. I tested points on the motherboard with the system chassi s to find GND. I tested points on the motherboard with the pin 4 (TME pin) to f ind the second pad. So I removed the resistor and put it into the new position. I did some tests wit h a DMM to check my work and then closed the laptop back up. I started the lapto p and it s working perfectly, the best part is that now TME = 0, confirmed by read ing the TME_READBACK register 9 bit 6 being 0. I used setfsb to increase the fsb a little, and I took a picture of my screen wi th a camera since setfsb causes my laptop to freeze. After the laptop restarted I then manually copied the register values that I saw in my camera to setfsb, ex cept I did not change the source for the SATA clock. So bit 1 of byte 0 is 0. Th en when I pressed apply it worked without freezing my notebook. [URL="http://s89"]Here[/URL] is the scre enshot. [B]Overclocking after TME pinmod was applied [/B] I sent an email to Abo (creator of setfsb) and provided this info to him. He the n gave me a test version that adding ICS9LPR501SGLF PLL support. The only differ ence now with setfsb between ICS9LPR501HGLF and ICS9LPR501SGLF is that the bit t hat is used to select the source for the SATA clock is unchanged in SGLF. Now using setfsb I was able to overclock my FSB to over 250mhz, my CPU frequency went from 2ghz to over 2.5ghz and is stable without and modifications to ram ti mings. This is lucky on my part. The RAM must be quite tolerant to run using the 333Mhz SPDTable timings and still work. It has been recommended that at the ver y least the primary RAM timing, CAS, be increased to ensure stability and allow me to overcome any RAM timing wall with overclocking. This would be done using [ URL=""]spdtool[/URL] or [URL="http://www.soft"]Thaiphoon Burner.[/URL] Below are some screenshots of successful overclocking. [URL="http://s896.photobu"]Here[/URL] is an album of successfu l OC screenshots. <!-- attachments --><div style="padding:6px"><fieldset class="fieldset"><div sty le="padding:3px"><a href="attachment.php?attachmentid=35609&amp;d=1246253971" ta rget="_blank"><img class="thumbnail" src="attachment.php?attachmentid=35609&amp; stc=1&amp;thumb=1&amp;d=1246253971" border="0" alt="Click image for larger versi on Name: 2300mhz.JPG Views: 3 Size: 203.7 KB ID: 35609" /></a>&nbsp;<a href="attachment.php?attachmentid=35610&amp;d=1246 253971" target="_blank"><img class="thumbnail" src="attachment.php?attachmentid= 35610&amp;stc=1&amp;thumb=1&amp;d=1246253971" border="0" alt="Click image for la rger version Name: 2300mhz2.JPG Views: 2 Size: 173.6 KB ID: 35610" /></a> &nbsp;<a href="attachment.php?attachmentid=35611&amp;d=124 6253971" target="_blank"><img class="thumbnail" src="attachment.php?attachmentid =35611&amp;stc=1&amp;thumb=1&amp;d=1246253971" border="0" alt="Click image for l

arger version Name: 381mhzram.JPG Views: 8 Size: 184.0 KB ID: 35611" /></a>&nbsp;</div></fieldset></div><!-- / attachments -->[/SPOILE R][/LIST][*]<b>Method 2: FSLx mod to hardwire PLL for higher FSB</b>[SPOILER]Her e we set different BSEL and FSLx signals as a workaround to prevent CPU being lo cked to the lowest multiplier. Here need to: 1. separate the Pin57 FSLb pin from board so the CPU BSEL and PLL FSLx signals c an be set separately 2. set FSLb=0 by connecting to GND, eg: pin58. This would be most easiest if there is a resistor leading off the Pin57 track. W hat I can see is it looks as if it goes to a through hole, which disappears some where. If my observation is correct, you'd either need to follow that through ho le and see if it leads to a resistor, or otherwise use a blade to disconnect the PLL's pin57 from the board and then connect it to pin58 (GND), putting some ins ulation tape below Pin57 so it doesn't make contact with it's original connected track, a logic of 1 (3.3V). Fiddly work. [/SPOILER][*]<b>Method 3: FSLx+BSEL mod to hardwire PLL for higher FSB</b>[SPOIL ER]<table><tbody><tr><td><b>Overriding PLL Frequency</b> <font color="Blue">current operation, FSB=800Mhz</font> <font color="orange">desired overclock, FSB=1066Mhz</font> <b><font color="Red">red</font></b> shows the PLL pin of interest FSLc..FSLb..FSLa..CPU-MHz <b><font color="Orange">L.......<b><font color="Red">L</font></b>.......L......2 66</font></b> L.......L.......H......133 L.......H.......H......166 <b><font color="Blue">L.......<b><font color="Red">H</font></b>.......L......200 </font></b> H.......H.......L......400 H.......H.......H......reserved H.......L.......H......100 H.......L.......L......333 </td><td><img width=480 src="http://img150.imagesh" border="0" alt="" /></td></tr></tbody></table> From: <a href="" target="_b lank">ICS9LPR501SGLF PLL datasheet</a> and <a href=" sign/mobile/datashts/31674505.pdf" target="_blank">Core2 Duo Processors for Mobi le Intel 965 Express Chipset Family</a> We can see the PLL's FSLC/FSLB/FSLA and the CPU's BSEL2/BSEL1/BSEL0 are tied. Wh en the BSEL signals are sampled by the CPU and in a non-compatible range, it wil l lock the multiplier. So this will not work with recent CPUs using Intel chipse ts, but will work with AMD/Nvidia CPUs. 1. Flash the DDR2 RAM to PC2-6400 spec so has a 400Mhz SPDtable entry as describ ed [URL=""]he re[/URL]. 2. Applying a strong pull down resistor (2k to GND) to the PLL's FSLb pin to do a 200->266Mhz overclock. FSLb is pin 64 on the PLL as shown [URL="http://forum.n"]here[/URL]). This overclock would be preferred since then the rest of the system would be cal ibrated correctly for this higher FSB, ie: RAM would use the 400Mhz SPDTable ins

tead of the 333Mhz SPDtable, X4500's core and render clock speed would be adjust ed by the chipset correctly. Once overclocked with these parameters, if the TME-unlock mod has been applied, the system may be even capable of going beyond the 266Mhz FSB by using setfsb. Y ou may still need more voltage to the CPU for it to be stable. If can disable sp eedstep in the bios, then perhaps the CPU can be booted up in the lowest multipl ier, stable long enough to then load rmclock to up the CPU voltages for the vari ous dividers. [/SPOILER][/LIST] [COLOR=BLUE][SIZE=3][B]FAQ[/B][/SiZE][/COLOR] [B]1. What are the pros and cons of software versus hardware FSB overclocking?[/ B][SPOILER]Obvious advantage of using setfsb is it gives overclocking ability in increments of 1Mhz, so it's far easier to find system limits than when dealing in 33/66Mhz increments if modding the PLL's FSLx signals using method 2 or 3 bel ow. Though hardware overclocking presents these advantages: 1. software overclocking using setfsb requires a rerun when come out of hibernat e/standby 2. Linux overclocking with setfsb requires a boot into Win, a setfsb run, then a warm boot into Linux. 3. RAM timings still believe they are working at the lower FSB so the RAM SPD_ta ble may need slower timings 4. X3100 Core Render clock is FSB dependant, reflected by sampled BSEL signals a s shown <a href="" targe t="_blank">here</a>. Hardwiring the PLL for faster FSB can overcome (1) and (2). If the chipset suppo rts the higher FSB speed (eg: 533->800Mhz FSB overclock by Santa Rosa), then exp erimental method 3 above can overcome (3) and (4) whilst preventing multiplier l ock-out. Though CPU would need to be very tolerant in such a higher overclock th ough.[/SPOILER][B]2. Can I also undervolt my CPU?[/B][SPOILER]Be sure to check [ URL=""]The Undervolting Guide[/URL] that can be found on this forum. Undervolting may be possible after an overclock but it will make the overclock less likely to be stable. There is a second guide [URL=""]Ad vanced Undervolting[/URL] (using superlfm mode) with a slightly different approa ch. [/SPOILER][B]3. Are there any free alternatives to setfsb?[/B][SPOILER]NBR m ember [URL=""]Inteks[/URL] ha s used the [URL=""]grub2 -setfsb[/URL] code to come up with a prelim setfsb successor in Windows. See [u rl=]setfsb code - Project[/url] No t working as yet but coders welcome to join the project to help it along. Inteks wrote [URL=""]1810 tray[/URL] allowing overclocked-AC, undervolted-DC profiles but is now enhancing it for more generic notebook usage. setfsb being an important component. Would be very popular and could result in monetary gains: [url=]Mo ney to the first guy who recreates a SetFSB alternative.(mobile i7 and C2D)[/url ][/SPOILER][B]4. Is it possible to use a 1066Mhz FSB Penryn cpu on a 800Mhz FSB Santa Rosa platform?[/B][SPOILER] -----------------------------------------------------------------------------------*update* NBR forum member naton has succeeded to get a T9900 (1066Mhz FSB) to run in a no tebook with a GL960 chipset, after doing a BSEL mod to force the CPU to run with an 800Mhz FSB.

Details are [URL=" t-upgrades/605383-fsb-downclock-mod-intel-gl960-gl40-useful-info-pll-modders.htm l"]here[/URL]. -----------------------------------------------------------------------------------Related to this overclock, there are *some* hints that a 1066Mhz series-4 chipse t penryn (1066Mhz FSB) cpu could work with a Santa Rosa systemboard. I've put to gether some info that may help you if you want to try a T9400/T9600 1066Mhz FSB CPU: [B]1. Pin-compatibility between 1066Mhz and 800Mhz penryns[/B] <table><tbody><tr><td> Left: penryn CPU pinout for [URL=" om/design/mobile/datashts/32012001.pdf"]series 4 1066Mhz FSB chipsets[/URL] Right: penryn CPU pinout for [URL=" hts/31674505.pdf"]PM965/800Mhz FSB[/URL]. <br> We see [B]they are directly pin compatible[/B]. Pics created by joining the two datasheet pinout pages together.</td><td>[URL= 570/pm45cpu.png][IMG][/IMG][ /URL]</td> <td> [URL=][IMG][/IMG][/URL]</td></tr></tbo dy></table> [B]2. BIOS compatible microcode[/B] If it won't boot, then consider whether new bios microcode is required to suppor t the series-4 penryn CPU. There are tools for various bios and knowledgable on [URL=""]wimsbios ->My CPU isn't recognised[/URL], [URL=" splay.php?f=4"]mydigitallife[/URL] and [URL=" -bin/ultimatebb.cgi?ubb=forum;f=52"]rebelshaven[/URL] bios modding forums. There is a suggestion in the [URL=" p?p=4297140"]PM965 (800fsb) chipset and a 1066 MHz fsb cpu...[/URL] thread: [INDENT][I]I called intel at 1-916-377-7000 I talked to Tom from Level 5 tech su pport he assured me that the intel 965m can support the new cpu however GATEWAY and only gateway can make that happen if they provide bios support for the qx930 0 mobile quad cpu[/I][/INDENT] [QX9300 is a series-4 1066Mhz FSB quad-core CPU]. [B]3. Clocking the FSB at 1066Mhz on Santa Rosa platform [/B] If the T9400/T9600 boots up, then the mobo will downclock the CPU since the only valid BSEL settings a PM965 chipset has is 133/200Mhz. A PM45 has 200/266Mhz BS EL settings, so it would set it at 200Mhz FSB, BSEL2/1/0 being L/H/L. Can apply methods 0-3 above to increase from 800Mhz to 1066Mhz FSB on a Santa Rosa platfor m using setfsb and/or pinmods, or both if it's a TME-locked PLL. <table><tbody><tr><td><img height=230 src=" /pm45bsel.png" border="0" alt="" /></td><td><a href=" /img223/7808/bselcpu.gif" target="_blank"><img height=230 src="http://img223.ima" border="0" alt="" /></a></td><td><a href= "" target="_blank"><img height =85 src="" border="0" alt=" " /></a> <br>PM45 valid FSB <br><br><br> <a href=" img265/4413/pm965bsel.png/" target="_blank"><img height=85 src="" border="0" alt="" /></a><br>PM965 vali d FSB</td></tr></tbody></table> [B]Left:[/B] 1066Mhz-spec FSB CPU's BSEL settings from <a href="http://download." target="_blank">Intel C2D 45-nm C PU</a> datasheet. Compare this against the BSEL of 800Mhz-spec FSB CPU's BSEL se ttings as shown in method 2 above. [B]Middle:[/B] 800Mhz-spec FSB CPU's BSEL pin as highlighted from <a href="http: //" target="_blank">Intel C2D CPU's based on 965 express family</a>datasheet [B]Right:[/B] FSB capability comparison between the PM45 chipset that does suppo rt 1066Mhz FSB and the PM965 chipset that doesn't officially support 1066Mhz FSB (max=800Mhz). Anyone trying this mod is in a sense hopeful that the MCHBar func tionality still exists if trying the PM45's BSEL selection on a PM965 system. The potential application here is two fold: 1. to attempt to pinmod a 1066Mhz CPU to function on a Santa Rosa 800Mhz platfor m. A 1066Mhz CPU has a BSEL signal H/L/H - 200Mhz mode that is the the same as the Santa Rosa 800Mhz FSB platform. So if the CPU was installed, it should theor etically work, so long as the pinouts are compatible. The idea here being to set acceptable BSEL2/BSEL1/BSEL0 CPU signals so it doesn' t apply multiplier locking, whilst sending a different set of BSEL signals to th en rest of the system (CPU/PLL/Northbridge) to support a higher FSB operation. H ow to do this? CPU datasheet advises that BSEL2/1/0 are output pins so suggest: 1. isolate the BSEL1 CPU pin from the circuit. 2. run a logic 1 (3.3V) signal to BSEL1 . Test if this is necessary as it's supp osedly an output pin. 3. connect a 0 (GND) signal to PLL FSLb pin. Test if this is necessary as someti mes a disconnect is the same as a 0. Explanation: (2) makes the CPU believe its running in 200Mhz (800Mhz FSB) mode so it doesn't apply multiplier clamping. (1) then hardwiring the output of BSEL 1 logic as seen by any other chips (eg: PLL, northbridge, GM965) to operate in P M45's 266Mhz mode (1066Mhz FSB). [B]Precedents for success? [/B] [URL=""]PM965 (800fsb) c hipset and a 1066 MHz fsb cpu...[/URL] thread has comments[INDENT]kaltmond says: [I]T9400 wont´t post in my PM965 nb, confirmed...... [/I] Chaz, the moderators closes the thread with [I]Yeah, this thread has reached the end of its usefulness . . read the previous posts. 1066MHz FSBs do not work in the mobile 965 chipset. End of story.[/I][/INDENT] [URL=""]1066 FSB CPU wit h 800MHz PM965[/URL] thread has RickAbraham tell us:[INDENT][I]I was talking wit h a bloke from a local PC repair shop and I watched him fit a T9600 processor in to a Dell laptop running the PM965 Santa Rosa platform which is only 800MHz. The processor was fully compatiable which shocked me and I watched the machine boot up after the installation was complete. But what I want to know is are you goin g to get the full gain using a 1066 FSB when the chipset apparently doesnt suppo rt it. I have read on other forums that the PM965 refresh chipset is a freak som e claim that it will support 8gb of ram and others claim 6gb of ram. Would the m obo downclock the CPU to 800 FSB or has anyone tested this upgrade and can prove that the chipset will run at 1066MHz ?? I am interested to find out.[/I][/INDEN T] Pls report your results.[/SPOILER][COLOR=BLUE][SIZE=3][B]Acknowledgement[/B][/SI ZE][/COLOR]

Thanks go to nando4, for providing so much useful information and guidance as we ll as the NBR community for sharing their PLL pinmod experiences for others to b enefit from. ________________________________________________________________________________ _______ This guide is linked from [url=]Repair4Laptop: Do-It-Yo urself Laptop & Notebook Upgrading, Modding, Repairing[/url].