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A LAB MANUAL ON

ANALOG COMMUNICATION + LIC
Subject Code: 06ECL58
(As per VTU Syllabus)

PREPARED BY

Staff members - Dept. of E&C

No.132, AECS Layout, I.T.P.L. Road, Kundalahalli, Bangalore- 560 037

ANALOG COMMUNICATION LAB MANUAL, V SEM ECE

CONTENTS
EXPT. NO. 1 2 3 4 5 6 NAME
OF THE

EXPERIMENT

Active low pass & high pass filters –second order Active band pass & band reject filters –second order Schmitt trigger design and test a Schmitt trigger circuit for the given values of UTP and LTP Frequency synthesis using PLL Design and test R-2R DAC using OP-AMP. Design and test the following circuits using IC 555 a) Astable multivibrator for given frequency and duty cycle b) Monostable multivibrator for given pulse width W.

7 8 9 10 11 12

Class-C single tuned amplifier Amplitude modulation using Transistor/FET (Generation and Detection) Pulse Amplitude modulation and Detection PWM and PPM Frequency modulation using 8038/2206 Precision Rectifiers- both Full Wave and Half Wave

DEPARTMENT OF E&C, CMRIT

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ANALOG COMMUNICATION LAB MANUAL, V SEM ECE CYCLE WISE EXPERIMENTS SEM: V EXAM MARKS: 50 BRANCH: ECE IA MARKS: 25 SUBJECT: ANALOG COMMUNICATION & LIC LAB SUB CODE: 06ECL58 CYCLE - 1 1) Active low pass & high pass filters –second order 2) Active band pass & band reject filters –second order 3) Schmitt trigger design and test a Schmitt trigger circuit for the given values of UTP and LTP CYCLE - 2 4) Frequency synthesis using PLL 5) Design and test R-2R DAC using OP-AMP. 6) Design and test the following circuits using IC 555 (a) Astable multivibrator for given frequency and duty cycle (b) Monostable multivibrator for given pulse width W. CYCLE - 3 7) Class-C single tuned amplifier 8) Amplitude modulation using Transistor/FET (Generation and Detection) 9) Pulse Amplitude modulation and Detection CYCLE - 4 10) PWM and PPM 11) Frequency modulation using 8038/2206 12) Precision Rectifiers- both Full Wave and Half Wave

DEPARTMENT OF E&C, CMRIT

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ANALOG COMMUNICATION LAB MANUAL, V SEM ECE EXPERIMENT N0. 1(A) SECOND ORDER ACTIVE LOW PASS FILTER AIM: To obtain the frequency response of an active low pass filter for the desired cut off frequency. COMPONENTS REQUIRED: Resistors- 33KΩ, 10KΩ, 5.86 KΩ Capacitors 2200pF, opamp –μA 741 DESIGN For a 2nd order Filter, F H = 1 / 2πRC Hz

Let FH = 2 KHz and R = 33 KΩ ∴ 2 ∗ 10 3 = 1 / 2 π ∗ 33 ∗ 10 3 ∗ C ∴ C = 2200 pF

The pass band gain of the filter, AF = (1+R f / R1) For a second order filter, AF = 1.586, Let R1 = 10KΩ ∴ RF = 5.86 kΩ

L o w

p a s s
R 1 1 0 K

c i r c u i t

D i a g r a m
R 1 f 0 k

0
R 3 3 k R 3 3 k

u A 3 +

V+ 7 4 V1 V o 4

2

-

7

0

V

1 C 2 2 0 0 2 P f C 2 0 0 P f

0 0

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ANALOG COMMUNICATION LAB MANUAL, V SEM ECE PROCEDURE: 1. Before wiring the circuit, check all the components. 2. Design the filter for a gain of 1.586 and make the connections as shown in the circuit diagram. 3. Set the signal generator amplitude to 10V peak to peak and observe the input voltage and output voltage on the CRO 4. By varying the frequency of input from Hz range to KHz range, note the frequency and the corresponding output voltage across pin 6 of the op amp with respect to the gnd. 5. The output voltage (VO) remains constant at lower frequency range. 6. Tabulate the readings in the tabular column. 7. Plot the graph with ‘f ‘on X-axis and gain in dB on Y axis. RESULT:

DEPARTMENT OF E&C, CMRIT

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AF = (1+R f / R1) For a second order filter. CMRIT 6 .86 KΩ Capacitors 2200pF. COMPONENTS REQUIRED: Resistors.86 k Ω H i g h p a s s R 1 1 0 K c i r c u i t D i a g r a m R 1 f 0 k 0 C C u A 3 + f R V+ 7 4 V1 2 - 7 V o 2 V 1 2 0 0 P f2 2 0 0 P 4 0 R 3 3 k 3 3 k 0 0 DEPARTMENT OF E&C. 10KΩ. FL= 1 / 2πRC Hz Let FL = 2 KHz and R = 33 KΩ ∴ 2 ∗ 10 3 = 1 / 2 π ∗ 33 ∗ 10 3 ∗ C ∴ C = 2200 pF The pass band gain of the filter. V SEM ECE EXPERIMENT N0.586. 5. AF = 1.ANALOG COMMUNICATION LAB MANUAL. 1(B) SECOND ORDER ACTIVE HIGH PASS FILTER AIM: To obtain the frequency response of an active high pass filter for the desired cut off frequency.33KΩ. Let R1 = 10KΩ ∴ RF = 5. opamp –μA 741 DESIGN: For a 2nd order Filter.

output voltage on the CRO. note the frequency And the corresponding output voltage across pin 6 of the op amp with respect to the gnd. 5-. Set the signal generator amplitude to 10V peak to peak and observe the input voltage In addition. 6. Tabulate the readings in the tabular column. RESULT: DEPARTMENT OF E&C.The output voltage (VO) remains constant at lower frequency range.ANALOG COMMUNICATION LAB MANUAL. 4. check all the components. Before wiring the circuit. V SEM ECE PROCEDURE: 1. CMRIT 7 . 2. Design the filter for a gain of 1. By varying the frequency of input from HZ range to KHA range. 7. Plot the graph with ‘f ‘on X-axis and gain in dB on Y axis. 3.586 and make the connections as shown in the circuit diagram.

86 k Ω The Center frequency FC = √ FH ∗ FL Hence FC = 4. (i) F= 1 / 2πRC Hz For High pass section Let FL = 2 KHz and R = 33 KΩ ∴ 2 ∗ 10 3 = 1 / 2 π ∗ 33 ∗ 10 3 ∗ C ∴ C = 2200 pF (ii) For low pass section Let FH = 10 KHz And R = 33 kΩ ∴ 10 ∗ 10 3 = 1 / 2 π ∗ 33 ∗ 10 3 ∗ C ∴ C = 470 pF The pass band gain of the filter. CMRIT 8 . 10KΩ.86 KΩ Capacitors 2200pF.5 KHz DEPARTMENT OF E&C. 2(A) SECOND ORDER ACTIVE BAND PASS FILTER AIM: To obtain the frequency response of an active band pass filter for the desired cut off frequency and to verify the roll off. AF = 1.33KΩ. COMPONENTS REQUIRED: Resistors. 5.ANALOG COMMUNICATION LAB MANUAL.586. opamp –μA 741 DESIGN: For a 2nd order Filter. Let R1 = 10KΩ ∴ RF = 5. V SEM ECE EXPERIMENT N0. AF = (1+R f / R1) For a second order filter.

Set the signal generator amplitude to 10V peak to peak and observe the input voltage And output voltage on the CRO. Before wiring the circuit. 5-. Plot the graph with ‘f ‘on X-axis and gain in dB on Y axis. By varying the frequency of input from Hz range to KHz range. 6. 2. 8 k V+ 7 4 V16 V o 4 0 3 C V 0 V 1 R C R u A + V+ 7 4 V- 0 R 3 + C ' 0 4 0 0 0 PROCEDURE: 1. 8 k 5 . 7. Tabulate the readings in the tabular column. Design the two filters for the desired cut off frequencies and make the connections as shown in the circuit diagram. 4. check all the components. note the frequency And the corresponding output voltage across pin 6 of the op amp with respect to the gnd. V SEM ECE CIRCUIT DIAGRAM:B A R 1 0 k 7 2 N 1 D P A S S R f F IL T E R R 1 1 0 k 2 u 1 6 R V o C ' A 7 R f 5 . 3. RESULT: DEPARTMENT OF E&C. CMRIT 9 .The output voltage (VO) remains constant at lower frequency range.ANALOG COMMUNICATION LAB MANUAL.

86 k Ω DEPARTMENT OF E&C.01 ∗ 10 -6 ∴ R = 1.86 KΩ Capacitors 2200pF . AF = 1. opamp –μA 741 DESIGN: For a 2nd order Filter.586.59 k Ω (ii) For low pass section Let FH = 2 KHz And R = 33 k Ω ∴ 2 ∗ 10 3 = 1 / 2 π ∗ 33 ∗ 10 3 ∗ C ∴ C = 2200 pF The pass band gain of the filter.01 µF. V SEM ECE EXPERIMENT N0 2(B) SECOND ORDER ACTIVE BAND REJECT FILTER AIM: To obtain the frequency response of an active band reject filter for the desired cut off frequency and to verify the roll off.33KΩ. CMRIT 10 . 10KΩ. 5. Let R1 = 10K Ω ∴ RF = 5. AF = (1+R f / R1) For a second order filter. COMPONENTS REQUIRED: Resistors. (ii) F= 1 / 2πRC Hz For High pass section Let FL = 10 KHz and C = 0.ANALOG COMMUNICATION LAB MANUAL. F L = 1 / 2πRC Hz ∴ 10 ∗ 10 3 = 1 / 2 π ∗ R ∗ 0.

The output voltage (VO) remains constant at lower frequency range.This gain is necessary to guarantee Butterworth filter response. To simplify the design.586 R1 . Set the signal generator amplitude to 10V peak to peak and observe the input voltage And output voltage on the CRO. Because of the equal resistor R2=R3 and C2=C3 values the pass band voltage gain AF = (1+R f / R1) of the second order low pass and high pass filter has to be equal To 1. 7-. 0 1 u R F 0 .Plot the graph with ‘f ‘on X-axis and gain in dB on Y axis. 8 K R 5 = 3 . 3. check all the components. 8 K F I L T E R 0 S U M M E R 7 4 16 R 2 = 1 0 k R 4 = 1 0 k u A H I G H P A S S S E C TC I O N C 0 . Hence choose the value of R1 <100K and calculate the value for RF 5. Before wiring the circuit.e. note the frequency And the corresponding output voltage across pin 6 of the op amp with respect to the Ground. By varying the frequency of input from HZ range to KHA range. RESULT: DEPARTMENT OF E&C. 2. V SEM ECE CIRCUIT DIAGRAM:- B A N D R 1 1 0 k 2 R E J E C T R f 5 7 .C T I O N V+ u A 7 4 16 V3 + R 3 = 1 0 k C ' C ' 0 PROCEDURE: 1.3 K + 0 0 L O W R ' P A S S R ' S E. R f =0. Design the two filters for the desired cut off frequencies and make the connections as shown in the circuit diagram. Tabulate the readings in the tabular column. 8.ANALOG COMMUNICATION LAB MANUAL.586 i. 9 . set R2=R3=R and C2=C3=C then choose a value of C <=1 µF Calculate the value of R using the equation R= 1 / (2 π ∗ fH ∗ C) R’=1 / (2 π ∗ fL ∗ C ) 4. 0 V- 3 1 u R + F V+ 4 V+ u A 7 4 V4 16 2 - 3 0 R 1 1 0 k 2 R 7 f = 5 . 6. CMRIT 11 4 7 .

The feedback voltage Va depends on the output voltage as well as the reference voltage. the feedback voltage is Va. In this circuit the op-amp acts as a comparator. 3 DESIGN AND TEST A SCHMITT TRIGGER CIRCUIT FOR THE GIVEN VALUES OF UTP AND LTP AIM: Design a square wave generator for a given UTP and LTP. COMPONENTS REQUIRED: Op-Amp .2kΩ .1. The input voltage at which the output changes from + Vsat to – Vsat is called Upper Threshold Point (UTP) and the input voltage at which the output shifts from – Vsat to + Vsat is called Lower Threshold Point (LTP). CMRIT 12 . Here the output shifts between + Vsat and –Vsat. When the input voltage is greater than Va. the output shifts to – Vsat and when the input voltage is less than Va.1 THEORY: Schmitt Trigger is also known as Regenerative Comparator. A Zero Cross Detector is also a comparator where op-amp compares the input voltage with the ground level. the output shifts to + Vsat. This is a square wave generator which generate a square based on the positive feedback applied.ANALOG COMMUNICATION LAB MANUAL. Such a comparator circuit exhibits a curve known as Hysterisis curve which is a plot of Vin vs V0. V SEM ECE EXPERIMENT NO. As shown in the fig. The input voltage is applied to the inverting terminal and the feedback voltage is applied to the non-inverting terminal. 2. below. The output is a square wave and inverted form of the input.µA741 – 1 Resistors – 1kΩ . It compares the potentials at two input terminals. DEPARTMENT OF E&C.

Va = UTP Va = LTP ∴ [ ( Vsat R2 ) / ( R1 + R2) ] + [ ( Vref R1 ) / ( R1 + R2 ) ] = UTP ------. When V0 = . CMRIT 13 .(1) ∴ [ ( . V SEM ECE CIRCUIT DIAGRAM: Schmitt Trigger + V c c 7 1 U 6 U 4 5 A 7 4 1 R 1 2 . ∴ I1 + I2 = 0 I1 = ( V0 – Va ) / R1 I2 = ( Vref – Va ) / R2 ∴ ( V0 – Va ) / R1 + ( Vref – Va ) / R2 = 0 ∴ Va = ( V0 R2 + Vref R1 ) / ( R1 + R2 ) When V0 = + Vsat.T the current into the input terminal of an op-amp is zero.ANALOG COMMUNICATION LAB MANUAL. W.2V Let I1 be the current through R1 and I2 be the current through R2. 2 k 1 3 2 + - V o V i n - V c c R 2 1 k + V r e f Zero Cross Detector + 3 2 V c c 7 1 U 6 U 4 5 A 7 2 + - V o 4 1 V i n - V c c DESIGN: Given UTP = + 4V and LTP = .Vsat.K.Vsat R2 ) / ( R1 + R2 ) ] + [ ( Vref R1 / (R1 + R2 ) ] = LTP -------(2) (1)– (2) ⇒ ( 2 Vsat R2 ) / ( R1 + R2 ) = UTP – LTP = 6V DEPARTMENT OF E&C.

Another method of measuring UTP and LTP is using the Hysterisis Curve. Measure the input voltage at this point. This voltage is LTP. 7 R 2 = 3 R1 Assume R2 = 1kΩ ∴ R1 = 2. Rig up the connections as shown in the circuit diagram. 2. and check whether it matches with the designed value. we get Vref = 1.2kΩ (1) + (2) ( 2 Vref R1 ) / ( R1 + R2 ) = UTP + LTP = 2V Simplifying the above equation. This voltage is UTP. Coincide the point where the output shifts from – Vsat to + Vsat with any point on the input wave. 9. To plot the hysterisis curve give channel 1 of CRO to the output and channel 2 of CRO to the input. DEPARTMENT OF E&C. Give a sinusoidal input of 10V peak to peak and 500 Hz from a signal generator. 6 (square wave). Check the output at pin no. Adjust the grounds of both the knobs. 8. 6. 11. 5. 7. 3.4V PROCEDURE: 1. CMRIT 14 . V SEM ECE Simplifying this equation we get. Measure the input voltage at this point. Press the XY knob. 10. 4. Coincide the point where the output shifts from + Vsat to – Vsat with any point on the input wave.ANALOG COMMUNICATION LAB MANUAL. Measure UTP and LTP as shown in the fig.

Vsat NOTE: The same circuit can be designed for different values of UTP and LTP. RESULT: UTP DEPARTMENT OF E&C.10 Zero Cross Detector V0 10 0 .10 t t t HYSTERISIS CURVE: V0 + Vsat Vin LTP . R 1= 10kΩ. For UTP = 4V and LTP = 2V. V SEM ECE WAVEFORMS: Vin 5 4 0 -2 -5 Schmitt Trigger V0 10 0 .ANALOG COMMUNICATION LAB MANUAL. R2 = 1kΩ and Vref = 3. Check whether the circuit works properly for these values. CMRIT 15 .3V.

Efficiency is more than 78% and it increases with decrease in conduction angle. Because of the parallel resonant circuit.ANALOG COMMUNICATION LAB MANUAL.01mf 15k 22 BF194 - QUANTITY 1 1 1 1 1 1. DESIGN: F O = 1/2π√LC Let L = 100 µF and C = 470 pF ∴ F O = 1 / 2 ∗ 3.142 ∗ √ 100 ∗ 10 -6 ∗ 470 ∗ 10 -12 F O = 734 KHz DEPARTMENT OF E&C. CMRIT 16 . 3 4. 5 6 7 THEORY: COMPONENTS Dc Regulated Power Supply Ammeter Inductor Capacitors Resistors Transistor CR0 Probe Springs Springs RANGE +5V 0 -10MA 100MH 470Pf 1000mf 0. 1 1 1 1 10 Class – C Tuned Amplifier Amplify Large signal at radio frequency with better frequency response. 2. It is used in radio transmitters and receivers with class – c operation the collector current flows for less than half a cycle. The max efficiency of a tuned class –c amplifier is 100% the Ac voltage drives the base and an amplified and inverted signal is then capacitive coupled to the load resistance. A parallel resonant circuit can filter the pulses of collector current and produce a pure sine wave of output voltage.TUNED AMPLIFIER AIM: To design and test a class c – tuned amplifier to work at f0 = 734 kHz and to find its max efficiency at optimum load COMPONENTS REQUIRED SLNO 1. V SEM ECE EXPERIMENT N0 4 CLASS – C . the output voltage is max at resonant frequency f0 = 1/2xLC On either side of the voltage gain drops off shown class – C is always intended to amplify a narrow ban of frequency.

The max optimum load is 400 and conduction angle 0 = 77. Make the connections as shown in circuit diagram set input signal frequency to the tuned circuit resonant frequency 2. Plot the graph of rl along x – axis and n across y – axis From the graph. Tabulate the reading in tabular column\ 4. V SEM ECE T = 1/F O ∴ T = 1/ 734 ∗ 10 3 ∴ T = 1. DEPARTMENT OF E&C.No RL (Ω) V OUT ( Vin = 5 volts) I dc (mA) P ac = V O2/8RL P dc =VCC ∗I dc η = Pac/ Pdc % η (V) PROCEDURE 1.ANALOG COMMUNICATION LAB MANUAL. determine optimum load to calculate conduction angle the output is taken across emitter RESULT A class – C tuned amplifier Is designed to work at a reasonable frequency fo 734kHz. CMRIT 17 .36 µS R B C B ≥ 10 T O Where T O = 1/F O ∴ R B C B = 10 ∗ 1/ F O C B = 10 / F O ∗ R B Let R B = 15 k Ω ∴ C B = 10 / 734 ∗ 10 3 ∗ 15 ∗ 10 3 C B = 908 pF C B = 1000 Pf Use Standard Value CONDUCTION ANGLE θ = T e / T ∗ 360 0 Where Te = Time period across emitter T = time period across collector DUTY CYCLE D = ω / T Or D = θ / 360 0 TABULAR COLUMN: Sl. Vary input voltage to get an undistorted approx sine wave by keeping load resistance to a fixed value by varying load resistance note down the output voltage and calculate current Iac 3.

µA741 Resistors – 10kΩ .4 22kΩ . The output voltage corresponding to all possible combinations of binary inputs can be calculated as below. bread board. below shows D/A converter with resistors connected in R-2R form. Multimeter. Binary inputs are either in high (+5V) or low (0V) state. reliable and economical operation. V0 = . V SEM ECE EXPERIMENT N0 5 R-2R DAC USING OP-AMP AIM: Demonstrate Digital to Analog conversion for digital (BCD) inputs using R-2R network. In weighted resistor type more resistors are required and the circuit is complex.RF [ (b3/2R) + (b2/4R) + (b1/8R) + (b0/16R) ] Where each inputs b3. b2. As the number of binary inputs is increased beyond 4 even D/A converter DEPARTMENT OF E&C. THEORY: Nowadays digital systems are used in many applications because of their increasingly efficient. It is so called as the resistors used here are R and 2R. connecting wires. D/A converter in its simplest form uses an op-amp and resistors either in the binary weighted form or R-2R form. The fig. The great advantage of D/A converter of R-2R type is that it requires only two sets of precision resistance values. the data to be put into the microcomputer have to be converted from analog form to digital form. Since digital systems such as microcomputers use a binary system of ones and zeros. The circuit that performs this conversion and reverse conversion are called A/D and D/A converters respectively. b1 and b0 may be high (+5V) or low (0V). The binary inputs are simulated by switches b 0 to b3 and the output is proportional to the binary inputs. The analysis can be carried out with the help of Thevenin’s theorem. CMRIT 18 . COMPONENTS REQUIRED: Op-amp .6 Dual power supply.ANALOG COMMUNICATION LAB MANUAL.

linearity error. CMRIT + 3 19 .103)) + 0 + 0) ] V0 = . settling time etc.103)) + 0 + 0 + 0) Vref = 4V Case (ii) If Vref = 5V and b0 b1 b2 b3 = 0 1 0 0.0195 WAVEFORMS: R 2 R L A D D E R R N E T W O R K F 1 + v c c 7 5 2 R R R R 2 R 2 = 2 k U U 6 1 A 7 4 1 V o 0 2 L S B b 0 R b 1 2 R b 2 2 R b 3 2 R M S B . Therefore in critical applications IC D/A converter is used.5 = .25V DEPARTMENT OF E&C.0.1.5 volts change in output for LSB change . Vref[ (b3/2R) + (b2/4R) + (b1/8R) + (b0/16R) ] Case (i) If b0 b1 b2 b3 = 1 0 0 0 for 0.Vref [ (1 / (16 x 1.RF .v c c 4 1 0 V r e f 0 DESIGN: The equation for output voltage is given by V0 = . They re resolution. V SEM ECE circuits get complex and their accuracy degenerates.103 .RF [ (b3/2R) + (b2/4R) + (b1/8R) + (b0/16R) ] V0 = .20 x 103. 5 [ (0 + (1/ (8.20.1. Resolution = 0. then V0 = .ANALOG COMMUNICATION LAB MANUAL. Some of the parameters must be known with reference to converters.5V / 28 = 5 / 256 = 0.

3. Rig up the circuit as shown in the fig. . 6 of op-amp using multimeter or CRO. . . Tabulate the readings as shown. Test the op-amp and other components before rigging up the circuit. Observe the output at pin no.ANALOG COMMUNICATION LAB MANUAL. 1 1 1 1 PROCEDURE: 1. . V SEM ECE TABULAR COLUMN: Inputs b3 b2 b1 b0 0 0 0 0 . Calculate the resolution of the converter. RESULT: Output voltage Theoretical Practical DEPARTMENT OF E&C. Apply different combination of binary inputs using switches. 4. 6. 2. CMRIT 20 . 5.

astable and monostable multivibrator. the upper comparator of the timer triggers the flip flop in it and the capacitor begins to discharge through RB when the capacitor voltage reaches 1/3 Vcc the lower comparator is triggered and another cycle begins. the charging and discharging cycle repeats between 2/3 Vcc and 1/3Vcc for the charging and discharging periods t1and t2 respectively.1 4.1µF-1 Signal Generator.2 7. V SEM ECE Exp 6 . CMRIT 21 . Astable multivibrator is a free running oscillator has two quasi stable state in one state o/p voltage remains low for a time interval of Toff and then switches over to other state in which the o/p remains high for an interval of Ton the time interval Ton and Toff are determined by the external resistors a capacitor and it does not require an external trigger. when the capacitor voltage has reached this value.5kΩ .555 Resistors – 10kΩ . APPARATUS REQUIRED: Timer . CRO and connecting wires THEORY: A 555 timer is a monolithic timing circuit that can produce accurate and highly stable time delays or oscillations.ASTABLE MULTIVIBRATOR AIM: To design and verify the operation of astable multivibrator using 555 Timer for given frequency and duty cycle. when the power is switched on the timing capacitor begins to charge towards 2/3 Vcc through RA & RB.25k. Since the capacitor charges through RA and RB and discharges through RB only the charge and discharge are not equal as a consequence the output is not a symmetrical square wave and the multivibrator is called an asymmetric astable multivibrator DEPARTMENT OF E&C. DC power supply.01µF-1 0. some of the applications of 555 are square wave generator.1 Capacitors – 0.ANALOG COMMUNICATION LAB MANUAL.

ANALOG COMMUNICATION LAB MANUAL. CMRIT 22 . V SEM ECE CIRCUIT DIAGRAM: ASSYMETRIC MULTIVIBRATOR RA 7 D IS C H A R G E Vcc 8 VCC RESET 4 +5V RB 6 555 T H R E S H O LD OUT PUT 3 CRO 1 0.01u f 0 SYMMETRIC MULTIVIBRATOIR 5 C CONTROL 2 T R IG G E R GND Vcc+5V 8 VC C 7 4 RE SE T Ra DISCHARGE Rb D1 D2 555D 6 2 THRESHOLD TRIGGER GN D 1 OUTPUT 3 O/P CO NT RO L 5 C1 C2 0 DEPARTMENT OF E&C.

5K Since the duty cycle is 50%.1*10-6] Ra + 2Rb = 14.45/ [(Ra + Rb) C] Duty cycle = (Ra + Rb)/Ra + Rb) 1K = 1.5K Ra + Rb = 8.7K Assume Ra = 4.8K DEPARTMENT OF E&C.57K ≅ 10K SYMETRIC Given f = 1khz Duty cycle = 50% Charging time = Discharging time T = TON =TOFF T = 0.693(Ra + 2Rb) C F = 1.8K Rb = 7.ANALOG COMMUNICATION LAB MANUAL.7K Rb = 9. Ra = Rb 2Ra = 14.45/ [(Ra + Rb) 0.25K ≅ 6.1*10-6] Ra + 2Rb = 14.5K Ra = 7. V SEM ECE DESIGN: ASSYMETRIC: Given f = 1khz Duty cycle = 60% T = 0.45/ [(Ra + 2Rb) C] Duty cycle = (Ra + Rb)/Ra + 2Rb) 1K = 1.25K ≅ 6.693(Ra + Rb) C F = 1.45/ [(Ra + 2Rb) 0. CMRIT 23 .

ANALOG COMMUNICATION LAB MANUAL.45/(Ra + Rb) Ton Toff T F DY WAVEFORMS: Upper threshold voltage Lower threshold Vc at pin 6 2/3VCC 1/3VCC 0V Vout 5V at pin 3 0V t Toff t Ton Result: DEPARTMENT OF E&C. Calculate the duty cycle D. Verify that Vcmax=2/3Vcc and Vc min=1/3 Vcc 6. CMRIT 24 . V SEM ECE PROCEDURE: 1. Observe the wave form on CRO at pin 6 and measure Vcmax and Vc min 5. Switch on the DC power supply unit 3. Observe the wave form on CRO at pin 3 and measure the o/p pulse amplitude 4. o/p frequency and verify with specified value TABULAR COLUMN Ra Rb C F(theo) = 1. Connections are made as shown in the circuit diagram 2.

01u f 25 . APPARATUS REQUIRED: Timer . the threshold comparator resets the flip flop in the timer which discharges C and the output is driven low the circuit will remain in this state until the application of the next trigger pulse.1µF-1 Signal Generator.MONOSTABLE MULTIVIBRATOR AIM: To design and verify the operation of monostable multivibrator using 555 Timer for given Pulse width.1 Capacitors – 0. CMRIT 0 0. on the application of external negative trigger pulse at pin 2 the circuit is triggered and the flip flop in the timer is set which in turn releases the short across C and pushes the output high. V SEM ECE Expt 7. DC power supply. When the voltage across the capacitor reaches 2/3 Vcc.555 Resistors – 10kΩ . the output of it is normally low and it corresponds to reset of the flip flop in the timer. At the same time the voltage across C rises exponentially with the time constant R AC and remains in this state for a period RAC even if it is triggered again during this interval. CRO and connecting wires THEORY: Monostable multivibrator has a stable state and a quasi stable state. Vcc +5V CIRCUIT DIAGRAM: 8 BY127 Rt VCC 2 RESET T R IG G E R T H R E S H O LD 6 4 RA Input Ct 555 CRO 3 OU T P U T CONTROL GND D IS C H A R G E 7 C 0 1 5 DEPARTMENT OF E&C.ANALOG COMMUNICATION LAB MANUAL.01µF-1 0.

2. V SEM ECE DESIGN: Given Tp = 1ms F = 1KHz T = 1.. CMRIT 26 .09 K ≅ 10K PROCEDURE: 1.1RC Tp(prac) DEPARTMENT OF E&C. Observe the waveform across the timing capacitor in one channel and the output in the other channel. Rig up the circuit as shown in the figure after checking all the components. TABULAR COLUMN R C Tp = 1.1uF R = (1*10-3 ) / (1. 4.1*0. Verify the designed values and the repeat the above procedure for different set of values.1R C Let C = 0.ANALOG COMMUNICATION LAB MANUAL. Apply suitable inputs to the astable multivibrator (DC & Trigger inputs) 3.1*10-6 ) R = 9.

capacitors. connecting board. demodulate it. SL 100/BF 194 transistor. Also. Measure the modulation index using two different methods. AFT. V SEM ECE WAVEFORMS: Input trigger pulses T Trigger pulses at pin 2 t Vc c RESULT: Capacitor voltage Vc at pin 5 Upper threshold voltage 2/3*Vcct t Output pulse at pin 3 T p T t Result: EXPERIMENT N0 7 COLLECTOR MODULATION Aim: .To generate AM signal. resistors. diode 0A79. DEPARTMENT OF E&C. connecting wires and CRO. CMRIT 27 .ANALOG COMMUNICATION LAB MANUAL.IFT. information signal given the collector. Components Required:.

01microF 2 2 470k 1 1 120 0.01microF -6v COLLECTOR AMPLITUDE MODULATION Theory: The modulator is a linear power amplifier that takes the low-level modulating signal and amplifies it to a high power level. In the absence of the modulating input signal. The secondary winding of the modulation transformer is connected in series with collector supply voltage Vcc of the Class C amplifier. the collector supply voltage will be DEPARTMENT OF E&C. CMRIT 28 .ANALOG COMMUNICATION LAB MANUAL. The modulating output signal is coupled through a modulating transformer to the Class C amplifier. Therefore. This means that modulating signal is applied in series with the collector power supply supply voltage of the Class C amplifier applying collector modulation. there will be zero modulation voltage across the secondary of the transformer. V SEM ECE Circuit Diagram:AFT (GREEN) MESSAGE SIGNAL OPEN FM = 2kHz VAMPL = 5v(p-p) VCC +6v IFT (RED) o/p AM wave BF 194 0.

the a. Set the carrier frequency to 2v and 455 kHz. Design:Let fm= kHz m= RC>>tc or RC≤ (1/mωm) Or RC/3= (1/mωm) ωm=2πfm Assuming value of C=0. Set the modulating signal to 5v and 1 kHz. 4. CMRIT 29 .c. Make connections as shown in figure. 5. check all components using multimeter.01μF Substituting value of C and fm=1 kHz. we get R=9. DEPARTMENT OF E&C. Before wiring. voltage across the secondary of the modulating transformer will be added to and subtracted from the collector supply voltage. Design the collector modulator circuit assuming fm=1 kHz and m=0.ANALOG COMMUNICATION LAB MANUAL. The tuned circuit then converts the current pulses into an amplitude-modulated wave.5kΩ ≈ 10kΩ m= (Vmax-Vmin)/ (Vmax+Vmin) Vm= (Vmax-Vmin)/2 Waveform:- Procedure:1. When the modulating signal occurs.01μF. This varying supply voltage is then applied to the Class C amplifier resulting in variation in the amplitude of the carrier sine wave in accordance with the modulating signal. V SEM ECE applied directly to the Class C amplifier generating current pulses of equal amplitude and output of the tuned circuit will be a steady sine wave.5 take C=0. 2. 3.

Plot variation of output signal amplitude versus depth of modulation. and calculate modulation index. Tabulate the reading taken.ANALOG COMMUNICATION LAB MANUAL. CMRIT 30 . Observations:Vmax in volts Vmin in volts μ(mod index) Vm in volts Graph:m Vm Result:- EXPERIMENT N0 8 ENVELOPE DETECTOR Aim: . Plot the graph of modulating signal versus modulation index. Obtain trapezoidal pattern. 9. DEPARTMENT OF E&C.conduct an experiment to demonstrate envelope detector for an input AM signal. Feed AM output to Y-plates and modulation signal yo X-plates of CRO. 8. 7. V SEM ECE 6. Keep carrier amplitude constant and vary the modulating voltage in steps and measure Vmax and Vmin.

hence the name to it. Circuit Diagram:- 0A79 0. In an envelope detector. capacitors. only positive half of the AM wave appears across RC. CMRIT 31 . the output of the detector follows the envelope of the modulated signal. In the positive. diode is reverse biased and no current flows through R. the diode is forward biased and the capacitor C charges up rapidly to the peak value of the input signal. As a result. connecting board and CRO. Waveform:- DEPARTMENT OF E&C.ANALOG COMMUNICATION LAB MANUAL. During the positive half cycle. Figure above shows the circuit of an envelope detector. resistors. It consists of a diode and a resistor-capacitor filter. half cycle of the AM signal diode conducts and current flows through R whereas in the negative half cycle. the diode becomes reverse biased and the capacitor C slowly discharges through the load resistor RL. function generator. for which the percentage modulation is less than 100%. the diode conducts again and the process is repeated. When the input signal falls below this value. This circuit is also known as diode detector.6v AM SIGNAL 2 VAMPL = 2v FC = 455kHz MOD = 0. V SEM ECE Components required -0A79 diodes.5 FM = 2kHz 0. The discharging process continues until the next positive half cycle when the input signal becomes greater than the voltage across capacitor.1microF 1 6k output ENVELOPE DETECTOR Theory: An envelope detector is a simple and highly effective device that is well suited for the demodulation of a narrow band AM wave.

4. 2. 5. CMRIT 32 . Modulation index is given by m= (Vmax-Vmin)/ (Vmax+Vmin) 6. Plot the graph Vo versus modulation index m.01µf Let Rc>>fc Or RC=3/ (mωm) Substituting value of C and ωm in above equation we get. Before wiring the circuit. check all the components using the multimeter. Tabular column:Modulation index m Output in volts Vo Graph:DEPARTMENT OF E&C. 3. R=10 kΩ Procedure:1. Make the connections as shown in the figure. Vary the modulation index knob. note down the Vmax and Vmin simultaneously. V SEM ECE Design:Let fm=1 kHz m= fc=455 kHz C=0. and note down the output voltage the output VO in steps. From the function generator apply the AM wave to the input.ANALOG COMMUNICATION LAB MANUAL. Therefore.

ANALOG COMMUNICATION LAB MANUAL. CMRIT 33 . V SEM ECE Vo m Result: DEPARTMENT OF E&C.

7. 2.1 micro F 1. CRO probes Voltage supply Capacitors Mother board DEPARTMENT OF E&C. 3. COMPONENTS IC 8038 Signal generator Resistors RANGE (0-100)MHz 10 k ohms 4.7k ohms. CMRIT 34 .00 micro F QUANTITY 1 1 4 1 1 1 2 1 1 1 4. 5. COMPONENTS REQUIRED: SL. V SEM ECE EXPERIMENT N0 9 FREQUENCY MODULATION USING IC 8038 AIM:To design and conduct an experiment to generate FM wave IC8038 with f= 33 kHz. NO 1. 82k ohms. 22k ohms. 12 V 0.ANALOG COMMUNICATION LAB MANUAL. 6.

CMRIT 35 .3/RC Let R=10k ohms Therefore C =0.ANALOG COMMUNICATION LAB MANUAL.001*10-6F Calculation Frequency deviation =Fmax-Fmin Modulation index= Frequency deviation / fm GRAPH: DEPARTMENT OF E&C. V SEM ECE DESIGN: Let R=Ra=Rb Let f=33 kHz f= 3*(2*Ra-Rb)/10*Rac*Ra Substituting for R&C in above equation. we get f=0.

ANALOG COMMUNICATION LAB MANUAL. saw tooth and pulse waveforms with a minimum number of external components. The IC 8038 waveform generator is a monolithic integrated circuit capable of producing high accuracy sine square . triangular. CMRIT 36 . DEPARTMENT OF E&C. V SEM ECE THEORY: Frequency modulation: FM is that form of angle modulation in which the instantaneous frequency is varied linearly with the message signal.

V SEM ECE Block diagram of ICL 8038 Basic principle of IC 8038 The operation of IC 8038 is based on charging and discharging of a grounded capacitor C.ANALOG COMMUNICATION LAB MANUAL. The triangular wave is then passed through the on chip wave shaper to generate sign wave. the capacitor charges at a rate determined by current source Ia . When switch is at position A. we get square wave at the output of Flip flop and triangular wave across capacitor. the upper comparator (CMP 1) triggers and reset the flip-flop out put. By making. This causes the switch position to change from position B to A. output waveforms are asymmetrical. Now. Once the capacitor reaches lower threshold voltage. DEPARTMENT OF E&C. when two currents are unequal. whose charging and discharging rates are controlled by programmable current generators Ia and Ib. For equal magnitudes of Ia and Ib. the lower comparator (CMP 2) triggers and set the flip-flop output. capacitor charge discharging at the rate determined by the current sink Ib . output waveforms are symmetrical conversely. currents Ia and Ib are made programmable through an external control voltage Bi. And this cycle repeats. one of the currents much larger than other we can get saw tooth waveform across capacitor and rectangular waveform at the output of flip-flop. To allow automatic frequency controls. CMRIT 37 . Once the capacitor voltage reaches Vut. This causes a switch position to change from position A to B. As a result.

5V and frequency of 1 kHz. RESULT: The frequency modulation is seen and the transmission bandwidth was found to be ……………kHz. using Schottky-barrier diodes and thin film resistors. 2. and the output is stable over a wide range of temperatures and supply variations.-12V from the supply. 4.ANALOG COMMUNICATION LAB MANUAL. For small deviations. Switch on signal generator and apply the signal amplitude of 0. CMRIT 38 . the modulating signal can be applied to pins. An external resistor between pins 7and 8 is not necessary but it can be used to increase input impedance from about 8k. Show the graph of message carrier and modulation signal. The sine wave has relatively high output impedance. The circuit may use a simple op_amp follower to provide a buffering gain and amplitude adjustments.It should be same as design carrier frequency. Apply +12. Observe the output between pin 2 and ground. The IC 8038 is fabricated with advanced monolithic technology. V SEM ECE Working The frequency of the waveform generator is direct function of the dc voltage at terminal 8. frequency modulation is performed. 5. EXPERIMENT NO 11 DEPARTMENT OF E&C. 6. Observe the sinusoidal waveform at pin 2. Sketch the waveforms. merely providing dc-dc coupling with a capacitor. By altering this voltage. 3. Rig up the circuit as shown in the figure. PROCEDURE: 1.

V SEM ECE PULSE AMPLITUDE MODULATION AIM: To conduct an experiment to generate PAM signal and design a circuit to demodulate the PAM signal COMPONENTS REQUIRED: SLNO 1 2 COMPONENTS Transistor Resistor RANGE SL 100 22 K Ω 4. PAM is achieved simply by multiplying the carrier with the m (t) signal. The Output is a series of pulses. As shown in fig. If enough samples are taken. This is known as PAM.1 µ f 0A79 30MHZ QUANTITY 1 3 1 1 1 1 1 2 1 3 4 5 6 THEORY: Capacitor Function Generator Diode Signal Generator CRO In PAM the amplitude of the pulses are varied in accordance with the modulating signal. P U L S E A M P L I T U D E M O D U L A T I O N V c c + 5 V Q 1 C E S L 1 0 0 1 0 K B 2 2 K C ( t ) m ( t ) 4 . The form of pulse Amplitude modulation shown in the circuit diagram is referred to as natural PAM because the tops of the pulses follow the shape of the modulating signal. the amplitude of which vary in proportion to the modulating signal. The balanced modulators are frequency used as multipliers for this purpose.ANALOG COMMUNICATION LAB MANUAL. CMRIT 39 . a reasonable approximation of the signal being sampled can be constructed at the receiving end. (Denoting the modulating signal as m (t). 7 K V o DEPARTMENT OF E&C. the samples are taken at regular interval of time.7K Ω 10 K Ω 680 Ω 0.

CMRIT 40 . R>1/FcC Let Fc =15 kHz and C=0. V SEM ECE D E M O U L T I O N D 1 O A P A M 7 9 R C I / P 6 8 0 0 . EXPERIMENT NO 12 DEPARTMENT OF E&C. 4. PAM) signal to the demodulation circuit and observe the signal if it matched plot the waveform RESULT: The circuit to generate PAM signal and to demodulate the PAM signal were designed and the waveform were observed.1μF Therefore R~680Ω PROCEDURE: 1. 5. Now connect the O/p(i. Connect the CRO at the emitter of the transistor and observe the Pam waveform.e.ANALOG COMMUNICATIONDLABAMANUAL. Set the i/p Signal amplitude to around 1V (p-p) and frequency to 2 kHz. 1 u F D E M O D O / P DESIGN Fc>> 1/RC i. Set the carrier amplitude to 2 Vpp and in the frequency of 5 kHz to 15 kHz. 2. 3..e. Make the Connections as shown in circuit diagram.

01 µ f ± 12 V 30MHZ 15 QUANTITY 3 3 1 2 1 2 3 1 15 W M M O D U L A T I O N 1 k H c ( t ) V+ 7 4 16 V- > 1 k H 1z 0 k 7 4 V- 16 2 u A 7 3 4 P W M O / P + 0 0 4 DEPARTMENT OF E&C. this means the transmitter must be powerful enough to handle the max width pulses. Three variations of PWM are possible. the tail edge is held in constant and w. V SEM ECE PULSE WIDTH MODULATION AIM : To Conduct an Experiment to generate a PWM Signal for the given analog signal of frequency less than 1 kHz and to design a demodulation circuit. The PWM has the disadvantage when compared to ‘PDM’ that its pulses are of varying width and therefore of varying power content. CMRIT 41 . the leading edge of the pulse is held constant and change in the pulse width with signal is measured with respect to the leading edge. P m ( t ) z 1 0 k R 1 V+ 2 u 3 + A 7 1 0 K COMPONENTS Op. COMPONENTS REQUIRED SLNO 1 2 3 4 5 6 7 8 THEORY: Pulse width Modulation (PWM) is also known as Pulse duration Modulation (PDM).r. the pulse width is measured in the third variation. In One variation. the centre of the pulse is held constant and pulse width changes on either side of the centre of the pulse.Amp ( µ A – 741) Resistors Capacitor Function Generator DC Regulated Power supply Signal Generator CRO Probes CRO Springs RANGE ± 12 V 10 K Ω 15K Ω 0. In other Variable.t to it.ANALOG COMMUNICATION LAB MANUAL.

Draw PWM Waveform 6. CMRIT 42 . 0 1 u F 4 0 0 DESIGN RC >>T Time Period Tp=0. a circuit to demodulate the PWM signal is designed and the output is observed. Set the carrier amplitude to 2vpp and frequency ≥ 1 KHz (Say 1 5khz) 3.01µF Fc=1/2пR2C2 Fc=1KhZ Let R2=15KΩ C2=0. 0 1 u 3F n + 1 M0 k C 7 4 16 V- P W M O / P R 2 = 1 5 k C 2 m ( t ) 0 . 5. Observe the o/p signal at pin 6of 2nd op-amp and observe the variation in pulse width by varying the modulating signal amplitude. Now connect the output to the demodulate circuit and observe the signal it matches with m(t) RESULT: The circuit to generate a PWM signal is designed and the output waveforms are observed. DEPARTMENT OF E&C.ANALOG COMMUNICATION LAB MANUAL.1ms R1C1=Tp Let R1=10K C1=0.01µF PROCEDURE: 1. In addition. V SEM ECE D E M O D U L A T I O N R 1 2 u A 2 7 V+ P W I/ P 1 0 . 2. Set the signal amplitude to 2 Vpp and frequency < 1khz (Say 560 kHz) 4. Make the connections as shown in the circuit diagram.

01μF Therefore R=18KΩ PROCEDURE DEPARTMENT OF E&C.ANALOG COMMUNICATION LAB MANUAL. COMPONENTS REQUIRED: SLNO 1 2 3 5 6 7 8 THEORY : In this type of modulation . Any pulse has a leading edge and trailing edge in this system the leading edge is held in fixed position while the trailing edge varies towards or away from the leading edge in accordance to the instantaneous value of sampled signal COMPONENTS Op – amplifier 555 . CMRIT 43 5 . the amplifier and width of the pulses is kept constant while the position of each pulse with reference to the position of a reference pulse is changed according to the instantaneous sampled value of the modulating signal.01mf + 5v 30mhz QUANTITY 1 1 1 1 2 1 2 1 m ( t ) z 1 0 k R 1 2 u 3 + A V+ 7 1 0 K Vcc +5V 1 k H c ( t ) > 2 K V+ H 1 z0 k 7 4 16 V- 2 7 8 u A BY127 4 Rt VCC 2 RESET T R IG G E R T H R E S H O LD 6 RA 7 4 16 V- 3 4 P W M O / P + Input Ct 555 D IS C H A R G E 7 C 0 CONTROL 4 CRO 3 OU T P U T GND 1 0 0 0. V SEM ECE EXPERIMENT NO 13 PULSE POSITION MODULATION AIM : To conduct an experiment to generate PPM signal of pulse width(between 100 ms and 200ms) for a given modulating signal. Pulse position modulation is observed from pulse width modulation.01u f 0 DESIGN Pulse Width = 200μs Tp=1.1 RC Let C=0.Timer Resistors Capacitor Dc Regulated Power Supply Function Generator CRO RANGE Ma – 741 10 K Ω 18 K Ω 0.

4. Draw the PPM waveform RESULT The circuit to generate a PPM signal of pulse width 200 ms is designed and the output waveform of PPM was observed. 3.PRECISION RECTIFIER DEPARTMENT OF E&C. Make the connections as shown in the circuit diagram. 2. 11 .ANALOG COMMUNICATION LAB MANUAL. V SEM ECE 1. se the signal amplitude to around 2v (p-p) and frequency around (< 1khz) Observe the output signal at pin no : 3 of the 555 timer and also observe the variation in pulse position by varying the modulating signal amplitude 5. CMRIT 44 . EXPT. Set the carrier amplitude to around 4v (p-p) and frequency = 1khz.

3 22kΩ . V SEM ECE AIM: Design and test the working of Full Wave Precision Rectifier using op-amp.2 THEORY: Precision Rectifier name itself suggests that it rectifies even lower input voltages i. CMRIT 45 4 .1V in the -ve cycle DEPARTMENT OF E&C. Hence the simplified circuit is an inverting amplifier connected in series with a noninverting amplifiers.The precision rectifier we are using is a full wave rectifier. The simplified circuit will act as two inverted amplifiers connected in series. Normal rectifiers using transformers cannot rectify voltages below 0.3kΩ . voltages less than 0.5V in the +ve cycle = +0.ANALOG COMMUNICATION LAB MANUAL. so we go for precision rectifiers.10kΩ .7v. Here in the positive half cycle D1 is forward biased and D2 is reverse biased. which converts AC voltage to DC voltage. D1 is reverse biased and D2 is forward biased.7v (diode drop). Precision rectifier converts AC to pulsating DC. Consider the circuit diagram shown below.1 3.µA741 -1 Resistors . Hence the output will be inverted and a DC output (unidirectional) is obtained . 3 K 2 2 3 7 V i n R = 1 0 2 k3 1 + V c c 6 U A 7 4 V o u t 1 7 R = 1 0 k R = 1 0 k G N D DESIGN: R 2 = Given : Vo = +0.e.BY127 . Hence the total gain will be the product of individual gains. COMPONENTS REQUIRED: OP-Amp . A rectifier is a device. During the negative half cycle.V c c 4 + + . CIRCUIT DIAGRAM: R 1 = 2 2 k D + V c c 6 U A 7 4 1 D 3 . In this circuit the diodes are placed in such a way that one diode is forward biased in the positive half cycle and the other in the negative half cycle.1 Diodes .V c c .

V c c 4 + + k B 3 . Vin = 0. the simplified circuit will be shown below.V ( (1 / 30k) + (1 / R2) ) DEPARTMENT OF E&C.25 = 2 Assume R = 10kΩ . During the negative half cycle.ANALOG COMMUNICATION LAB MANUAL.V c c - 2 7 . I2 = -V / ( R1+R ).25V ∴ R1 / R = 0. I3 = -V / R2 Vin / 10k = . then R1 = 20kΩ NOTE: A DRB can be used in the place of R1 and that resistance can be adjusted to 20KΩ or 22KΩ resistance can be used.5 / 0. v ∴ V = (-R1 / R) Vin V0 = (-R / R)V = (-R / R) (-R1 / R) Vin V0 = (R1/R) Vin As V0 = 0. CMRIT 46 4 . V SEM ECE During the +ve half cycle the simplified circuit will be as shown below. V I1 V i n R = A 1 0 R I 2 1 R R + V c c 6 U A 7 4 1 2 3 + V c c 6 U A 7 4 V o u t 1 7 I 3 G N D R 2 V Applying KCL at point A I1 = I2 + I3 From virtual ground concept VA = 0 ( VB = 0) ∴ I1 = Vin / R .5V.

WAVEFORMS: Vin 0.9 R2 = 3k V0 0.75 R2 / ( R2 + 30k ) Substituting this in the equation (2) we get V0 = (1 + 1 / 3) (0. Design the same circuit for a different set of values.1 DEPARTMENT OF E&C.ANALOG COMMUNICATION LAB MANUAL. Check and verify the designed values. 3.0. Give an input of 0. 2.0.0.3kΩ PROCEDURE: 1.25 t 0. 4.5V peak to peak (sine wave).25 / 10k = . V SEM ECE As Vin = .25 0 .25 ∴ .1 R2 + 3k = R2 ∴ R2 = 3.75 R2 / (R2 + 30k) ) 0.5 0. CMRIT 47 .V ( (R2 + 30k) / (30k x R2 ) ) ∴ V = 0. Rig up the circuit as shown in the circuit diagram.25 / 10k = -V ( (1 / 30k) + (1 / R2) ) --------(1) As the second Op-Amp works as a non inverting amplifier V0 = (1 + (R / R1) + R) V = (1 + (10k / 30k) ) V ---------(2) From (1) V = .0.

V SEM ECE 0 t RESULT: Viva questions for analog communication lab 1. Define the word communication. 2. What is Transmitter. CMRIT 48 . What are the basic components of electronic communication. DEPARTMENT OF E&C. 3.ANALOG COMMUNICATION LAB MANUAL.

What are the advantages of using pre and de-emphasis? 46.Define pre-emphasis and De-emphasis? 45.Where SSB transmission is used? 34.Differentiate between butter-worth and cheybeshev filter? 40.What is the principle of Envelope detector? 33.Define modulation index? 21.Define noise? 14. What is frequency domain display? 23. What is the maximum total power of AM wave? 26.State the equation for noise factor for cascade connection? 19.What is noise factor? 18.What are the classification of filters? 39. State two types of communication? 7.What is quadrature null effect? 42.Define amplitude modulation? 20. What is baseband transmission? 9.What is shot noise? 16. What is receiver 5.What is the position of the operating point of class-C? 30.What is the advantage of SSB over DSB-SC? 31.Define selectivity? 41.Define the basic sources of noise? 15.What is Nyquist criteria? 36. Define a low level modulation? 28.Define FM? 43.Define the carrier signal? 11. CMRIT 49 .What is Roll-off factor? 37.Define the order of the filter? 38. What is baseband signal? 8.List of some advantages of FM over AM? 47.What is the classification of modulation? 12. What is the need for modulation? 10. What is communication channel? 6. What is maximum power of sideband of AM? 25.State sampling theorem? 35.What is percentage modulation? 44.What is frequency deviation? 13. Define a high level modulation? 27.State the bandwidth required for amplitude modulation? 22.What is the function of Transistor mixer? 32. What is time domain display? 24.Define signal to noise ratio? 17.ANALOG COMMUNICATION LAB MANUAL.Define wideband FM? DEPARTMENT OF E&C.Why amplitude modulation is used for broadcasting? 29. V SEM ECE 4.

State advantages of PWM? 50.State various Pulse modulation methods? DEPARTMENT OF E&C. CMRIT 50 . V SEM ECE 48.What is carson’s rule? 49.ANALOG COMMUNICATION LAB MANUAL.