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Solar Energy 78 (2005) 727–738 www.elsevier.

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A new control scheme of a cascaded transformer type multilevel PWM inverter for a residential photovoltaic power conditioning system
Feel-soon Kang a,*, Su Eog Cho b, Sung-Jun Park c, Cheul-U Kim b, Toshifumi Ise d
Department of Control and Instrumentation Engineering, Hanbat National University, San 16-1, Duckmyoung, Yuseong, Daejeon 305-719, Korea b Department of Electrical Engineering, Pusan National University, San 30 Changjurn-dong, Kumjung-gu, Pusan 609-735, Korea c Department of Electrical Engineering, Chonnam National University, 300 Yongbong-dong, Puk-gu, Gwangju 500-757, Korea d Department of Electrical Engineering, Graduate School of Engineering, Osaka University, 2-1, Yamada-oka, Suita, Osaka 565-0871, Japan Received 2 March 2004; received in revised form 7 June 2004; accepted 13 September 2004 Available online 3 November 2004 Communicated by: Associate Editor Arturo Morales-Acevedo
a

Abstract From the viewpoint of high quality output voltage generation in a residential photovoltaic system, a multilevel inverter employing cascaded transformers can become a good substitute for the conventional pulse width modulated inverters and other multilevel counterparts. However, to obtain more sinusoidal output voltage waves, it should increase the number of switching devices and transformers resulting in a cost increase. To alleviate this problem, an efficient switching pattern is proposed and applied to a multilevel inverter equipped with two cascaded transformers, which have a series-connected secondary. Operational principle and analysis are illustrated focusing on a change of the switching pattern. High-performance of the proposed multilevel scheme embedded in a photovoltaic power conditioning system is verified by computer-aided simulations and experimental results. Ó 2004 Elsevier Ltd. All rights reserved.
Keywords: Cascaded transformer; Multilevel inverter; Photovoltaic system; Pulse-width-modulated inverter

1. Introduction Residential photovoltaic (PV) power conditioning systems generally employ a voltage source pulse-width* Corresponding author. Tel.: +82 42 821 1172; fax: +82 42 821 1164. E-mail address: feelsoon@ieee.org (F.-S. Kang).

modulated (PWM) inverter to convert power from dc to ac. The inverter should be equipped with features such as high quality output voltage waves, voltage and frequency within the allowable limits, less harmonic generation by the inverter in itself to avoid damage to electronic appliances, and other requirements (Rashid, 2001). From the viewpoint of high quality output voltage generation and reduction of dv/dt stress on power

0038-092X/$ - see front matter Ó 2004 Elsevier Ltd. All rights reserved. doi:10.1016/j.solener.2004.09.008

k means the number of cascaded transformers in Table 1). Kang et al. Recently. so called 3k-level inverter. If the number of cascaded transformers is boundless. which have a series-connected secondary as similar as that of 3k-level inverter (here. To alleviate this problem. which have a series-connected secondary.. Table 2 shows the switching function of the 3k-level inverter.-S. 2002). However. Proposed multilevel PWM inverter based on 3k-level inverter Fig. 1994.2 (V) command voltage (V) input dc voltage (V) solar array voltage (V) Abbreviations ADCIN analog inputs to the ADC DSP digital signal processor FB full-bridge INT interrupt MPPT maximum power point tracking PV photovoltaic SPWM sinusoidal pulse width modulation T1UF timer 1 underflow CPU central processing unit EMI electromagnetic interference FFT fast fourier transform ISR interrupt service routine PWM pulse width modulation RF radio frequency T1P timer 1 period THD total harmonic distortion switching devices in residential photovoltaic systems. and cascaded full-bridge cells with separate dc sources are not useful for this application (Lai and Peng. Tr. / Solar Energy 78 (2005) 727–738 Nomenclature a1 a2 Ip k m n % Ppv DPpv SFB1 SFB2 V1 V2 Vcom Vdc Vp turn-ratio of the first transformer (Tr. the output voltage levels are infinite which is similar to analogue one. 2003). It employs two transformers. it should increase the number of switching devices and other components. 2000). 2003). It shows good performance to synthesize stepped output levels once it is equipped with at least three transformers. However. the application to a residential PV system is encouraged since the multilevel inverter with cascaded transformers can produce high quality output voltage with good harmonic characteristics owing to a large number of output levels. multilevel inverters can substitute for the conventional PWM inverters (Calais et al. an efficient switching pattern is proposed and applied to this kind of multilevel inverter equipped with two cascaded transformers. Owing to the different turnratio of each transformer and the ability of each fullbridge to create three different voltages across the primary winding. a multilevel inverter employing cascaded transformers. So conventional multilevel inverters such as diode-clamped. the voltage at the ac terminal can be comprised of 3k-levels as listed in Table 1. The validity of the proposed multilevel scheme is verified by simulation and experimental results based on a residential photovoltaic power conditioning system prototype. 2. 1999. Kang et al. From the viewpoint of the generation of high quality output voltage waveforms.2) solar array current (A) the number of cascaded transformers the number of output levels output voltage level the modulus operator in C-language solar power (W) the slope of Ppv switching function of the first inverter module switching function of the second inverter module terminal voltage of the first transformer.. Tolbert and Peng. a large number of transformers can cause a cost increase. flying capacitors. The advantage of this multilevel scheme is the relatively accurate replica of a sinusoidal wave accomplished with low switching frequencies (Calais et al. The performance of the proposed multilevel PWM inverter is compared with conventional counterparts. Rodriguez et al..1 (V) terminal voltage of the second transformer.. Operational principle and analysis are illustrated focusing on a change of the switching pattern. Tr. It automatically has galvanic isolation between a photovoltaic system and output loads by employing cascaded transformers. and manufacturing problems (Kang et al. Kang et al.728 F. has been considered for PV applications (Thomas.1) turn-ratio of the first transformer (Tr. which have a series-connected secondary. 2003). It covers each switching function up to that . 1996.. 1 shows a configuration of the proposed multilevel PWM inverter. 1999. to obtain more sinusoidal output voltage waveforms by means of synthesizing a great number of output levels..

it can be obtained by multiplying À1 to Table 2. 0. 0. the elimination of the transformer without proper compensations causes low-order harmonics to increase. However. i. Fig.1 1:a 1:3a Tr. 1.k Á Á Á 1:3k À 1 a 3k-level 1:a 3-level 1:9a 27-level of a 27-level inverter (k = 3). Therefore. We can obtain a 9-level output with the prior switching function as listed in Table 2 using the circuit shown in Fig. SFB1 repeats 1 and À1. it can be easily obtained by multiplying À1 to Table 3. It includes a transition procedure of each switching function. Table 1 Number of output combinations Cascaded transformers Turns ratio Output levels according to combinations Tr.2 V1 Vo V2 Fig. 2(a) with the terminal voltages of each transformer. For example.2 1:3a 9-level Á Á Á Tr. Configuration of the proposed multilevel PWM inverter (9-level PWM). Specially. +3aVdc. In the proposed multilevel PWM inverter. ÀaVdc. While the output voltage is maintained at a certain constant level.F. and À3aVdc) from the terminal of the second transformer (V2). So the possible combination by adding both outputs becomes nine levels. a case where a PV system has limitations on its volume and weight. It lists each switching function required to generate positive output levels. Table 3 shows new switching functions for the prior 3k-level inverter. and SFB2 plies 0 and 1 at the same time.e. À2aVdc.1 levels according Tr. +2aVdc. +aVdc. / Solar Energy 78 (2005) 727–738 729 Q11 Q13 Q21 Q23 Vdc Q12 Q14 Q22 Q24 Tr.-S. 2(b) shows operational modes of the proposed multilevel PWM inverter. and ÀaVdc) from the terminal of the first transformer (V1). the switching function should repeat up and down movements to be operated in PWM state as shown in Table 3.3 to the cascaded Tr. 1: three different levels (+aVdc. one of the simple solutions is to minimize the number of transformer in this multilevel scheme. À4aVdc. in mode II. 0. this problem is compensated with adding a pulse width modulation technique by changing a switching pattern. It only lists a positive switching function. It is not sufficient to produce high quality output voltage because of the intervals between steps resulted in an increase of low-order harmonics. Here the highlighted parts are the switching function for synthesizing a 9-level out- put (k = 2). À3aVdc. In a negative case. and the other three levels (+3aVdc.. the output voltage repeats between +aVdc and +2aVdc sustaining the Table 2 Each output level and its corresponding switching function Output level (n) Switching functions SFB1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 0 1 À1 0 1 À1 0 1 À1 0 1 À1 0 1 SFB2 0 0 1 1 1 À1 À1 À1 0 0 0 1 1 1 SFB3 0 0 0 0 0 1 1 1 1 1 1 1 1 1 Each transformerÕs terminal voltage V1 0 aVdc ÀaVdc 0 aVdc ÀaVdc 0 aVdc ÀaVdc 0 aVdc ÀaVdc 0 aVdc V2 0 0 3aVdc 3aVdc 3aVdc À3aVdc À3aVdc À3aVdc 0 0 0 3aVdc 3aVdc 3aVdc V3 0 0 0 0 0 9aVdc 9aVdc 9aVdc 9aVdc 9aVdc 9aVdc 9aVdc 9aVdc 9aVdc Output voltage Vo 0 aVdc 2aVdc 3aVdc 4aVdc 5aVdc 6aVdc 7aVdc 8aVdc 9aVdc 10aVdc 11aVdc 12aVdc 13aVdc . In a negative case. Expected output voltage waveforms are drawn in Fig. Kang et al. +4aVdc.

25 T aVdc V1 -aVdc 0 V1 0 aVdc .aVdc 0 aVdc V2 0 0 3aVdc 3aVdc 3aVdc Vo 0 aVdc 2aVdc 3aVdc 4aVdc 0 1 2 3 II IV I III 0 0.aVdc 3aVdc 0 3aVdc V2 V2 0 4aVdc 3aVdc -3aVdc 4aVdc 3aVdc 2aVdc aVdc Vo aVdc 0 2aVdc MODE Fundamental Output Level I 0 II aVdc III 2aVdc IV 3aVdc Vo 0 SFB1 I II III IV 0 1 1 -1 -1 0 0 1 0 MODE 0. Owing to a symmetrical configuration. Kang et al. we used a quarter portion of one cycle. to . To determine them.730 F. the switching function of SFB1 is determined as where a1 = a. it takes a unity when a command level is equivalent or higher than the second level of the output voltage. it takes a zero when a command level is lower than the second level of output voltage. fundamental level +aVdc and showing a chopped effect. 0.À1}. and SFn is the switching function of the full-bridge inverter. the switching function of SFB2 is determined as if ðn < 2Þ then S FB2 ¼ 0 if ðn P 2Þ then S FB2 ¼ 1 ð1Þ ð2Þ if ðn%3 ¼ 0Þ then S FB1 ¼ 0 if ðn%3 ¼ 1Þ then S FB1 ¼ 1 if ðn%3 ¼ 2Þ then S FB1 ¼ À1 ð3Þ ð4Þ ð5Þ where % means the modulus operator of C-language. and À1. Here. In contrast. respectively. all variables are assumed as an integer. i. 2. a2 = 3a.. Based on this basic idea. the output voltage of the proposed multilevel PWM inverter is given as Vo ¼ 2 X n¼1 S FBn Á an Á V dc ¼ ð3S FB2 þ S FB1 Þ Á a Á V dc ð6Þ Here n means the number of fundamental output voltage levels. For example. To produce the fundamental output levels. / Solar Energy 78 (2005) 727–738 Table 3 Revised switching functions of the 3k-level inverter (k = 2) Fundamental Output Level (n) Switching Fuction Each transformer's terminal voltage Output Voltage SFB1 0 1 -1 0 1 SFB2 0 0 1 1 1 V1 0 aVdc .5T T SFB2 0 0 1 1 1 (a) (b) Fig. Key waveforms of the proposed inverter (9-level PWM output): (a) output voltage (Vo) and terminal voltage of each transformer (V1. it has three states. each switching function is determined by C-language expressions. 1. a positive portion is divided into four levels with the same height. Fig. Consequently. In case of SFB2.0.e.-S. 3 shows the principle to determine fundamental voltage levels and their proper durations.25T 0. and SFBn 2 {1. To synthesize the fundamental output levels. V2) and (b) operational modes.

Experimental set-up of the PV system employing the proposed 9-level PWM inverter. 5(b). INT2 interrupt sources are Timer 1 period (T1PINT) and underflow interrupts (T1UFINT). Ip Buck Converter L Multilevel PWM Inverter Q11 Q13 Q21 Q23 QA IL Vp C Vdc Q12 Q14 Q22 Q24 Solar Array Tr. 4. Fig. / Solar Energy 78 (2005) 727–738 731 (n+1)Vdc nVdc (n-1)Vdc Vdc Vcom Vdc/2 B A 3. it is set to the beginning instant of the n Vdc output level. 4 shows a configuration of a PV system employing the proposed multilevel PWM inverter scheme. In the Timer 1 period interrupt service routine (T1PINT ISR).1 A/D Vp Ip ADCIN1 Tr. Residential PV system employing the proposed multilevel PWM Inverter Fig. Fig. respectively. the program initializes all variables to enable the desired interrupts and to start the timer. the program branches to the corresponding interrupt service routine (INT). and the proposed multilevel PWM inverter. . Determination of the fundamental output voltage level and duration. a battery. calculate the duration of n Vdc output level. the program Vdc/2 TN tn tn+1 t Fig. we set a point A as the middle value between (n À 1)Vdc and n Vdc. It consists of PV arrays. it is set to the finishing instant of the n Vdc output level. 5 shows the flowchart for the main program and its internal interrupt dispatcher and service routines. Kang et al.-S. and loops in the routines. and a point B as the middle value between n Vdc and (n + 1)Vdc. CPU interrupts INT2 and INT3 stop execution. When Vcom crosses with the point A. and the program branches to the corresponding interrupt service routines (ISR). During the duration. the switching functions iterate up and down movements proportionally increasing their pulse widths to make output voltage more sinusoidal.Q 14 Q21 .Q 24 ADCIN5 A/D LPF Duty Limit Proportional SFn Tk Integral Integrator with anti-windup Selection LEVEL + PWM ( +4aVdc ~ -4aVdc ) Gate-amp Antiwindup TMS320F241 Fig.F. a dc-to-dc buck converter. 3. And when Vcom crosses with the point B.2 1:3a Calculation 1:a ADCIN2 A/D Ppv Ppv Vref1 V1 Vo S/H V2 Vdc Vo ADCIN4 A/D Vref2 Vcom Determination Voltage & Duration QA Q11 . 5(a) shows the flowchart for the main program. As shown in Fig. First. once this is determined. A digital signal processor (DSP) TMS320F241 is used to control the proposed PV system.

reads two converted signals (Vp.732 F. (d) service routine for buck converter and (e) control routine for multilevel PWM inverter. INT3 Enable Timer 1 & 2 NO YES Interrupt Dispatcher for Buck Converter INT2 T1PINT ISR & Return T1UFINT ISR & Return T1UFINT NO YES Start Timer 1 & 2 RETURN (b) INT = ? NO Description INT2 : Interrupt 2 : Interrupt 3 : Timer 1 : Timer 2 : Underflow : Timer 1 Period Interrupt : Interrupt Service Routine : Analog inputs to the ADC INT3 T1 T2 UF T1PINT ISR ADCIN CONTROL ROUTINE NO Fault = ? T1UFINT : Timer 1 Underflow Interrupt END (a) START T1PINT ISR Read ADCIN1 & 2 for V p. Kang et al.-S. Flowchart for the software organization: (a) main program. 5. . Ip) from the ADCIN (analog inputs to the ADC) and starts power calculation (Ppv) and its slope (DPpv) to determine a maximum power point. (b) interrupt dispatcher for buck converter. / Solar Energy 78 (2005) 727–738 Main Program START Initialization T1PINT Enable interrupts INT2. Ppv(k) Service Routine for Buck Converter START T1UFINT ISR Read ADCIN4 for V dc Exacute DC/DC control Control Routine for Multilevel PWM Inverter INT3 Read ADCIN5 for V o Service Routine for Maximum Power Point Tracking (MPPT) PI control YES Ppv(k) Ppv(k-1) NO 0 Enable interrupt Generate command sine wave Determine output voltage & duration Ppv(k) YES Ppv(k-1) 0 NO RETURN (d) Select LEVEL+PWM from switching function array Voltage Source Region Current Source Region Enable interrupt Vp(k) Vp(k-1) 0 NO Vp(k) Vp(k-1) 0 NO RETURN YES YES (e) Vref1 (k-1) a Vref1 (k) Vref1 (k-1) a Vref1 (k) Vref1 (k-1) a Vref1 (k) Vref1 (k-1) a Vref1 (k) Enable interrupt Vp Ip Ppv Ppv : Voltage across solar array : PV current : Vp Ip : Calculated slope of Ppv RETURN (c) Fig. I p Calculate Ppv(k). (c) service routine for maximum power point tracking (MPPT).

(c) proposed 9-level PWM and (d) 27-level. Kang et al.F. Under a stable insolation. the P–V and I–V characteristics can be separated into two divisions. 6. One is a current source region. (b) 9-level.-S. Simulation results of output voltage and its spectrum characteristic: (a) 3-level PWM. and the other is voltage source region. / Solar Energy 78 (2005) 727–738 733 Fig. The maximum power point (MPP) of the PV array .

Service routine for maximum power point tracking shown in Fig. The former interrupted by Timer 1 period interrupt (T1PINT) is used to set a corresponding Vref1. In case of including PWM function. Once these are completed.734 F. When voltage across the battery decreases. and the amplitude modulation ratio is set to 0. After enabling interrupts. So the maximum power point tracker continuously follows the maximum power point. Kang et al.1. In the T2UFINT service routine. inverter stage stops operation. 1998). 5(c)). RF (radio frequency) noises and less harmonic generation by the inverter should be considered to avoid damage to electronic appliances. 6 shows each simulation result of the output voltage and its spectrum characteristic. The comparison focuses on dv/dt stress and switching noises according to the number of output voltage levels. 5(c) illustrates the detail of decision processes. Following that. the program generates the reference sine wave. it will discharge via the output load. Simulation and experimental results 4. the program enables the interrupts to allow servicing of T1INT when they are generated. .99. A dc-to-dc buck converter control consists of two loops. interrupts are disabled to restore the context from the stack. A case where the battery is fully charged. 7. Although the overall system control is implemented by a single DSP. and executes required voltage control algorithm.-S. the converter part including MPPT function and the inverter part are independently controlled. To assess the reliability of the proposed multilevel PWM inverter scheme. / Solar Energy 78 (2005) 727–738 lies at the boundary between two regions. It can be expressed as V ref1 ðkÞ ¼ V ref1 ðk À 1Þ Æ a ð7Þ and the program returns from the interrupt service routine (ISR). When the output current increases beyond 10% of rated current. the dc-to-dc buck converter will operate with the maximum duty cycle. Comparison of EMI noise source according to the number of output voltage levels As stand-alone photovoltaic power generation systems. Once this is determined. thus. and the solar array voltage will only change with the insolation. The only source of INT3 is Timer 2 underflow interrupt (T2UFINT). If a given perturbation leads to an increase or decrease in solar array output power. Coupling coefficient of each transformer was set to 0. the next perturbation is made in the same direction. it will maintain a constant voltage level: It means that the output current depends on the output load condition. One is the maximum power point tracking loop (Fig. 33-level. but other nonlinear stray components where a is the amount of disturbance and the sign of a is determined by the slope of calculated power. Prior to branching the next. the solar array is required to operate on the right side of the curve to perform the tracking process. and the other is output voltage regulation loop (Fig. low EMI (Electromagnetic interference). If there is no load in the output. it does not employ current regulation loop to recharge the battery. Fig. 4. Simulation results of output voltage and its spectrum result at 500 W. interrupts are re-enabled Fig. audio. The latter controlled Timer 1 underflow interrupt (T1UFINT) is used to maintain voltage across the battery constant. 5(d)). we first implemented computer-aided simulations using PSpice to various inverters: SPWM (sinusoidal pulse-width modulation) inverter (3-level). Otherwise. it automatically receives energy from the input solar array. According to the maximum power transfer theory. Thus the system cannot achieve maximum power tracking and might even mistake the present operating point for the MPP (Hua et al. Fig.8. 32-level. This is because T2UFINT is made interruptible by T1 interrupts. the contexts are saved in the stack. the program branches to the Timer 2 interrupt service routine.. its switching frequency was set to 20 (kHz). All simulation was considered on a no-load and a steady state. 5(e) shows a control routine for the proposed multilevel PWM inverter. and proposed multilevel PWM inverter (9-level PWM). the program read the output voltage.

2. / Solar Energy 78 (2005) 727–738 735 Q11 Q13 were ignored. In case of the proposed one.A. Fig. ðmÀ1Þ ¼4 2 Multi-winding outputs(4) Proposed 8 N.A. 8. Comparison of total harmonic distortion Total harmonic distortion (THD) of each inverter is given in Fig. Comparison of other multilevel inverters Table 4 shows a comparison of components with the conventional multilevel inverters: diode-clamped.7(%). It is simulation results considered up to 100-order harmonic components. Although an output spectrum of the proposed inverter has somewhat large value at switching frequency region.3. THD comparison of each inverter according to variation of load power. and cascaded FB-cell inverter. 4.A. Flying-capacitor (m À 1) · 2 = 16 N. its THD changes their value according to load power condition. 6(a). Among them. it shows bad characteristic in THD approx. Kang et al. Vdc1 Q12 Q14 Q21 Q23 Vdc2 Q22 Q24 Vo Q31 Q33 Vdc3 Q32 Q34 Q41 Q43 Vdc4 Q42 Q44 Fig. Cascaded FB-cell (m À 1) · 2 = 16 N.A. Without a proper LC output filter. 9. ðmÀ1ÞÂðmÀ2Þ ¼ 28 2 (m À 1) = 8 N.A. 8. the output voltage waveform shows nearly sinusoidal one with good harmonic characteristic. which is the result of 33level inverter. In the comparison of power switching devices. the best spectrum characteristic can be found in Fig.A.A. over 15(%) due to the increased low-order harmonics between steps. it is respectively small compared to that of sinusoidal PWM inverter shown in Fig. But once it employs an output filter. N. Table 4 Component comparison of proposed multilevel inverter and other counterparts Type Item Switch Clapmping-diode Balancing-capacitor DC-bus Transformer Diode-clamped (m À 1) · 2 = 16 (m À 1) · (m À 2) = 56 N. In practice. 1 Cascaded type(2) . output LC filter is not equipped with each inverter except SPWM inverter. Moreover it is reduced proportional to the increase of output power because leakage reactance of the cascaded transformer acts as a high-performance filter as shown in Fig. In this simulation. SPWM inverter shows high THD %9. (m À 1) = 8 N. we only considered the number of them for the sake of convenience.-S. 6(d). 4. 6(d). but it requires three large transformers operated in a low frequency and 12 switching devices for three full-bridge modules.A.F. flyingcapacitor. N. THD falls below 2(%). 7. As shown in Fig. In case of the 9-level inverter. Although THD is high at a light load. Configuration of the conventional cascaded FB-based inverter (9-level). it sufficiently meets the general requirement 5(%) below.

more- (a) (b) Fig. size. careful designs of each inverter and transformer are required considering the effect of power imposed on each transformer. Lots of balancing capacitors are a weak point of the flying capacitor type inverter. Table 5 Specifications of the prototype Items Power MOFET Cascaded transformers Battery (Vdc) PV array output Output (Vo) Specifications and features Inverter Converter EI lamination PT100BR (series) 9-level PWM FS100UMJ03 FDP038AN06 1:a. thus. Even if the proposed multilevel inverter does not employ additional output filters.2. 10(b) shows THD comparison results. 9 shows the configuration of the conventional cascaded FB cell type inverter. Fig. It is clear that the most outstanding advantage of the proposed multilevel PWM inverter is the considerable diminishment of the number of required components. the cascaded FB-cell type requires a large number of switching devices.-S. avoiding the transformer has the additional benefits of reducing cost. and we consider on the case of m = 9. Among them. / Solar Energy 78 (2005) 727–738 the proposed multilevel PWM inverter requires different current ratings of switching devices. In case of the circuit complexity. which has the same value of Vdc. To synthesize 9-level output voltage.736 F. Fig.625. and its frequency is set to 60 (Hz). the input voltage of the cascaded FB-cell (Vdc) would be DC 39 (V). the cascaded full-bridge cell type looks good to increase the number of output levels. On the whole. weight and complexity of the inverter. 10. For example. A resistive output load is added to increase the output power. Therefore. This is a simulation result considering line resistance. the conventional inverter shows high efficiency compared with the proposed one %2(%) over. the removal of the transformer and hence its galvanic isolation capability has to be considered carefully.625 . Kang et al. it shows good harmonic characteristic owing to the effect of filtering by means of the reactance of cascaded transformers In case of the cascaded FB-cell method. In Table 4. All output current (75%) flow via the lower full-bridge unit and TR. THD characteristic does not depend on the output power as shown in Fig. a = 1. Fig. Moreover. and the turn-ratio (a) of the proposed multilevel inverter becomes 1. 10(b). It is likely to be a drawback of the proposed multilevel PWM inverter scheme. Comparison of efficiency and THD between proposed inverter and cascaded FB-cell inverter: (a) comparison of efficiency and (b) comparison of total harmonic distortion. the instantaneous peak value of output voltage does not over four times as high as Vdc. stray capacitance and inductance. A weak point of this inverter is that it requires an individual input voltage source per individual FB cell. an instantaneous peak value of output voltage could not excess the sum of every individual input voltage source. it needs four FB cells. The target output voltage is AC 110 (V). m is the number of output levels. In case of the diode clamped. when it has four FB-bridge cells connected with each individual voltage source. 10(a) shows an efficiency comparison between the proposed multilevel inverter and the conventional cascaded FB inverter. However. 1:3a DC 24 V/100 A DC 51 V/20 A AC 110 V/60 Hz/500 W 30 V/100 A 60 V/80 A (parallel) Here. a large number of clamping diodes are the worst drawback. Of cause.

. both inverters show almost same computational complexity. (c) 300 W and (d) 500 W. (a) (b) (c) (d) Fig. Variation of output voltage waveform according to load power: (a) no-load. 13. we consider the number of controlled switching devices. 0–10 kHz. FFT results of output voltage: (a) no-load. Amplitude [V] 100 Amplitude [V] 0 20 40 60 80 100 100 50 0 50 0 0 2 4 6 8 10 (a) Frequency [kHz] (b) Frequency [kHz] Amplitude [V] Amplitude [V] 0 20 40 60 80 100 100 100 50 50 0 0 0 2 4 6 8 10 (c) Frequency [kHz] (d) Frequency [kHz] Fig. however. over.-S. As a result. 11.F. (c) 500 W. Experimental results of output voltage: (a) no load and (b) 500 W. 0–10 kHz. when it focuses on the simple system configuration and the generation of high quality output voltage with low harmonics and low dv/dt stresses. the proposed multilevel PWM inverter is the best one for the use of a stand-alone PV inverter among variable multilevel inverter schemes. each cell of the cascaded FB-cell type requires its own isolated power supply. (b) no-load. (b) 150 W. 0–100 kHz and (d) 500 W. 12. The provision of these isolated supplies becomes a limitation in the power electronic circuit design. the proposed method is little complex because it requires more computational time to synthesize fundamental level and PWM signal at the same time. / Solar Energy 78 (2005) 727–738 737 (a) (b) Fig. In case of computational complexity. Kang et al. 0–100 kHz.

The efficiency of the dc-to-dc buck converter and proposed multilevel inverter are measured independently.H..4. Kang.. 99–107. M. 2003. F. Rodriguez.. 11(b). Solar Energy 66 (5). Agelidis. The efficiency of the buck converter is nearly constant at 93(%). however it is slightly decreased with an increase of output power because of conduction losses. Measured efficiency of the proposed PV system. J. Finally. 1994. 11 shows experimental result waveform of output voltage at a no-load and full-load 500 (W). Electron. Applicat. 49 (4). C.. The proposed multilevel PWM inverter shows a good efficiency %92(%) at a no-load. The variation of the output voltage waveform can be found more clearly at Fig. 12. 11. S. 2169– 2174.J. . / Solar Energy 78 (2005) 727–738 Fig.. J. Multilevel Converters-A New Breed of Power Converters. pp.Z. Measured efficiencies are given at Fig. Operational principle and analysis were illustrated focusing on a change of the switching pattern. 14. All switching devices are power MOSFETs.. 45 (1). 325–335. M. F.. As output power increases. therefore.M. Multilevel Inverters: A Survey of Topologies. it does not require an output filter because high-order harmonics are effectively filtered off owing to the leakage reactance of the cascaded transformers. J. Power inverter for generating voltage regulated sine wave replica. it reduces dv/dt stresses on power switching devices resulting in low audio and RF noise. First. A case where the proposed multilevel PWM inverter is applied for the use of a stand-alone photovoltaic inverter. IEEE Trans. Ind.. 2002. 1996. Third.Z. 4.S. 539–562. Academic Press. 5. 1998. M.. References Calais. 1271–1274. F. Lai.S. C. IEEE Trans. IEEE Trans. L.. and Applications. 5373433. Rashid. Implementation of a DSPcontrolled photovoltaic system with peak power tracking. Kim. Peng. we can know that the proposed multilevel PWM inverter scheme largely depends on the load power condition. The high-performance of the proposed PV system employing the novel multilevel PWM scheme was verified by simulation and experimental results. In case of Fig. and then the total efficiency of the PV system was calculated. pp. Multilevel converters as a utility interface for renewable energy systems. F. it can convert power for ac utility from relatively low dc voltage sources by itself. 32 (3). 1999.. which has a series-connected secondary. Ind.738 F. Power Electronics Handbook. 724–738. Lai. G. 14. Thomas. it shows nearly sine wave. it can produce high quality output voltage wave with a good harmonic characteristic.S. Lin. J. Fig. 13 shows fast fourier transforms (FFT) results of Fig. Hua. Conclusion An efficient switching pattern was proposed and applied to the multilevel inverter equipped with two cascaded transformers. Second. 2000. Meinhardt.G.. Peng. In: Proceedings of IEEE Industrial Electronics Society Conference. Ind. Shen.-S.. Fourth. it has several promising advantages. US Patent no. pp. Kang et al. Experimental results Table 5 lists the specifications of the prototype of 500 W. the output voltage turns into nearly sinusoidal waveform owing to a filtering effect by means of leakage and series-connected inductances of the cascaded transformer. Park. Fig. 509–517. Peng. a galvanic isolation between a solar array and output loads by means of cascaded transformers increases the system reliability. Acknowledgment This work was supported by the Post-doctoral Fellowship Program of Korea Science and Engineering Foundation (KOSEF).. C. V. EMI problems. Multilevel Inverter employing Cascaded Transformers. it increases output voltage levels with the reduced number of switching devices. From these results.. Controls.. Multilevel converters for single-phase grid connected photovoltaic systems: an overview.. and EI laminated transformers are manufactured for the experiment. Tolbert. 2001. respectively. In: Proceedings of IEEE Power Engineering Society Summer Meeting.Z. Electron.U.