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# CHAPTER 4

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BIPOLAR JUNCTION TRANSISTOR
1980

1. Give reasons for the following (a) In a high junction transistor, the collector region has the highest resistivity and the emitter region has the lowest resistivity, the base region resistivity being in between. 2. Sketch the output V-I characteristics of an NPN transistor in common-emitter operation and indicate there on the different regions of importance. Explain how you would use these characteristics to determine hFE, ICBO and BVCBO of the transistor. 3. A silicon junction transistor operating at IE = 1 mA, VCE = 3V, has base-collector capacitory of 2 pf and base- emitter capacitance of 18pf. Determine the current gain bandwidth kT/q = 26mV at normal room temperature]

1981
1. Explain the following, with neat sketches wherever necessary: (a) Input and output V-I characteristics of a junction transistor. 2. Define the following terms relating to a bipolar transistor: (i) B VCEO (ii) fr (iii) Fmax (iv) Risc time (v) Storage time 3. A silicon n-p-n transistor with, hFE = 100 ICBO = 0.1 µ A. Calculate the IC for this transistor under following base circuit conditions: (i) IB = 0 (ii) IB = 20 µ A (iii) VBE = 0 (iv) VCB = 0. 4. Draw the Ebers Moll model for a bipolar transistor. And using this, show that the collector- emitter voltage drop of a saturated transistor is higher in the normal mode of operation than in the inverted mode of operation of the transistor. What is the practical use of this result?

1983
1. PROVE/ELABRATE the following: (i) Cut-off voltages of a silicon transistor and a germanium transistor.

2. For a small signal low frequency operation, write down v, I equations in terms of h parameters for common emitter (CE) configuration of a transistor. There from find out expressions for h parameters. 3. Draw an approximate h parameter model of a CE transistor configuration driven by voltage source R0 = 0, Ignore hre and hoe. Consider RL and RE as resistances in collector and emitter respectively.

1984 1. show that the transistor is in Saturation. A CE configuration of a transistor utilizes self or emitter bias. show that the transistor is in cut-off. Draw the complete hybrid-vs equivalent circuit of a transistor and find an expression for the short-circuit current gain 1986 1.4 volt. if the given transistor can be represented by the equivalent circuit shown in Fig. (b) If input voltage vi = 0. Which of these five connection has the lowest series resistance? Colloctor rc Ic =Ib Ideal Transistor Actual Transistor rb Base Ib 2. justify this by deriving an Emitter . +12V Ze E VA Is Z0 Q 100K 2K V0 E 12V (a) If input voltage vi= 12 volts. The stability factor S for a transistor is defined as rate of change of collector current with respect to reverse saturation current. Q. 1985 1.2 (b).4. 3(a) is known as a VBE multiplier. Assume ICBO of 10 nano-amperes at 25 degrees Centigrade and doubles for every 10 degrees Centigrade rise in temperature. The circuit shown in fig. The silicon transistor as connected in figure below has a minimum value of hFB of 30. Sketch five different connections in which a bipolar junction transistor can be used as a diode. Draw the circuit and derive the expression for the stability factor. Determine the series resistance in each case. (c) For the case (b) find the maximum temperature at which the transistor remain just cut-off.

Q + VCC I Ic = Ib R1 Q R2 Ib + VA - 3. Draw a sketch of VA versus I0. Q1 and Q2 are identical. Find I2 in the term of I0 + Vcc R I0 I2 = β 1b Q2 Ib Q1 1987 . In the circuit of Fig. Identify clearly the regions in which Q is ON and Q is OFF. 4(c).expression for VA.

∫ N = 0. Both emitter and collector junctions of a transistor are reverse biased by about 2 volts. State and prove Miller’s theorem.6V and hFE = 50 + 12 1 K 10 K VBB Fig. IEO(reverse saturation current of the emitter base diode) = 2 µA. In the circuit shown. 1989 1.96 . Determine the relation between I2 and Io. the common-base current gain under normal and reverse operations.6 µ a is used in a common emitter configuration with VCC = 12 and RC=4k. Q1 and Q2 are identical transistors with current gain β and Q2 has current gain β ’. 2. ICO=2 µ a and IEO=1. State how you will determine if it is a pnp or npn transistor and identify all three terminals using only a multimeter. Note that ∫ I ICO = ∫ N IEO .99 mA in its collector current for a change of 1. What do you mean by ‘saturation’ of a transistor? In the circuit show in Fig. Assume ICO (reverse saturation current of the collector-base diode) = 6 µA. where ∫ N and respectively. ( IES-EC-89)(17Marks) I0 R O3 Iz 1991 1. Define the terms f α . 1988 1.98. Apply it to unilaterlize the hybrid π equivalent circuit of a common emitter amplifier with a resistive load. Vg’sat = 0. Find IE and IC ∫ I are. Neglect VVE(sat). State clearly the assumptions involved. Assume VCE sat =0. Q. f β and f γ as applied to a transistor and establish the relations between them 2. 3.1 Calculate its common-base and common-emitter short-circuit . 2(a) 3. You are given a transistor whose terminals are unmarked. determine VDB to saturate the transistor. An npn transistor with aN =0.1.1.2a.0mA O2 O in its emitter current. Find minimum base current required to saturate the transistor and the voltage across each junction. and (Emitter and collector currents). A transistor exhibits a change of 0.

98. α 2 = 0. hoe = 50 x 10–6 Ω –1 and hfe = 55. Find also percentage error in the values obtained if hoe is neglected. connected in CE configuration. IC the voltage VCE and the ratios IC/IB and IC/IE.A transistor used in the amplifier circuit show in Fig. IB2. -12v RL 20000 Ω C1 R1 100K C2 R2 10K RZ 100K CE 1. IC2.current gains. IE1. IB = Q1 Q2 I C1 VCE IE 1. VCC C IC RC 1995 1998 1. RC = 120 Ω and IE=100 mA.99 and ICBO = 100nA. 1993 1. For the circuit shown in fig 3(a). The transistor. Calculate the current ICI IB1. Elucidate three consequences of the Early effect in bipolar junction transistors 2001 I C2 I E1 . while IB = 20 µ A. is in amplifying mode. Find ICEO. 3(a) has the following hparameters: hie = 800 Ω . IC and IE. Neglect reverse satuaration currents. All symbols carry their usual meanings.96 VCC = 24. The parameters of a certain transistor are α = 0. . α 1 = 0. Calculate the voltage and power gains of circuit.

saturation or in the active region. Indicate whether the β .value of a BJT increases or decreases with increase in the values of the following parameters: (i) base width.1. 2(c). Find if the transistor is in cutoff. what would be the minimum value of β such that the transistor is in saturation? Assume VCE Sat = 0.2 V. (iv) collector current. In the circuit shown in Fig. assume β = hFE = 100. 0. saturation and iverse region.ρ -n transistors for the following circuit +12V 2K Vin 2004 IC1 100 1K Vouty 2005 1. For the circuit shown in Fig. (ii) minority carrier lifetime in the base region. 2.1 mA 10 k 2009 . cut-off. 2007 +5V 1k + VBB Fig. (iii) temperature. A bipolar transistor has two junctions either one of which may be forward or reverse biased. Consider silicon n. With the help of Ebers-moll equations model the transistor circuit with a single set of equations describing there four regions 1.2(c) 1. we have four mods of operations-normal. 1. (v) collector voltage.

Show that these equations are true for any arbitrary geometry of the device.1 2010 1.-10 V 3K 7K 3V – + Re V0 500 Fig. . Obtain Ebers-Moll equations for a p-n-p bipolar junction transistor.