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INTEGRATED CIRCUITS

TDA3566A PAL/NTSC decoder


Product specication Supersedes data of March 1991 File under Integrated Circuits, IC02 February 1994

Philips Semiconductors

Philips Semiconductors

Product specication

PAL/NTSC decoder
FEATURES A black-current stabilizer which controls the black-currents of the three electron-guns to a level low enough to omit the black-level adjustment Contrast control of inserted RGB signals No black-level disturbance when non-synchronized external RGB signals are available on the inputs NTSC capability with hue control. QUICK REFERENCE DATA All voltages referenced to ground. SYMBOL Supply VP IP V8(p-p) CON supply voltage (pin 1) supply current (pin 1) 12 90 PARAMETER MIN. TYP. APPLICATIONS Teletext/broadcast antiope Channel number display. GENERAL DESCRIPTION The TDA3566A is a decoder for the PAL and/or NTSC colour television standards. It combines all functions required for the identification and demodulation of PAL/NTSC signals.

TDA3566A
Furthermore it contains a luminance amplifier, an RGB-matrix and amplifier. These amplifiers supply output signals up to 4 V peak-to-peak (picture information) enabling direct drive of the discrete output stages. The circuit also contains separate inputs for data insertion, analog and digital, which can be used for text display systems.

MAX.

UNIT

V mA

Luminance amplier (pin 8) input voltage (peak-to-peak value) contrast control 450 16.5 50 mV dB

Chrominance amplier (pin 4) V4(p-p) SAT input voltage (peak-to-peak value) saturation control 40 1100 mV dB

RGB matrix and ampliers V13, 15, 17(p-p) Data insertion V12, 14, 16(p-p) V9 V7 V7 input signals (peak-to-peak value) 1 V output voltage at nominal luminance and contrast (peak-to-peak value) 3.8 V

Data blanking (pin 9) input voltage for data insertion 0.9 V

Sandcastle input (pin 7) blanking input voltage burst gating and clamping input voltage 1.5 7 V V

ORDERING INFORMATION EXTENDED TYPE NUMBER TDA3566A PACKAGE PINS 28 PIN POSITION DIL MATERIAL plastic CODE SOT117

February 1994

February 1994
DELAY LINE sandcastle pulse 28 17 7 23 22 27 1 9 16 6 11 12 V brightness BLUE data insertion contrast blanking

Philips Semiconductors

luminance input B MATRIX CONTRAST BRIGHTNESS AMPLIFIER (4L) SANDCASTLE DETECTOR H BLACK LEVEL REFERENCE BLANKING LIN/LOG CONVERTOR BRIGHTNESS BURST GATING BLACK LEVEL CLAMPING V H blanking (BL3) DATA SWITCH STAGE BUFFER & BLANKING

PAL/NTSC decoder

AMPLIFIER

BLACK LEVEL INSERTION

BLUE output

BLACK LEVEL CLAMPING

20

saturation I2 L LOGIC & BUFFER STAGES (B Y) DEMODULATOR LEAKAGE CURRENT CLAMPING BUFFER (G Y) MATRIX isolation pulse (4L) clamp pulse (L3)

LIN/LOG CONVERTER

19

chrominance input GATED CHROMINANCE AMPLIFIER

DELAYED SWITCH-ON

CONTROLLED CHROMINANCE AMPLIFIER

GATED SATURATION CONTROL

TDA3566A

(L0)

clamp pulse (L2)

18

black current information (M) 14 GREEN insertion 15 GREEN output 21 blanking (BL1) clamp pulse (L1) 12

3
IDENTIFICATION PAL FLIP-FLOP (R Y) DEMODULATOR H/2 DETECTOR PAL SWITCH 2 90 o SHIFT (R Y) (B Y) REFERENCE SWITCH PHASE 8.8 MHz OSCILLATOR GATED BURST DETECTOR 25 24 26 8.8 MHz crystal (PAL) 12 V

PEAK DETECTOR

KILLER DETECTOR

CLAMPED DETECTOR

AMPLIFIER

RED insertion 13 RED output 10 blanking (BL1) clamp pulse (L1)

PAL/NTSC MODE SWITCH

MGA819

7.16 MHz crystal (PAL/NTSC)

For explanation of pulse mnemonics see Fig. 7.

Product specication

TDA3566A

Fig.1 Block diagram.

Philips Semiconductors

Product specication

PAL/NTSC decoder
PINNING SYMBOL VP IDDET ACCDET CHRIN SAT CON SC LUM DBL BCLR BRI RIN ROUT GIN GOUT BIN BOUT BLA BCL BCLB BCLG BY RY RCEXT RCEXT OSC GND CHROUT PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 supply voltage identication detection level Automatic Chrominance Control detection level chrominance control input saturation control input contrast control input sandcastle input luminance control input data blanking input black clamp level for RED output brightness input RED input RED output GREEN input GREEN output BLUE input BLUE output black current input black clamp level; referenced to black level black clamp level for BLUE output black clamp level for GREEN output demodulator input (BLUE) demodulator input (RED) gated burst detector load network gated burst detector load network oscillator frequency input ground chrominance signal output
VP IDDET ACCDET CHR IN SAT CON SC LUM DBL 1 2 3 4 5 6 7

TDA3566A

DESCRIPTION

28 CHR OUT 27 GND 26 OSC 25 RCEXT 24 RCEXT 23 R Y 22 B Y TDA3566A 21 BCL G 20 BCLB 19 18 17 16 15


MLA407

8 9

BCL R 10 BRI 11

BCL BLA B OUT B IN G OUT

R IN 12 R OUT 13 G IN 14

Fig.2 Pin configuration.

February 1994

Philips Semiconductors

Product specication

PAL/NTSC decoder
FUNCTIONAL DESCRIPTION The TDA3566A is a further development of the TDA3562A. It has the same pinning and nearly the same application. The differences between the TDA3562A and the TDA3566A are as follows: The NTSC-application has largely been simplified. In the event of NTSC the chrominance signal is now internally coupled to the demodulators, automatic chrominance control (ACC) and phase detectors. The chrominance output signal (pin 28) is thus suppressed. It follows that the external switches and filters which are required for the TDA3562A are not required for the TDA3566A. There is no difference between the amplitudes of the colour output signals in the PAL or NTSC mode. The clamp capacitor at pins 10, 20 and 21 in the black-level stabilization loop can be reduced to 100 nF provided the stability of the loop is maintained. Loop stability depends on complete application. The clamp capacitors receive a pre-bias voltage to avoid coloured background during switch-on. The crystal oscillator circuit has been changed to prevent parasitic oscillations on the third overtone of the crystal. Consequently the optimum tuning capacitance must be reduced to 10 pF. The hue control has been improved (linear). Luminance amplier The luminance amplifier is voltage driven and requires an input signal of 450 mV peak-to-peak (positive video). The luminance delay line must be connected between the IF amplifier and the decoder. The input signal is AC coupled to the input (pin 8). After amplification, the black level at the output of the February 1994 preamplifier is clamped to a fixed DC level by the black level clamping circuit. During three line periods after vertical blanking, the luminance signal is blanked out and the black level reference voltage is inserted by a switching circuit. This black level reference voltage is controlled via pin11 (brightness). At the same time the RGB signals are clamped. Noise and residual signals have no influence during clamping thus simple internal clamping circuitry is used. Chrominance ampliers The chrominance amplifier has an asymmetrical input. The input signal must be AC coupled (pin 4) and have a minimum amplitude of 40 mV peak-to-peak. The gain control stage has a control range in excess of 30 dB, the maximum input signal must not exceed 1.1 V peak-to-peak, otherwise clipping of the input signal will occur. From the gain control stage the chrominance signal is fed to the saturation control stage. Saturation is linearly controlled via pin 5. The control voltage range is 2 to 4 V, the input impedance is high and the saturation control range is in excess of 50 dB. The burst signal is not affected by saturation control. The signal is then fed to a gated amplifier which has a 12 dB higher gain during the chrominance signal. As a result the signal at the output (pin 28) has a burst-to-chrominance ratio which is 6 dB lower than that of the input signal when the saturation control is set at 6 dB. The chrominance output signal is fed to the delay line and, after matrixing, is applied to the demodulator input pins (pins 22 and 23). These signals

TDA3566A
are fed to the burst phase detector. In the event of NTSC the chrominance signal is internally coupled to the demodulators, ACC and phase detectors. Oscillator and identication circuit The burst phase detector is gated with the narrow part of the sandcastle pulse (pin 7). In the detector the (RY) and (BY) signals are added to provide the composite burst signal again. This composite signal is compared with the oscillator signal divided-by-2 (RY) reference signal. The control voltage is available at pins 24 and 25, and is also applied to the 8.8 MHz oscillator. The 4.4 MHz signal is obtained via the divide-by-2 circuit, which generates both the (BY) and (RY) reference signals and provides a 90 phase shift between them. The flip-flop is driven by pulses obtained from the sandcastle detector. For the identification of the phase at PAL mode, the (RY) reference signal coming from the PAL switch, is compared to the vertical signal (RY) of the PAL delay line. This is carried out in the H/2 detector, which is gated during burst. When the phase is incorrect, the flip-flop gets a reset from the identification circuit. When the phase is correct, the output voltage of the H/2 detector is directly related to the burst amplitude so that this voltage can be used for the ACC. To avoid 'blooming-up' of the picture under weak input signal conditions the ACC voltage is generated by peak detection of the H/2 detector output signal. The killer and identification circuits receive their information from a gated output signal of H/2 detector. Killing is obtained via the saturation control stage and the demodulators to obtain good suppression.

Philips Semiconductors

Product specication

PAL/NTSC decoder
The time constant of the saturation control (pin 5) provides a delayed switch-on after killing. Adjustment of the oscillator is achieved by variation of the burst phase detector load resistance between pins 24 and 25 (see Fig.8). With this application the trimmer capacitor in series with the 8.8 MHz crystal (pin 26) can be replaced by a fixed value capacitor to compensate for unbalance of the phase detector. Demodulator The (RY) and (BY) demodulators are driven by the colour difference signals from the delay-line matrix circuit and the reference signals from the 8.8 MHz divider circuit. The (RY) reference signal is fed via the PAL-switch. The output signals are fed to the R and B matrix circuits and to the (GY) matrix to provide the (GY) signal which is applied to the G-matrix. The demodulation circuits are killed and blanked by by-passing the input signals. NTSC mode The NTSC mode is switched on when the voltage at the burst phase detector outputs (pins 24 and 25) is adjusted below 9 V. To ensure reliable application the phase detector load resistors are external. When the TDA3566A is used only for PAL these two 33 k resistors must be connected to +12 V (see Fig.8). For PAL/NTSC application the value of each resistor must be reduced to 20 k (with a tolerance of 1%) and connected to the slider of a potentiometer (see Fig.9). The switching transistor brings the voltage at pins 24 and 25 below 9 V which switches the circuit tot the NTSC mode. The position of the PAL flip-flop ensures that the correct phase of the (RY) reference signal is supplied to the (RY) demodulator. The drive to the H/2 detector is now provided by the (BY) reference signal. In the PAL mode it is driven by the (RY) reference signal. Hue control is realized by changing the phase of the reference drive to the burst phase detector. This is achieved by varying the voltage at pins 24 and 25 between 7.0 V and 8.5 V, nominal position 7.65 V. The hue control characteristic is shown in Fig.6. RGB matrix and ampliers The three matrix and amplifier circuits are identical and only one circuit will be described. The luminance and the colour difference signals are added in the matrix circuit to obtain the colour signal, which is then fed to the contrast control stage. The contrast control voltage is supplied to pin 6 (high-input impedance). The control range is +5 dB to 11.5 dB nominal. The relationship between the control voltage and the gain is linear (see Fig.3). During the 3-line period after blanking a pulse is inserted at the output of the contrast control stage. The amplitude of this pulse is varied by a control voltage at pin 11. This applies a variable offset to the normal black level, thus providing brightness control. The brightness control range is 1 V to 3.6 V. While this offset level is present, the black-current input impedance (pin 18) is high and the internal clamp circuit is activated. The clamp circuit then compares the

TDA3566A
reference voltage at pin 19 with the voltage developed across the external resistor network RA and RB (pin 18) which is provided by picture tube beam current. The output of the comparator is stored in capacitors connected from pins 10, 20 and 21 to ground which controls the black level at the output. The reference voltage is composed by the resistor divider network and the leakage current of the picture tube into this bleeder. During vertical blanking, this voltage is stored in the capacitor connected to pin 19, which ensures that the leakage current of the CRT does not influence the black current measurement. The RGB output signals can never exceed a level of 10.6 V. When the signal tends to exceed this level the output signal is clipped. The black level at the outputs (pins 13, 15 and 17) will be approximately 3 V. This level depends on the spread of the guns of the picture tube. If a beam current stabilizer is not used it is possible to stabilize the black levels at the outputs, which in this application must be connected to the black current measuring input (pin 18) via a resistor network.

February 1994

Philips Semiconductors

Product specication

PAL/NTSC decoder
Data insertion Each colour amplifier has a separate input for data insertion. A 1 V peak-to-peak input signal provides a 3.8 V peak-to-peak output signal. To avoid the black-level of the inserted signal differing from the black level of the normal video signal, the data is clamped to the black level of the luminance signal. Therefore AC coupling is required for the data inputs. To avoid a disturbance of the blanking level due to the clamping circuit, the source impedance of the driver circuit must not exceed 150 . The data insertion circuit is activated by the data blanking input (pin 9). When the voltage at this pin exceeds a level of 0.9 V, the RGB matrix circuits are switched off and the data amplifiers are switched on. To avoid coloured edges, the data blanking switching time is short. The amplitude of the data output signals is controlled by the contrast control at pin 6. The black level is equal to the video black level and can be varied between 2 and 4 V (nominal condition) by the brightness control voltage at pin 11. Non-synchronized data signals do not disturb the black level of the internal signals.

TDA3566A
Blanking of RGB and data signals Both the RGB and data signals can be blanked via the sandcastle input (pin 7). A slicing level of 1.5 V is used for this blanking function, so that the wide part of the sandcastle pulse is separated from the remainder of the pulse. During blanking a level of +1 V is available at the output. To prevent parasitic oscillations on the third overtone of the crystal the optimum tuning capacitance should be 10 pF.

LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VP Ptot Tamb Tstg supply voltage (pin 1) total power dissipation operating ambient temperature storage temperature PARAMETER 25 25 MIN. MAX. 13.2 1700 +70 +150 V mW C C UNIT

THERMAL RESISTANCE SYMBOL Rth j-a PARAMETER from junction to ambient in free air THERMAL RESISTANCE 40 K/W

February 1994

Philips Semiconductors

Product specication

PAL/NTSC decoder
CHARACTERISTICS VP = 12 V; Tamb = 25 C; all voltages are referenced to pin 27; unless otherwise specied. SYMBOL Supply VP IP Ptot V8(p-p) V8 I8 I6 V4(p-p) Z4 C4 V G supply voltage supply current total power dissipation 10.8 see Fig.3 11.5 12.0 90 1.1 PARAMETER CONDITIONS MIN. TYP.

TDA3566A

MAX.

UNIT

13.2 120 1.6

V mA W

Luminance input (pin 8) input voltage (peak-to-peak value) input voltage level before clipping occurs in the input stage input current contrast control range input current contrast control Chrominance amplier input signal amplitude (peak-to-peak value) input impedance input capacitance ACC control range change of the burst signal at the output control range amplication at nominal saturation (pin 4 to pin 28) chrominance to burst ratio at nominal saturation V28(p-p) d maximum output voltage range (peak-to-peak value) distortion of chrominance amplier at 2 V (p-p) output signal up to an input signal of 1 V (p-p) frequency response between 0 and 5 MHz saturation control range I5 input current saturation control cross-coupling between luminance and chrominance amplier S/N Z 28 signal-to-noise ratio at nominal input signal phase shift burst with respect to chrominance at nominal saturation output impedance of chrominance amplier note 4 note 5 see Fig.4 RL = 2 k 100 mV to 1 V (p-p) note 3 note 2 40 30 34 4 390 10 7 5 1100 6.5 1 5 mV k pF dB dB dB dB V % note 1 0.45 0.1 0.63 1.4 1 +5 15 V V A dB A

28-4

50 56

10

2 20 46 5

dB dB A dB dB deg

February 1994

Philips Semiconductors

Product specication

PAL/NTSC decoder

TDA3566A

SYMBOL I28 f TCosc fosc R26 C26 V2 V2 V2 V2 V2

PARAMETER output current

CONDITIONS

MIN. 2 40 400

TYP.

MAX. 15 5 3 100 520 10 425 3.9 1.8 0.25

UNIT mA

Reference part phase-locked loop catching range phase shift for 400 Hz deviation of the oscillator frequency oscillator temperature coefcient with respect to oscillator frequency frequency deviation when supply voltage increases from 10 to 13.2 V input resistance input capacitance note 6 note 6 note 6 note 6 500 280 175 3.1 1.2 Hz deg Hz/K Hz pF

ACC generation (pin 2; note )7 control voltage at nominal input signal control voltage without chrominance input colour-on/off voltage colour-on voltage colour-on identication voltage change in burst amplitude with temperature V3 V23(p-p) |Z22, 23| voltage at pin 3 at nominal input signal Demodulator part amplitude of burst signal (peak-to-peak value) between pins 23 and 27 input impedance between pins 22 or 23 and 27 note 8 45 0.7 22 AND 23 no (BY) signal no (RY) signal 40 85 1.78 10% 0.51 10% 0.19 25% 90 3 95 dB dB deg 63 1.0 81 1.3 mV k 4.5 2 300 3.5 1.5 0.1 4.7 V V mV V V %/K V

RATIO OF DEMODULATED SIGNALS FOR EQUIVALENT INPUT SIGNALS AT PINS

V 17 -------V 13 V 15 -------V 13 V 15 -------V 17 17 cr

(BY)/(RY)

(GY)/(RY)

(GY)/(BY)

frequency response between 0 and 1 MHz cross-talk between colour difference signals phase difference between (RY) and (BY) reference signals

February 1994

Philips Semiconductors

Product specication

PAL/NTSC decoder

TDA3566A

SYMBOL tot

PARAMETER total phase difference between chrominance input signals and demodulator output signals

CONDITIONS

MIN.

TYP. 8

MAX.

UNIT deg

RGB matrix and ampliers V13, 15, 17(p-p) output voltage (peak-to-peak value) at nominal luminance/contrast (black-to-white) V13(p-p) output signal amplitude of the 'RED' channel (peak-to-peak value) at nominal contrast/saturation and no luminance signal to the input (RY signal) maximum peak-white level available output current difference between black level and measuring level at the output for a brightness control voltage of 2 V note 9 note 3 3.3 3.8 4.3 V

3.7

V13, 15, 17(m) I13, 15, 17 V13, 15, 17

9.4 10

10.0 0

10.6

V mA V

difference in black level between the note 10 three channels for equal drive conditions for the three gains control range of black-current stabilization at Vblack = 3 V; V11 = 2 V

100

mV

see Fig.5

1.3

2 40 5 0.5

V mV V A V/V dB

V I11

black level shift with picture content brightness control voltage range brightness control input current slope of brightness control curve tracking of contrast control between the three channels over a control range at 10 dB

Vo V ------T V

output voltage during test pulse after switch-on variation of black level with temperature variation of black level with contrast (+5 to 10 dB) relative spread between the three output signals note 11

6.5

7.3 0 0 10%

100 10 20 10%

V mV/K mV % mV

relative black level variation between the note 11 three channels during variation of contrast, brightness and supply voltage blanking level at the RGB outputs difference in blanking level of the three channels differential drift of the blanking levels T = 40 C

Vblk Vblk dVblk

0.85 0 0

1.1 10 10

V mV mV

February 1994

10

Philips Semiconductors

Product specication

PAL/NTSC decoder

TDA3566A

SYMBOL V bl V Pl ----------- ----------V bl V Pl S/N VR(p-p) VR(p-p)

PARAMETER tracking of output black level with supply voltage signal-to-noise ratio of output signals residual 4.4 MHz signal at RGB outputs (peak-to-peak value) residual 8.8 MHz signal and higher harmonics at the RGB outputs (peak-to-peak value) output impedance (pins 13, 15 and 17) frequency response of total luminance and RGB amplier circuits for f = 0 MHz and 5 MHz current source of output stage difference of black level at the three outputs at nominal brightness tracking of brightness control

CONDITIONS

MIN. 0.9 1.0

TYP.

MAX. 1.1

UNIT

note 5

62

100 150

dB mV mV

|Zo| tot

100 1

dB

Io V

2 note 11

10 2

mA mV %

Data insertion V12, 14, 16(p-p) input signals (peak-to-peak value) for an note 4 RGB output voltage of 3.8 V (peak-to-peak) at nominal contrast V difference between the black level of the note 12 RGB signals and the black level of the inserted signals at the outputs at nominal contrast output rise time difference delay for the three channels input current 0.9 1.0 1.1 V

170

mV

tr td I12, 14, 16 V9 V9 V9 td R9

0.9 7 46 46

50 0 10

80 40 10

ns ns A

Data blanking input voltage for no data insertion input voltage for data insertion maximum input pulse voltage delay of data blanking input resistance suppression of the internal RGB signals when V9 > 0.9 V suppression of external RGB signals when V9 < 0.3 V Sandcastle input (note 13) V7 V7 level at which the RGB blanking is activated level at which the horizontal pulses are separated 1.0 3.0 1.5 3.5 2.0 4.0 V V 0.3 3 20 13 V V V ns k dB dB

February 1994

11

Philips Semiconductors

Product specication

PAL/NTSC decoder

TDA3566A

SYMBOL V7 td Ii

PARAMETER level at which the burst gate and clamping pulse are separated delay between black level clamping and burst gating pulse input current

CONDITIONS

MIN. 6.5 7.0 0.6

TYP.

MAX. 7.5 1 50 2

UNIT V s mA A mA

Vi = 0 to 1 V Vi = 1 to 8 V Vi = 8 to 12 V

Black current stabilization V18 V I18 I18 V18 V18 R18 I10, 20, 21 DC bias voltage difference between input voltage for black current and leakage current input current during black current input current during scan internal limiting at pin 18 switching threshold for black current control on input resistance during scan DC input current during scan at pins 10, 20 and 21 maximum charge or discharge current during measuring time (pins 10, 20 and 21) difference in drift of the blank level NTSC V24-25 I24+25 (AV) HUE level at which the PAL/NTSC switch is activated (pins 24 and 25) average output current (pin 24 plus pin 25) hue control note 14 see Fig.6 62 8.8 82.5 9.2 103 V A note 11; T = 40 C 3.5 0.35 8.5 7.6 1.0 5.0 0.5 9.0 8.0 1.5 1 7.0 0.65 1 10 9.5 8.4 2.0 30 V V A mA V V k nA mA

20

mV

Notes to the characteristics 1. Signal with the negative-going sync; amplitude includes sync pulse amplitude. 2. Indicated is a signal with 75% colour bar, so the chrominance-to-burst ratio is 2.2 : 1. 3. Nominal contrast is specified as the maximum contrast 5 dB and nominal saturation as maximum 6 dB. This figure is valid in the PAL-condition. In the NTSC-condition no output signal is available at pin 28. 4. Cross coupling is measured under the following condition: input signal nominal, contrast and saturation such that nominal output signals are obtained. The signals at the output at which no signal should be available must be compared with the nominal output signal at that output. 5. The signal-to-noise ratio is defined as peak-to-peak signal with respect to RMS noise. 6. All frequency variations are referenced to the 4.4 MHz carrier frequency. All oscillator specifications have been measured with the Philips crystal 4322 143 ... or 4322 144 ... series. 7. The change in burst with VP is proportional.

February 1994

12

Philips Semiconductors

Product specication

PAL/NTSC decoder
8. These signal amplitudes are determined by the ACC circuit of the reference part.

TDA3566A

9. This value depends on the gain setting of the RGB output amplifiers and the drift of the picture tube guns. Higher black level values are possible (up to 5 V) however, in that condition the amplitude of the available output signal is reduced. 10. The variation of the black-level during brightness control in the three different channels is directly dependent on the gain of each channel. Discolouration during adjustments of contrast and brightness does not occur because amplitude and the black-level change with brightness control are directly related. 11. With respect to the measuring pulse. 12. This difference occurs when the source impedance of the data signals is 150 and the black level clamp pulse width is 4 s (sandcastle pulse). For a lower impedance the difference will be lower. 13. For correct operating of the black level stabilization loop, the leading and trailing edges of the sandcastle pulse (measured between 1.5 V and 3.5 V) must be within 200 ns and 600 ns respectively. 14. The voltage at pins 24 and 25 can be changed by connecting the load resistors (20 k, 1%, in this condition) to the slider bar of the hue control potentiometer (see Fig.6). When the transistor is switched on, the voltage at pins 24 and 25 is reduced below 9 V, and the circuit is switched to NTSC mode. The width of the burst gate is assumed to be 4 s typical.

February 1994

13

Philips Semiconductors

Product specication

PAL/NTSC decoder

TDA3566A

MLA408

MBA967

100 G (%) 80 G (%)

100

80

60

60

40

40

20

20

0 0 1 2 3 4 V6-27 (V) 5

0 0 1 2 3 4 V5-27 (V) 5

Fig.3 Contrast control voltage range.

Fig.4 Saturation control voltage range.

MLA409

2 V (V) 1

60

MLA410

(deg) 40

20

20

40 2 60 0 1 2 3 4 V11-27 (V) 7 7.5 8 V25-27 (V)

Fig.5

Difference between black level and measuring level at the RGB outputs (V) as a function of the brightness control input voltage (V11).

Fig.6 Hue control voltage range.

February 1994

14

Philips Semiconductors

Product specication

PAL/NTSC decoder

TDA3566A

1 lines

21

22

23

24

vertical blanking (V)

blanking pulse (BL1)

blanking pulse (BL2)

blanking pulse (BL3)

insertion pulse (4L) (control via pin 11) black current information pulse (M) (pin 18)

clamp pulse (L0)

clamp pulse (L1)

clamp pulse (L2)

clamp pulse (L3)

retrace must be completed

end of vertical sync

MLA411

Fig.7 Timing diagram for black-current stabilization.

February 1994

15

February 1994
120 k 47 k black current information 10 k 2.2 F 12 V 10 nF 130 k RA RB 82 k BAW62 12 V 10 k brightness

APPLICATION INFORMATION

Philips Semiconductors

PAL/NTSC decoder

390

DL700

470

1.2 k 12 V

1 k

fosc adjust

average beam current 68 k 12 V 47 k

4.7 k 33 k 33 k 3-level sandcastle pulse 8.8 MHz RED GREEN BLUE 10 pF 33 nF 1 3.3 F k

15 k 2.2 F

10 k contrast

16
24 23 22 7 26 18 13 15

4.7 F

33 nF

28

25

17

11

TDA3566A
27 330 nF luminance delay 330 ns 1 F 470 nF 470 nF 470 nF 19 10 20 21 8 10 nF 9 12 100 nF 14 100 nF 16 100 nF 5 68 k 12 V 47 k 1 k 1 k 1 k 75 75 75 75 15 k 2.2 F 46 H R 27 pF blanking G data inputs B 12 V unkilled normal killed
MGA821

12 V

10 nF

100 F

22 nF

10 k saturation

120 pF

10.7 H composite video (1 V p-p)

Product specication

TDA3566A

Fig.8 Application diagram showing the TDA3566A for a PAL decoder.

120 k 47 k 10 k 10 k brightness 12 V

February 1994
black current information 12 V 130 k RA 2.2 F RB 82 k 470 10 nF 1 k 12 V 22 k 22 k BAW62 average beam current 68 k B 22 pF 7.16 MHz 8.8 MHz 22 pF 12 V 47 k 15 k 2.2 F 3-level sandcastle pulse RED GREEN BLUE 10 k contrast B ( NTSC) A ( PAL)

Philips Semiconductors

390

DL700

1.2 k

PAL/NTSC decoder

2.2 k hue control 22 k

22 k

2.2 k

12 k

22 k 20 k (1%) 20 k (1%)

4.7 F 100 nF 24 23 22 7 26 18 13 15

100 nF 25

2.2 1 F k

17

28

17

11

TDA3566A
2 330 nF 1 F 470 nF 470 nF 470 nF 10 nF 27 19 10 20 21 8 9 12 100 nF 14 100 nF 16 100 nF 5 68 k 12 V 1 k 1 k 10 k 22 k B 56 pF 27 pF blanking 12 V luminance delay 330 ns 1 k 46 H R G data inputs B 12 V unkilled normal killed
MGA820

12 V

10 nF

100 F

22 nF

75

75

75

75

47 k 15 k 2.2 F

10 k saturation

10 k

56 pF

12 V composite video (1 V p-p)

22 k

10.7 H

120 pF

Product specication

TDA3566A

Fig.9 Application diagram showing the TDA3566A for a PAL/NTSC decoder.

Philips Semiconductors

Product specication

PAL/NTSC decoder

TDA3566A

MLA412

28 1 100 2 k 1 mA 2 2 k 2 k 0.5 mA 3 k

27

26

2V

9.2 V

290

3 mA

25

0.5 mA 24

TDA3566A

50 3

3 k 5.4 k 1 k

23

7 k

1 k

8.2 k

10 k 2.9 V 400 10 k 4 1.75 mA 0.5 mA 5.4 k 400

2 k

2 k

22

5.4 k 4V 1 k

1 k

1 k

8.2 k

2 k 6 0.3 mA 0.5 mA 5.4 k

1 k

4V

Fig.10 Internal pin circuitry (first part).

February 1994

18

Philips Semiconductors

Product specication

PAL/NTSC decoder

TDA3566A

see pin 10 see pin 10

21 20

1.2 V 7 2 k 1.5 V

0.4 mA

0.25 mA

0.5 mA 6.3 V 19 2 k 10 k

2 k

L0

2 k

8 I 10 k 2.5 V 1 k

TDA3566A

1.5 V

1.5 k 4L

18

10 k see pin 19 9 see pin 12 10 k see pin 19 see pin 12 17 16 15 14

100 1 k 10 2.2 V 8.5 k I 11 8.5 k 4L 12


MLA413

2 k 1.5 k 2 k 2V 1 mA 13 3 mA

Fig.11 Internal pin circuitry (second part).

February 1994

19

Philips Semiconductors

Product specication

PAL/NTSC decoder
PACKAGE OUTLINE

TDA3566A

handbook, full pagewidth

seating plane

36.0 35.0 4.0 5.1 max max

15.80 15.24

3.9 3.4

0.51 min 0.254 M 0.32 max 15.24 17.15 15.90


MSA264

1.7 max

2.54 (13x) 1.7 max

0.53 max

28

15

14.1 13.7

14

Dimensions in mm.

Fig.12 28-lead dual in-line; plastic with internal heat spreader (SOT117).

February 1994

20

Philips Semiconductors

Product specication

PAL/NTSC decoder
SOLDERING Plastic dual in-line packages BY DIP OR WAVE The maximum permissible temperature of the solder is 260 C; this temperature must not be in contact with the joint for more than 5 s. The total contact time of successive solder waves must not exceed 5 s. DEFINITIONS Data sheet status Objective specication Preliminary specication Product specication Limiting values The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified storage maximum. If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit.

TDA3566A
REPAIRING SOLDERED JOINTS Apply the soldering iron below the seating plane (or not more than 2 mm above it. If its temperature is below 300 C, it must not be in contact for more than 10 s; if between 300 and 400 C, for not more than 5 s.

This data sheet contains target or goal specications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains nal product specications.

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specication is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specication. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.

February 1994

21

Philips Semiconductors

Product specication

PAL/NTSC decoder
NOTES

TDA3566A

February 1994

22

Philips Semiconductors

Product specication

PAL/NTSC decoder
NOTES

TDA3566A

February 1994

23

Philips Semiconductors a worldwide company


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For all other countries apply to: Philips Semiconductors, International Marketing and Sales, Building BAF-1, P.O. Box 218, 5600 MD, EINDHOVEN, The Netherlands, Telex 35000 phtcnl, Fax. +31-40-724825 SCD28 Philips Electronics N.V. 1994

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9397 723 30011

Philips Semiconductors

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