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Analysis and Modeling of Transformerless Photovoltaic Inverter Systems

by Tams Kerekes

Dissertation submitted to the Faculty of Engineering, Science & Medicine at Aalborg University in partial fulfillment of the requirements for the degree of Doctor of Philosophy in Electrical Engineering

Aalborg University Institute of Energy Technology Denmark, August 2009

Aalborg University Institute of Energy Technology Pontoppidanstraede 101 DK-9220 Aalborg East Denmark Copyright Tams Kerekes, 2009 Printed in Denmark by Second print, ISBN: 978-87-89179-85-8

Preface
This thesis is written in the frame of two research projects: the first, entitled Transformerlose solcelle invertere, was financially supported by the Eltra PSO-F&U contract nr. 5780 signed between Aalborg University and Energinet in cooperation with Powerlynx A/S, now Danfoss Solar A/S. The second part of the research, entitled Electrical energy conversion and condition-ECON2, was supported by the EU framework entitled Marie Curie Host Fellowships for Early Stage Researcher Training, financially supported by the EC Contract MEST-CT-2004-504243. Acknowledgements are given to Aalborg University and the above mentioned institutions for their financial support. The research was carried out under the supervision of Professor Remus Teodorescu from Institute of Energy Technology (IET) at Aalborg University. My deepest gratitude goes to my supervisor for his guidance and professional support during the elaboration of the work done in this thesis. I would like to express my sincere thanks to Dr. Christian Klumpner and Dr. Mark Sumner for their guidance and support during my one-year stay at Nottingham University. Im also grateful to Dr. Marco Liserre from Politecnico di Bari for his kindness and professional guidance during my six month stay at the Dipartimento di Elettrotecnica ed Elettronica. I would also like to thank Uffe Borup, from Danfoss Solar A/S, for participating in the steering meetings and for his active support. I want to thank to all my colleagues from Institute of Energy Technology for their friendly companionship which guided me through life at Aalborg University. Special thanks go to Dr. Pedro Rodriguez and Professor Vassilios Agelidis for their unselfish help and moral support, during their stay at IET. Also many thanks to all my fellow PhD students, who assisted me many times and gave me support in different ways. In particular, I thank to Dezs Sra, Mihai Ciobota ru and Mth Lszl for their friendly help and encouragement. I would also like to thank Gerardo Vazquez from Universitat Politecnica de Catalonya for sharing his experience and time with me during his visit at IET. And, last but not least, I want to express my deepest gratitude to my wife Erzsbet Kerekes and to my entire family in Romania for the substantial and continuous support which I have received during the elaboration and finalization of this work. Tams Kerekes August 2009; Aalborg iii

Abstract
The need for a cleaner environment and the continuous increase in power demands makes decentralized renewable energy production, like solar and wind, more and more interesting. Decentralized energy production using solar energy could be a solution for balancing the continuously-increasing power demands. This continuously increasing consumption overloads the distribution grids as well as the power stations, therefore having a negative impact on power availability, security and quality. One of the solutions for overcoming this is the grid-connected photovoltaic (PV) system. PV inverter systems can be improved in terms of efficiency using transformerless topologies, but new problems related to leakage current need to be dealt with. The work presented in this thesis deals with analyzing and modeling of transformerless PV inverter systems regarding the leakage current phenomenon that can damage solar panels and pose safety problems. The major task of this research was the investigation and verification of transformerless topologies and control strategies to minimize the leakage current of PV inverter topologies in order to comply with the standard requirements and make them safe for human interaction. The thesis is divided into two parts: Part I Report and Part II Publications. Part I is a summary report of the work done throughout the research and contains 6 chapters. Chapter 1: Introduction, focuses on the background and motivation regarding the research done in this thesis. Furthermore, the objectives and limitations of the project are enumerated. The chapter finishes with the outline of the thesis. Chapter 2: Overview of grid connected PV systems, gives an overview about grid connected PV inverters, focusing on transformerless inverters and related safety issues. The parasitic capacitance of several commercial mono- and multi-crystalline PV panels has been measured, and an appropriate value has been defined for use in the simulations. Also, two commercial current sensors that can be used for leakage current measurement, have been tested and the results are presented in Appendix A. A detailed investigation of different inverter topologies regarding the ground leakage current is described in Chapter 3: Investigation of transformerless topologies, showing the ground voltage and leakage current for the analyzed topologies, concluding with whether the topology is suited for transformerless PV systems. Chapter 4: Common mode voltage in PV inverter topologies, explains the common-mode behavior of single and three-phase PV inverter topologies by presenting a comprehensive analysis of the single and three-phase transformerless converter with v

respect to the problem of the leakage current that flows through the parasitic capacitance of the PV array. In Chapter 5: H-Bridge Zero Voltage Rectifier topology, a new inverter called HBridge Zero Voltage Rectifier (HB-ZVR) is proposed, where the mid-point of the DC link is clamped to the grid only during the Zero Voltage period by means of a diode rectifier bridge and one switch. A comparison of known transformerless topologies and the HB-ZVR is performed using simulations, focusing on the voltage to earth harmonics and ground leakage current. Furthermore, experimental results are shown, confirming the simulations, and finally, the efficiency curve of the compared topologies is detailed. In Chapter 6: Conclusion, the final conclusion is presented, based on the theoretical and experimental results performed. Also a list is given, detailing the contributions presented in this thesis. Additionally, guidelines for future work are given. The second part of the thesis: Part II Publications contains the papers that have been published during the period of the research. The articles describe in detail the methods, simulations and the experimental results that make up the backbone of the work described in this thesis.

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Dansk resum
Behovet for et renere milj og den fortsatte stigning i ydelse krav gr decentral produktion af vedvarende energi, ssom solcelle og vindenergi, mere og mere interessant. Decentral energiproduktion ved hjlp af solenergi kan vre en lsning for at afbalancere det stadigt stigende strm behov. Det stadigt stigende forbrug belaster distributionsnettet, samt kraftvrker, derfor har forbruget en negativ indvirkning p magten af plidelighed, sikkerhed og kvalitet. En af de lsninger for at overvinde dette er nettilsluttet solcelle system. Solcelle inverter systemer kan forbedres ved hjlp af transformerlse topologier, men nye problemer i forbindelse med lkstrm har behov for at blive behandlet. I denne forbindelse prsenteres denne afhandling der beskftiger sig med analyse og modellering af transformerlse solcelle inverter systemer med fokus p lkstrms fnomener, der kan skade solpaneler og udgre en sikkerheds-risiko. Den strste opgave i denne afhandling blev undersgelsen og verifikation af transformerlse topologier og kontrolstrategier, der vil minimere lkstrm af solcelle inverter topologier for at overholde standardkrav og gre dem sikre for menneskelig interaktion. Afhandlingen er opdelt i to dele: Del I - Rapport og Del II - Publikationer. Del I er en sammenfattende rapport over det udfrte arbejde i hele forskningsperioden og indeholder 6 kapitler. Kapitel 1 fokuserer p baggrunden og motivationen i forbindelse med forskningen beskrevet i denne afhandling. Desuden er ml og begrnsninger for projektet er fremsat, afsluttende med et overblik over afhandlingen. Kapitel 2 giver en oversigt over nettilsluttede solcelle invertere, der fokuserer p transformerlse frekvensomformere og de relaterede sikkerhedssprgsml. Den parasitiske kapacitans af flere kommercielle mono-og multi-krystallinske solcelle paneler er blevet mlt, og en reprsentativ vrdi er fastsat til anvendelse i simuleringerne. Ogs to nuvrende sensorer, som vil kunne bruges til lkstrm mling, er blevet testet, og resultaterne prsenteres i tillg A. En detaljeret undersgelse af forskellige inverter topologier med hensyn til jordlkstrom er beskrevet i kapitel 3, der viser DC til jord potentialet og lkstrmmen for de analyserede topologier, indgelse hvis topologi er velegnet til transformerlse solcelle anlg. Kapitel 4 forklarer common-mode opfrsel af en og tre-fase solcelle inverter topologier ved at fremlgge en omfattende analyse af enkelt og tre-fase transformerlse konvertere med hensyn til problemet med lkstrm, der lber gennem den parasitiske kapacitans i solcelle anlg. vii

I kapitel 5 er en ny inverter kaldet H-Bridge Zero Voltage Rectifier (HB-ZVR) foreslet, hvor DC-link midtpunktet af er fastholdt p frekvensomformeren kun under nul spnding perioden ved hjlp af en diode ensretter og en transistor. En sammenligning af kendte transformerlse topologier og HB-ZVR udfres ved hjlp af simulering, der fokuserer p spndingen til jord, og jordlkstrm. Desuden er den givet eksperimentelle resultater, der bekrfter simuleringerne, og sluttelig prsenteres virkningsgraden for de forskellige topologier. I kapitel 6 prsenteres den endelige konklusion baseret p de teoretiske og eksperimentelle resultater. Derudover findes ogs en angivelse at de bidrag der prsenteres i denne afhandling. Derudover er der ogs givet retningslinjer for fremtidige arbejde. Den anden del af afhandlingen: Part II - Publikationer indeholder de artikler, der er publiceret lbet af denne forskningsperiode. Artiklerne beskriver i detaljer, de metoder, de simuleringer, eller de eksperimentelle resultater, der udgr grundlaget i det arbejde, der er beskrevet i denne afhandling.

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Table of contents
Preface .............................................................................................................................................. iii Abstract ............................................................................................................................................. v Dansk resum .................................................................................................................................. vii Table of contents .............................................................................................................................. ix Glossary of terms............................................................................................................................. xiii Nomenclature list .............................................................................................................................xv Chapter 1 Introduction ................................................................................................... 1 1.1 1.2 1.3 1.3.1 1.3.2 1.3.3 1.4 1.5 1.6 Chapter 2 2.1 2.1.1 2.1.2 2.1.3 2.1.4 2.2 2.3 2.4 2.5 2.6 2.7 Chapter 3 3.1 3.2 3.2.1 3.2.2 3.2.3 3.2.4 3.2.5 3.2.6 Background and motivation .......................................................................... 1 Grid connected PV systems........................................................................... 2 Aims of the project ........................................................................................ 3 Problem formulation...................................................................................... 3 Objectives ...................................................................................................... 3 Limitations .................................................................................................... 4 Main contributions ........................................................................................ 4 Outline of the thesis ...................................................................................... 5 List of publications ........................................................................................ 7 Overview of grid connected PV systems ....................................................... 9 Introduction ................................................................................................... 9 Central inverters .......................................................................................... 10 String inverters ............................................................................................ 11 Module inverters .......................................................................................... 11 Multi-String inverters .................................................................................. 11 Grid requirements........................................................................................ 12 Transformerless PV inverters ...................................................................... 14 Transformerless inverter topologies ............................................................. 17 Parasitic capacitance of PV arrays.............................................................. 24 Leakage ground current ............................................................................... 26 Summary ..................................................................................................... 28 Investigation of transformerless topologies .................................................. 29 Introduction ................................................................................................. 29 Single-phase topologies ................................................................................ 31 H-Bridge topology with Bipolar PWM........................................................ 31 H-Bridge topology with Unipolar PWM ..................................................... 33 H-Bridge topology with hybrid modulation ................................................ 35 HERIC topology from Sunways .................................................................. 36 H5 topology from SMA ............................................................................... 37 Single-phase topology with DC decoupling (Ingeteam)............................... 39

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3.2.7 3.2.8 3.3 3.3.1 3.3.2 3.3.3 3.3.4 3.4 3.5 Chapter 4 4.1 4.2 4.2.1 4.2.2 4.2.3 4.2.4 4.3 4.4 Chapter 5 5.1 5.2 5.2.1 5.2.2 5.2.3 5.3 5.3.1 5.3.2 5.3.3 5.4 5.5 Chapter 6 6.1 6.2 6.3

Half bridge topology..................................................................................... 40 Neutral Point Clamped topology ................................................................. 41 Three-phase topologies ................................................................................. 42 Three-phase Full Bridge............................................................................... 42 Full Bridge with Split Capacitor ................................................................. 44 Full Bridge with Split Capacitor using staggered modulation ..................... 44 Three-phase Neutral Point Clamped ........................................................... 44 DC current injection control in case of transformerless systems ................. 45 Summary ...................................................................................................... 46 Common mode voltage in PV inverter topologies ....................................... 47 Introduction ................................................................................................. 47 Common-mode voltage in three-phase systems............................................ 49 Model of common-mode and differential-mode voltages .............................. 49 Leakage current in case of imbalance filter inductance condition ............... 50 Experimental results (inverter mode) .......................................................... 52 Experimental results (rectifier mode) .......................................................... 52 Common-mode voltage in single-phase systems ........................................... 55 Summary ...................................................................................................... 56 H-Bridge Zero Voltage Rectifier topology .................................................... 57 Introduction ................................................................................................. 57 Transformerless topology analysis................................................................ 57 H-Bridge with unipolar switching ................................................................ 59 HERIC Highly Efficient and Reliable Inverter Concept ........................... 60 Proposed topology (HB-ZVR)...................................................................... 62 Experimental results .................................................................................... 65 H-Bridge with Unipolar PWM (experiment) ............................................... 65 HERIC (experiment) .................................................................................... 67 HB-ZVR (experiment) ................................................................................. 67 Efficiency ...................................................................................................... 68 Summary ...................................................................................................... 70 Conclusion .................................................................................................... 71 Summary ...................................................................................................... 71 Main contributions ....................................................................................... 73 Future work ................................................................................................. 74

Appendix A ...................................................................................................................................... 75 A.1 A.1.1 A.1.2 A.1.3 A.2 A.2.1 LEM CT-0.2P .............................................................................................. 76 Step response................................................................................................ 76 Problems ...................................................................................................... 78 Capacitor discharge test ........................................................................... 79 Telcon HES 25VT sensor test results .......................................................... 80 Step response................................................................................................ 81

A.2.2 A.2.3 A.2.4

Step response with 20A 50Hz AC current in high power side..................... 81 Sensor output DC offset .............................................................................. 83 Sensor output influenced by 50Hz current .................................................. 83

References ........................................................................................................................................ 85 Publications ..................................................................................................................................... 91 Publication I .................................................................................................................................... 93 Publication II ................................................................................................................................ 103 Publication III ............................................................................................................................... 111 Publication IV ............................................................................................................................... 119 Publication V ................................................................................................................................ 131 Publication VI ............................................................................................................................... 139 Publication VII .............................................................................................................................. 147 Publication VIII ............................................................................................................................ 159 Publication IX ............................................................................................................................... 171

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Glossary of terms
3FB 3FBSC 3xNPC DSP DUT EMI FET FFT HB-Bip HB-Unip HB-ZVR HERIC HF IEA PVPS Three-phase Full Bridge Three-phase Full Bridge with Split Capacitor Three-phase Neutral Point Clamped Digital Signal Processor Device Under Test Electro Magnetic Interference Field Effect Transistor Fast Fourier Transform H-Bridge with Bipolar PWM H-Bridge with Unipolar PWM H-Bridge Zero Voltage Rectifier Highly Efficient and Reliable Inverter Concept High Frequency International Energy Agency Photovoltaic Power Systems Program IGBT LF MPP MPPT NPC PCC PF PV PWM Insulated Gate Bipolar Transistor Low Frequency Maximum Power Point Maximum Power Point Tracker Neutral Point Clamped Point of Common Coupling Power Factor Photovoltaic Pulse Width Modulation xiii

RCMU RMS SMA THD UPS VAT

Residual Current Monitoring Unit Root Mean Square SMA Solar Technology AG Total Harmonic Distortion Uninterruptible Power Supply Value Added Tax

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Nomenclature list

- conversion efficiency - European efficiency, weighted

EU

CAG, CBG and CCG - stray capacitances between the converter output points and the ground Cdc Cf CG_PV Ct - DC-link capacitor - capacitor of output filter
-

parasitic capacitance of PV array

- stray capacitance between the transformer primary and secondary windings

fg fsw fsw-LCR Ig IG-PV

- grid frequency - switching frequency of inverter - switching frequency of LCR meter - grid current
-

ground current through parasitic capacitance of PV panel

LA, LB, LC and LN - output filter inductor LcA, LcB and LcC LcG - series inductance of each phase

- inductance between the ground connection of the inverter and the grid neutral

LcN Lf Lg R Ts

- series inductance of the neutral - output filter inductor - inductance of the grid - load resistor - simulation step time xv

Vab1, Vbc1 and Vca1 - common-mode voltage due to inductor imbalance VXY Vcm Vcmm3~ Vcmm-tot Vdc Vdc1 Vdc3 Vg VMPP VOC Vout-LCR - voltage between X and Y, where X,Y={A,B,C,N} and XY - single-phase common-mode voltage - three-phase common-mode voltage - total common-mode voltage - DC-link voltage for converter - DC-link voltage for single-phase converter - DC-link voltage for three-phase converter - grid peak voltage - voltage at maximum power point of PV array - open circuit voltage of PV array - output voltage for LCR meter

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Chapter 1 Introduction
This chapter presents the background and the motivation of the thesis, continuing with a short overview of grid-connected PV systems. Furthermore, it details the aims of the project, continuing with a list of the main contributions and finishing with the outline of the thesis.

1.1 Background and motivation


The need for a cleaner environment and the continuous increase in energy needs makes decentralized renewable energy production more and more important. This continuously-increasing energy consumption overloads the distribution grids as well as the power stations, therefore having a negative impact on power availability, security and quality [1]. One of the solutions for overcoming this is the Distributed Generation (DG) system. DG systems using renewable energy sources like solar, wind or hydro, have the advantage that the power is produced in close proximity to where it is consumed. This way the losses due to transmission lines are not present. In the last decade solar energy technologies have become less expensive and more efficient, which have made it to an attractive solution, being cleaner and more environmentally friendly energy resource than traditional ones like fossil fuels, coal or nuclear. Nevertheless, a PV system is still much more expensive than traditional ones, due to the high manufacturing costs of PV panels, but the energy that drives them -the light from the sun- is free, available almost everywhere and will still be present for millions of years, long after all non-renewable energy sources have been depleted. One of the major advantages of PV technology is that it has no moving parts. Therefore, the hardware is very robust; it has a long lifetime and low maintenance requirements. And, most importantly, it is one solution that offers environmentally friendly power generation [2]. Equation Chapter (Next) Section 1 Nowadays, PV panels are not only used in space applications, but they are present in everyday life: powering wrist watches, small calculators, supplying loads in 1

remote sites and, last but not least, they are connected to the public grid, generating the green power of the future. [3]

1.2 Grid connected PV systems


As mentioned before, decentralized energy production using solar energy could be a solution for balancing continuously-increasing energy needs. Grid connected PV systems have had an enormous increase in their market share over the last decade. With a reasonable set of incentives, the solar photovoltaic market in the U.S. could grow more than 30% per year over the next 20 years, from 340MW of installed capacity to 9600 MW [4]. This market growth is also present in other countries worldwide. According to the latest report of IEA PVPS on installed PV power, during 2007 there was a total of 2.25 GW of installed PV systems, of which the majority (90%) are installed in Germany, Spain, USA and Japan. At the end of 2007 the total installed PV capacity reached 7.9 GW of which around 92% is grid connected [5] [6]. The growth of installed capacity since 1992 and the split of this capacity between the two primary applications for PV, representing grid connected and stand-alone applications, can be seen in Fig. 1.1.

Fig. 1.1 Cumulative installed capacity between 1992 and 2007 in the IEA-PVPS reporting countries [6].

The European solar PV market has increased a lot during these last years. As shown in Fig. 1.2, at the end of 2008 the Global cumulative capacity was just below 15 GW of installed PV, out of which 9 GW, representing 65%, is installed in Europe, followed by Japan with 2.1 GW and USA with 1.2 GW. This European market boom in 2008 is a result of the 2.5 GW of installation in Spain and the 1.5 GW in Germany. Regarding the total PV installations Germany is still leading with 5.3 GW, with Spain 2

nearing second place with a total of 3.2 GW, followed by Japan with 2.1 GW and the USA with only 1.2 GW, while the rest of the countries are lagging far behind [7].

Fig. 1.2: Historical development of the Global cumulative PV power installed per Region [7].

1.3 Aims of the project


1.3.1 Problem form ulation
The efficiency of commercial PV panels is around 15-20%. Therefore, it is very important that the power produced by these panels is not wasted, by using inefficient power electronics systems. The efficiency and reliability of both single-phase and three phase PV inverter systems can be improved using transformerless topologies, but new problems related to leakage current and safety need to be dealt with.

1.3.2 Objectives
The main goal of this project is to analyze and model transformerless PV inverter systems with respect to the leakage current phenomenon that can damage the solar panels and pose safety problems. New topologies and control strategies that will minimize the leakage current and exhibit a high efficiency will be proposed, investigated and verified.

1.3.3 Lim itations


The majority of PV inverters on the market include a boost stage in order to raise the low voltage of the PV array to the needed DC-link voltage of around 400V (single-phase system in Europe) or 700V (three-phase system in Europe). During this research only single stage DC to AC topologies for single- and three-phase grid connection have been studied with a power rating of up to 5-6kW/phase for the low power utility grid. The PV array has been simplified by using a DC power source to rule out the need for a Maximum Power Point Tracker (MPPT), both in simulation and experimental tests. Therefore only a current control strategy has been implemented in the case of grid connection, as presented in Chapter 3. In case the load was a resistive one, to simplify the implementation, only voltage control was used, as detailed in Chapters 4 and 5. The grid has been modeled as an inductance and resistance in series with an ideal sinusoidal voltage source. For simulation the MATLAB/Simulink environment has been used together with the PLECS toolbox, to simulate power electronic circuits. All the active and passive components within the modeled electrical circuit were taken to be ideal.

1.4 Main contributions


A short list of contributions is included in the order they appear in the thesis. Review and simulation of PV topologies

A comprehensive review is presented modeling several single- and three-phase transformerless topologies, focusing on the leakage ground current. It has been shown that the H-Bridge topology with unipolar PWM, as well as the three-phase full bridge topology, generate very high leakage current and are therefore not suitable as transformerless PV inverters. It is also emphasized that connecting the midpoint of the DClink to the neutral of the grid will substantially reduce the generated leakage current in the case of the half-bridge or neutral-point clamped topologies, although the chosen grid side filter configuration might negatively influence the common-mode behavior of the topology. Interleaved PWM

The capacitor in the inverters DC-link tends to get reduced, due to cost reduction from the manufacturers side. This means that the ripple in the DC-link will be increased, leading to higher leakage ground currents through the parasitic capacitance of the PV array. This thesis includes a new application of the interleaved PWM for threephase inverters that has been modeled in simulation. The ripple of the DC-link voltage is reduced, thereby further reducing the leakage current in case of the three-phase full bridge split capacitor topology. 4

Modeling of common-mode voltage

The leakage current of a certain topology is greatly influenced by the generated common-mode voltage that will be imposed on the parasitic capacitance of the PV array. To show the influence on the common-mode behavior of the topology in the case of inductor unbalance or inductance in the neutral wire, a model-based method for calculating the total common-mode voltage of transformerless topologies has been developed in this thesis. New topology

Nowadays, PV inverters feed only active power to the grid, having a power factor of 1. When there are many inverters injecting active power at the same time, the voltage at Point of Common Coupling might rise over the limits stated in the standards and trigger the safety of the inverters leading to disconnection or limit the power production below the available power. To overcome the before-mentioned disadvantage, a new high efficiency transformerless PV inverter topology called HB-ZVR (with very low leakage ground current) is proposed. The topology uses a bidirectional switch for short-circuiting the output of the converter during the zero voltage period using a switch and a diode bridge, capable of active and reactive power injection.

1.5 Outline of the thesis


The need for a cleaner environment and the continuous increase in power demands makes decentralized renewable energy production, like solar and wind, more and more interesting. Decentralized energy production using solar energy could be a solution for balancing the continuously-increasing power demands. This continuously increasing consumption overloads the distribution grids as well as the power stations, therefore having a negative impact on power availability, security and quality. One of the solutions for overcoming this is the grid-connected photovoltaic (PV) system. PV inverter systems can be improved in terms of efficiency using transformerless topologies, but new problems related to leakage current need to be dealt with. The work presented in this thesis deals with analyzing and modeling of transformerless PV inverter systems regarding the leakage current phenomenon that can damage solar panels and pose safety problems. The major task of this research was the investigation and verification of transformerless topologies and control strategies to minimize the leakage current of PV inverter topologies in order to comply with the standard requirements and make them safe for human interaction.

The thesis is divided into two parts: Part I Report and Part II Publications. Part I is a summary report of the work done throughout the research and contains 6 chapters. Chapter 1: Introduction, focuses on the background and motivation regarding the research done in this thesis. Furthermore, the objectives and limitations of the project are enumerated. The chapter finishes with the outline of the thesis. Chapter 2: Overview of grid connected PV systems, gives an overview about grid connected PV inverters, focusing on transformerless inverters and related safety issues. The parasitic capacitance of several commercial mono- and multi-crystalline PV panels has been measured, and an appropriate value has been defined for use in the simulations. Also, two commercial current sensors that can be used for leakage current measurement, have been tested and the results are presented in Appendix A. A detailed investigation of different inverter topologies regarding the ground leakage current is described in Chapter 3: Investigation of transformerless topologies, showing the ground voltage and leakage current for the analyzed topologies, concluding with whether the topology is suited for transformerless PV systems. Chapter 4: Common mode voltage in PV inverter topologies, explains the common-mode behavior of single and three-phase PV inverter topologies by presenting a comprehensive analysis of the single and three-phase transformerless converter with respect to the problem of the leakage current that flows through the parasitic capacitance of the PV array. In Chapter 5: H-Bridge Zero Voltage Rectifier topology, a new inverter called HBridge Zero Voltage Rectifier (HB-ZVR) is proposed, where the mid-point of the DC link is clamped to the grid only during the Zero Voltage period by means of a diode rectifier bridge and one switch. A comparison of known transformerless topologies and the HB-ZVR is performed using simulations, focusing on the voltage to earth harmonics and ground leakage current. Furthermore, experimental results are shown, confirming the simulations, and finally, the efficiency curve of the compared topologies is detailed. In Chapter 6: Conclusion, the final conclusion is presented, based on the theoretical and experimental results performed. Also a list is given, detailing the contributions presented in this thesis. Additionally, guidelines for future work are given. The second part of the thesis: Part II Publications contains the papers that have been published during the period of the research. The articles describe in detail the methods, simulations and the experimental results that make up the backbone of the work described in this thesis.

1.6 List of publications


I. D. Sera, T. Kerekes, R. Teodorescu, PV inverter control using a TMS320F2812 DSP; Proceedings of EDERS 2006; Page(s) 51 - 57. M. Ciobotaru, T. Kerekes, R. Teodorescu and A. Bouscayrol, PV inverter simulation using MATLAB/Simulink graphical environment and PLECS blockset IEEE Industrial Electronics, IECON 2006 - 32nd Annual Conference on: 6-10 Nov. 2006; Page(s):5313 - 5318 T. Kerekes, R. Teodorescu and U. Borup, Transformerless Photovoltaic Inverters Connected to the Grid; Twenty Second Annual IEEE Applied Power Electronics Conference, APEC 2007 -; Feb. 25 2007-March 1 2007; Page(s):1733 1737 T. Kerekes, R. Teodorescu, C. Klumpner, M. Sumner, D. Floricau, P. Rodriguez, Evaluation of three-phase transformerless photovoltaic inverter topologies; European Conference on Power Electronics and Applications, 2007; 2-5 Sept. 2007 Page(s):1 10 T. Kerekes, R. Teodorescu, M. Liserre, R. Mastromauro, A. Dell'Aquila, MPPT algorithm for voltage controlled PV inverters; 11th International Conference on Optimization of Electrical and Electronic Equipment, 2008. OPTIM 2008; 22-24 May 2008 Page(s):427 - 432 T. Kerekes, R. Teodorescu, M. Liserre, Common mode voltage in case of transformerless PV inverters connected to the grid; IEEE International Symposium on Industrial Electronics, 2008. ISIE 2008. June 30 2008-July 2 2008; Page(s):2390 2395 A. Dell'Aquila, M. Liserre, R. Mastromauro and T. Kerekes, A Single-Phase Voltage Controlled Grid Connected Photovoltaic System With Power Quality Conditioner Functionality; IEEE Transactions on Industrial Electronics; (accepted for publication) T. Kerekes, R. Teodorescu, M. Liserre, C. Klumpner and M. Sumner, Evaluation of Three-phase Transformerless Photovoltaic Inverter Topologies, IEEE Transactions on Power Electronics (accepted for publication) T. Kerekes, R. Teodorescu, P. Rodriquez, G. Vazquez and E. Aldabas, A new high-efficiency single-phase transformerless PV inverter topology; IEEE Transactions on Industrial Electronics (accepted for publication) 7

II.

III.

IV.

V.

VI.

VII.

VIII.

IX.

Chapter 2 Overview of grid connected PV systems


This chapter highlights the advantages of transformerless PV inverters compared to those with galvanic isolation. Furthermore, a summary of several transformerless PV inverter topologies is presented, followed by discussions about the parasitic capacitance of the PV array, emphasizing the safety issues regarding ground leakage currents due to varying voltages imposed over this capacitance.

2.1 Introduction
PV systems connected to the low voltage grid have an important role in distributed generation systems. In order to keep up with the current trends regarding the increase in PV installations, PV inverters should have the following characteristics: Low cost Equation Chapter (Next) Section 1 Small weight and size, due to residential installations High reliability to match with that of PV panels High efficiency Be safe for human interaction

During the last decade PV inverter technologies have evolved a lot. As shown in Fig. 2.1, inverter prices have dropped around 50% during the last two decades and efficiency and reliability have increased considerably [1]. Depending of the power rating of the inverter, the price of inverters below 10 kW varies between 0.2 and 1.2 euro/kW excluding VAT [8]. All this development and improvement happened especially in Europe, USA and Japan. Here one can find many small-scale, building integrated systems that are connected to the grid [9]. 9

In order to decrease the cost-to-efficiency ratio of PV systems, new inverter designs have been developed. A general classification of grid connected PV inverters is as follows [1], [9], [10], [11], [12], [13],[14]: central inverters string inverters module integrated inverters multi-string inverters

Fig. 2.1: Development and prognoses of specific cost and production quantity for a PV-inverter of nominal power between 1 and 10kW during the last two decades [1].

2.1.1 C entral inverters


PV plants bigger than 10 kWp arranged in parallel strings, are connected to one common central inverter (as shown in Fig. 2.2(a)). At first, line commutated thyristor based inverters were used for this purpose. These were slowly replaced by force commutated inverters using IGBTs, because the efficiency of these inverters is higher and their cost is lower. However the list of its disadvantages is significant: need for high-voltage DC cables between PV panels and inverter power losses due to common MPPT power loss due to module mismatch losses in the string diodes reliability of the whole system depends on one inverter

10

2.1.2 String inverters


String inverters, shown in Fig. 2.2(b), were introduced into the European market in 1995. They are based on a modular concept, where PV strings, made up of seriesconnected solar panels, are connected to separate inverters. The string inverters are paralleled and connected to the grid. If the string voltage is high enough then no voltage boosting is necessary, thereby improving efficiency. Fewer PV panels can also be used, but then a DC-DC converter or a line frequency transformer is needed for a boosting stage. The advantages compared to the central inverter are as follows: no losses in string diodes (no diodes needed) separate MPPTs for each string better yield, due to separate MPPTs lower price due to mass production

2.1.3 M odule inverters


An AC module is made up of a single solar panel connected to the grid through its own inverter, as shown in Fig. 2.2(c). The advantage of this configuration is that there are no mismatch losses, due to the fact that every single solar panel has its own inverter and MPPT, thus maximizing the power production. The power extraction is much better optimized than in the case of String inverters. One other advantage is the modular structure, which simplifies the modification of the whole system because of its plug & play characteristic. One disadvantage is the low overall efficiency due to the high-voltage amplification, and the price per watt is still higher than in the previous cases. But this can be overcome by mass production, leading to low manufacturing and retail costs [10].

2.1.4 M ulti-String inverters


Multi-String inverters have recently appeared on the PV market. They are an intermediate solution between String inverters and Module inverters. A Multi-String inverter, shown in Fig. 2.2(d), combines the advantages of both String and Module inverters, by having many DC-DC converters with individual MPPTs, which feed energy to a common DC-AC inverter. This way, no matter the nominal data, size, technology, orientation, inclination or weather conditions of the PV string, they can be connected to one common grid connected inverter[15], [16]. The Multi-String concept is a flexible solution, having a high overall efficiency of power extraction, due to the fact that each PV string is individually controlled, as done by the Sunny Boy Multi-String 5000 by SMA.

11

PV Strings

PV Strings
PV Strings

PV modules

Central inverter

String inverter

Module inverter
Multi-string inverter
AC bus

AC bus

AC bus

AC bus

(a)

(b)

(c)

(d)

Fig. 2.2: Different grid-connected PV inverter structures: Central inverter (a); String inverter (b); Module inverter (c) and Multistring inverter (d).

2.2 Grid requirements


If a PV system is connected to the grid, then the generated power has to comply with specific standards, which are regulated by the utility in each country. The main norms that grid connected inverters have to comply with are: Total Harmonic Distortion (THD) and individual harmonic current levels Power factor (PF) Level of injected DC current Voltage and frequency range for normal operation Detection of islanding operation (islanding or non-islanding functions) Automatic reconnection and synchronizing Grounding of the system

International Standards that deal with grid connected photovoltaic systems are the following: IEC 60364-7-712:2005. Electrical Installations of Buildings. Part 7: requirements for special installations or locations. Section 712: Photovoltaic power supply systems. [17] IEEE 1547.1-2005 IEEE Standard Conformance Test Procedures for Equipment Interconnecting Distributed Resources with Electric Power Systems. [18] 12

UL 1741. Standard for Safety Inverters, Converters, Controllers and Interconnection System Equipment for Use with Distributed Energy Resources. 7th May 1999, updated in 2005.

IEEE 929-2000. Recommended Practice for Utility Interface of Photovoltaic (PV) Systems. [19] IEC 61727 (1995-06) Photovoltaic Systems Characteristics of the Utility Interface. [20] DS/EN 61000-3-2 (2001) EMC, Limits for harmonic emissions (equipment input current up to and including 16 A per phase) [21] VDE0126-1-1 (2006) Selbsstttige Schaltschtelle zwischen einer netzparalellen Eigenerzeugungsanlage und dem ffentlichen Niederspannungsnetz [22]

Most of the above standards are related to the THD and to the individual harmonic levels in the injected current, the frequency deviation of the grid voltage from the standard one, the PF, the normal operating voltage range and the level of the DC current that is injected in the grid. In [10] a comparison of three different standards is made (IEC61727, IEEE1547 and EN61000-3-2), focusing on the previously enumerated issues. Regarding DC current injection (an important issue in case of grid connected inverters) the following table can be summarized about the requirements set by each standard:
Table 2-1: Limit of the injected DC current, for different standards [10]. IEC61727 VDE0126-1-1 IEEE1547 EN61000-3-2 < 0.5 % of <1A rated output current < 0.22 A corresponds to a 50 W half-wave rectifier

IEEE 929-2000

DC current injection

< 1 % of rated output current

< 0.5 % of rated output current

Furthermore, the VDE 0126-1-1 standard states, that in the case of a DC current injection greater than 1 A, disconnection is mandatory in 0.2 s. The other standards do not mention a requirement for disconnection time. There is only one standard that specifically deals with transformerless PV systems regarding fault and leakage current levels: the German VDE-0126-1-1 standard. According to the German standard, there are three different currents that have to be monitored: 13

Ground Fault current, which happens in case of insulation failure when the current flows through the ground wire; Fault current, which represents the sum of the instantaneous values of the main currents, that in normal conditions leads to zero; Leakage Ground currents, which is the result of potential variations of capacitive coupled parasitic elements;

The monitoring is typically done using a Residual Current Monitoring Unit (RCMU), which measures the fault and leakage current of the whole system. The standard states that disconnection from the grid is necessary within 0.3 s in case the leakage current is higher than 300 mA. Furthermore, it recommends a table detailing the Root Mean Square (RMS) value of the fault/leakage current jumps and their respective disconnection times, as detailed in Table 2-2.
Table 2-2: Leakage current jumps and their corresponding disconnection times for VDE 0126-1-1 Leakage current jump value Disconnection time (mA) 30 60 100 (s) 0.3 0.15 0.04

As shown in Table 2-2, in cases where the RMS value of the fault/leakage current increases by 30 mA, then disconnection is mandatory within 0.3 s. This way in case of a fault/accident or too high leakage ground current, the system is disconnected and deenergized.

2.3 Transformerless PV inverters


Depending on the electrical isolation between the PV panels and utility grid, the inverter can be isolated or non-isolated. This galvanic isolation is usually realized by the means of a transformer, which has major influence on a grid-connected PV systems DC to AC efficiency [23]. The presence of the galvanic isolation in a grid connected PV system depends on the local country regulations [24]. In some countries, like the UK and Italy, galvanic isolation is a requirement and is done either by a low-frequency step-up transformer on the grid side or by a high-frequency transformer on the DC side of the converter, as detailed in Fig. 2.3.(a) and (b), respectively. 14

On the other hand, there are countries like Germany and Spain, where the galvanic isolation can be left out, in case another technological solution is used to separate the PV array from the electrical grid [25]. A typical transformerless PV system is detailed in Fig. 2.4, which reduces the weight, size, cost and installation complexity of the whole PV system. One disadvantage of transformerless systems is that the missing line-frequency transformer can lead to DC currents in the injected AC current by the inverter, which can saturate the core of the magnetic components in the distribution transformer, leading to overheating and possible failure [26],[27]. An important advantage of the transformerless solution is the increase in the total efficiency of the system by approximately 2% [12], [28],[29],[30],[31],[32].

Filter

PV Array

LF transformer

with HF transformer

(a)

(b)

Fig. 2.3: Grid-connected PV system using an inverter with galvanic isolation: grid-side low-frequency (LF) transformer (a) or DC side high-frequency (HF) transformer (b).

Fig. 2.4: Grid connected PV system with transformerless inverter.

PV inverters usually have two efficiencies reported by the manufacturer: the highest DC-AC conversion efficiency, also called as Maximum Efficiency, and a weighted efficiency dependent on efficiencies at different irradiation levels, called European efficiency, based on the formula below [29]:

EU 0,035% 0,0610% 0,1320% 0,130% 0,4850% 0,2100%

Filter

PV Array

Filter

PV Array

(2.1)

15

Fig. 2.5 has been made from a database of more than 400 commercially available PV inverters, presented in a commercial magazine about the photovoltaic industry [33], giving details of, amongst other things, the maximum efficiency, weight and size of the different inverters.

Fig. 2.5: PV inverter comparison, based on PHOTON database.

Transformerless inverters are represented by the dots (), while the stars () represent the topologies including a high-frequency DC-DC transformer and last the triangles () represent the inverters that have a low-frequency transformer on the grid side, adding a galvanic isolation between the PV and grid. It is shown that in the case of PV systems up to 6.5kW, transformerless inverters can reach maximum efficiencies 16

up to 98%, while inverters with galvanic isolation only have maximum conversion efficiency around 96-96.5%. The conclusion drawn from these graphs is that the majority of transformerless inverters have higher efficiency, smaller weight and size than their counterparts with galvanic separation. In the case of Fig. 2.5, the reason for limiting the power up to 6.5kW was the fact that there were only 20 inverters between 6.5 and 15kW and including these in the graph would have influenced the readability of the results.

2.4 Transformerless inverter topologies


Inverters, according to the levels of power conversion, can have one or more stages. A single and double stage topology for a single-phase grid connection is presented in Fig. 2.6 [34].

Filter

PV

DC -> AC

Grid

PV

DC -> DC

DC -> AC

Filter

Grid

(a)

(b)

Fig. 2.6: Single stage (a) and double stage including voltage boost (b) grid connected PV inverters.

Depending on the voltage level of the PV array, a voltage-boosting stage can be present, which raises the DC-link voltage of the inverter to the required level. This is the case of the two stage topology, where the PV system includes either a DC-DC boost converter, followed by a DC-AC grid side inverter or a step-up transformer on the AC side [35]. The first PV inverters were based on the technologies used in electrical drives from the beginning of the 1980s. As seen in Fig. 2.7(a), they were line commutated inverters with power ratings of several kW. The major advantages were high efficiency, cheapness and robustness, but the power factor was a major drawback with values between 0.6 and 0.7. Nowadays inverters are force commutated inverters having power ranges above 1.5kW. A classic transformerless topology can be seen on Fig. 2.7(b), having an HBridge configuration, usually with switching frequencies greater than 16 kHz to avoid acoustic noise. The efficiency is lower than the line commutated topology, due to the high switching losses. But it is still a robust, cheap and well known technology [36]. 17

T1

T3
Filter

T1

T3
Filter

C
T2 T4
(b)

T2

T4
(a)

Fig. 2.7: Typical single-phase PV inverter, past and present topology, showing a line commutated inverter(a) and an H-Bridge (force commutated) inverter (b) [36].

In case the voltage level from the PV is lower than the required minimum, then a boost converter is added between the PV array and the inverter. This boosts the input voltage from the PV so the inverter has a DC-link voltage around 400 V for singlephase systems and up to 700 V for three-phase grid connection in the European case. Such a single-phase topology can be seen on Fig. 2.8, which differs from Fig. 2.7(b) only by the added boost stage.
D L
TB

T1

T3
Filter

C
T2 T4

Fig. 2.8: Transformerless PV inverter with voltage boost stage [37].

In [38], a similar topology to Fig. 2.8 is proposed for a grid connected PV system. As presented in Fig. 2.9, it is made up of a boost rectifier that raises the voltage of the PV array from 100 V to above 680 V. This half-bridge topology uses the upper switches in case positive output voltage and the lower switch in case when negative output voltage is required. This topology is used by SMA in their old transformerless inverter Sunny Boy 5000TL Multi-String[16].

18

D L
C
TB

T1
Filter

T2

Fig. 2.9: Half-bridge topology with voltage boost stage [38].

Having fewer switches in this topology it implies: lower conduction losses fewer number of components

The disadvantage is that higher input voltage is needed, which increases the rating of the components. There are also other, more complicated topologies that were summarized in [38] and are a combination of multiple boost or buck-boost single stage inverters. The first topology can be seen on Fig. 2.10 and was proposed by Cceres and Barbi [39]. The DC inputs of the two identical boost DC-DC converters are connected in parallel with a DC source, such as a PV panel for example. Each one of the converters is modulated to produce a unipolar DC biased sinusoidal output, having a 180 phase-shift between each other. This way the output across the load is a pure sinusoidal waveform.

T4 Cs L1 T3 L 2 T1 T2

C2

Fig. 2.10: Boost inverter by Cceres and Barbi [39].

Similarly to the previously presented solution, Vsquez proposed a buck-boost inverter, connecting two buck-boost converters in parallel, the same way as in Fig. 2.10, thereby generating an output voltage either lower or higher than the input. See Fig. 2.11 for details.

Filter

C1

19

T1

T4

L2 T2
T3

C2

Fig. 2.11: Buck-boost inverter topology by Vsquez [40].

Another buck-boost inverter topology, proposed in [41] for a residential PV power system, is able to operate with a wide input voltage range but needs a split DC input source [42]. The topology can be seen in Fig. 2.12. The two converters share the output and operate each half cycle with their own voltage supplies. It is emphasized in [43], that this topology has the inherent nature of common ground for the DC and AC, which makes it suitable for systems where the grounding is required both for the grid neutral and for the distributed power generation resource.

T3 C2

T4 D2 L2

Filter

C1
T1

L1
T2 D1

Fig. 2.12: Buck-boost inverter by Kasa [41],[44].

Furthermore, Wang proposed a four-switch resonant buck-boost inverter. The topology can be seen in Fig. 2.13. This zero-current-switching buck-boost inverter operates with switches T1 and T4 and diode D2 in the positive half cycle together with Lr1 and Cr and with T2, T3 and D1 in the negative half cycle together with Lr2 and Cr.
T3

L2r

D2

T1

D1
Filter

L1r Cr

T4

T2

Fig. 2.13: Four-switch resonant buck-boost inverter by Wang [45].

20

Filter

Cs

L1

C1

The flying inductor topology patented in [46], reviewed in [37], is shown in Fig. 2.14. It has the advantage of being able to operate in different modes. The positive output current waveform is generated by the converter operating in either buck or boost modes. When the input voltage is higher than the grid voltage, then the inverter operates in buck mode.
T1
D1

T4

L
D2

T5

Filter

T2

T3

Fig. 2.14: Flying inductor inverter[46].

As shown in Fig. 2.15(a), T1 is sine modulated, T2 and T4 are open all the time, T3 and T5 are permanently closed and D1 acts as a freewheeling diode. In the other case, when the input voltage is below the grid voltage, then (as detailed in Fig. 2.15(b)), T1 and T2 are simultaneously sine modulated, T3 and T5 are permanently closed and T4 is open and D1 acts as a freewheeling diode. The negative current waveform is generated by operating the inverter in buck-boost configuration, as shown in Fig. 2.15(c). T1 is sine modulated, T2 and T4 are permanently closed and T3 and T5 are open. D1 acts as a freewheeling diode.

T1

D1

T4

D2

T5 T3

Filter

T2

(a) Buck mode.


D1

T1

T4

D2

T5 T3

Filter

T2

(b) Boost mode.

21

T1

D1

T4

L
D2

T5 T3

Filter

T2

(c) Buck-boost mode. Fig. 2.15: Three different operation modes of the flying inductor inverter.

The main disadvantage of the above topology is the design requirements for the inductor (L), which serves as an energy storage. Magnetic components add to the size and cost of the converter and reduce the overall efficiency. The advantage of this topology is that the negative terminal of the PV array is always connected to grounded grid neutral, thereby fixing the potential of the PV [37]. This topology is used by Siemens in their Sitop Solar Master 1100 PV inverter. A similar topology to the flying inductor topology is shown in Fig. 2.16 and has been presented in [47]. During the inverting period, when the grid voltage is negative, T1, T3 and T6 are in their conducting state, while T4 and T5 are in their blocking state. T2 is used to shape the output voltage over L2 into a sinusoidal form, using PWM modulation. When the grid voltage is positive, the inverter is in the noninverting period and T2, T4 and T5 are in their conducting state, while T3 and T6 are blocking. T1 is used to shape the output voltage over L2 using a sinusoidal PWM.

T1
T5 C T6 T3

L2

L1

T4

T2
Fig. 2.16: Transformerless PV inverter topology patented by Schekulin [47].

Fig. 2.17 shows a grid connected neutral point diode clamped inverter having a boost stage at its DC input. For the positive current half-wave switches T1 and T2 are used. Turning T2 and T3 ON generates the zero output voltage. And finally, the negative half wave is generated by the pulse-width modulation of T3 and T4. This topology allows the connection of the midpoint of the DC bus to grid neutral, thereby reducing the voltage fluctuations between the PV array and ground [37], [48].

22

L
TB

D
C

T1
D1 T2 D2 T3
Filter

T4

Fig. 2.17: Neutral point diode clamped inverter [37], [49] and [50].

A patented topology shown in [51], called the Highly Efficient and Reliable Inverter Concept (HERIC), uses a modified version of the H-Bridge, by adding two extra switches connected in series with two diodes as shown in Fig. 2.18. The two extra switches (T5 and T6) are used for the freewheeling period and increase the efficiency of the inverter due to the fact that the freewheeling current will not go back to the DClink capacitor, but it finds a path through T5 or T6 and the respective diode, depending on the sign of the current.

T1

T3 T5 T6
Filter

C
T2 T4

Fig. 2.18: Highly Efficient and Reliable Inverter Concept from Sunways [51].

Another patented inverter topology is again an H-Bridge hybrid. SMA calls it the H5 topology. As detailed in Fig. 2.19, it is made up of a standard H-Bridge topology with an added fifth switch on the DC side. Using this circuit configuration, maximum conversion efficiencies of up to 98% have been reported, depending on the input voltage.

T5

T1

T3
Filter

C
T2 T4

Fig. 2.19: H5 topology from SMA [52].

23

A similar topology to the previous one is presented in Fig. 2.20, which also uses a modified H-Bridge topology, and adds two extra switches and two diodes. In [53] it is shown that the conversion efficiency of this topology is in the range of 97%, decreasing only in case the input DC voltage is increased above 350V, but even in those cases it stays above 95%.

T5

T1

T3
Filter

T6

T2

T4

Fig. 2.20: Transformerless topology by Gonzales et al. [53].

There are several more topologies that have been proposed for transformerless PV inverters in [54],[55],[56], [57], [58] and [59], although their major disadvantage is that they have several conversion stages and need a complex control structure, thereby decreasing the overall conversion efficiency and increasing the complexity and the component count of the inverter. The PV inverter industry has developed a lot in the last few decades. During these years many transformerless topologies have been proposed, but only a few have been accepted by the industry as suitable topologies for grid-connected PV systems. Therefore, inverters available on the commercial market include the most promising topologies, from the point of view of the structure, complexity, safety, price and efficiency.

2.5 Parasitic capacitance of PV arrays


Nowadays most photovoltaic panels have a metallic frame, which is required to be grounded in almost all countries, in order to comply with the safety regulations and standards. Since PV panels have a considerable surface area, this with the metallic frame forms a parasitic capacitance, shown as CG-PV in Fig. 2.21. The value of this parasitic capacitance depends on the: Surface of the PV array and grounded frame Distance of PV cell to the module Atmospheric conditions Dust and humidity, which can increase the electrical conductivity of the panels surface [2]. 24

In [60] the parasitic capacitance of certain PV panels has been measured to be around 150 pF. If the surface of the panel is fully covered with tap water, the parasitic capacitance increased to 9 nF, approximately 60 times its previous value. According to the measurements the parasitic capacitance varies between 50 nF and 150nF for each kW of installed PV panels. In [60],[61] and [62] the parasitic capacitance has been measured for different PV panels, varying from 100 pF to 3.6 F. It is also mentioned that in the case of thin film modules the measured parasitic capacitance reaches values up to 1 F/kW, due to the metallic sheet on which the cells have been deposited. In order to have a fairly precise value for simulations, the parasitic capacitance has been also measured for the following multicrystalline PV panels: Soleil FVG 36125, Kyocera KS10 and BPSolar MSX120. An HP/Agilent 4284A Precision LCR Meter has been used to measure the series capacitance value, using the following output voltage settings: fsw-LCR=10 kHz, VoutLCR=5 V. The measurements, shown in Table 2-3, have been done by connecting the first terminal of the LCR meter to the output terminal of the PV panel (positive, negative or both short-circuited) and the second terminal of the LCR meter to the frame of the PV panel.
Frame

Glass
CG-PV
CG-PV

IG-PV

PV-cell
Substrate

CG-PV

Fig. 2.21: Parasitic capacitance in PV panels [2].

In case of the measurement using someones palm, the second terminal of the LCR meter was connected to the palm directly, while the whole palm touched the surface of the PV panel. In this case there were two different palms: a copper palm, represented by a copper plate, having the size of an average palm and a normal human palm. The frequency of the output voltage has been changed for the following values: 1kHz, 10 kHz, 20 kHz and 50 kHz. No difference has been observed in case of the first set of measurements, representing the case when the PV panels and the palm were dry. The measured parasitic capacitance values were not influenced by the frequency of the voltage. Furthermore, the atmospheric conditions were changed by covering the surface of the PV panels with moisture and the measurements were repeated, in order to take the readings for the wet case too. 25

The results are summarized also in Table 2-3, and it can be seen that in humid atmospheric conditions the measured values of the parasitic capacitance have significantly increased, in some cases by a factor of 10 or more, depending on the frequency of the imposed voltage.
Table 2-3: Parasitic capacitance measurements. Soleil FVG 36125 204 x 352 mm2 80 W 130 pF 2.58 nF @ 1 kHz 1.38 nF @ 10 kHz 1.12 nF @ 20 kHz 770 pF @ 50 kHz 247 pF 140 pF 215 pF @ 1 kHz 185 pF @ 10 kHz 175 pF @ 20 kHz 160 pF 219 pF @ 1 kHz 210 pF @ 10 kHz 208 pF @ 20 kHz 205 pF @ 50 kHz Kyocera KS10 1197 x 535 mm2 10 W 57 pF 3.44 nF @ 1 kHz 2.39nF @ 10 kHz 1.99nF @ 20 kHz 1.37 nF @ 50 kHz 101 pF 150 pF 350 pF @ 1 kHz 230 pF @ 10 kHz 180 pF @ 20 kHz 140 pF 235 pF @ 1 kHz 212 pF @ 10 kHz 207 pF @ 20 kHz 200 pF @ 50 kHz BPSolar MSX120 1108 x 991 mm2 120 W 21 pF 9 nF @ 1 kHz 3 nF @ 10 kHz 2 nF @ 20 kHz 1.15 nF @ 50 kHz not available 200 pF 320 pF @ 1 kHz 200 pF @ 10 kHz 185 pF @ 20 kHz 150 pF 276 pF @ 1 kHz 257 pF @ 10 kHz 251 pF @ 20 kHz 244 pF @ 50 kHz

Surface of PV panel Power at MPP (STC) CG-PV(1 panel) CG-PV(1panel) wet

CG-PV(2panels) CG-PV(1panel+ palm) CG-PV (1panel+palm) wet

CG-PV(1panel+ copper plate) CG-PV(1panel+ copper plate) wet

This parasitic capacitance is present in every PV installation and may or may not lead to leakage ground current, depending on the existence of the return path within the circuit. Since the value of this parasitic capacitance changes within wide ranges depending on construction, atmospheric conditions, etc., a value of 100 nF/kW has been chosen to be used in simulations, in order to accurately simulate the behavior of the whole PV system, with regards to the ground leakage current. The 100 nF/kW value has been chosen taking into account the worst case scenario in case of a 5 kW PV installation, made up of 40 BPSolar 120MSX panels.

2.6 Leakage ground current


A transformerless topology lacks the galvanic isolation between the PV array and grid. This way the PV panels are directly connected to the grid, which means that 26

there is a direct path for the leakage ground currents caused by the fluctuations of the potential between the PV array and the grid. These voltage fluctuations charge and discharge the parasitic capacitance formed between the surface of the PV and grounded frame, shown as CG-PV in Fig. 2.22. The parasitic capacitance together with the DC lines that connects the PV array to the inverter, form a resonant circuit and the resonance frequency of this circuit depends on the size of the PV array and the length of the DC cables [63],[64]. A study, presented in [60] discusses the electrical hazards when a person touches the surface of the PV array. Based on the inverter topology, PV panel structure and modulation strategy, when touching the surface of the panels, a ground current could flow through the human body and if the current is above a certain levels it could lead to a shock or resulting in personal injury, as also discussed in [65], [66]. The path of the ground current (IG-PV) flowing through the parasitic capacitance of the PV array is shown with a grey intermittent line in Fig. 2.22.

IG-PV

IG-PV

CG-PV

Fig. 2.22: Transformerless PV system showing the parasitic capacitance between the PV and the grounded frame of the array and the path of the alternating ground leakage current.

In [60] several recommendations are given, which lead to the minimization of the before mentioned leakage current, by: grounding the frame of the PV array, which reduces the capacitance, thereby minimizing the ground leakage current. carefully choosing the topology and the modulation strategy, thereby reducing the voltage fluctuations between the PV array and ground. disconnecting the inverter under service maintenance. The VDE0126-1-1 standard recommends the use of a Residual Current Monitoring Unit (RCMU) in order to monitor the safe operation of the grid connected PV system. Several experimental tests have been done in order to test two commercially available current sensors that could be used for ground leakage current measurement.

Filter
IG-PV

PV Array

27

The LEM CT 0.2-P [67] sensor is a differential current sensor used for current measurements up to 400 mA. The step response tests showed that using this sensor the readings are accurate in all conditions. There are some high frequency oscillations in the sensor output in the case of the high frequency capacitive discharge test, but otherwise the sensor was very accurate and had a steady state error below 5% of the reading. Step response tests had less than 20% overshoot above the reference level and the output stabilized after 0.2 s. The Telcon HES 25VT [68] sensor was also tested for differential current measurement, by modifying the auxiliary circuit based on the suggestions on the suppliers webpage, in order to be able to measure mA currents. Direct currents could be measured accurately. On the other hand, the 50 Hz current influenced the reading and a 50 Hz component was present in the sensor output having amplitude proportional to the level of the 50 Hz current. The influence was further investigated and it was found out that the position of the wires relative to the Hall sensor is very important and the output of the sensor is very sensitive to this position. The details regarding these tests are included in Appendix A.

2.7 Summary
This chapter shows the advantages of transformerless PV inverters compared to topologies with galvanic isolation. It is shown that transformerless topologies are smaller in size and have higher efficiencies than inverters with high-frequency or lowfrequency transformers. Furthermore, a summary of several transformerless PV inverter topologies is presented, detailing the many different topology structures that are used by the PV industry or have been proposed as transformerless PV inverters. Finally the parasitic capacitance of the PV array is discussed and measured in case of several commercial PV panels, emphasizing the safety issues regarding ground leakage currents due to varying voltages imposed over this capacitance.

28

Chapter 3 Investigation of transformerless topologies


In this chapter the modeling of several transformerless grid connected topologies is done. For each case the voltage to ground and leakage ground current is measured and, based on the result, a conclusion is given regarding the use of such a topology in transformerless grid-connected PV systems.

3.1 Introduction
The voltage to ground is measured across CG-PV, between the DC+ and ground respectively, DC- and ground terminals of the PV array, as shown in Fig. 3.1. The parasitic capacitance of the PV array is modeled using a simple capacitor, through which the leakage current finds its path to ground. This leakage current is measured and, based on these results, an individual conclusion is drawn for each topology.

V A

CG-PV
DC+

DC-

CG-PV

Fig. 3.1: Voltage to ground and leakage ground current measurement setup.

Filter

PV Array

29

Simulations were done in MATLAB Simulink with the PLECS toolbox, used to model the electrical part of the system, as detailed in Publication II. The implemented control strategy is described in Publication I. The simulation parameters are given in Table 3-1. Equation Chapter (Next) Section 1
Table 3-1: Parameters used in case of the simulation. Simulation step size Switching frequency Single phase DC voltage Three-phase DC voltage DC-link capacitance Output filter inductance Output filter capacitance Grid voltage (peak of phase to neutral voltage) Grid frequency Grid inductance Ts=2,5e-7 s (250 ns) fsw=10 kHz Vdc1=400 V Vdc3=700 V Cdc=1 mF Lf=1.8 mH Cf=2 F Vg=325 V fg=50 Hz Lg=50 H

Two LCL filter configurations can be considered for the grid side filter, as presented in Fig. 3.2, having inductor Lf only in the line branch or like in Fig. 3.3, having inductor Lf split equally between the line and neutral branches. The current ripple is identical for both, although the leakage current is greatly influenced by the filter configuration, as will be shown in the simulations. Only the LCL configuration has been used for the grid side filter, because it has the advantage over the Lf and LC filter configurations that it reduces the dependence on grid parameters by providing a better decoupling between the filter and grid impedance [69].

Fig. 3.2: LCL filter configuration (case 1).

Fig. 3.3: LCL filter configuration (case 2).

The simulations include the following topologies: Single-phase: o H-Bridge with bipolar modulation 30

o H-Bridge with unipolar modulation o H-Bridge with hybrid modulation o H-Bridge with AC bypass (HERIC)

o H-Bridge with DC bypass (H5-SMA) o Half-Bridge Three-phase inverter

o H-Bridge with DC bypass (6 switches) o Neutral Point Clamped o Three-phase Full-Bridge

o Three-phase Full-Bridge with split capacitor gered modulation

o Three-phase Full-Bridge with split capacitor using stag-

o Three-phase Neutral Point Clamped

3.2 Single-phase topologies


Single-phase systems are mostly used in the private sector. The majority of such PV systems can have up to 5kW and are roof mounted with a fixed tilt and a southward orientation.

3.2.1 H -B ridge topology w ith Bipolar PW M


The H-Bridge is a well-known topology and it is made up of two half bridges. This topology has also been used in motor drives or UPS applications. To control the four switches of this topology several PWM techniques can be implemented. The simplest one is the bipolar PWM [70], which modulates switches T1-T4 (Fig. 3.4) complementary to T2-T3 (Fig. 3.5), resulting in a two level output voltage (+VDC and -VDC). The conversion efficiency is reduced due to the fact that during the freewheeling period the grid current finds a path and flows back to the DC-link capacitor.

Cdc

T1

T3

A
PV

Filter
B

Cdc

T2

T4

CG-PV

Fig. 3.4: T1-T4 turned-ON, for +VDC output voltage.

31

Cdc

T1

T3

A
PV

Filter
B

Cdc

T2

T4

CG-PV

Fig. 3.5: T2-T3 turned-ON, for -VDC output voltage.

Fig. 3.6 shows an FFT of the voltage to ground of the PV array when the grid side filter has the inductors only in the line side. In this case there are high frequency components at the switching frequency and multiples of it, having very high amplitudes. If these high frequency voltage fluctuations are imposed on the parasitic capacitance of the PV array, then the leakage current will be very high and the exact value of the current will depend only on the value of the parasitic capacitance (CG-PV). Therefore it can be said, that this particular case with such a filter configuration is not suitable for transformerless PV systems.

Fig. 3.6: Simulation results, FFT of voltage to ground having a bipolar PWM (grid side filter is according to case 1 from Fig. 3.2).

On the other hand, when the grid side filter inductors are equally distributed in both line and neutral connections, case 2 presented in Fig. 3.3, the bipolar PWM strategy will result in a constant common-mode voltage and the voltage to ground of the PV array will only fluctuate with the grid frequency with an amplitude half of the peak value of the grid voltage, as also shown in Fig. 3.7 for the simulated waveforms and in Fig. 3.8 for the experimental measurements. This means that the H-Bridge with bipolar modulation, having a grid side filter with inductors equally distributed between both line and neutral, is suitable for transformerless PV systems. The only drawback is the conversion efficiency, as discussed earlier. 32

Fig. 3.7: Simulation results, voltage to ground for both terminals of the PV array with bipolar PWM (grid side filter is according to case 2 Fig. 3.3).

Fig. 3.8: Experimental measurements showing, on Channel 1 the bipolar output of the converter, on Channel 2 the voltage to ground (DC- terminal of the PV array) and on Channel 3 the leakage ground current for the single-phase inverter with bipolar PWM (grid side filter is according to case 2 Fig. 3.3).

3.2.2 H -B ridge topology w ith U nipolar PW M


This H-Bridge topology uses a different PWM than the bipolar one, which results in unipolar output voltage (+Vdc, 0 and -Vdc) that has twice the switching frequency. The advantage of this method is that the grid side filter elements need to be much smaller due to the unipolar output of the converter and also due to the fact that the 33

frequency of the output voltage is twice the switching frequency. Therefore, the switching frequency in this case has been set at 5 kHz. Furthermore, during the freewheeling period, the grid current finds a path through the short-circuited output of the converter, either through T1-T3, as shown in Fig. 3.9 or similarly through T2-T4.

Cdc

T1

T3

A
PV

Filter
B

Cdc

T2

T4

CG-PV

Fig. 3.9: Zero voltage vector, using T1-T3 as free-wheeling path.

On the other hand, there is a big disadvantage in case the unipolar PWM is used for transformerless PV systems, regarding the voltage to ground of the PV array and the ground leakage currents. As shown in Fig. 3.10, the modulation strategy generates a varying common-mode voltage. The FFT of the voltage shows that components at the switching frequency have very high amplitudes in the range of VDC.

Fig. 3.10: FFT of simulated voltage to ground having a unipolar PWM. (grid side filter is according to case 2 Fig. 3.3).

Also the experimental measurements, shown in Fig. 3.11, confirm the high frequency voltage components present in the voltage to ground measured between the DC- terminal and the ground connection, leading to very high leakage ground current, with peaks well above 5 A. Knowing this fact, it can be stated that the H-Bridge with unipolar PWM cannot be used in transformerless PV systems. 34

Fig. 3.11: Experimental measurements showing, on Channel 1 the unipolar output of the converter, on Channel 2 the voltage to ground (DC- terminal of the PV array) and on Channel 3 the leakage ground current for the single-phase inverter with unipolar PWM (grid side filter is according to case 2 from Fig. 3.3).

3.2.3 H -B ridge topology w ith hybrid m odulation


Another type of modulation that can be used in case of an H-Bridge is a hybrid modulation, also called single-phase chopping [60],[71]. In this case, one leg of the inverter is modulated with the switching frequency, while the second leg is switched with the grid frequency. This way the neutral line of the topology is connected either to the positive or the negative DC terminal, depending in which half period the reference signal is. In case the filter inductor is only placed in the phase connector and the neutral connector is left inductance free, as shown in Fig. 3.2, the simulated voltage to ground of the PV array will look as presented in Fig. 3.12, having a square waveform with 50 Hz frequency. Due to the sharp changes in the voltage that happens every 10 ms, the leakage ground current will have 100 Hz spikes. The amplitude of these spikes will depend on the value of the parasitic capacitance and therefore it might lead to a leakage ground current that is above the allowed limit set in the VDE 0126 standard. Besides the square wave shape of the voltage to ground, this modulation technique has another drawback, which is the two quadrant operation, making it impossible to have reactive power flow [60].

35

Fig. 3.12: Voltage to ground for both terminals of the PV array (H-Bridge topology; output filter according to case 1 from Fig. 3.2).

3.2.4 H ER IC topology from Sunw ays


To keep the high efficiency and all the advantages given by the unipolar PWM, but still have the common-mode behavior as in case of the bipolar PWM, the H-Bridge topology has been modified as presented in[51], the Highly Efficient and Reliable Inverter Concept (HERIC). The modification includes two extra switches (T5-T6) each connected in series with a diode. During the zero voltage vector, depending on the sign of the reference voltage, either T5 of T6 are turned ON, while T1, T2, T3 and T4 are all in their OFF state and the PV array is disconnected from the grid, as shown in Fig. 3.13. This way there is a possibility of achieving the zero voltage vector and the output voltage will be unipolar, having the same frequency as the switching frequency and there will be no high frequency fluctuations present at the DC terminals of the PV array. Furthermore, the efficiency of the inverter is still kept high, because during the freewheeling period, the load current is short-circuited through T5 or T6, depending on the sign of the grid current.

Cdc

T1

T3

A
PV

T5 T6

Filter

Cdc

T2

T4

CG-PV

Fig. 3.13: Path of the current during the zero voltage vector, for positive load current (HERIC).

36

As seen in Fig. 3.14, the common-mode behavior of the HERIC topology is similar to the H-Bridge with bipolar PWM. The voltage to ground of the PV array terminals will only have a sinusoidal shape, while having the same high conversion efficiency as the H-Bridge with unipolar switching. Based on these results, it can be stated that the HERIC topology is suitable for transformerless PV systems. Unipolar output voltage is achieved and the PV array is disconnected from the grid during the period of the zero voltage vector, using a method called AC decoupling.

Fig. 3.14: Voltage to ground for both terminals of the PV array for the single-phase HERIC topology (output filter according to case 2).

3.2.5 H 5 topology from SM A


The H5 topology [52], used by SMA in many of their transformerless inverters, uses the same idea for the generation of the unipolar output voltage: disconnection of the PV array from the grid during the zero voltage vector. The used PWM is a hybrid one. T1 and T3 are switched with the grid frequency; T1 is continuously ON during the positive half, while T3 is continuously ON during the negative half of the reference voltage. To make the positive voltage vector, T5 and T4 are switched simultaneously with high frequency, while T1 is ON and the current will flow through T5-T1 returning through T4, as shown in Fig. 3.15.

37

Cdc

T5

T1

T3

A
PV

Filter
B

Cdc

T2

T4

CG-PV

Fig. 3.15: Path of the current in case of the positive voltage vector, for positive load current (H5-SMA).

During the zero voltage vector, T5 and T4 are turned OFF and the freewheeling current finds its path through T1-T3, as detailed in Fig. 3.16. The negative voltage vector is done by switching T5 and T2 simultaneously with high frequency, while T3 is ON, during the corresponding half period of the reference voltage and the current will flow through T5-T3 returning through T2.

Cdc

T5

T1

T3

A
PV

Filter
B

Cdc

T2

T4

CG-PV

Fig. 3.16: Path of the current in case of the zero voltage vector, for positive load current (H5-SMA).

As seen in Fig. 3.17, the common-mode behavior of the H5 topology is similar to the H-Bridge with bipolar PWM. The voltage to ground of the PV array terminals will only have a sinusoidal shape, while having the same high conversion efficiency as the H-Bridge with unipolar switching. Based on these results it can be stated that the H5 topology is suitable for transformerless PV systems. Unipolar output voltage is achieved by disconnecting the PV array from the grid during the period of the zero voltage vector, using a method called DC decoupling.

38

Fig. 3.17: Voltage to ground for both terminals of the PV array for the single-phase H5 topology (output filter according to case 2).

3.2.6 Single-phase topology w ith D C decoupling (Ingeteam )


Another topology using the DC decoupling method is the one presented in [53], which adds two extra switches and two extra diodes to the H-Bridge topology. The modulation strategy in case of this topology is also a hybrid one. The active voltage vector is achieved by switching T5-T6 with high frequency. Switches T1-T4 are switched with the grid frequency and in antiparallel to T2-T3, depending on whether the reference voltage is in the positive or negative half period. This way the output of the converter will be a unipolar voltage, like in case of the HERIC and H5 topologies.

Cdc

T5
D7

T1

T3

PV

Filter
D8

B
T2 T4

Cdc
T6

CG-PV

Fig. 3.18: Single-phase topology with DC decoupling used for transformerless PV systems.

The common-mode behavior of the topology is also similar to the HERIC and H5 topologies, since the voltage to ground of the PV array has only a sinusoidal shape and the frequency is the grid frequency, as shown in Fig. 3.19. 39

Based on these results it can be stated that this topology is also suitable for transformerless PV systems. Unipolar output voltage is achieved by disconnecting the PV array from the grid during the period of the zero voltage vector, using DC decoupling.

Fig. 3.19: Voltage to ground for both terminals of the PV array (topology with DC decoupling; output filter according to case 2).

3.2.7 H alf bridge topology


The half bridge topology uses only two switches to connect either the upper or the lower half of the DC-link to the phase connection of the grid, while the neutral wire is always connected to the middle of the DC-link capacitors [72]. The major disadvantages of this topology are that the DC-link needs to be twice the grid peak voltage and that the switches have to block the full DC-link voltage, while in case of the H-Bridge topologies the same DC-link voltage was shared between two series-connected switches. The output of the converter will be a bipolar voltage, since T1 is controlled with high frequency in antiparallel with T2. This means that bigger filtering elements are needed and the conversion efficiency of the converter will be lowered. A major advantage, on the other hand, is the fact that the middle of the DC-link is always connected to the neutral, thereby fixing the potential of the PV array, and the voltage to ground will be constant, as shown in Fig. 3.20, when the switching ripple on the DC side is not taken into consideration. Based on the common-mode behavior, the half bridge topology is suitable for transformerless PV systems. The only drawback is the high DC-link voltage, which will need a boost stage to keep the DC-link voltage above 650 V. Otherwise, in a singlestage system, the voltage at the maximum power point (VMPP) has to be above 650 V, which could give an open circuit voltage (VOC) above 1000 V [73]. This is not allowed 40

according to the datasheet rating of most PV panels (maximum system voltage based on TV Rheinland rating or IEC61216 - paragraph 10.3.4.).

Fig. 3.20: Voltage to ground for both terminals of the PV array for the half bridge topology.

3.2.8 N eutral Point C lam ped topology


The Neutral Point Clamped (NPC) topology was introduced some years ago in [74] and has mostly been used for applications in AC drives. In Publications III and IV the advantages of the NPC topology have been detailed, together with simulation results. As seen in Fig. 3.21, the voltage to ground measured at both PV array terminals is constant, when the switching ripple is not taken into consideration. This is due to the connection to the neutral line of the middle point of the DC-link that fixes the potential of the PV array to the grounded neutral. Based on the shown common-mode behavior, the NPC topology is suitable for transformerless PV systems, since the voltage to ground is constant in case of both terminals of the PV. The only drawback for the single-phase NPC topology is the high DC-link voltage, which has to be twice the grid peak voltage. and might reach voltages higher than the allowed maximum system voltage, therefore needing a boost stage before the inverter, which decreases the overall efficiency of the whole PV system.

41

Fig. 3.21: Voltage to ground for both terminals of the PV array for the NPC topology.

3.3 Three-phase topologies


In single-phase systems the output power on the AC side is not constant since both the grid voltage and current are sinusoidal. These pulsations in the power on the AC side are also present on the DC side and, to compensate for them, huge DC-link capacitors are needed to decrease the oscillations, which will also be present around the maximum power point (MPP). In a three-phase system on the other hand, the injected power is constant in a symmetrical three-phase system, since the sum of the currents from all three phases is zero. This means that smaller DC-link capacitors are needed, making the inverter more compact. The power output of three-phase systems is higher than was in the single-phase case and can go up to 20 kW in case of the low voltage grid.

3.3.1 Three-phase Full B ridge


The Three-phase Full Bridge (3FB) topology is the simplest and most widelyused one for general applications in three-phase systems. As shown in the simulation and experimental results detailed in Publications III and IV, the common-mode voltage generated by this topology is not constant. An FFT of the simulated ground voltage shows high frequency components at the switching frequency and multiples of it, having high amplitude.

42

Fig. 3.22: FFT of voltage to ground for the 3FB topology.

As also shown by the experimental measurements in Fig. 3.23, the voltage to ground varies with the switching frequency and changes according to the PWM strategy. Depending on the state of each leg, it has four different values: 2 1 VDC , VDC , VDC , 0 . 3 3 This means that the leakage ground current will only be limited by the parasitic capacitance of the PV array, which, in a kW size PV system, will be in the range of 100nF, leading to very high leakage ground current, well above the limit stated in the VDE 0126.

Fig. 3.23: Experimental measurements for 3FB topology. Channel 4 shows the voltage to ground of the DC+ terminal [250V/div].

Therefore, it can be stated that the 3FB topology is not suitable for transformerless PV systems, due to the common-mode behavior of the topology. Nevertheless, choosing a different PWM strategy it is possible to reduce the leakage current as shown in [75], although for high power applications with a huge PV array surface, the leakage current will still be too high, well above the level given by the VDE 0126-1-1. 43

3.3.2 Full B ridge w ith Split C apacitor


The Full Bridge with Split Capacitor (3FBSC) topology is similar to the 3FB one, with the difference that the input DC-link capacitor is split in two halves and the middle point is connected to the grounded neutral line of the grid, as detailed in Publication IV. Since the middle point of the DC-link is always connected to the grounded neutral of the grid, the PV array will be fixed to the potential of the neutral. Therefore, the measured voltage to ground of the PV array will be constant. According to the simulation results presented in Publication IV, this topology is a suitable solution for transformerless PV systems.

3.3.3 Full B ridge w ith Split C apacitor using staggered m odulation


In case of the 3FBSC topology the standard PWM strategy has been used, where all the gate signals have been synchronized to a single PWM timer. Another solution is to have three separate timers, one for each leg of the inverter displaced by 120. This PWM strategy is also known as staggered or interleaved modulation [76]. As shown the simulation results presented in Publication IV, using this method both the ripple in the grid current and the leakage ground current can be minimized. Based on the detailed results it can be stated that the performance of the 3FBSC topology can be improved, using the staggered PWM strategy.

3.3.4 Three-phase N eutral Point C lam ped


The single-phase NPC topology has proven to be a very good solution for transformerless PV systems. The three-phase version of the NPC topology (3xNPC) has been simulated and the results are detailed in Publication IV. In this topology the midpoint of the DC-link can connected to the neutral of the grid. Therefore the PV array is fixed to the potential of the neutral and there are no high frequency components in the ground voltage measured between the terminals of the PV array and the ground connection. The generated leakage ground current will be very small and taking into account the high conversion efficiency of up to 98%, it can be concluded that this topology is a very good solution for transformerless PV systems [77].

44

3.4 DC current injection control in case of transformerless systems


In grid-connected PV systems, DC current injection is limited by standards, as detailed in subsection 2.2 Grid requirements, and needs to be monitored during the functioning of the inverter, by the means of a DC sensitive current sensor or the RCMU of an inverter also used for leakage ground current measurements [26]. In [78] it is mentioned that DC injection into the electrical grid is undesirable due to the impact on electrical equipment, and therefore a study is made regarding the effects and risks associated with DC current injection on various components in the electrical grid.
Table 3-2: Effects and risks associated with DC current injection [78]. Equipment Distribution transformer Technical effects of DC injection Impacts and risks associate with DC injection

Saturation Harmonic distortion increases Losses increase Heating (thermal stress)


increase

Premature ageing Premature failure (risk of


fire, service interruption)

Inefficient operation
Environmental impact (noise)

Noise increase
RCD*

Modification of the tripping


characteristic

Sensitivity reduction

Current transformers Energy meters

Saturation

Erroneous measurement Erroneous metering

In grid-connected PV inverters, DC current injection is another critical issue, due to its effect on distribution transformers. As detailed in [78], losses, temperature and noise increase in transformers when DC currents are injected. All these affect the lifetime of the transformer. Therefore special care should be taken to prevent DC injection in case of transformerless PV inverters. An inverter topology is proposed in [79] that reduces the DC current injection. According to the authors, the non injection of DC current into the grid is topologically guaranteed by adding a second capacitive divider to which the neutral terminal of the 45

grid is connected. An extra control loop is introduced that compensates for any DC current injection, by controlling the voltage of both capacitive dividers so that they are equal. Another solution could be to control the voltage over the output filter capacitor in the grid side LCL filter so that the DC component is 0, thereby ensuring that the injected current is pure AC. Such a control is detailed in Publications V and VII, which present a voltage control in case of a grid-connected PV inverter.

3.5 Summary
In this chapter several single-phase and three phase topologies have been investigated, focusing on the ground voltage measured at the terminals of the PV array as well as the suitability of each topology in transformerless grid connected PV systems. It has been shown that the single-phase topologies, the H-Bridge with unipolar PWM is not suitable for transformerless PV systems, due to the way the zero voltage vector is achieved, leading to very high leakage ground currents, limited only by the parasitic capacitance of the PV array. Unipolar output voltage is still possible to achieve, as was the case of the HERIC, H5, NPC and other topologies, by either disconnecting the PV array from the grid during the zero voltage vector or by connecting the midpoint of the DC-link to the neutral of the grid. The ground leakage current can be further reduced in certain cases, by choosing a modulation strategy like the staggered PWM, as was the case for the 3FBSC topology. It can therefore be concluded that the common-mode behavior of a PV system is influenced by the chosen topology and modulation strategy.

46

Chapter 4 Common mode voltage in PV inverter topologies


This chapter offers a comprehensive analysis of the single- and three-phase transformerless converter with respect to the problem of the leakage current that flows through the parasitic capacitance of the PV array. Equation Chapter (Next) Section 1

4.1 Introduction
PV systems usually have an isolation transformer between the PV panels and the grid. Fig. 4.1 shows such a system, including the parasitic capacitance of the PV array (CG-PV) connected between ground and each terminal of the PV array.
P A

LA LB
LC
LF transformer

LcA

Lg Lg Lg

Vgrid
N

PV

B
C

LcB
LcC

PV
CG -PV
Q

Fig. 4.1: Grid-connected PV system including the PV array parasitic capacitance to ground.

In order to show the path for the common-mode current the stray elements are added to the system in Fig.4.2 [80]. 47

P A

LA LB
LC
Cf

Ct

LcA

Lg Lg Lg

Vgrid
N

PV

B
C

LcB
LcC

PV
Q

LcN
C AG
LcG

CG -PV

Fig.4.2. Three-phase grid-connected PV system showing the parasitic capacitance of the PV array, the parasitic capacitance of the converter, the cable inductance of the phases, and the stray capacitance of the transformer in a system with galvanic isolation.

CAG, CBG and CCG are the stray capacitances between the converter output points and the ground, present for all three-phase legs of the inverter; these capacitances depend on the connection between the switches and the grounded heatsink.

CG-PV is the parasitic capacitance, also known as leakage capacitance; Ct represents the stray capacitance between the transformer primary and secondary windings. LA, LB and LC are the output inductors used to control the current injected into the grid. LcA, LcB and LcC represent the series inductance of each phase. LcN represents the series inductance of the neutral when connected to the midpoint of the DC-link. LcG represents the inductance between the ground connection of the inverter and the grid neutral.

In a grid-connected PV system with an isolation transformer, the common-mode current can only find its path through the stray capacitances of the transformer (Ct). Due to the fact that this capacitance has values in the order of 100 pF, the commonmode current at frequencies lower than 50 kHz will be strongly reduced and the higher frequencies can be filtered by the EMI filter [80]. This is mainly the reason why when PV systems have a galvanic isolation in the form of a transformer, the low frequency leakage current behavior is not influenced by the converter topology or modulation technique. On the other hand, in transformerless PV systems, the common mode behavior is greatly influenced by the chosen topology or PWM. In this case, as also shown in Fig.4.3, the PV array is directly connected to the grid and common mode voltages present at the PV panel terminals lead to leakage ground current. 48

VAQ
Q

A B
C

LA LB
LC
Cf

LcA

Lg Lg Lg

Vgrid

VBQ VCQ
VNQ
CG -PV
N

LcB
LcC

LcN
C AG
LcG

Fig.4.3. Three-phase grid-connected PV system with the inverter modeled as a voltage source (without galvanic isolation).

4.2 Common-mode voltage in three-phase systems


4.2.1 M odel of com m on-m ode and differential-m ode voltages
In order to analyze the system regarding common-mode and differential-mode behavior, an analysis has been done in Publications VI and VIII. The equation for the total common-mode voltage, including the contribution from inductor imbalance, is defined by (4.1):

= Vcmmtot Vcmm 3~ +
where:

Vab1 + Vbc1 + Vca1 3

(4.1)

= Vcmm 3~

Vcmm AB + Vcmm BC + VcmmCA VAQ + VBQ + VCQ = 3 3

(4.2)

Equation (4.1) is used to predict the total common-mode voltage, due to the modulation strategy and unbalance of the system. Fig.4.4 presents the simplified model, showing the common-mode voltage sources for the three-phase system. The common-mode voltage described by (4.1) charges and discharges the parasitic capacitance CG-PV, and there will be a leakage current flowing towards ground. The level of the leakage current depends on the amplitude and frequency content of the voltage fluctuations, as well as the value of the leakage capacitance [81].

49

Vcmm- AB Vcmm- BC

V= VAB ab1

LB LA 2 ( LB + LA )
LAB = LA / / LB

LcAB
LcBC LcCA

LgAB
LgBC LgCA

V bc1
V ca1

LBC
LCA

Vcmm-CA

CG - PV

LcG

Fig.4.4. Simple model showing the common mode voltage for the three-phase system.

4.2.2 Leakage current in case of im balance filter inductance condition


The total common-mode voltage is also influenced by the output filter inductors. Unbalance between the phases leads to a common-mode voltage component influenced by the difference between the inductors on the phases. Fig.4.5 presents the two cases: no unbalance in (a), while in (b) the commonmode voltage in case of the simulation is presented and (c) shows the calculated value of the common-mode voltage, based on the equations describing the common-mode voltage. As seen in Fig.4.5, the simulated voltage closely matches the modeled common-mode voltage, in unbalanced conditions, when LA=1.3LB. When the neutral line is connected, from the point of view of the common-mode model, the three-phases with the neutral connection of the inverter can be modeled as three individual single-phases, and the result is a constant total common-mode voltage, leading to very low leakage ground current, as shown in Fig.4.6(a), which represents the simulation results for the 3FB-SC and 3xNPC topologies. When there is some inductance present in the neutral line, for example due to the EMI filter, the total common-mode voltage is not constant any more. A small inductance of LN=10 H present in the neutral can lead to high frequency common-mode voltage, that would generate leakage ground currents that could reach amplitudes greater than the threshold stated in the German standard regarding grid connection of PV systems: VDE-0126-1-1. Fig.4.6(b) and (c) show the simulated and calculated common-mode voltage when 10 H inductance is present in the neutral line. This results in a common-mode voltage which is not constant any more, leading to an increase in the leakage current flow to ground. Much attention should be paid to the design of an inductance-free neutral connection. 50

(a) NO unbalance - common-mode voltage 0 -200


[V]

-400 -600 0.04 0.045 0.05 0.055 0.06

(b) UNBALANCE - simulated common-mode voltage 0 -200


[V]

-400 -600 0.04 0.045 0.05 0.055 0.06

(c) UNBALANCE - calculated equivalent common-mode voltage 0 -200


[V]

-400 -600 0.04 0.045 0.05 Time [s] 0.055 0.06

Fig.4.5. Total common-mode voltage 3FB topology, (a) common-mode voltage in case of NO unbalance; (b) common-mode voltage in case of unbalance (simulation); (c) common-mode voltage in case of unbalance (calculated).
-320 -340 (a) NO unbalance - common-mode voltage

[V]
-360 -380 0.04 -320 -340

0.045

0.05

0.055

0.06

(b) UNBALANCE - simulated common-mode voltage

[V]
-360 -380 0.04 -320 -340

0.045

0.05

0.055

0.06

(c) UNBALANCE - calculated equivalent common-mode voltage

[V]
-360 -380 0.04

0.045

Fig.4.6. Total common-mode voltage 3FBSC topology, (a) common-mode voltage in case of NO unbalance; (b) common-mode voltage in case of unbalance (simulation) and (c) common-mode voltage in case of unbalance (calculated), having L1=10 H in the grid neutral.

0.05 Time [s]

0.055

0.06

51

4.2.3 Experim ental results (inverter m ode)


To verify the simulation results, an experimental setup has been realized, made up of a single-phase NPC leg connected to the grid, tested as an inverter. In fact, the three-phase NPC topology can be obtained using three independent single-phase inverters, connected through the common neutral. The experimental setup and the obtained results are detailed in Publication VIII.

Fig. 4.7. Experimental results for single-phase NPC inverter: Channel 1: grid current [5A/div]; Channel 2: grid voltage [200 V/div]; Channel 3: voltage between DC+ terminal and ground [100 V/div]; Channel M: FFT of Channel 3 [100 V/div and 1.25 kHz/div].

An FFT of the common-mode voltage, shown with Chanel 3 in Fig. 4.7, confirms that the measured common-mode voltage has only a DC value with no high frequency components. This means that the leakage ground current generated by this topology is very low, as also shown in the simulations in the previous chapter.

4.2.4 Experim ental results (rectifier m ode)


In order to further verify the simulation results, another experimental setup has been done, made up of the same NPC leg connected to the grid tested as a rectifier. For a grid connected inverter a DC power supply is needed, and it is very hard to determine the parameters of the EMI filter of a switched mode power supply. In the rectifier mode, the topology is connected to a resistive load, which being a passive one, gives better control over the parasitic components in the whole circuit. Fig. 4.8 and Fig. 4.9 show the components and the equivalent circuit of the experimental setup, made up of the grid-connected NPC rectifier, together with the resistive load. For the filter on the grid side a 3 mH inductor was used. Furthermore, in Fig. 4.8 the sensors, gate drivers and the TI eZdsp used for the control of the system are shown. The experimental setup has the following main components, listed in Table 4-1: 52

Table 4-1: Parameters of the experimental test setup. Digital control MOSFET (T1-T4) Diode (D) DC capacitor (Cdc) Filter Grid DC load TI TMS320F2812 eZdsp kit IXYS 82N60P (600 V, 82 A) IXYS DSEP 30-06BR (600 V, 30 A) Cdc=1 mF, 450 V Lf=3 mH Vg=110V (RMS), fg=50 Hz R=246 , 1.2 kW

Resistive load

Grid Connection

Sensors and Protections

NPC topology

Gate Driver

DSP

Fig. 4.8: The components of the experimental setup for the test of the NPC single-phase rectifier.

DC+

NPC LEG
T1

Cdc

T2
T3

Lf

Cdc

Vg

T4
DC-

Fig. 4.9: Electrical circuit of the experimental setup using the NPC rectifier.

53

The experimental tests were done at grid voltage Vg=110V (RMS) and the grid current was set to Ig=5.1 A (RMS), as seen in Fig. 4.10.

Fig. 4.10: Experimental results for single-phase NPC inverter Grid voltage (Vg) [50V/div] and grid current (Ig) [5A/div] for NPC rectifier.

For the previously mentioned conditions, the resulting DC voltage was Vdc=300 V, as it can also be seen in Fig. 4.11 and Fig. 4.12. In Fig. 4.11 the 50 Hz ripple of the DC voltage can be clearly seen and is due to the single-phase pulsating power. As can be observed on the FFT of the measured DC to ground voltage, only components at low frequencies are present.

Fig. 4.11: DC to ground voltage (Channel 2) [40V/div] and FFT of the same voltage (Channel M) having 1.25 kHz per division on the FFT.

54

The experimental tests confirmed the simulation results. As seen on the FFT of the DC to ground voltage there are no high-frequency components present. This means that the leakage ground current is very low for the NPC topology. Therefore it can be stated that this topology can be used in transformerless PV applications.

Fig. 4.12: DC to ground voltage (Channel 2) [40V/div] and FFT of the same voltage (Channel M) having 50Hz per division on the FFT.

4.3 Common-mode voltage in single-phase systems


The model of the common-mode voltage in the single-phase case is very similar to the three-phase case, with the difference that in single-phase, there is only a phase and a neutral line, for which the common-mode calculations have to be done. The singlephase case has been discussed in [80] and, based on the equations presented there, the total common-mode voltage can be similarly calculated, as has been done for the threephase system. The total common-mode voltage, when there is an inductor unbalance, has been calculated for the single-phase H-Bridge topology with bipolar PWM. As seen in Fig. 4.13(a), the common-mode voltage is constant when both inductors have the same value. When the inductor in the neutral (LN) differs from the one in the phase (LA): LN=0.95LA, then the total common-mode voltage will not be constant anymore. The amplitude of these voltage fluctuations will depend on the difference between these two inductors and the frequency will be the switching frequency. As shown in Fig. 4.13(b) the simulation results and Fig. 4.13(c) the calculated results, for a 5% difference be55

tween the inductors, the amplitude of the common-mode voltage will have a 10 V component at the switching frequency and the leakage current will depend only on the parasitic capacitance of the PV array.
(a) NO unbalance - common-mode voltage

-160 -170

[V]
-180 -190 0.04 -160 -170

0.045

0.05

0.055

0.06

(b) UNBALANCE - simulated common-mode voltage

[V]
-180 -190 0.04 -160 -170

0.045

0.05

0.055

0.06

(c) UNBALANCE - calculated equivalent common-mode voltage

[V]
-180 -190 0.04

0.045

0.05 Time [s]

0.055

0.06

Fig. 4.13: Total common-mode voltage H-Bridge topology with bipolar PWM, (a) common-mode voltage in case of NO unbalance; (b) common-mode voltage in case of unbalance (simulation) and (c) commonmode voltage in case of unbalance (calculated) having LN=0.95LA in the grid neutral.

4.4 Summary
In this chapter a detailed analysis of the problem of the leakage current in transformerless converters has been carried out. The adopted common-mode model of the system has revealed that connecting the supply neutral to the middle of the DC-link capacitors will result in low-ripple voltage at both DC-link terminals of the array leading to a very low leakage current level, below the VDE 0126-01-01 standard requirement of 300mA. However the presence of inductance in the neutral line can lead to high frequency components in the common-mode voltage, leading to leakage ground currents, higher than the allowed level given in the standard. Therefore, it is crucial that the neutral line has very low inductance, in transformerless PV systems, where the neutral line is connected to the middle of the DC-link. 56

Chapter 5 H-Bridge Zero Voltage Rectifier topology


This chapter introduces a novel transformerless topology derived from HERIC, but with an alternative solution for the bidirectional switch, used to generate the zero voltage state. It will be shown, that the constant common-mode voltage and the high efficiency of the proposed topology makes it an attractive choice for transformerless PV applications.

5.1 Introduction
A new topology called H-Bridge Zero Voltage Rectifier (HB-ZVR) is proposed, where the zero voltage is achieved by short-circuiting the grid voltage through the LCL filter, using a diode rectifier bridge and one switch. During the zero voltage vector the mid-point of the DC link is clamped to the short-circuited grid. A comparison of known transformerless topologies and the HB-ZVR is performed using simulations, focusing on the voltage to earth and ground leakage current. Furthermore, experimental results are shown, confirming the simulations. And, finally, the efficiency curve of the compared topologies is detailed. Equation Chapter (Next) Section 1

5.2 Transformerless topology analysis


As previously discussed, as well as in [80] and Publication VI, the common mode voltage generated by a topology and modulation strategy can greatly influence the ground leakage current that flows through the parasitic capacitance of the PV array. Generally, the grid does not influence the common-mode behavior of the topology, so it 57

can be concluded that the generated common-mode voltage of a certain inverter topology and modulation strategy can be shown using a simple resistor as a load. Of course in case of transformerless PV systems connected to the grid, the common-mode voltage will have a sinusoidal shape with the grid frequency and having an amplitude half of the grid voltage peak. Therefore, in case of the simulations, only a resistive load is used and the common-mode voltage is measured between the DC+ terminal of the DC source and the grounded middle-point of the resistor, as shown in Fig. 5.1. In the following simulation results obtained using Matlab Simulink with the PLECS toolbox are shown. The simulation step size is 0.1 s, with an 8 kHz switching frequency, in order to have the same switching frequency both in the simulations and experimental results. This is because the digital implementation of the current control was limited to 8 kHz due to the chosen DSP hardware, as detailed in Publication I.

DC+

Lf
PV
DC-

R R

Cf Lf

CG-PV
Fig. 5.1: Test setup used for common-mode voltage measurement.

Simulation parameters: Lf=1.8 mH, filter inductor Cf=2 F, filter capacitor R=7.5 , load resistor Vdc=350 V, input DC voltage Cdc=250 F, DC-link capacitor CG-PV=100 nF, parasitic capacitance of PV array in case of simulations fsw=8 kHz, switching frequency for all cases except that the switching frequency for unipolar PWM has been chosen to be fsw=4 kHz, so that the output voltage of the inverter has the same frequency in all cases.

58

5.2.1 H -B ridge w ith unipolar sw itching


Most single-phase H-Bridge inverters use unipolar PWM in order to improve the injected current quality of the inverter, which is done by modulating the output voltage to have three levels with twice the switching frequency. Moreover, this type of modulation reduces the stress on the output filter and decreases the losses in the inverter. The positive active vector is applied to the load by turning ON T1 and T4, as shown in Fig. 5.2. The negative active vector is done similarly, but in this case T2-T3 is turned-ON. In a unipolar switching pattern, the zero voltage state, during the positive voltage, is achieved by short circuiting the output of the inverter, as detailed in Fig. 5.3, which introduces high frequency content in the generated common-mode voltage. As seen in Fig. 5.5, in a transformerless PV system using this type of topology and modulation, the high-frequency common-mode voltage, measured across CG PV , will lead to very high leakage ground current, making it unsafe, therefore not usable for transformerless PV applications.

Cdc

T1

T3

A
PV

Lf Lf Cf

R R

Cdc

T2

T4

CG-PV

Fig. 5.2. H-Bridge topology with Unipolar PWM, active vector applied to load, using T1-T4 for positive voltage.

Cdc

T1

T3

A
PV

Lf Lf Cf

R R

Cdc

T2

T4

CG-PV

Fig. 5.3. H-Bridge topology with Unipolar PWM, zero voltage applied to load, using T1-T3 for positive voltage

59

20 10

iload [A]

0 -10 -20 0.02 400 200 0.025 0.03 0.035 0.04 0.045 0.05 0.055 0.06

vinv [V]

0 -200 -400 0.02 0.025 0.03 0.035 0.04 0.045 Time [s] 0.05 0.055 0.06

Fig. 5.4. H-Bridge topology with Unipolar PWM, load current and inverter output voltage.

1000

Vpe+ [V]

500 0 -500 0.02 4 0.025 0.03 0.035 0.04 0.045 0.05 0.055 0.06

iground [A]

2 0 -2 -4 0.02 0.025 0.03 0.035 0.04 0.045 Time [s] 0.05 0.055 0.06

Fig. 5.5. H-Bridge topology with Unipolar PWM, voltage to ground and ground leakage current.

5.2.2 H ER IC H ighly Efficient and R eliable Inverter C oncept


This topology, shown in Fig. 5.6, combines the advantages of the three-level output voltage of the unipolar modulation with the constant common-mode voltage, as in the case of bipolar modulation. This way the efficiency of the inverter is increased, without compromising the common-mode behavior of the whole system. The zero voltage vector is realized using a bidirectional switch, shown in the grey background in Fig. 5.6. This bidirectional switch is made up of two IGBTs and two diodes (T5-T6). During the positive half-wave of the load (or grid) voltage, T6 is switched ON and is used during the freewheeling period of T1 and T4. On the other hand, during the negative half-wave T5 is switched ON and is used during the freewheeling period of T2 and T3 [51].

60

Cdc

T1

T3

A
PV

T5 T6

Lf Lf Cf

R R

Cdc

T2

T4

CG-PV

Fig. 5.6. HERIC topology, active vector applied to load, using T1-T4 during positive half-wave.

This way, using T5 or T6 as detailed in Fig. 5.7, the zero voltage vector is realized by short-circuiting the output of the inverter, and during this period the PV array is separated from the grid, because T1-T4 or T2-T3 are turned OFF.

Cdc

T1

T3

A
PV

T5 T6

Lf Lf Cf

R R

Cdc

T2

T4

CG-PV

Fig. 5.7. HERIC topology, zero voltage applied to load, using S6 during positive half-wave.

As shown in Fig. 5.8, the output voltage of the inverter has three levels and the load current ripple is very small, although in this case the frequency of the current is equal to the switching frequency. As seen in Fig. 5.9, the inverter generates no common-mode voltage. Therefore the leakage current through the parasitic capacitance of the PV array would be very small.

61

20 10

iload [A]

0 -10 -20 0.02 400 200 0.025 0.03 0.035 0.04 0.045 0.05 0.055 0.06

vinv [V]

0 -200 -400 0.02 0.025 0.03 0.035 0.04 0.045 Time [s] 0.05 0.055 0.06

Fig. 5.8. HERIC topology, load current and inverter output voltage.

200

Vpe+ [V]

150 100 50 0 0.02 0.1 0.025 0.03 0.035 0.04 0.045 0.05 0.055 0.06

iground [A]

0.05 0 -0.05 -0.1 0.02 0.025 0.03 0.035 0.04 0.045 Time [s] 0.05 0.055 0.06

Fig. 5.9. HERIC topology, voltage to ground and ground leakage current.

5.2.3 Proposed topology (H B -ZV R )


Another solution for generating the zero voltage state can be done using a bidirectional switch made of one IGBT and one diode rectifier bridge. The topology is detailed in Fig. 5.10, showing the bidirectional switch, as an auxiliary component with a grey background. This bidirectional switch is clamped to the midpoint of the DC-link capacitors in order to fix the potential of the PV array also during the zero voltage period, when T1-T4 and T2-S3 are open. An extra diode is used to protect the lower DC-link capacitor from short-circuiting. During the positive half wave, T1-T4 are used to generate the active vector, supplying a positive voltage to the load, as shown in Fig. 5.10. The zero voltage state is achieved by turning ON T5 when T1-T4 are turned OFF, as shown in Fig. 5.12. The gate signal for T5 will be the complementary gate signal of T1-T4, with a small dead-time to avoid short-circuiting the input capacitor.

62

Using T5, it is possible for the grid current to flow in both directions, this way the inverter can also feed reactive power to the grid, if necessary. During the negative half wave of the load voltage, T2-T3 are used to generate the active vector, and T5 is controlled using the complementary signal of T2-T3 and generates the zero voltage state, by short-circuiting the outputs of the inverter and clamping them to the midpoint of the DC-link. During the dead-time, between the active vector and the zero state, there is a short period while all the switches are turned OFF, when the freewheeling current finds its path through the anti-parallel diodes to the input capacitor. This is shown in Fig. 5.11 and leads to higher losses, compared to the HERIC topology where the freewheeling current finds its path through the bidirectional switch, either through T5 or T6, depending on the sign of the current.

Cdc

T1

T3

A
PV

T5

Lf Lf Cf

R R

Cdc

T2

T4

Q
CG-PV

Fig. 5.10. HB-ZVR topology, active vector applied to load, using T1-T4, during positive half-wave.

Cdc

T1

T3

A
T5
PV

Lf Lf Cf

R R

Cdc

T2

T4

CG-PV

Fig. 5.11. HB-ZVR topology, dead-time between turn-OFF of T1-T4 and turn-ON of T5, during positive half-wave.

63

Cdc

T1

T3 T5

Lf Cf Lf

R R

PV

Cdc
T2 T4

CG-PV

Fig. 5.12. HB-ZVR topology, zero voltage applied to load, using T5, during positive half-wave.
20 10

iload [A]

0 -10 -20 0.02 400 200 0.03 0.04 0.05 0.06

vinv [V]

0 -200 -400 0.02 400 200 Fig.11. Fig.13. Fig.12. 0.03 0.04 0.05 0.06

Time [s]

vinv [V]

0 -200 -400

Fig. 5.13. HB-ZVR load current and inverter output voltage.

200

Vpe+ [V]

150 100 50 0 0.02 0.1 0.025 0.03 0.035 0.04 0.045 0.05 0.055 0.06

iground [A]

0.05 0 -0.05 -0.1 0.02 0.025 0.03 0.035 0.04 0.045 Time [s] 0.05 0.055 0.06

Fig. 5.14: HB-ZVR topology, voltage to ground and ground leakage current.

64

As shown in Fig. 5.13, the output voltage of the inverter has three levels, taking into account the freewheeling part during dead-time. In this case also, the load current ripple is very small and the frequency is equal to the switching frequency. To show that this topology does not generate a varying common-mode voltage, Vcm has been calculated for the switching states with regard to the positive, zero and negative vectors:

Vcm =

VAQ + VBQ 2

(5.1) (5.2) (5.3) (5.4)

V Positive: VAQ =dc ; VBQ = Vcm =dc 0 V 2 Vdc Vdc Vdc Zero: VAQ = ; VBQ = Vcm = 2 2 2 Vdc Negative: VAQ = 0; VBQ =Vdc Vcm = 2

As detailed by equations (5.1)-(5.4), the common-mode voltage is constant for all switching states of the converter. Therefore the leakage current through the parasitic capacitance of the PV array would be very small, as observed in Fig. 5.14.

5.3 Experimental results


In the experimental results, the setup has the same parameters as was used in the simulations: Vdc=350 V, Cdc=250 F, Lf=1.8 mH, Cf=2 F, fsw=8 kHz (in case of the Unipolar PWM it is only 4 kHz), dead-time=2.5 s. To compare the behavior of the different inverters, all three topologies have been tested using the same components. PM75DSA120 Intelligent Power Modules with maximum ratings of 1200 V and 75 A from Mitsubishi as IGBTs and DSEP 30-06BR with maximum ratings of 600 V 30 A as diodes from IXYS have been used in the diode bridge of the proposed topology. The modular-based setup shown in Fig. 5.15 makes it possible to test the different topologies: H-Bridge with bipolar or unipolar modulation, the HERIC topology and the proposed HB-ZVR, using the same components.

5.3.1 H -B ridge w ith U nipolar PW M (experim ent)


The main advantage of the H-Bridge inverter with unipolar switching is that the output voltage has three-levels and the frequency of the output voltage is the double of 65

the switching frequency, thereby increasing the efficiency of the inverter and decreasing the size of the output filter. But the major drawback of this topology is the high frequency common-mode voltage, which makes it unsuitable to be used in transformerless PV systems. As seen in Fig. 5.16, the unipolar PWM strategy used in case of the H-Bridge topology generates a high-frequency common mode voltage, measured between the DC+ terminal of the DC-link and ground, shown on Channel 1 in Fig. 5.16. As also shown in Fig. 5.16, the FFT, represented by Channel M, details the spectrum of the common-mode voltage. This common-mode voltage has very high amplitudes both at DC and the switching frequency. Also, a low frequency component can be seen on the measured voltage, which is caused by the 100 Hz single-phase power variation.

Fig. 5.15. Laboratory setup, showing all the components of the modular solution used for obtaining the experimental results.

Fig. 5.16. Experimental results for H-Bridge topology with unipolar PWM, Channel 1 shows the voltage to ground of the DC+ terminal, Channel 2 shows the ground leakage current and Channel M shows the voltage to ground of the DC+ terminal.

66

This varying common-mode voltage generates a very high ground leakage current that is only limited by the parasitic capacitance of the PV array. In this case the leakage current reaches to peaks around 6 A as shown on Channel 2 in Fig. 5.16.

5.3.2 H ER IC (experim ent)


As presented in the simulation results (subsection 5.2.2), the HERIC topology generates a constant common-mode voltage by disconnecting the PV from the load (which may also be the grid in a grid connected application) during the state of the zero voltage, when the output of the inverter is short-circuited. This separation ensures that the common-mode voltage acting on the parasitic capacitance of the PV array does not change over time, therefore keeping the leakage current at very low values, well below the standard requirement of 300 mA given by VDE-0126-1-1, the German standard for grid connected PV systems. As shown in Fig. 5.17, the voltage measured between the DC+ terminal of the DC-link and ground is constant and has no high frequency content, represented by channel 1 on the scope. An FFT of Channel 1 also shows only a DC component of the measured voltage. Furthermore, the leakage current, represented on Channel 2 in the scope results in Fig. 5.17, is also very low, with an RMS value around 22 mA.

Fig. 5.17. Experimental results for HERIC topology, Channel 1 shows the voltage to ground of the DC+ terminal, Channel 2 shows the ground leakage current and Channel M shows the voltage to ground of the DC+ terminal.

5.3.3 H B -ZV R (experim ent)


As mentioned in 5.2.3, the HB-ZVR topology generates the zero voltage state in a similar way to the HERIC topology, but uses another solution for the bidirectional 67

switch configuration. Of course, the common-mode behavior of the topology is similar to the case of the HERIC topology. As shown in Fig. 5.18, the voltage measured between the DC+ terminal of the DC-link and ground is constant and has no high frequency content, represented by Channel 1 on the scope picture. An FFT of this voltage also shows only a DC component without any high frequency components.

Fig. 5.18. Experimental results for HB-ZVR topology, Channel 1 shows the voltage to ground of the DC+ terminal, Channel 2 shows the ground leakage current and Channel M shows the voltage to ground of the DC+ terminal.

In this case also, as detailed by Channel 2 in the scope results from Fig. 5.18, the leakage current, has also very low values, with an RMS value around 27mA.

5.4 Efficiency
In case of a single-phase grid connection, the required minimum DC-link input voltage of the inverter, in the European case, has to be at least 350 V, otherwise a boost stage is required. The tests have been done with an input voltage of Vdc=350 V. The HERIC topology, as also suggested by its name, has very high conversion efficiency throughout the whole working range and has the best efficiency within the compared topologies, as detailed in Table 5-1 and also shown in Fig. 5.19. The HB-ZVR topology has a slightly lower efficiency, due to the fact that the bidirectional switch is controlled with the switching frequency, while in the case of the HERIC topology, the bidirectional switch is only switched with the mains frequency. With a maximum efficiency of 94.9 %, the HB-ZVR is a very attractive solution for transformerless PV systems.

68

The H-Bridge topology with Bipolar PWM (HB-Bip) has the lowest efficiency, due to the high losses as a result of the two level voltage output. The efficiency of the H-Bridge topology with Unipolar PWM has not been included in the efficiency comparison of the transformerless topologies from Fig. 5.19 and Table 5-1 because of the influence of the galvanic isolation, where extra losses, as high as 2 %, are possible due to the added transformer. Nowadays most PV inverters are current controlled, injecting only active power into the utility grid. When there are many inverters injecting active power at the same time, the voltage at Point of Common Coupling (PCC) might rise over the limits stated in the standards and trigger the safety of the inverters, leading to a disconnection or a limit in the power production below the available power. This leads to extra losses because not all the available PV power is fed into the grid. If PV inverters have a P-Q implemented control, the before mentioned drawback could be dealt with by the injection of reactive power, thereby controlling the voltage at PCC. Therefore, the capability of injecting reactive power would be a major advantage of future PV inverters, improving the total production of the PV system. The advantage of HB-ZVR is that the HERIC topology, with the implemented PWM strategy, is only ideal for PV systems that supply the grid with active power, otherwise said to have the power factor: cos = 1 . This is because the bidirectional switch of the HERIC topology made up of T5 and T6 is not controlled to be turnedON simultaneously. Therefore current can only flow in a predefined direction, defined by the currently turned-ON switch. In [51] it is mentioned, that for reactive power flow, switches T5 and T6 should be simultaneously controlled, one with the grid frequency, the other one with the switching frequency. On the other hand, in case of the HB-ZVR, it does not matter what the sign the load current has, it will always find a path through the bidirectional switch, made up of a diode bridge and a switch. This makes it possible to have a reactive power flow that can be used to support the utility grid with additional services any time during the functioning of the inverter.
Table 5-1: Efficiency at different input power with Vdc=350 V.

HB-Bip HERIC HB-ZVR

500W 84,3% 93,4% 90,4%

1000W 90,2% 94,7% 92,8%

1500W 92,5% 95,3% 93,8%

2000W 93,6% 95,6% 94,4%

2500W 94,3% 95,8% 94,8%

2800W 94,5% 95,9% 94,9%

69

100% 98% 96% 94% 92% 90% 88% 86%

HB-Bip HERIC HB-ZVR

Fig. 5.19. Efficiency curve of the different topologies (Vdc=350 V).

84%

A disadvantage of HB-ZVR is the lower conversion efficiency, than that of the HERIC topology, due to the high-frequency switching pattern of the auxiliary switch T5, while in case of the HERIC topology T5 and T6 are switched at the grid frequency. The efficiency of the tested topologies can be further increased by using 600V IGBTs and, for the HB-ZVR, faster switches with shorter dead-time will also increase the efficiency.

5.5 Summary
This chapter introduced a novel transformerless topology derived from HERIC, but with an alternative solution for the bidirectional switch, used to generate the zero voltage state. The constant common-mode voltage of the HB-ZVR topology and its high efficiency makes it an attractive solution for transformerless PV applications, although the efficiency is lower than the HERIC, but higher than for the HB-Bip.

70

Chapter 6 Conclusion
This chapter summarizes the work done during the period of the PhD project and finishes with recommendations for future work regarding the areas that can still be improved.

6.1 Summary
The work presented in this thesis deals with analyzing and modeling of transformerless PV inverter systems regarding the leakage current phenomenon that can damage solar panels and pose human safety risks. The major task of this research was the investigation and verification of transformerless topologies and control strategies that would minimize the leakage current of PV inverter topologies in order to comply with the standard requirements and make them safe for human interaction. The thesis is divided into two parts: Part I Report and Part II Publications. Part I is a summary report of the work done throughout the research and contains 6 chapters. Chapter 1 begins with an introduction of grid-connected PV systems, giving some details about the background and motivation regarding this PhD project. It continues with the problem formulation, the objectives and the limitations of the work and finishes with a list of the main contributions. Chapter 2 highlights the advantages of transformerless PV inverters compared to topologies with galvanic isolation. It is shown that transformerless topologies are smaller in size and have higher efficiencies than inverters with high-frequency or lowfrequency transformers. Furthermore, a summary of several transformerless PV inverter topologies is presented, detailing many different topology structures that are used by the PV industry or have been proposed as transformerless PV inverters. Finally the 71

parasitic capacitance of the PV array is discussed and measured in case of several commercial PV panels, emphasizing the safety issues regarding ground leakage currents due to varying voltages imposed over this capacitance. In Chapter 3, several single-phase and three phase topologies are investigated, focusing on the ground voltage measured at the terminals of the PV array as well as the suitability of each topology in transformerless grid connected PV systems. It is shown that, in case of the single-phase topologies, the H-Bridge with Unipolar PWM is not suitable for transformerless PV systems, due to the way the zero voltage vector is achieved, leading to very high leakage ground currents, limited only by the parasitic capacitance of the PV array. It is still possible to achieve unipolar output voltage, as is the case of the HERIC, H5, NPC and other topologies, and the common-mode voltage is kept constant by either disconnecting the PV array from the grid during the zero voltage vector or by connecting the midpoint of the DC-link to the neutral of the grid. The ground leakage current can be further reduced in certain cases, by choosing a modulation strategy like the staggered PWM, as was the case for the 3FBSC topology. It can therefore be concluded that the common-mode behavior of a PV system is influenced by the chosen topology and modulation strategy. Chapter 4 offers a comprehensive analysis of the single- and three-phase transformerless converter with respect to the problem of the leakage current that flows through the parasitic capacitance of the PV array. The adopted common-mode model of the system reveals that connecting the supply neutral to the middle of the DC-link capacitors will result in low-ripple voltage at both DC-link terminals of the PV array leading to a very low leakage current level, below the VDE 0126-01-01 standard requirement of 300mA. However, the presence of inductance in the neutral line can lead to high frequency components in the common-mode voltage, leading to leakage ground currents, higher than the allowed level given in the standard. Therefore, it is crucial that the neutral line has very low inductance in transformerless PV systems where the middle of the DC-link is connected to the grounded neutral of the grid. In Chapter 5, a new topology called H-Bridge Zero Voltage Rectifier (HB-ZVR) is proposed where the zero voltage is achieved by short-circuiting the grid voltage through the LCL filter, using a diode bridge rectifier and one switch. During the zero voltage period, the mid-point of the DC-link is clamped to the short-circuited grid. A comparison of known transformerless topologies and the HB-ZVR is performed using simulation, focusing on the voltage to earth and ground leakage current. Furthermore experimental results are shown, confirming the simulations. And, finally, the efficiency curve of the compared topologies is detailed. The constant common-mode voltage of the HB-ZVR topology and its high efficiency makes it an attractive solution for transformerless PV applications.

72

6.2 Main contributions


A short list of contributions is included in the order they appear in the thesis. Review and simulation of PV topologies

A comprehensive review is presented modeling several single- and three-phase transformerless topologies, focusing on the leakage ground current. It has been shown that the H-Bridge topology with unipolar PWM, as well as the three-phase full bridge topology, generate very high leakage current and are therefore not suitable as transformerless PV inverters. It is also emphasized that connecting the midpoint of the DClink to the neutral of the grid will substantially reduce the generated leakage current in the case of the half-bridge or neutral-point clamped topologies, although the chosen grid side filter configuration might negatively influence the common-mode behavior of the topology. Interleaved PWM

The capacitor in the inverters DC-link tends to get reduced, due to cost reduction from the manufacturers side. This means that the ripple in the DC-link will be increased, leading to higher leakage ground currents through the parasitic capacitance of the PV array. This thesis includes a new application of the interleaved PWM for threephase inverters that has been modeled in simulation. The ripple of the DC-link voltage is reduced, thereby further reducing the leakage current in case of the three-phase full bridge split capacitor topology. Modeling of common-mode voltage

The leakage current of a certain topology is greatly influenced by the generated common-mode voltage that will be imposed on the parasitic capacitance of the PV array. To show the influence on the common-mode behavior of the topology in the case of inductor unbalance or inductance in the neutral wire, a model-based method for calculating the total common-mode voltage of transformerless topologies has been developed in this thesis. New topology

Nowadays, PV inverters feed only active power to the grid, having a power factor of 1. When there are many inverters injecting active power at the same time, the voltage at Point of Common Coupling might rise over the limits stated in the standards and trigger the safety of the inverters leading to disconnection or limit the power production below the available power. To overcome the before-mentioned disadvantage, a new high efficiency transformerless PV inverter topology called HB-ZVR (with very low leakage ground current) is proposed. The topology uses a bidirectional switch for short-circuiting the output of the converter during the zero voltage period using a switch and a diode bridge, capable of active and reactive power injection. 73

6.3 Future work


There are several research tasks for future work and some of these are mentioned below: During the presented work, simulations included ideal components and the efficiency of the topologies has not been calculated. Nevertheless, by taking into account switching and conduction losses for switching elements (a possibility given by the PLECS toolbox in MATLAB/Simulink) the efficiency can also be calculated in simulation, also including losses for the passive components. DC-current injection is of great interest in transformerless PV inverters. New topologies or control strategies could be investigated, that eliminate or minimize the DC part in the injected AC current. In Chapter 5 a novel transformerless topology has been proposed, namely HB-ZVR. Further investigations are possible to improve the efficiency of the proposed topology, by choosing better components: for example 600V SiC switches and SiC diodes.

74

Appendix A
The measuring performance of two commercially available differential current sensors was tested. A setup was built for this purpose at AAU. This appendix details the test for the LEM CT 0.2-P and TELCON HES25VT current sensors, provided by PowerLynx A/S. A sketch for the proposed test setup can be seen in Fig. A.1, and the equipment used is listed also below: Power supply for 20 A AC current: three-phase grid connection, 32 A max. current R1: variable resistor R2: low power resistor, 500 , 1 A DUT (current probe) DC supply for 100 mA: GW Instek GPS 4303 Multimeter: Fluke 45 used for measuring current on the low power side Multimeter: Fluke 179 used for measuring the sensor output voltage

R1

DUT

AC source

IG-PV
DC source High power side Low power side

A R2 V

Fig. A.1 Laboratory setup for testing the step response of the sensors

The grid was used in order to produce an AC current of 20 A in the high power side, using resistor: R1=11 . DUT represents the Device Under Test, which is the current probe that is being tested. The high power wire is twice put through the DUT in order to cancel out its influence. Therefore the DUT only measures the controlled 75

leakage current produced by the low power side. The low power side is separate from the high power side and is used to produce a DC current up to 100 mA, which simulates the leakage current that has to be precisely measured by the DUT.

A.1 LEM CT-0.2P


According to its datasheet, the sensor was supplied with 15 V and since the output is a current source, it was paralleled with a RL=10 k resistor [67]. Therefore the voltage output of the sensor should be 5 V in case of a 200 mA current sensed by the LEM CT-0.2-P. Since the measured value of the resistor was 9.96 k, the output of the sensor should only be 4.95 V in case of a 200 mA measured current.

A .1.1 Step response


The test includes the sensor response for 20, 50 and 100mA step change in the leakage current. The step response was viewed using an oscilloscope. The step response was repeated both with and without current in the high power side. In Fig. A.2 and Fig. A.3 the step response of the transducer for 20 mA, 50 mA, and 100 mA current levels can be seen.

20 15 10 5 0 0 0.1 0.2 Time [s] 0.3

50 40 30 20 10 0 0 0.1 0.2 Time [s] 0.3

100mA step response [mA]

20mA step response [mA]

50mA step response [mA]

25

60

120 100 80 60 40 20 0 0 0.1 0.2 Time [s] 0.3

(a)

(b)

(c)

Fig. A.2 LEM CT 0.2-P step response for 20 mA (a), 50 mA (b) and 100 mA (c) leakage current and with no current in high power side

As can be observed in Fig. A.2 and Fig. A.3, the sensor responds immediately, only having an oscillation, within the range of 20%. But this overshoot settles in 0.2 s in case of all readings.

76

20 15 10 5 0 0 0.1 0.2 Time [s] 0.3

50 40 30 20 10 0 0 0.1 0.2 Time [s] 0.3

100mA step response [mA]

20mA step response [mA]

50mA step response [mA]

25

60

120 100 80 60 40 20 0 0 0.1 0.2 Time [s] 0.3

(a)

(b)

(c)

Fig. A.3 LEM CT 0.2-P step response for 20mA (a), 50mA (b) and 100mA (c) leakage current and with 20A current in high power side

In order to compare the behaviour of the sensor with and without current in the high power side, the step response for both readings was compared. The red curve represents the step response with no current in the high power side, while the blue one represents the other case, with 20 A AC current flowing through the high power side. As can be observed, there is no major difference between the two cases, no matter what the level of the reference current was.

120

100 90
DUT step response [mA]

75

50 35 20

0.05

0.1

0.15 0.2 Time [s]

0.25

0.3

0.35

Fig. A.4 Step response comparison for LEM CT 0.2-P

The steady state values of the output of the sensor were also measured and are presented in Table A-1 and Table A-2, where: Iref current reference value IFluke45 Fluke 45 measurement Vout sensor output Imeas calculated current, based on RL and Vout absolute error 77

The absolute error is calculated based on the sensor output and the Fluke45 current measurement. The Fluke45 has a 0.05% accuracy for DC values. Imeas was calculated using the measured resistance value of RL=9.96 k. The calculated absolute error is increasing linearly with the current level and reaches a maximum value of 0.38 mA in case of the 100 mA current measurement.

Table A-1: Measured steady state data for LEM CT 0.2-P, when there was no current in the high power side Iref [mA] 20 50 100 IFluke45 [mA] 20.11 50.11 100.14 Vout [V] 0.499 1.252 2.503 Imeas [mA] 20.20 50.28 100.52

[mA]
0.09 0.17 0.38

Table A-2: Measured steady state data for LEM CT 0.2-P, when there were 20 A in the high power side Iref [mA] 20 50 100 IFluke45 [mA] 20.01 50.14 100.27 Vout [V] 0.499 1.252 2.505 Imeas [mA] 20.04 50.28 100.60

[mA]
0.03 0.14 0.33

A .1.2 Problem s
When the sensor was supplied with 15 V (as recommended in the datasheet), there was a voltage present on the output of the sensor which would act as a DC offset in the case of all measurements. This value was around 50 mV. By tuning the input voltage to 14.1 V this DC offset was minimized to 13 mV. Another frequent problem was the appearance of another DC offset on the sensor output. This offset had a value of up to 140 mV, but would disappear after a few resets of the sensor. Reset means a supply disconnect followed by a reconnect (OFF-ON). This phenomenon was observed only in case of resets. If the output of the sensor stabilized around 0, this type of offset would not reap78

pear during the readings. The available LEM CT 0.2-P sensors were tested and the same offset problems appeared in both cases with slightly different values.

A .1.3 C apacitor discharge test


The used circuit included a capacitor with a discharge time in the range of 1s and a current limitation of 20 A peak. A sketch for the proposed test setup can be seen in Fig. A.5. As can be seen in Fig. A.6, the capacitor was first charged and then discharged through a resistance. The influence of this high frequency discharge current was investigated.

V
DC

A
IG-PV

A
DC R

LEM CT 0.2-P

Fig. A.5 Laboratory test-setup for discharge test for the LEM CT 0.2-P

The measurement results show that there are some high frequency oscillations present in the sensor output due to the high discharge current of the capacitor.

79

Leakage current by LEM CT 0.2-P [mA]

100 50 0 -50 -100 -2

Sensor output in case of capacitive discharge

-1

2 Time [s]

5 x 10

6
-6

Capacitance voltage [V]

125 100 75 50 25 0 -25 -2 -1 0 1 2 Time [s] 3 4 5 x 10 6


-6

Capacitance current [A]

0 -10 -20 -30 -2

-1

2 Time [s]

5 x 10

6
-6

Fig. A.6: Capacitive discharge test

A.2 Telcon HES 25VT sensor test results


Test setup is presented in Fig. A.1. The same test conditions apply, as were also the case for the LEM sensor: 20 A RMS current in high power side (if the case) R2 = variable resistor for 20 mA, 50 mA and 100 mA leakage current Rsense = 26.1 k (so that at 200 mA the sensor output should be 5 V, the same scaling was used for the LEM CT 0.2-P sensor too)

80

the zero offset adjustment was done with a variable resistance; when there was no current through the sensor, the output of the sensor was between 10mV - 30 mV (lower than 1.2 mA offset)

A .2.1 Step response


The sensor output voltage and the voltage on R2 were measured and compared. The blue line is the sensor output voltage (Voltages are recalculated to the current reference in mAmps) and the red line is the reference, the voltage applied on R2. Three step responses have been measured: for 20 mA, 50 mA and 100mA. The rise time of the sensor is very fast, around 2.5 ms. This can be observed on Fig. A.7.

[mA]

[mA] 50

[mA] 100

20 40 15
100mA STEP response 20mA STEP response 50mA STEP response

80

30

60

10

20

40

10

20

0 -10

-7.5

-5

-2.5

2.5

7.5 [ms]

0 -10

-7.5

-5

-2.5

2.5

7.5 [ms]

0 -10

-7.5

-5

-2.5

2.5

7.5 [ms]

Fig. A.7: Step response for different current levels, when no current in high side

A .2.2 Step response with 20A 50H z A C current in high pow er side
When there is power in the high power side, the output of the sensor will contain a 50 Hz ripple. This 50 Hz ripple has 10 mA amplitude and it is added to the measurement so that the output of the sensor is a sinusoidal signal with a DC offset. The blue line is the sensor output voltage (the values in Voltages are recalculated to the current reference in mAmps) and the red line is the reference, the current through R2 (see Fig. A.8.)

81

[mA] 60

[mA] 110 100

50
100mA STEP response 50mA STEP response

80

40

60

30

20

40

10

20

Fig. A.8: Step response for different current levels, when 20A 50Hz AC current in high side

0 -15

-10

-5

10

15

20

[ms]

0 -15

-10

-5

10

15

20

[ms]

Fig. A.9 presents the sensor output and the reference when there is power in the high power side. On the left graph there is a 23 mA current in the low power side and on the right graph there is no leakage current present in the low power side. In both cases a 50 Hz component can be observed, which is due to the presence of the 20 A current in the high power side. The blue line is the sensor output voltage (Voltages are recalculated to the current reference in mAmps) and the red line is the reference, the current through R2.

[mA]
20mA sensor output when 20A 50Hz AC current

[mA] 25 20 15 10

0mA sensor output when 20A 50Hz AC current

30 20 10 0 -10 -20 -30

0 -0.8 -0.6 -0.4 -0.2

0 0.02 0.04 0.06 0.08 [s]

-50

-40

-20

20

40

[ms]

Fig. A.9: Test results for 20 mA and 0 mA(zero) leakage current,

82

The plastic casing of the sensor was removed for further testing. Fig. A.10 shows the real sensor without the protective plastic casing.

A .2.3 Sensor output D C offset


The offset of the sensor output depends on the Hall element position relative to core air gap. A small displacement of the core results in an offset variation of 100 mV with Rsense=26 k. Touching the core with the wire was enough displacement in order to change the offset.

core

5A, 50Hz wire position

Pos2 Pos1

Hall element

TELCON HES 25VT

Fig. A.10: Telcon HES 25VT sensor, without the plastic casing

A .2.4 Sensor output influenced by 50H z current


The 50Hz influence was further tested. Both cases are presented, the wires having been placed in two different positions, shown with labels Pos1 and Pos2 in Fig. A.10. The maximum influence was when the high-power wires, having a 5 A peak current at 50 Hz, were nearest to the Hall element (marked with Pos 1 in Fig. A.10). The output of the sensor can be seen in Fig. A.11 in blue line, while the red line shows the sensor output when the high-power wire was furthest from the Hall element (Pos2).

83

[mA] 30 20 10 0 -10 -20 -30 -0.04

Pos 1 Pos 2

Telcon HES25VT sensor

-0.03

-0.02

-0.01

0 Time [s]

0.01

0.02

0.03

0.04

Fig. A.11: Sensor output, when no leakage current, only 5 A, 50 Hz current in high-power wires

Observation: The position of the wire used to generate the leakage current in the low power side (red wire in Fig. A.1) had no influence on the sensor output.

84

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[57] H.S. Choi, Y.J. Cho, J.D. Kim, and B.H. Cho; "Grid-Connected Photovoltaic Inverter with Zero-Current-Switching"; in International Conference on Power Electronics, Oct. 2001, pp. 251-255 [58] M. Calais, V.G. Agelidis, L.J. Borle, and M.S. Dymond; "A transformerless five level cascaded inverter based single phase photovoltaic system"; in IEEE 31st Annual Power Electronics Specialists Conference, vol. 3, 18-23 Jun. 2000, pp. 1173-1178 [59] J.A. Gow and C.D. Manning; "Photovoltaic converter system suitable for use in small scale stand-alone or grid connected applications"; IEE Proceedings of Electric Power Applications, vol. 147, no. 6, Nov. 2000, pp. 535-543 [60] H. Schmidt, B. Burger, and Chr. Siedle; "Gefhrdungspotenzial transformatorloser Wechselrichter Fakten und Gerchte"; in 18. Symposium Photovoltaische Sonnenenergie, 2003, pp. 89-98 [61] C. Bendel, P. Funtan, J Kirchhof, and D. Nestle; "Wechselrichterwechselwirkungen - Testergebnisse aus dem Forschungsprojekt SIDENA"; in 19. Symposium Photovoltaische Solarenergie, 2004 [62] P. Zacharias, M. Khl, K. Vanoli, and A. Herrfeld; "Qualifizierung und Qualittssicherung zur Lebensdauer-Optimierung und Ertragskontrolle: Rckwirkungen auf Technologieentwicklung und Montage"; 2007. [63] N. Henze and T. Degner; "Radio Interference of Photovoltaic Power Systems"; in 16th International Wroclaw Symposium and Exhibition on EMC, 25-28 Jun. 2002, pp. 1-6 [64] O. Lopez, R. Teodorescu, and J. Doval-Gandoy; "Multilevel transformerless topologies for Single-Phase Grid-Connected Converters"; in IEEE 32nd Annual Conference on Industrial Electronics, 2006, pp. 5191-5196 [65] C. Bendel, P. Funtan, J. Kirchhof, and G. Klein; "Sicherheitsaspekte bei Einsatz und Prfung von transformatorlosen Wechselrichtern Ergebnisse aus dem Projekt SIDENA"; in 21. Symposium Photovoltaische Solarenergie, 7-10 Mar. 2006 [66] Eisner Safety Consultants; "Leakage Current (Part 1)"; May 2002. [67] LEM; "Current transducers CT 0.1. 0.4-P; datasheet; 080909/14"; [68] TELCON; "Hall Effect Current Transformers HES25VT, HES50VT HES100VT, HES25HR, HES50HR and HES100HR; datasheet"; [69] S.V. Araujo, A. Engler, B. Sahan, and F. Antunes; "LCL filter design for gridconnected NPC inverters in offshore wind turbines"; in IEEE - 7th International Conference on Power Electronics, 22-26 Oct. 2007, pp. 1133-1138 [70] N. Mohan and T.M. Undeland and W.P. Robbins; Power Electronics: Converters, Applications, and Design.: Wiley, 2002. [71] H. Schmidt, B. Burger, and K. Kiefer; "Wechselwirkungen zwischen Solarmodulen und Wechselrichtern"; Fraunhofer-Institut fr Solare Energiesysteme ISE,. 89

[72] D. Schekulin, P. Kber, and O. Schanz; "Modular Transformerless Inverters for Grid Connection of Large PV Generators"; in EuroSun 96, 1996, pp. 868-871 [73] B. Burger, B. Goeldi, H. Laukamp, and H. Schmidt; "Higher system efficiency in three phase plants through system voltages above 1000V"; in 23rd European Photovoltaic Solar Energy Conference, 2008, pp. 2755-2757 [74] A. Nabae, I. Takahashi, and H. Akagi; "A New Neutral-Point-Clamped PWM Inverter"; IEEE Transactions on Industry Applications, vol. IA-17, no. 5, 1981, pp. 518-523 [75] B. Sahan, A.N. Vergara, N. Henze, A. Engler, and P. Zacharias; "A Single-Stage PV Module Integrated Converter Based on a Low-Power Current Source Inverter"; IEEE Transactions on Industrial Electronics, vol. 55, no. 7, Jul. 2008, pp. 26022609 [76] L.H. Kim et al.; "Analysis of a new PWM method for conducted EMI reduction in a field oriented controlled induction motor"; in Applied Power Electronics Conference and Exposition, 2006, p. 7 [77] Danfoss Solar A/S; "TripleLynx Inveerter datasheet"; 2009. [78] R. Bruendlinger, C. Mayr, J. Kirchof, M. Moschakis, S. Nguefeu B. Bletterie; "Identification of general safety problems, definition of test procedures and designmeasures for protection"; sterreichisches Forschungs- u. Prfzentrum Arsenal GmbH, 2006. [79] R. Gonzales, E. Gubia, J. Lopez, and L. Marroyo; "Transformerless Single-Phase Multilevel-Based Photovoltaic Inverter"; IEEE Transactions on Industrial Electronics, vol. 55, no. 7, Jul. 2008, pp. 2694-2702 [80] E. Gubia and A. Ursua, J. Lopez and L. Marroyo P. Sanchis; "Ground Currents in Single-phase Transformerless Photovoltaic Systems"; Progress in Photovoltaics: research and Application, 2007, pp. 629-650 [81] M. Calais, V. Agelidis, and M. Meinhardt; "Multilevel Converters for Single-Phase Grid Connected Photovoltaic Systems: an overview"; Solar Energy, vol. 66, no. 5, 1999, pp. 325-335

90

Publications

91

Publication I
T. Kerekes, D. Sera, R. Teodorescu, PV inverter control using a TMS320F2812 DSP; Proceedings of EDERS 2006; Page(s) 51 - 57.

93

PV Inverter Control Using a TMS320F2812 DSP


Tams Kerekes, Dezs Sra, Remus Teodorescu Institute of Energy Technology; Aalborg University Pontoppidanstraede 101 DK-9220, Aalborg, Denmark tak@iet.aau.dk; des@iet.aau.dk; ret@iet.auc.dk;

Abstract
This paper presents the implementation of a control system of an inverter for grid connected photovoltaic (PV) applications, using a low cost TMS320F2812 eZdsp board. The implemented control system contains a P+Resonant current controller, a Maximum Power Point Tracker (MPPT) to optimize the power extraction from the PV panel, and a Phase Lock Loop (PLL) for grid synchronization. The whole control was implemented in fixed point using Simulink and the Embedded Target for TI C2000 toolbox. Code Composer Studio (CCS) is successfully used as a flexible user interface for controlling and monitoring the process. The experimental results show that this low cost DSP is capable of running a complex control structure in real time at a high sampling rate. In this case a current total harmonic distortion (THD) close to 1% and a high efficiency MPPT has been achieved.

1. Introduction
The TMS320F2812 eZdsp board from Spectrum Digital is a low cost and flexible platform which is a good choice for educational purposes. This DSP board proved its performance in control applications, having multiple high-resolution ADCs and CPU independent PWM units. The development of compilers has led to the possibility of generating code from high level design environments, thereby decreasing the time needed for code generation. One of these design environments is Simulink, which used together with Real-Time Workshop (RTW), the Embedded Target for TI C2000 and the Link for Code Composer Studio simplifies code generation for TI C2000 DSPs to a click of a button. Due this the time from the idea to the experimental tests is drastically reduced and the developer can dedicate all the efforts on the control design.

2. General control scheme for the PV inverter


A PV inverter converts the DC power produced by solar panels to grid synchronized AC power. A simplified scheme for the whole control can be seen on Fig. 1.

sin (

Fig. 1 Scheme of the implemented control strategy

The three main parts of the control are represented by the current controller, the MPPT and the PLL. The input of the current controller is the error between the measured and reference grid current (ig ref and ig). In order to synchronize the injected grid current with the grid voltage (to achieve unity power factor), the phase of the reference current is taken from the grid voltage, calculated by the Phase Lock Loop (PLL) block. The current controller output is the reference grid voltage, which divided by the DC source voltage gives the duty cycle for the inverter. The current controller is a P+Resonant controller [1] capable of zero steady state error for a sinusoidal reference signal. The transfer function presented below, where 0 represents the resonance frequency of the integrator:

H PR = K P + K I

(1) It is implemented using the delta operator [2], which gives better performance for 16 bit variables than the shift based implementation. The tested MPPT methods are the Perturb & Observe (P&O) and Incremental Conductance (INC) algorithms. The Simulink model of the control scheme is presented below:
round(75e6/8192/2) [Ugin]
Ug

s 2 s + 0
2

Duty cy cle

round(75e6/8192/2)

W1 C28x PWM

F2812 eZdsp

[Igin]

Ig

[START] W2

[Udcin]

Udc

C28x PWM = Vu * 2^ y = Qu << Ey = Eu [ThetaGrid] Vy = Vu y = Qu >> Ey = Eu + 5 = Vu * 2^ y = Qu >> y = Eu + 1

EN

W1

[Idcin] Aquisitions

Idc

W2 C28x PWM

Control

1 [sintheta]

W3 C28x PWM_B

Fig. 2 The Simulink scheme of the single-phase MPPT control


<0 1 ik 2 uk
uint16 uint16 uint16 int16 uint8

AND uint8

uint8

1/z

>0

uint8

1/z

uint16

int16

== 0

uint8

AND uint8

uint8

sf ix16_En12 uf ix16_En14

[dG]

uint8

[case]

[G] |u|
int16

Divide

>0

uint8

[G] I/V [dG] dI / dV

uf ix16_En14 g1 sf ix16_En12 g2

AND uint8
uint8

uint8

sf ix16_En13 g3

>0 <0

uint8

AND uint8

uint8

[case]

double

uint8

0 1 -1

int8 int8 int8

int8

int16

1 incr

1 inc_inc

int8

Fig. 3 MPPT algorithm flowchart and Simulink block diagram

Implementing the flowchart into Simulink is simple and straight-forward. This is emphasized on Fig. 3, where on the left side the flowchart of the MPPT algorithm is presented and on the right side, the corresponding Simulink block diagram.

3. DSP Implementation
Simulink is a very flexible tool for dynamic simulation. Together with RTW, the Embedded Target for TI C2000 compiles the model, generating a real-time C-code, which is forwarded to CCS. The DSP code is generated automatically and downloaded to the DSP by CCS, which is also used to debug the code and to monitor and observe the variables. This process can be visualized as:

Fig. 4 Illustration of the Simulink and RTW interaction with CCS for real-time implementation [6]

The main advantage of code generation directly from Simulink block diagram is the possibility to simulate in a visual environment the exact same structure which is downloaded to the target for experimental testing. The Simulink model was implemented entirely in fixed-point, choosing a sampling frequency of fs=8192Hz. A value of power of 2 has been chosen in order to optimize the operation where multiplication with the sampling period (e.g. integration) is needed. The frequency of the output pulses is defined by the waveform period from (2) and it can be calculated using the following formula: (2) where fHSPCLK is the frequency of the high-speed peripheral clock. The term is used due to the symmetrical PWM.
f PWM = f HSPCLK 1 75e6 1 = = 8192 Hz (WAVEFORM PERIOD) 2 75e6 ( 2 8192 ) 2

Fig. 5 The Code Composer Studio environment

The CCS is used for debugging and online visualization of the essential variables. This can be done either directly viewing the value of the variable in the watch window, or plotting it on a graph window, as shown on Fig. 5. 3.1 Fixed point scaling One of the most common problems that arise in fixed-point implementation is related to the correct scaling of the variables, in order to avoid overflows, but still have the best possible resolution. In Simulink the variable data types and scaling can be chosen in a very convenient way. It allows scaled variables to be visualized with their real values. It also offers a tool for detecting overflows which greatly simplifies the scaling procedure.

3.2 CPU load measurement In order to evaluate the workload of the DSP, the utilization ratio of the processor has been measured using a GPIO port, which was set to high (1) before the control function was called. After the code was executed this GPIO port was set to low (0). Viewing the state of this port on a scope, the time used for the code execution could be measured. Although the TMS320F2812 is a 32 bit DSP, it was observed that in Simulink it is recognized by the Embedded Target for TI C2000 as a 16 bit DSP. It has been observed that operation with 32 bit variables loads the processor more, than in the case of 16 bit variables. This was the reason due to which the control system was mainly implemented on 16 bits. Due to the fact that the MPPT algorithm requires a much lower sampling rate than the current control, it was triggered to be executed at 10Hz intervals. This was used to compare the increase in workload due to the execution of the MPPT algorithm. The same MPPT algorithm has been implemented in the same control system, both on 16 and 32 bits, and the increase in workload has been compared. Observing the workload for the different cases a sampling frequency of 5kHz has been used. This is visualized on Fig. 7.

Fig. 6 Scaling example of fixedpoint data type in Simulink

Fig. 7 CPU load for three different cases; when the MPPT algorithm is not enabled, the code is executed in 86s; in the case of the 16bit MPPT implementation the code is executed in 105s; and finally, with the 32bit MPPT algorithm the code execution time is increased to 142s

The fact that can be observed on Fig. 7 is that the MPPT algorithm implemented on 16bits is executed in 19s, on the other hand, when the MPPT algorithm is implemented using 32bit variables, its execution time is increased to 56s. This experimental measurement justifies the use of 16bit variables in the Simulink implementation. The disadvantage of using high level design environment (in this case Simulink) is the reduce of the control over the hardware resources, which could lead to the fact that hardware resources are not optimally used. 3.3 Experimental setup

Fig. 8 The Green Power Inverter hardware setup

The picture in Fig. 8 presents the laboratory setup and is detailed below: PV Simulator, which serves as the input voltage for the inverter, with a voltage range of 400-650V. It is realized with two Delta Elektronika 300-5 300V/5A power supplies. The system also can be connected to the available 1.5kW solar array. [5] A three-phase 400V/5.5A 1.5kW Danfoss VLT 5005 inverter. In the case of singlephase configuration only two legs of the inverter bridge are controlled by the two PWM signals generated by the DSP. An LC filter, which, together with the transformer inductance forms an LCL filter, and provides the filtering of the PWM output voltage from the inverter in order to apply it to the grid, through the transformer. A Voltech three-phase power analyzer The PWM pulses for the inverter control are generated by a Spectrum Digital TMS320F2812 eZdsp card, featuring a TMS320F2812 32 bits DSP from Texas Instruments. For code generation Simulink Fixed Point version 5.1; Embedded Target for TI C2000 DSP version 1.2.1 and Real-Time Workshop Embedded Coder version 4.2 were used

4. Experimental results
Without any harmonic compensation the grid current THD was above 10.5%, which does not fulfill the IEEE 929 standard. Turning on the compensation for the 3rd harmonic, decreases the current harmonics level but still does not comply with the standard. A drastic decrease in the THD can be seen when the compensation for the 5th harmonic is turned on, the THD decreases to 2.2%, well below the limit in the IEEE standard. Turning on the compensation for the 7th harmonic, a further improvement of the grid current waveform quality is achieved, resulting in a THD of 1.2%
Grid voltage 400 200 Vg [V] 0 -200 -400 0 0.005 0.01 0.015 0.02 Grid current 20 10 Ig [A] 0 -10 -20 0.025 0.03 0.035 0.04

0.005

0.01

0.015

0.02 time [s]

0.025

0.03

0.035

0.04

Fig. 9 Current THD for different cases of harmonic compensation

Fig. 10 Grid voltage and grid current for a 10A peak current reference

The MPP tracker was also tested and the results can be seen on Fig. 11. The maximum power drawn by the MPPT was around 1289W with 20W oscillations, due to the noise in the measurements. According to the model of the PV panel, the ideal maximum power is 1300W for 700W/m2 irradiation.

Fig. 11 Tracking of the MPP using 16 BP-MSX120 solar panels, having an irradiance of 700W/m2

5. Conclusions
The current controller with selective harmonic compensation, together with the MPPT algorithms have been successfully implemented on the TMS320F2812 eZdsp board using Simulink RTW, Embedded Target for TI C2000 family and CCS. Even with a complex control system it was possible to run it at more than 8kHz sampling frequency. The measured CPU load is 86% having an 8192Hz sampling frequency. Results show that the harmonic compensation works well resulting in a low current THD (THDi=1.2%), well within the requirements of the IEEE 929 standard. Together with the current controller, the MPP tracker is also running and is capable of tracking the MPP of the PV panel, having 3% power oscillations at the maximum. The C28xx family proves to be a very good low cost solution for PV inverter applications.

6. References:
[1] R. Teodorescu, F. Blaabjerg: A new control structure for grid-connected LCL PV inverters with zero steady-state error and selective harmonic compensation, IEEE 2004 [2] Michael J. Newman, Donald G. Holmes: Delta Operator Digital Filters for High Performance Inverter Applications, IEEE Transactions on Power Electronics, vol. 18, no.1, Jan.2003 [3] Chihchiang Hua, Jongrong Lin, Chihming Shen: Implementation of a DSP-Controlled Photovoltaic System with Peak Power Tracking, IEEE Transactions on industrial electronics, Vol. 45, No. 1, Feb.1998. [4] TMS320x281x DSP Event Manager (EV) Reference Guide; Literature no: spru065c. Source: http://focus.ti.com/lit/ug/spru065c/spru065c.pdf (pg 60) [5] Advanced Education Facilities for Power Electronics and Renewable Energy Systems at Aalborg University, Teodorescu, R.; Lungeanu, M.; Blaabjerg, F.; The 2005 International Power Electronics Conference, Proceedings of. IPEC 2005, 6-10 April 2005, Pages 533 540 [6] Embedded Target for TI C2000 DSP 1.3; http://www.mathworks.com/products/tic2000

Publication II
M. Ciobotaru, T. Kerekes, R. Teodorescu and A. Bouscayrol, PV inverter simulation using MATLAB/Simulink graphical environment and PLECS blockset IEEE Industrial Electronics, IECON 2006 - 32nd Annual Conference on: 6-10 Nov. 2006; Page(s):5313 - 5318

103

PV inverter simulation using MATLAB/Simulink graphical environment and PLECS blockset


M. Ciobotaru(1), T. Kerekes(2), R. Teodorescu(3), Senior Member, IEEE and A. Bouscayrol(4), Member, IEEE
Institute of Energy Technology, Aalborg University Pontoppidanstraede 101, 9220 Aalbborg DENMARK (1) (3) mpc@iet.aau.dk (2)tak@iet.aau.dk ret@iet.aau.dk
Abstract In this paper a photovoltaic (PV) energy conversion system is simulated jointly with its control. The simulation of the system is developed for testing control algorithm before a real-time implementation. The control part is developed using MATLAB/Simulink in order to ensure a direct generation of the real-time code for the dSPACE control board. The simulation of the power system is first realized using MATLAB/Simulink. In a second step, the simulation of the power system is realized using the PLECS toolbox. Both simulation models are tested and selective simulation results are provided for a comparative study.
(1)(2)(3)

University of Lille, L2EP, L2EP, USTL, 59 655 Villeneuve d'Ascq cedex FRANCE
(4)

(4)

Alain.Bouscayrol@univ-lille1.fr

This paper investigates the interest of combination of MATLAB/Simulink toolbox and PLECS [7] for simulation control of systems using power electronics. A photovoltaic (PV) energy conversion system is taken as an example. In section II, both graphical environments are described. Section III is devoted to the simulation of the PV application. Finally, comparisons of the simulation results are presented in section IV. II. GRAPHICAL ENVIRONMENT Two kinds of graphical software are considered for studying control of system with power electronics. The first one is more appropriated in describing the power system as it is physically composed. The second one is more appropriated in describing the signal flow of digital control. Circuit simulation programs are based on libraries of physical components to connect using lines representing physical connections. A system is then built by association of its physical components. The software has to internally solve association problem using several numerical methods. For instance, if two inductors are connected in series, only one state variable is calculated, because both currents are equals. This kind of software is very useful for systems design and analysis. System simulation programs are based on libraries of functions. The system is described by a combination of basic functions connected using lines representing common variables. Several components can thus be depicted by a global function. For instance, two inductors connected in series can be described by a single transfer function with a single time constant. As a lot of analysis and automatic tools are often provided, such software is very useful for control design. New possibilities are more and more offered to combine both graphical environments in order to describe the system as it can be viewed and to organize the control as it has to be designed. However, their philosophy is quiet different. Sometimes, there are difficulties to have a uniform simulation, and moreover some mistakes could be done by non-experimented users.

I. INTRODUCTION Simulation of modern electrical systems using power electronics has always been a challenge because of the nonlinear behavior of power switches, their connection to continuous sub-systems and the design of discrete-time control [1]. Nowadays, more and more complex systems are studied for designing efficient control strategies, such as renewable energy conversion systems [2], whole traction systems [3] and so on. In theses cases efficient simulations before practical control implantation are required. A lot of simulation software has been developed in the past. Some of them has been dedicated to simulation of detailed behavior of power electronics based on specific circuit library, such as PSCAD (Professional's tool for Power Systems Simulation), CASPOC (Power Electronics and Electrical Drives Modeling and Simulation Software), PSPICE (Design and simulate analog and digital circuits), PSIM (simulation software designed for power electronics, motor control, and dynamic system simulation) and so on. Other software enables an efficient control development based on specific system libraries or toolboxes such as MATLAB/Simulink. Using this kind of software could be valuable for a direct generation of real-time control algorithm such as obtained for dSPACE controller boards. Thus, using single software requires adaptations to ensure efficient simulations of the whole system taken into account non-linear behavior of power electronics and direct implementation of control laws [4], [5], [6].

1-4244-0136-4/06/$20.00 '2006 IEEE

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Authorized licensed use limited to: IEEE Xplore. Downloaded on March 5, 2009 at 09:15 from IEEE Xplore. Restrictions apply.

In this paper, the association of the well-known MATLAB/Simulink environment (system simulation program containing powerful libraries and toolboxes for automatic control) and the new PLECS (circuit simulation program including power electronics libraries) is tested. The objective is to develop digital control for power electronics, from the simulation to the practical implementation. Therefore, MATLAB/Simulink environment is well adapted for control development and contains automatic code generator. PLECS toolbox is used to provide a simulation model of the Plant, before the implementation on an actual process. A. MATLAB/Simulink environment To effectively design an embedded control system and accurately predict its performance, designers must understand the behavior of the entire system in which the control system will reside. MATLAB and Simulink form the core environment for Model-Based Design for creating accurate, mathematical models of physical system behavior. The graphical, block-diagram paradigm of the MATLAB/Simulink environment lets the user drag-and-drop predefined modeling elements, connect them together, and create models of dynamic systems. These dynamic systems can be continuous-time, multi-rate discrete-time, or any combination of the three.

B. PLECS blockset PLECS is a Simulink toolbox used for simulation of electrical circuits within the Simulink environment. Simulations are fast, due to the fact that components are taken to be ideal. As shown on Fig. 2, circuits made with PLECS include resistors, inductors, capacitors, switches, and voltage and current sources all taken as ideal components. Voltages and currents can be measured using probes. These measurements can be used as feedback for the control within the Simulink environment or just viewed online using scopes.

Fig. 2 Some of PLECS components used for circuit simulation

Voltages and currents can only be viewed in graph windows using special probes. Matlab Simulink is very good in post processing of simulation results. Actually most of the simulation tools provide an interface for Simulink. Using this toolbox it is possible to implement the power converter and other electrical circuits as a PLECS subsystem and the control as standard Simulink subsystem. C. Final step for a real-time implementation of the control Using the system model and Real-Time Workshop, realtime code for testing, validation, and embedded implementation on the production target processor can be automatically generated using for example dSPACE hardware [8]. As it is created, the code is automatically optimized for fast execution and efficient use of memory. Automatically generating code from the system model avoids errors due to manual translation of the model into code, and saves time, allowing software developers to focus on more demanding tasks. A typical example of using the dSPACE system for electrical drives simulations is described in [9] and for wind energy conversion systems (WECS) in [10]. However, before the real-time implementation, the Control part has to be validated by simulation using a plant model. This model could be developed using either the Simulink transfer functions or the PLECS toolbox. III. SIMULATION OF PV INVERTER

Fig. 1 Hierarchical models of complex control systems using Simulink

The modeling environment is hierarchical and selfdocumenting as presented in Fig. 1. System structure and function can be expressed by grouping model.

A. Studied system and control The general structure of a single-stage single-phase gridconnected PV inverter system, depicted in Fig. 3, contains two main parts: - the Plant part (hardware components) such as the PV arrays, PV inverter, filter and the grid utility; and

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the Control part composed by algorithms such as the Maximum-Power-Point-Tracker (MPPT), phase-locked-loop (PLL), dc voltage controller, current controller, etc.
PL A NT
PV A rray

Therefore, the Control block in Fig. 4 and Fig. 5 is identical and can be first simulated off-line using a Plant and PWM model as presented in Fig. 4 and then tested on-line by removing the Plant model and adding interfaces towards the real Plant as shown in Fig. 5. This way the control development time can be reduced considerably.

Grid PW M

Fig. 5 Control system model for dSPACE implementation

C ONTR OL

Fig. 3 Power electronic system with the grid, source (PV array), power converter, control and PWM

The Control structure of the single-stage single-phase PV inverter system is shown in Fig. 6. The main elements of the Control structure are the synchronization algorithm based on PLL, the MPPT algorithm, the dc voltage controller and the current controller.

Using the advantage of the graphical representation of the Simulink environment, a simulation model has been built as presented in Fig. 4. The simulation model is divided in the Control part and the Plant part in such a way that the Control part can be directly implemented in a real-time application using dSPACE for experimental validation. Using the control system model and Real-Time Workshop, real-time code for testing, validation, and embedded implementation on the dSPACE system can be automatically generated (see Fig. 5).

I dc Vdc
+
* Vdc

i
+

* Ig

Ig
Vg

kdc

sin * * inv Ig

Fig. 6 Control diagram of the PV energy conversion system

The simulation model of the PV inverter Control structure was built based on a graphical intuitive way as it can be seen from Fig. 7.

Fig. 7 Simulation model of the PV inverter Control structure

Fig. 4 Simulink model of the PV inverter

Fig. 8 presents the single-phase PLL structure including grid voltage monitoring [11]. The PLL is used to provide a unit power factor operation which involves synchronization of the inverter output current with the grid voltage and to give a clean sinusoidal current reference.

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v'

dq
1 2

* vq = 0

ff
+ +

v'

vq

v
qv '
qv '

1 2

The schematic for the power circuit is presented in Fig. 12. The Simulink model, using standard blocks, of the Voltage Source Inverter is shown in Fig. 13.
PLL
f

mod(2)

vd

VRMS
v '2 + qv '2

Fig. 8 General form of a single-phase PLL structure including grid voltage monitoring

The equivalent Simulink model for the single-phase PLL structure presented in Fig. 8 is shown in Fig. 9.

Fig. 9 Simulink model of the single-phase PLL structure

The grid current controller is implemented using the Proportional Resonant (PR) controller which is defined as [12]: s (1) Gc ( s ) = K p + K i 2 2 s + o The PR controller can be associated with a harmonic compensator (HC) Gh(s) which is defined as: s (2) Gh ( s ) = K ih 2 2 s + ( o h ) h = 3,5,7,9 The Simulink model of the grid current controller (PR+HC) is depicted in Fig. 10 where the same block for the double integrator is being reused for different resonance frequencies. The tuning of the current controller has been done using the Sisotool toolbox provided in MATLAB/Simulink environment. The Root-locus and Bode diagram analysis of the PR+HC controller are presented in Fig. 11. This tool allows determining the gain of the controller manually imposing a certain bandwidth and in the same time the phase margin can be adjusted to ensure stability. MATLAB/Simulink proves to be a good tool for control design, but modeling switching converters can be a challenge. Therefore, in order to test the performance of a power circuit simulation, the same Plant model has been developed using two different techniques: - one uses the transfer functions approach, and the other makes use of PLECS toolbox. B. Simulation of the Plant using MATLAB/Simulink First the Plant model has been developed using transfer functions approach leading to high complexity and difficulty in monitoring signals at different nodes of the circuit.

Fig. 10 Simulink model of the grid current controller


1.5

Root Locus
Dominant poles

150

Open-Loop Bode
G.M.: 7.5 dB Freq: 1.67e+003 Hz Stable loop

0.5 Imag Axis

3e32.5e32e3 0.1 3.5e3 1.5e3 0.2 0.3 0.4 4e3 1e3 0.5 0.6 0.7 0.8 4.5e3 500 0.9 5e3 5e3 4.5e3 500 4e3 3.5e3 1.5e3 3e32.5e32e3 1e3

Magnitude (dB)

100

50

0 90 0 -90 -180 -270 -360 -450 P.M.: 60.6 deg -540 0 10


Freq: 566 Hz

-1

-1.5

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0 Real Axis

0.5

Phase (deg) 1

-0.5

10

10 Frequency (Hz)

10

Fig. 11 PR current controller Root-locus and Bode diagram analysis

Sa

Sc

Li

Lg

Cdc

Cf

Sb

Sc

Fig. 12 Power circuit diagram

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Fig. 13 Simulink model of the Voltage Source Inverter

Fig. 14 shows the Simulink transfer functions approach of the LCL filter and the grid utility. As it can be noticed, it is difficult to follow the signals at different nodes of the circuit especially if the complexity of the circuit becomes higher.

C. Simulation of the Plant using PLECS Developing electrical circuits with PLECS is really easy and straightforward. One has just to drag and drop the components that are needed and connect them in order to make the desired electrical circuit. The simulation model of the PV system using PLECS is similar to the one presented in Fig. 4, only the Plant subsystem has been changed using PLECS toolbox, the control strategy remaining the same as previously described in Fig. 7. The Plant subsystem represents the electrical circuits modeled using PLECS. The power circuit includes models for the DC supply, inverter, LCL filter and utility grid. The detailed circuit for the Plant can be seen in Fig. 15. These models are made up of subsystems that are described below. The DC supply is modeled by a voltage source. The inverter is based on the standard full bridge topology using 4 IGBTs with built-in anti-parallel diodes. These switches are controlled by the gate signals (Sa-Sb-Sc-Sd) which are forwarded to the PLECS circuit from the Simulink Control block using special gate signal ports. The electrical ports are used within the subsystem for the input and output of the electrical signals (DC+, DC-, L, N).

Fig. 14 Simulink transfer functions approach of the LCL filter and the grid utility
1 Sd

Sb

Sd

Sa

A 2 Vdc C

DC+

Sc

1 Idc

4 Sa

3 Sb

2 Sc

3 Ig
Vg L L L_

4 Vg

Full Bridge
DCN N

LC L filter
N_ N

Grid Utility

DC + Sa

Li S1 Sc S3 L L Cf

Lg

L_ L

Ls

Rs

Cs V

N S2 Sb DC Sd S4 N Li

Rd N_ N

R ds

Vg

Fig. 15 PLECS circuit of the Full Bridge topology, connected to the Grid through an LCL filter

To filter the high frequency pulses of the inverter, an LCL filter is used. The inductance and capacitance values are set from the mask of the subsystems. For the electrical signals the before mentioned electrical ports are used. The grid is modeled having inductive, resistive and capacitive components and the parameters are set through the

mask of the subsystem. Furthermore, as seen on Fig. 15, currents and voltages in any part of the circuit can be measured and then viewed on a scope or used as feedback in the control strategy within the Simulink environment.

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IV. SIMULATION RESULTS Fig. 16 shows a comparison between the simulation results obtained using two different techniques for modeling the Plant: one makes use of PLECS toolbox (the first two subplots) - the other uses the Simulink transfer functions approach (the last two subplots). The simulation results were obtained using the same Control structure and the same parameters for the Plant. As it can be seen, there are almost no differences between the two different Plant implementations. However, the simulation time using PLECS model for the Plant was four times smaller than the simulation time using Simulink transfer functions approach. Thence, a real time of one second has been simulated in 59 seconds using PLECS and about 3 minutes 46 seconds using Simulink transfer functions.
500 Inverter voltage and current using PLECS model for plant 10 0 10 10 0 10 10 0 10 10 0 10 0.2

PLECS is a well suited tool for modeling electrical circuits within MATLAB/Simulink environment. One of the major strength of combining PLECS with Simulink is not only the speed of the simulations, the simplicity of making the circuit, but also the advantage of simulating electrical circuits and controlling them within Control blocks built in standard Simulink environment. However, the combination of circuit software with system software could lead to confusion for novice users. Furthermore, the line connections between elements do not represent the same concept. V. REFERENCES
M. P. Kazmierkowski, R. Krishnan, F. Blaabjerg, Control in power electronics, Academic Press, Elesevier Science, 2002. [2] J. T. Bialasiewicz and E. Muljadi, Analysis of RenewableEnergy Systems Using RPM-SIM Simulator, IEEE Trans. on Power Electronics, vol. 53, no. 4, June 2006, p. 1137 1143. [3] M. Eshani, Y. Gao, S. E. Gay, A. Emadi, Modern electric, hybrid electric and fuel cell vehicles, CRC Press, New York, 2005. [4] R. Teodorescu, D. P. Zelaya, K. Bresnahan and E. Rosu, A Simulink Approach to Power Electronics Simulations, Record of EPE 1995, vol. 3, p. 954958. [5] S. Onoda and A. Emadi, PSIM-based modeling of automatic power systems: conventional, electric and hybrid electric vehicles, IEEE Trans. on Vehicular Technology, vol. 53, no. 2, March 2004, p. 390-400. [6] B. Kaminski, K. Werrzanowski and W. Koczara, An application of PSIM simulation software for rapid prototyping of DSP based power electronics control systems, Record of IEEE PESC 2004, Germany, p. 336-341. [7] J. H. Allmeling and W.P.Hammer, PLECS Piece-wise Linear Electrical Circuit Simulation for Simulink, Record of IEEE PEDS 1999, vol.1, p. 355-360. [8] R. Otterbach, T. Pohlmann, A. Rukgauer and J. Vater, DS1103 PPC controller board rapid prototyping with combined RISC and DSP power for motion control Proc. of PCIM 1998, Nrnberg. [9] R. Teodorescu, M. Bech, F. Blaabjerg and J. K. Pedersen, A new approach in teaching power electronics control of electrical drives using real-time systems; Record of COMPEL 2000, p. 221 226. [10] A. Bouscayrol, X. Guillaud and Ph. Delarue, Hardware-inthe-loop simulation of a wind energy conversion system using energetic macroscopic representation; Record of. IEEE IECON 2005, p. 2517 2522. [11] M. Ciobotaru, R. Teodorescu and F. Blaabjerg, A new single-phase PLL structure based on second order generalized integrator, Record of IEEE PESC 2006, Korea, p. 1511-1516. [12] R. Teodorescu, F. Blaabjerg, U. Borup and M. Liserre, A new control structure for grid-connected LCL PV inverters with zero steady-state error and selective harmonic compensation, Record of IEEE APEC 2004, United States, vol. 1, p. 580-586. [1]

Vi [V]

0 500 500

Grid voltage and current using PLECS model for plant

Vg [V]

0 500 500

Inverter voltage and current using Simulink model for plant

Vi [V]

0 500 500

Grid voltage and current using Simulink model for plant

Vg [V]

0 500 0.16

0.165

0.17

0.175

0.18 0.185 Time [s]

0.19

0.195

Fig. 16 Simulation results of the PV inverter

IV. CONCLUSION This paper is focused on the simulation of the control of a power system before its real-time implementation. First a particular case for simulation of single-phase PV inverter in Simulink is described focusing on the control design. The controller can be then automatically tested online using dSPACE system. Secondly PLECS, a new Simulink blockset implemented as a circuit simulator is introduced. The combination of the two tools provides a good environment for the switching power converter simulator.

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Ig [A]

Ii [A]

Ig [A]

Ii [A]

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Publication III
T. Kerekes, R. Teodorescu and U. Borup, Transformerless Photovoltaic Inverters Connected to the Grid; Twenty Second Annual IEEE Applied Power Electronics Conference, APEC 2007 -; Feb. 25 2007-March 1 2007; Page(s):1733 1737

111

Transformerless Photovoltaic Inverters Connected to the Grid


T. Kerekes
Institute of Energy Technology Aalborg University Pontoppidanstraede 101 9220 Aalborg DENMARK tak@iet.aau.dk

R. Teodorescu
Institute of Energy Technology Aalborg University Pontoppidanstraede 101 9220 Aalborg DENMARK ret@iet.aau.dk

U. Borup
Powerlynx A/S Jyllandsgade 28 6400 Sonderborg DENMARK ub@powerlynx.com

Abstract- Renewable energy sources are getting more and more widespread, mainly due to the fact that they generate energy by keeping the environment clean. Most of these systems have an isolation transformer included, which if excluded from the system would increase the efficiency and decrease the size of PV installations, furthermore it would lead to a lower cost for the whole investment. But there are some safety issues regarding the missing galvanic isolation. This paper is aiming to analyze and compare the most common single-stage transformerless PV inverter topologies for single-phase and three-phase with respect to the leakage current generation. The best results, both for single-phase and three-phase systems, are obtained when the middle point of the input capacitors is connected to the neutral point, thereby minimizing the voltage fluctuations present at the terminals of the PV panel.

the resulting capacitance has values between 50-150 nF/kW, depending on the weather conditions and panel structure. This leads to leakage currents between the panel terminals and ground, depending on inverter topology and switching strategy. The level of the leakage current depends mostly on the amplitude and frequency content of the voltage fluctuations that are present at the PV panel terminals, but it also depends on the value of the parasitic capacitance. [5]
TABLE 1: Leakage current mean levels and corresponding disconnection times (DIN VDE 0126-1-1)

Leakage current mean value (mA) 30 60 100

Disconnect time (s) 0.3 0.15 0.04

I.

TRANSFORMERLESS PV INVERTERS

As photovoltaic (PV) module prices become cheaper, the reduction of manufacturing costs of PV inverters becomes a must. PV inverters that have an isolation transformer on the grid side, are big in size, therefore making the whole system bulky and hard to install. Topologies that use high frequency transformer in the DC-DC converter have a reduction in the overall efficiency, due to the leakage in the transformer. [1][2][3] A higher efficiency, smaller size & weight and a lower price for the inverter is possible in case the transformer is left out. These transformerless solutions offer all the before mentioned advantages, but there are some safety issues due to the solar panel parasitic capacitance. [1] This resulting leakage capacitance value depends on many factors; some of these are enumerated below: PV panel and frame structure, surface of cells, distance between cells, module frame, weather conditions, humidity and dust covering the PV panel. [5] In [5] it is mentioned that a typical value of 100-200pF was measured between the PV cells and the grounded palm of a person. But in case the surface of the panels was covered with water, this capacitance increased to 9nF, 60 times its previous value. In case of a solar array having a considerable surface,

According to the German DIN VDE 0126-1-1 standard, in case of transformerless PV inverters connected to the grid there needs to be a Residual Current Monitoring Unit (RCMU), which is sensitive for DC and AC currents and can sense DC fault currents. In case the leakage current to ground (peak value) is greater than 300mA, then disconnection is necessary within 0.3s. Otherwise, in case of an instantaneous fault current TABLE 1 should be followed. [8] Elimination of the transformer may lead to DC current injection into the grid which might saturate the power transformers. Injected DC currents are not fault currents, but are due to a small asymmetry between the positive and negative half-wave of the injected AC current. Most standards dealing with utility interconnection have a section regarding the level of the DC current that is allowed to be injected (see IEEE 929-2000, IEC 61727, IEEE 1547, EN 61000-3-2) and this varies between 0.5 and 1% of the rated current.

II. SINGLE-PHASE TRANSFORMERLESS PV INVERTERS In order to verify the level of leakage currents of different topologies simulations and experimental measurements have been done. Simulations were done using Simulink and PLECS toolbox, used for simulation of electrical circuits within the Simulink environment [7]. All simulation results are based on the general simulation model presented on Fig. 1 for the single-phase topologies. Same filter and grid parameters have been used throughout the simulations, these are listed below: LCL filter parameters: Lfi=0.7mH filter inductance inverter side, Lgi=2mH filter inductance, Cf=2.2F filter capacitance, Rcfs=1m capacitance ESR Inverter parameters: fsw = 10kHz Grid parameters: Vg=220Vrms grid RMS voltage, f=50Hz grid frequency, Zg=0.5+1e-3 grid impedance;

DC decoupling has the advantage, that during the freewheeling phases the AC voltage circuit gets disconnected from the DC voltage circuit using a switch (S7). [9] In case of the AC decoupling, switches S5 and S6 are used during freewheeling, thereby increasing the efficiency of the inverter, because the freewheeling through the DC link is avoided. [10]

Filter

Grid

PV Array

Fig. 3: Experimental data for FB with bipolar switching.

Fig. 1: Single-phase system with parasitic capacitances

The leakage capacitances are added to the model in order to be able to simulate the leakage current. Both capacitance values are chosen to be 100nF [5]. The leakage current is measured between N and Ground. The most widespread single phase topology is the fullbridge one. This topology can be chosen to have bipolar or a unipolar PWM controlled switches. Using unipolar switching strategy the inverter pulses will have twice the frequency that is in case of bipolar switching, therefore the output filter can be smaller, than in case of the bipolar. [6] Fig. 2 presents the full-bridge topology and two of its newer developments that consist in an added DC or an AC decoupling part (grey background).

Fig. 4: Experimental data for the FB topology with unipolar switching.

Fig. 2: Full-Bridge topology, showing the added DC or AC decoupling [6][9][10]

For the experimental measurements a three-phase setup was used, made up of a DC power supply, a three-phase Danfoss inverter and filter with a direct connection to the utility grid. In case of the single-phase setup only 2 legs of the inverter have been used. For these single-phase measurements the 1.7kWp PV installation has been used, having the frame of the panels connected to ground, thereby creating a path for the flow of the leakage current. As seen on Fig. 3, representing the experimental scope data in the case of the full-bridge topology with bipolar switching, the PV terminals are fluctuating with the grid frequency and the fluctuations have half the amplitude of the grid voltage. Due to this sinusoidal fluctuation and the low frequency content of the fluctuation, the leakage current towards ground is small. Fig. 3 shows the measurements, where: the inverter voltages are with blue; voltage fluctuations of PV terminal with cyan and ground leakage current with magenta.

PV Array

The experimental results for the case of the full-bridge topology with unipolar switching are presented on Fig. 4. It can be observed that the PV terminals have a high frequency fluctuation (Vgrid/2 Vdc/2). The leakage current in this case reaches peak values up to 5A. Also in the case of Fig. 4 the measurements shown are: the inverter voltage with blue; voltage fluctuations of PV terminal with cyan and ground leakage current with magenta. Comparing these previous two cases it can be concluded, that the full-bridge topology with unipolar switching is not suitable for transformerless PV systems due to the large leakage current flowing towards ground. Much better results regarding the voltage fluctuations present at the PV panel terminals (DC+ and DC-) can be achieved in case the middle point of the input capacitors is connected to Neutral, thereby minimizing the voltage fluctuations. Such topologies are the half bridge (HB) and neutral point clamped (NPC) topology, presented on Fig. 5. The NPC is another widely used single phase topology. Simulation based on this topology have shown promising results, which are presented on Fig. 6.

It can be seen that using the NPC topology the voltage fluctuations on the PV panel are very small and the leakage current is below 30mA, which was the lowest level of leakage current where disconnection was necessary, as stated in the VDE 0126 standard. III. THREE-PHASE TRANSFORMERLESS PV INVERTERS Most of the single-phase installations were small scale PV systems up to 5-6 kWp. Being a single-phase system meant that there was a pulsating power output, which required big capacitors that increased the cost and decreased the lifetime and reliability of the whole system. With a three phase system on the other hand there is constant power output, which means no large capacitors, leading to improved cost, reliability and lifetime of the whole system. Also the power output of these systems can be higher, reaching up to 10-15 kWp in case of rooftop applications. Error! Objects cannot be created from editing field codes.
Fig. 7: Grid connected three-phase full-bridge topology

Fig. 7 shows the three-phase full bridge system, which is the most simple and widely used topology in case of three-phase systems. To control the switches a simple sinusoidal PWM is used having a modulation technique using 1 triangular wave and three symmetrically displaced sinusoidal signals which are synchronized with the three-phase grid. In the experimental setup, the PV panels have been replaced by DC power supplies, due to weather conditions.

Fig. 5: PV arrays connected to grid through a NPC inverter [1]

500 400

Terminal + [V]

300 200 100 0 0.06

PV Array

PV Array

0.07

0.08 Time [s]

0.09

0.1

0.05

Fig. 8: Scope data for DC to earth voltage (channel 4) and grid voltage (channel 2) in case of a transformerless three-phase full-bridge topology

0.025

0.025

0.05 0.06

0.07

0.08 Time [s]

0.09

0.1

Fig. 6: Simulation result for NPC inverter

This is the reason why the leakage current has not been measured and only the voltages of the DC+ and DC- terminals have been measured. As seen on Fig. 8, the DC-to-earth voltages, shown by channel 4 with color green, has a high frequency content (switching frequency) that can lead to large leakage currents flowing towards ground. Therefore the three phase full-bridge inverter is not suitable for PV inverter solutions due to its

Ground current [A]

large leakage current and the problem with the DC-to-earth voltage. Furthermore two other topologies will be investigated using the same simulation tools as described for the case of the single phase topologies. The first topology is made up of a combination of three NPC legs (3xNPC): to each one of the three phases a singlephase NPC leg is connected and controlled individually. Fig. 9 presents the equivalent circuit, the NPC leg is detailed on Fig. 5. The filter is a three-phase LCL filter with capacitors connected in triangle.
Fig. 11: Half-bridge legs used to supply a three phase system
PV Array
500 400

Terminal + [V]

Filter

300 200 100

PV Array

0 0.06

0.07

0.08 Time [s]

0.09

0.1

0.05

Ground current [A]

0.025

Fig. 9: 3xNPC used for a three phase system


500 400
Terminal + [V]

0.025

0.05 0.06

0.07

0.08 Time [s]

0.09

0.1

300 200 100 0 0.06

Fig. 12: Simulation results for 3~full-bridge split capacitor topology

0.07

0.08 Time [s]

0.09

0.1

0.05

Also in this case the simulation results, presented on Fig. 12, show that the voltage fluctuation on the PV panel terminals is very small and the leakage ground current is again smaller than 30mA. IV. COMPARISON

Ground current [A]

0.025

0.025

0.05 0.06

0.07

0.08 Time [s]

0.09

0.1

Fig. 10: Simulation result for 3 x NPC

As seen on Fig. 10, the simulation results are very promising, with only a few Volts of ripple on the PV terminals and a leakage current below 30mA. The other topology (3xHB) is similar to the previously presented solution, but in this case three half-bridge legs are individually connected to the three-phase grid, having the middle point of the input capacitors connected to the Neutral. Each phase is individually controlled, using a sinusoidal PWM strategy.

All the simulations were done using the same filter parameters, switching-frequency and the grid was set to be pure sinusoidal. The DC input voltage was set to be at 400V for the single-phase topology and 700V for the three-phase topologies. In case of the experimental results, for the single-phase setup the PV panels were supplying the DC power, while in case of the three-phase setup DC power supplies were changed for the PV panels. As detailed in TABLE 2, the single phase full-bridge topology (FB) is only suitable in a transformerless PV system in case the applied PWM strategy is the bipolar one, because using unipolar switching, the PV panel terminals are jumping between Vdc with the switching frequency, that would generate high leakage currents through the parasitic capacitance of the PV panel. Much better results are achieved in case the middle point of the input capacitors is connected to Neutral. This was the case for the NPC topology, in which

case the voltage fluctuations present at the PV panel terminals is reduced to a few Volts, leading to very low leakage current. In case of the three-phase topologies, the experimental results have shown that the normal three-phase inverter (3FB) would generate high leakage ground currents, due to the highfrequency voltage fluctuation between Vdc. But there are two other topologies which would be suitable for three-phase transformerless PV inverters. These are the 3xNPC and 3xHB, in which case simulations have shown promising results, leading to low leakage current level that was within the standard requirements. V. CONCLUSION Based on the previously detailed comparison and the simulation and experimental results, it can be concluded that the single phase full-bridge topology with bipolar switching is suitable for transformerless PV inverter because the leakage current is much lower than in case of the unipolar switching. The NPC is also a good choice for transformerless PV inverters, due to its grounded middle point, which minimizes the voltage fluctuations present at the PV panel terminals. In case of the three-phase topologies the full-bridge inverter is not suitable for transformerless inverter, due to the large voltage fluctuations, which lead to high leakage current. But in case of the 3xNPC and 3xHB topologies simulation results have shown that using these topologies the leakage current is

very small, below the 30mA which is set to be the smallest level required for disconnection based on the DIN VDE 01261-1. REFERENCES
[1]. M. Calais, V. Agelidis; Multilevel converters for single-phase grid connected photovoltaic systems, an overview, IEEE 1998 [2]. M. Calais, J. Myrzik, T. Spooner, V.Agelidis; Inverters for singlephase grid connected photovoltaic systems an overview; Power Electronics Specialists Conference, 2002; 2002 IEEE 33rd Annual, Volume 4, 23-27 June 2002 [3]. J. Myrzik, M. Calais; String and module integrated inverters for single phase grid connected photovoltaic systems a review; Power Tech Conference Proceedings, 2003 IEEE Bologna, Volume 2, 23-26 June 2003 [4]. S. Kjr, J. Pedersen, F. Blaabjerg, A review of single-phase grid connected inverters for photovoltaic modules, IEEE Transactions on Industry Applications, Vol.41, Nr.5. Sep/Oct 2005 [5]. H. Schmidt, B. Burger, Chr. Siedle; Gefhrdungspotenzial transformatorloser Wechselrichter Fakten und Gerchte, 18 Symposium Photovoltaische Sonnenenergie, Staffelstein, Germany 2003. [6]. N. Mohan, T.M. Undeland and W.P. Robbins, Power Electronics Converters, Design and Application, 3rd edition, John Wiley and Sons, 2003 [7]. J.H. Allmeling and W.P. Hammer, PLECS Piecewise Linear Electrical Circuit Simulator for Simulink, PEDS99, Hong-Kong, July 1999, Vol.1. pp.355-360 [8]. DKE Deutsche Kommission Elektrotechnik Elektronik Informationstechnik im DIN und VDE, DIN VDE 0126-1-1, 2005 [9]. United States Patent Application Publication, US 2005/0286281 A1, Publication date: 29.12.2005. [10]. European Patent Office, EP 1 369 985 A2, Publication date: 10.12.2003.

TABLE 2: Comparison of transformerless inverter topologies Topology Nr. of input capacitors Nr. of switches Bypass diodes DC to Ground voltage (peak value and frequency) Leakage current (peak values) FB bip 1 4 Vgrid/2, 50Hz < 30mA FB unip 1 4 Vdc, 10kHz >> 5A NPC 2 4 2 1% Vdc < 30mA 3FB 1 6 Vdc, 10kHz >> 3xNPC 2 12 6 1% Vdc < 30mA 3xHB 2 6 1% Vdc < 30mA

Publication IV
T. Kerekes, R. Teodorescu, C. Klumpner, M. Sumner, D. Floricau, P. Rodriguez, Evaluation of three-phase transformerless photovoltaic inverter topologies; European Conference on Power Electronics and Applications, 2007; 2-5 Sept. 2007 Page(s):1 10

119

Evaluation of Three-phase Transformerless Photovoltaic Inverter Topologies


T. Kerekes* R. Teodorescu** C. Klumpner*
**Aalborg University Pontoppidanstaede 101 9220 Aalborg DENMARK Tel: +45 9635 9240 Fax: +45 9815 1411
ret@iet.aau.dk

M. Sumner*

D. Floricau

P. Rodrguez Technical Univ. of Catalonia


Building TR1, C. Colom 1 08222 Terrassa, Barcelona SPAIN Tel: +34-937398036 Fax: +34-937398236
prodriguez@ee.upc.edu

* University of Nottingham University Park NG7 2RD Nottingham UNITED KINGDOM Tel: +44 115 951 5600 Fax: +44 115 951 5616
tak@iet.aau.dk klumpner@ieee.org mark.sumner@nottingham.ac.uk

Politehnica Univ. of Bucharest 313 Spl. Independentei 060042 Bucharest ROMANIA Tel: +40 021 4029135 Fax: +40 021 3181016
danfl2005@yahoo.com

Keywords
Photovoltaic, Renewable energy systems

Abstract
This paper analyzes and compares the most common single-stage transformerless photovoltaic inverter topologies for three-phase grid connection with the main focus on the safety issues that result from the lack of galvanic isolation. The change in the leakage current to ground will be investigated and a comparison of the selected topologies will be carried out, based on the component ratings, output voltage levels and filter size.

Introduction
Grid connected photovoltaic (PV) systems have an important role in distributed power generation. With the help of governmental incentives their usage becomes more and more widespread within the community. According to the latest International Energy Agency Photovoltaic Power Systems (IEA-PVPS T1-15:2006) report, the annual rate of growth of the cumulative installed capacity in the IEA PVPS countries was at an impressive 42%. The PV market in Germany had a 75% growth during the year 2005 with more than 600MWp of installed capacity. The majority of these installations were rooftop systems due to the high buyback rates of the Renewable Energy Market Act that set a feed-in tariff of 0.513EUR/kWh in the case of rooftop PV installations. [1] Most of the single-phase installations were small scale PV systems, of up to 5-6 kWp. A single-phase system means that there is a pulsating AC power on the output, whilst the input is a smooth DC. Large DC capacitors are required which decrease the lifetime and reliability of the whole system. On the other hand in a three phase system, there is constant AC power on the output, which means that there is no need for large capacitors, leading to smaller cost and a higher reliability and lifetime of the whole system. Also the power output of these systems can be higher, reaching up to 10-15 kWp in case of rooftop applications. For safety reasons, most PV systems have a galvanic isolation, either in the DC-DC converter in the form of a high frequency transformer, or on the AC output side, in the form of a bulky low frequency transformer. Both of these added galvanic isolations increase the cost and size of the whole system and decrease the overall efficiency. A higher efficiency, smaller size & weight and a lower price for the inverter is possible in the case where the isolation transformer is omitted. These transformerless solutions offer all the aforementioned advantages, but there are some safety issues caused by the solar panel parasitic capacitance to ground, which is formed between the PV array terminals and the frame, which is normally grounded. Fig. 1 shows a typical grid connected PV system with the modelled parasitic capacitances, marked with dashed lines, present at the DC+ and DC- terminals of the PV array.

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Fig. 1: Transformerless PV system that includes leakage capacitance The PV terminals are marked with DC+ and DC- and define the potential of the terminal relative to ground. Voltage fluctuations of the DC+ and DC- terminals would cause leakage currents flowing from the panel terminals to the ground. The level of the leakage current depends on the amplitude and frequency content of the voltage fluctuations, as well as the value of the parasitic capacitance [3], also called leakage capacitance (represented by capacitances with dashed-line on Fig. 3, Fig. 8 and Fig. 15). This resulting leakage capacitance value depends on many factors; some of these are enumerated below [4]: PV panel and frame structure surface of cells, distance between cells module frame weather conditions humidity dust covering the PV panel type of EMC filter The aim of the work presented in this paper is to compare and contrast three different converter topologies which may be considered for transformerless connection of PV cells to an AC grid. The topologies are: a) the traditional three-phase full-bridge DC/AC voltage source inverter (3FB) b) the three-phase full-bridge voltage source inverter with a split capacitor (3FB-SC) c) the three-phase modularised neutral point clamped voltage source inverter topology (3xNPC) [5] Topology (c) is considered as it can be conducted from three independent single-phase inverters. These single phase inverters are now commonly available commercially and (c) could prove economically viable. Each circuit has been simulated using Simulink and its associated toolbox PLECS. The paper describes the simulation parameters and results for each circuit and then provides a full comparison of the circuits.

Simulation results
The simulations were done in Matlab Simulink using a fixed-sample solver, with a step size of Ts=1e-7. The switching frequency was set to fsw=10kHz which was also the frequency of the current control loop. In order to simplify the simulation, the PV array was simulated with a DC voltage source and Vdc=700V. The input side DC-link capacitance is Cdc=10F for 3FB and 3FBSC and Cdc=50F for 3xNPC. The output filter was the same LCL delta connection for the 3FB and 3FBSC, but it was a star connection for the 3xNPC with the middle point connected to the Neutral line (Lf=1mH filter inductance; Cf=2.2 F filter capacitance; Rcfs=1 m damping resistance of the capacitance) The grid was modelled as a fg=50Hz grid with Vg=220Vrms (325V peak), having Lg=50 H grid inductance; Rg=0.5 grid resistance; Cg=1F grid capacitance; Rcgs=1m damping resistance for grid capacitance. The leakage capacitance between the cells and the grounded frame was modelled with a simple capacitance between the PV array terminals and ground. This capacitance, as mentioned in [4], can have values up to 50150nF/kW, depending on the atmospheric conditions and size/structure of the panels. The value of the simulated leakage capacitance was chosen to be Cleak=100nF for each terminal of the array.

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The simulation period was 1s and grid voltage and current, DC terminal potential to ground and leakage ground current was scoped and saved for later discussion.

Control of a grid connected PV inverter


Grid connected inverters feed power delivered by the DC source into the utility AC grid. In the simulations, the control loop only controls the current that is injected into the AC grid, in order to have unity power factor. The control loop can be further improved, by adding features like harmonic compensation or injection of reactive current, but these have not been included here. A block diagram of the control strategy used is presented in Fig. 2.

sin ( )

Fig. 2: PV inverter control strategy for grid interconnection There are two main control loops: the control of the inductor current and the maximum power point tracker (MPPT). The current control runs with 10kHz sampling frequency in this case, but the MPPT control loop, is triggered every 0.1s because the maximum power point of the PV array would only change in case of varying weather conditions which is a much slower process. The MPPT loop gives a reference value for the peak current and multiplying this with the sin of the angle of the sinusoidal grid (output of the phase lock loop block - PLL) a sinusoidal reference current is the result. The error between the reference and measured grid current is then fed to the current controller, which calculates the duty cycles for the next period. The new duty cycle is then forwarded to the PWM block, which calculates the gate signals comparing the duty cycles to a triangular carrier wave. In order to have an accurate simulation for the plant, the model is simulated with a solution step size of 0.1s and the switching frequency is 10kHz. A three phase control strategy is used in case of the 3FB and 3FBSC. The 3xNPC has three individual single-phase controls on each phase. Sinusoidal PWM is used to control the switches. The injected current is synchronized with the three-phase grid, so that it will always be in phase with the grid voltage.

The Three-phase Full Bridge VSI inverter (3FB)


This topology, presented on Fig. 3, is the simplest and most widely used one for general applications with three-phase systems.

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Fig. 3: The three-phase full-bridge topology Simulation results for grid voltage and current for phase R are shown in Fig. 4 and Fig. 5. In order to show that the current control performs as expected, two simulation cases are selected. The graph in Fig. 4 shows the grid current in case of a system with galvanic isolation between the PV array and AC grid, when no current is flowing through the leakage capacitance. The graph in Fig. 5 represents the same grid current, with the difference that in this case there is no galvanic separation between the PV array and AC grid and the leakage current has a path through ground.
15 Grid current [A] 10 5 0 -5 -10 -15 0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135 350 115 0 -115 -231 -350 0.14 Grid voltage [V]
Grid voltage [V]

231

Fig. 4: Grid current and voltage for phase R in the case of a system with galvanic isolation
15 Grid current [A] 10 5 0 -5 -10 -15 0.16 0.165 0.17 0.175 0.18 0.185 0.19 0.195 350 231 115 0 -115 -231 -350 0.2

Fig. 5: Grid current and voltage for phase R in the case of a transformerless system
DC+ terminal voltage to ground 1000 500
[V]

0 -500 0 10 5 [A] 0 -5 -10 0 0.01 0.02 Time [s] 0.03 0.04

0.01

0.02 Ground leakage current

0.03

0.04

Fig. 6: Simulation results for 3FB, showing the DC+ terminal voltage to ground (upper figure) and the leakage ground current (lower figure) As presented in [6], in case of the single-phase full-bridge topology, based on the sinusoidal PWM strategy, the PV terminal voltage to ground can have a 50Hz sinusoidal shape with an amplitude of Vg/2 (bipolar

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switching) or it can vary between Vdc with the switching frequency (unipolar switching). As seen on Fig. 6, the latter is the case for the 3FB topology. Due to the high-frequency switching between Vdc, the generated leakage current will be very high. Based on the simulation results shown in Fig. 6, it can be seen that the three-phase full-bridge inverter is not suitable for the transformerless PV inverter due to the large DC-to-earth voltage fluctuation and leakage ground current, as shown on the upper graph in Fig. 6.
8

FTT of current [A]

6 4 2 0

10 15 Frequency [kHz]

20

25

Fig. 7: FFT of ground leakage current for 3FB topology An FFT of the ground leakage current, presented in Fig. 7, reveals the harmonic components having 6 Amps at the switching frequency and 1.7 Amps at twice the switching frequency. These leakage current values are very high, well above the 300mA threshold level stated in the VDE 0126 standard, regarding ground leakage currents and fault currents in case of grid connected systems [7].

The Three-phase Full-Bridge VSI inverter with Split Capacitor (3FB-SC)


The 3FB-SC topology, presented in Fig. 8, is similar to the previous one, with the difference being the input DC-link capacitor and PV array, is split in two halves and the middle point is connected to the Neutral point of the grid. The same current control used by the 3FB, is applied in this case also for the control of the switches. For the PWM modulation two strategies will be used. The first one is the PWM modulation using a single triangular carrier signal for all three phases and the second PWM modulation will use three triangular signals displaced by 120 degrees, also referred as staggered PWM, the aim being to have the switching harmonics in the grid current which cancel out in the Neutral current [9].

Fig. 8: The three-phase full-bridge VSI with split capacitor topology The simulation results for grid voltage and current for phase R are shown on Fig. 9 and Fig. 10. The ripple in the grid current is reduced for the staggered PWM case.

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15 Grid current [A] 10 5 0 -5 -10 -15 0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135

350 Grid voltage [V]

15 Grid current [A] 10 5 0 -5 -10 -15 0.16 0.165 0.17 0.175 0.18 0.185 0.19 0.195

350 115 0 -115 -231 -350 0.2 Grid voltage [V] 231

231 115 0 -115 -231 -350 0.14

Fig. 9: Grid current and voltage for phase R, in the case of standard triangular PWM

Fig. 10: Grid current and voltage for phase R, in the case of the staggered triangular PWM

The simulation results in Fig. 11 and Fig. 12 show that the voltage fluctuations present at DC+ and DC- are much smaller, than in the case of the 3FB, due to the connection of the capacitor middle point to the Neutral line which holds its potential to zero.
DC+ terminal voltage to ground 370 360 [V] 350 340 330 0.12 5 2.5 [mA] 0 -2.5 -5 0.12 0.13 0.14 Time [s] 0.15 0.16
[mA] [V] 370 360 350 340 DC+ terminal voltage to ground

0.13

0.14

0.15

0.16

330 0.12 5 2.5 0 -2.5 -5 0.12

0.13

0.14

0.15

0.16

Ground leakage current

Ground leakage current

0.13

0.14 Time [s]

0.15

0.16

Fig. 11: Simulation results for 3FB-SC, showing the DC+ terminal voltage to ground (upper figure) and the leakage ground current in mA (lower figure)

Fig. 12: Simulation results for 3FB-SC with staggered PWM, showing the DC+ terminal voltage to ground (upper figure) and the leakage ground current in mA (lower figure)

As seen in Fig. 11 and in Fig. 12, the terminal voltage to ground has very little ripple. This means that with this topology, the leakage current is greatly reduced. The FFT of the leakage current showed on Fig. 13 and Fig. 14 reveals that only components at the switching frequency and its multiples are present having values of a few mAmps, slightly smaller for the staggered PWM.
2.5 2.5

FTT of current [mA]

2 1.5 1 0.5 0 0 5 10 15 Frequency [kHz] 20 25

FTT of current [mA]

2 1.5 1 0.5 0 0 5 10 15 Frequency [kHz] 20 25

Fig. 13: FFT of ground leakage current in mA, for 3FB-SC

Fig. 14: FFT of ground leakage current in mA, for 3FB-SC with staggered PWM

In both cases the leakage current is well below the standard requirement of 300mA. Due to the small leakage current to ground, this topology is suitable to be used as a transformerless PV inverter.

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As observed in Fig. 13 and Fig. 14, by using the staggered PWM method, the leakage current can be further reduced compared to the case of the standard PWM.

The three-phase Neutral Point Clamped VSI inverter (3xNPC)


Multilevel converters are interesting for renewable applications due to the following advantages: the voltage stress on switches is halved, due to the series connection of the switches and guaranteed voltage sharing the output phase voltage has more than two levels, thereby having a lower harmonic content than the standard full-bridge inverter the output filter size is smaller, because of lower voltage ripple and harmonic levels better overall efficiency because switching losses are reduced due to the fact that the switches commute less voltage In case of single-phase systems, the three-level NPC topology proved to be a very good solution as a transformerless PV inverter, having almost no voltage fluctuations present at the terminals of the PV panel [6]. Using this criterion, a three-phase version of this topology was taken into consideration and simulated. Each leg is controlled individually as it would be done in case of a single-phase three-level inverter, having three separate current controllers for each phase. This way the output current is always synchronized with its own phase voltage.

Fig. 15: Modularized topology, based on three single-phase neutral-point clamped inverters Grid voltage and current for phase R are shown on Fig. 16
15 Grid current [A] 10 5 0 -5 -10 -15 0.08 0.085 0.09 0.095 0.1 0.105 0.11 0.115 350 115 0 -115 -231 -350 0.12 Grid voltage [V] 231

Fig. 16: The grid current and voltage for phase R As seen in Fig. 17, simulation results confirm that this topology is also suitable to be used as inverter in a three-phase transformerless PV system, having almost no voltage ripple present at the terminals of the PV panel, and leading to a very small leakage current to ground. In this case also, the leakage current is well below the standard requirement, making it an excellent solution for transformerless PV systems.

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DC+ terminal voltage to ground

Ground leakage curent

370 360
[V]

0.1 0.05
[A]

350 340 330 0.18

0 -0.05 -0.1 0.18

0.19

0.2
Time [s]

0.21

0.22

(a)

0.19

0.2
Time [s]

0.21

0.22

(b)

Fig. 17: Simulation results for 3xNPC, showing the DC+ terminal voltage to ground (a) and the leakage ground current (b) An FFT of the leakage current shown in Fig. 18 reveals only current harmonic components at the switching frequency and its multiples, having values of 2 mAmps.
2.5

FTT of current [mA]

2 1.5 1 0.5 0 0 5 10 15 Frequency [kHz] 20 25

Fig. 18: FFT of ground leakage current for 3xNPC In this case also, the leakage current is well below the standard requirement, therefore it can be stated, that this topology is also suitable for grid connection in case of transformerless PV systems.

Comparison
This section includes a comparison based not only on the level of voltage fluctuations and leakage current to ground, but also takes into account the number of switching devices, passive components, size of the output filter and other auxiliary devices. In case only the middle point of the capacitors is connected to the Neutral line and the middle point of the PV array is left unconnected, then an extra function is required to control the voltage imbalance of the input capacitors. This imbalance is a result of the direct connection of the capacitance to the load, in which case the load current is drawn from the capacitance and not from the PV array, causing a voltage imbalance between the upper and lower capacitances [8]. In case of the simulations, both for the 3FB-SC and 3xNPC, the Neutral line was connected to the middle point of the PV array, thereby making both input capacitance voltages balanced during operation. No voltage balancing control was needed for these cases. In terms of power devices, it can be said that the 3xNPC needs twice the switching elements and six extra diodes, than the other two topologies. The advantage in this case is that the switching elements need only half of the voltage rating compared to those in case of the 3FB and 3FB-SC. The lowest ripple in the output current (grid current on Fig. 5, Fig. 9 and Fig. 16), is in the case of the 3FB topology. In this case there is no Neutral connection, therefore the 3rd and its multiple order harmonics are reduced between the phases, resulting in lower harmonic distortion of the grid current. Based on the output filter size, the biggest filter is needed in case of the 3FB-SC, due to the fact that the middle point of the capacitors is connected to the Neutral of the system. In this case the 3rd and multiple order harmonics are not cancelled out between the phases, resulting in a higher current THD, than in the case

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of the 3FB. In case of the 3FB, some of the switching harmonics in the voltage are common-mode, therefore in case of isolation between the DC and AC side, these harmonics will not be seen in case of the current. On the other hand in the case of the 3xNPC, there are more levels in the output voltage, resulting in smaller voltage ripple on the components and lower EMI of the system. But the most important aspect for the transformerless PV systems is the ground leakage current through the mentioned parasitic capacitance. As simulation results showed, the 3FB is not suitable for transformerless inverter, therefore in order to have safe operation and to comply with the standard requirements, a galvanic isolation is required. Based on the DC-link to ground voltage fluctuations present at the PV terminals, simulation results have shown that the 3FB-SC and 3xNPC topologies have almost no voltage fluctuation. Because of the small voltage ripple, the leakage ground current is also very small, below the standard requirement stated in the VDE 0126 standard. Therefore these two topologies are suitable for grid interconnection in case of transformerless PV systems.

Table I: Comparison for the different topologies


Inverter topology Number of switches Voltage stress on switches Number of diodes Number of DC-link capacitors Galvanic isolation Voltage balancing control Output filter on AC side Voltage fluctuations of DC+ terminal compared to ground Ground leakage current 3FB 6 (1) Vdc 6 1 Yes No smaller Vdc High 3FB-SC 6 (1) Vdc 6 2 No Yes** larger 1% Vdc Very low 3xNPC 12 (1/2) Vdc/2 18 2 No Yes** medium 1% Vdc Very low

* the voltage rating is expressed using the 3FB topology as a reference of 1 ** only in case the middle point of the input capacitors is not connected to the middle point of the PV array

Conclusions
As renewable energy systems become more widespread, rooftop PV applications in the range of 5-15kW are of great interest for three-phase grid-connection. The price and size of such systems can be reduced in case the isolation transformer is left out, leading also to better efficiencies. Three inverter topologies to be used as transformerless grid connected systems have been evaluated. A detailed comparison has been carried out based on which it can be concluded that the normal full bridge topology (3FB) is not suitable for transformerless PV applications, due to the high leakage current generated by the high frequency voltage fluctuations that are present at the PV panel terminals. On the other hand, both the 3FB-SC and 3xNPC have shown promising results. Simulations focusing on the voltage fluctuations present at the PV terminals have shown that connecting the supply Neutral to the middle of the DC-link capacitors will result in low ripple voltage at both DC-link terminals of the array leading to a very low leakage current level, below the VDE 0126 standard requirement of 300mA. This means that both of these topologies are suitable from the leakage current point of view, as transformerless PV inverters for roof-top applications. The 3xNPC offers a cheap modular solution that can also be used in case of three DC inputs each from a different PV array. The 3FB-SC, on the other hand is the cheapest solution, having only 6 switches, instead of the 12 in case of the 3xNPC, but the size of the AC line filter is larger.

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References
[1] Trends in photovoltaic applications; Survey report of selected IEA countries between 1992 and 2005; Report IEA-PVPS T1-15:2006; [2] J.H. Allmeling and W.P. Hammer, PLECS Piecewise Linear Electrical Circuit Simulator for Simulink, PEDS99, Hong-Kong, July 1999, Vol.1. pp.355-360 [3] M. Calais, V. Agelidis; Multilevel converters for single-phase grid connected photovoltaic systems, an overview, IEEE 1998 [4] H. Schmidt, B. Burger, Chr. Siedle; Gefhrdungspotenzial transformatorloser Wechselrichter Fakten und Gerchte, 18 Symposium Photovoltaische Sonnenenergie, Staffelstein, Germany 2003. [5] D. Krug, K. Jalili, M. Malinowski and S. Bernet; Design and comparison of 2.3kV th Medium Voltage MultiLevel Converters for Industry Applications; Industry Applications Conference, 39 IAS Annual Meeting, Seattle, USA, 03-07 Oct. 2004. [6] T. Kerekes, R. Teodorescu, U. Borup; Transformerless Photovoltaic Inverters Connected to the Grid; APEC 2007, Anaheim, California, USA, 25 Feb 01 Mar 2007. [7] DKE Deutsche Kommission Elektrotechnik Elektronik Informationstechnik im DIN und VDE, DIN VDE 0126-1-1, 2005, Paragraph 4.7.1. Photovoltaik. [8] C. Newton, M. Sumner; Neutral Point Control for Multi-Level Inverters: theory, design and operational limitations; IAS Annual Meeting, New Orleans, 1997 [9] Lee-Hun Kim, et al.; Analysis of a New PWM Method for Conducted EMI Reduction in a Field Oriented Controlled Induction Motor; APEC 2006, Dallas, Texas, USA, March 1923, 2006

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Publication V
T. Kerekes, R. Teodorescu, M. Liserre, R. Mastromauro, A. Dell'Aquila, MPPT algorithm for voltage controlled PV inverters; 11th International Conference on Optimization of Electrical and Electronic Equipment, 2008. OPTIM 2008; 22-24 May 2008 Page(s):427 - 432

131

MPPT algorithm for Voltage Controlled PV Inverters


T. Kerekes*, R. Teodorescu* , M. Liserre**, R. Mastromauro **, A. DellAquila**
** * Aalborg University/Institute of Energy Technology, Aalborg, Denmark Politecnico di Bari/ Dipartimento di Elettrotecnica ed Elettronica, Bari, Italy

AbstractThis paper presents a novel concept for an MPPT that can be used in case of a voltage controlled grid connected PV inverters. In case of single-phase systems, the 100Hz ripple in the AC power is also present on the DC side. Depending on the DC link capacitor, this power fluctuation can be used to track the MPP of the PV array, using the information that at MPP the power oscillations are very small. In this way the algorithm can detect the fact that the current working point is at the MPP, for the current atmospheric conditions.

In case of most single-stage grid connected PV systems, the control is acting on the grid side current only, which means that the MPPT is directly adjusting the amplitude of the grid current. Now in case of a voltage control, the variable to adjust is the angle of the reference voltage, thereby ensuring the injection of only active power. When a distributed power generation system (DPGS) is connected to the grid, the grid frequency and the grid voltage can be controlled adjusting active and reactive power [5]. This can be done independently in case the line is mainly resistive (singlephase) or inductive (three-phase). In intermediate cases the control becomes more complex [6][7]. In this paper it will be assumed to have a mainly inductive grid. II. VOLTAGE AND FREQUENCY SUPPORT

I.

INTRODUCTION

Power supplied from a PV array depends mostly on present atmospheric conditions (irradiation and temperature), therefore in order to harvest the maximum available power the operating point needs to be tracked continuously using a Maximum Power Point Tracker (MPPT) algorithm [1][2][3][4]. Figure 1 presents the characteristic of a BPMSX120 PV panel, in case of standard test conditions (STC), which are: 25C ambient temperature and 1000W/m2 irradiation, highlighting the Maximum Power Point (MPP) at the top of the characteristic. Most MPPT algorithms are based on the hill-climbing method and the MPP is found by changing the reference voltage of the PV, so that the extracted power is always the highest one for the present irradiation and temperature.
Power - Voltage characteristic 120 Pmax = 120 [W] 100 Vpmax = 34 [V] Ipmax = 3.52 [A] PV power [W] 80

The power transfer from the DPGS to the grid, can be studied using short-line model and complex phasors, as shown in Figure 2, and the analysis is valid for both single-phase and balanced three-phase systems. When the DG inverter is connected to the grid through a mainly inductive line X>>R, R may be neglected. If also the power angle is small, then sin and cos 1 :

XPA VAVB XQA VA VB VA

(1) (2)

where VA , PA , QA denote respectively the voltage, the active power and the reactive power in section A and VB is the voltage in section B, indicated in Figure 2. For X>>R, a small power angle and a small difference VA VB , equations (1) and (2) show that the power angle depends predominantly on the active power P, whereas the voltage difference VA VB depends

60

40

20

10

15

20 25 PV voltage [V]

30

35

40

Figure 1. PV panel characteristic

predominantly on the reactive power Q. In other words the angle can be controlled regulating the active power P whereas the inverter voltage VA is controllable through the reactive power Q. Control of the frequency

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dynamically controls the power angle and, thus, the real power flow. Therefore by adjusting P and Q independently, frequency and amplitude of the grid voltage are determined. These conclusions are the basis of the frequency and voltage droop controls through respectively active and reactive power [3].
A I Z B

Ic Iref +

Kp PI + Vc Ki PI + + +

V A 0

VB

VB I

VA XI

Vq

z 1
Figure 4. PI controller

RI

Vd
(a) (b)

Figure 2. (a) Power flow through a line; (b) phasor diagram

where Nh is the set of selected harmonic frequencies, Na is the number of leading steps determined by the stability analysis and N is the number of samples within one fundamental period. For the proposed system N=128 with a sampling frequency of 6400 Hz has been chosen. The parameters of the controller are reported in Table 1.
Table 1. Controller parameters

III.

CONVERTER VOLTAGE CONTROL

Commonly the shunt converter is current-controlled, but it is also possible to control the voltage directly in order to stabilize the voltage profile while the current injection is controlled indirectly as proposed in [8]. In this case the converter acts as a voltage source supplying the load and maintaining the load voltage constant and, at the same time, it compensates also the harmonics. In this case the shunt converter is connected to the grid through an LCL filter as shown in Figure 5. The adopted control method is based on a repetitivebased controller and it is shown in Figure 3. The voltage reference Vref is given by the MPPT, so that the grid current Ig is synchronized to the grid voltage Vg.

kFIR Controller Parameters of Shunt Converter N Na kp-PI ki-PI

0.3 128 0 4.5 48

Controlling the voltage Vc, in presence of voltage variations, the grid current Ig is forced by the controller to have a sinusoidal waveform which is in phase with respect to the corresponding grid voltage [10].
Ig
Grid

Vc Vref + +

PV

IC'

FDFT(z)

kFIR

Iref

PWM

IC'

VC'

z Na
Figure 3. Repetitive-based controller

PI

I ref
U PV

Repetitive control
Vref

Vg

The repetitive controller ensures precise tracking of the selected harmonics and it provides the reference of the PI current controller, shown in Figure 4. The repetitive controller is based on a finite-impulse response digital filter (FIR) [9] and it is defined as:
FDFT ( z ) = 2 N

I PV

MPPT algorithm

d mppt

PLL

grid

Vpeak

Figure 5. Voltage control of the PV converter Figure 5

N 1 i =0

2 i kNh cos h ( i + N a ) z (4) N

details the whole system, showing the hardware and the control algorithm, including all the feed-back from the plant. IV. MPPT ALGORITHM

As mentioned before, in case of PV applications an MPPT algorithm is needed in order to be able to harvest the available maximum power that mainly depends on

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solar irradiation and ambient temperature. The most widely used MPPT methods are the Perturb and Observe (P&O) and Incremental Conductance (INC). Both these methods are simple and easy to implement and their tracking efficiency is very high. From these two methods the INC method is able to tell whether the current working point is at the MPP of not, in case of ideal conditions. But due to noise in the measurements, the operating point could oscillate around the MPP. In case of single phase systems, if a sweep is made over the whole PV characteristic, it can be observed, that within a period of 0.02s there are certain minimum and maximum values in the power and current oscillations, depending on the output power.
700 PV voltage [V] 600 500 400 300 0 5 10 15 20 25
Figure 7. PV array characteristic

In order to clearly explain the basics of the idea, Figure 8, Figure 9 and Figure 10, present the three cases for the oscillations: a) Before the MPP: when the PV panel behaves as a Voltage Source, the current oscillations are high, having values in the range of 0.2A, giving a power oscillation of 100W. It can also be observed that the power oscillations are in phase with the current oscillations, meaning that the current oscillations highly influence the power oscillations; (Figure 8)
581 580 579 578 0.9 0.8 0.7 0.6 500 1.23 1.24 1.25 1.26 1.23 1.24 1.25 1.26

4 PV current [A] 3 2 1 0 5 10 15 20 25

2000 PV power [W] 1500 1000 500 0 0 5 10 15 Time [s] 20 25

Figure 6. Power-sweep for the used PV array

As observed in Figure 6, the current oscillations are getting smaller the closer the PV current is to the short circuit current (Isc). This is due to the fact that the PV behaves almost as a Voltage Source on the right side of the MPP and as a Current Source on the left side of the MPP as detailed in Figure 7.

PV power [W]

PV current [A]

PV voltage [V]

450 400 350 1.23 1.24 1.25 Time [s] 1.26

Figure 8. Oscillations before MPP (Voltage Source)

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PV voltage [V]

b) At the MPP: both current and voltage oscillations influence the power in the same way, therefore, the power oscillations are smaller (2W) and twice as fast (200Hz instead of 100Hz); (Figure 9)
PV voltage [V] 490 480

360 350 340 4 3.9 3.8 3.7 24.48 24.49 24.5 24.51 24.52 24.53

24.48

24.49

24.5

24.51

24.52

24.53

460 3.7 3.6

11.7

11.72

11.74

11.76

PV current [A]

PV power [W]

3.5 3.4 11.7 11.72 11.74 11.76

1681 PV power [W] 1680 1679 1678 11.7 11.72 Time [s] 11.74 11.76

PV current [A]

470

1380 1360 1340 1320 24.48 24.49 24.5 24.51 Time [s] 24.52 24.53

Figure 10. Oscillations after MPP (Current Source)

Figure 9. Oscillations at MPP

c) After the MPP: when the PV panel behaves as a Current Source, the current oscillations are very small, in the range of 0.01A. In this case the voltage oscillations influence the power oscillations, therefore the two oscillations are in phase; (Figure 10)

Now that the main idea of the algorithm has been introduced, the MPPT can be explained in detail. The main feature that is added to the classical INC algorithm is the part which monitors the maximum and minimum values of the power oscillations on the PV side. Since this is a single-phase application, there is a 100Hz oscillation present in the output power, which is also present on the PV side. These minimum and maximum values of the PV power oscillation can be used to find out how close the current operating point is to the MPP, thereby slowing down the increment of the reference, in order not to cross the MPP.

READ ipv_k, ipv_k-1, upv_k, upv_k-1, Pmin, PMax

dP = PMax - Pmin
dP > 10

dP ( 5,10 )

dP ( 2,5 )

dP < 2

Yes

di ik + >0 dv vk

No
incr=10 side = 1

incr=5

incr=2

incr=-4

side = -1

d mppt

Figure 11. Flowchart of modified MPPT algorithm (dP-INC)

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As explained before in Figure 8, Figure 9 and Figure 10, the power oscillation close to the MPP are very small, whereas far from the MPP there is a clear difference between the minimum and maximum values of the instantaneous PV power. Using this information, the proposed method (dP-INC) can detect that the current working point is close to the MPP or not and adjust the reference voltage of the voltage controller in order to harvest the available maximum power from the PV. A flowchart of the dP-INC MPPT algorithm is shown on Figure 11, explaining how the angle of the reference voltage is modified, in order to track and keep the operating point as close to the MPP as possible. For these simulations 14 series connected BP-MSX120 panels have been used, giving a maximum power of 1680W in case of STC. Figure 12 shows the hill-climbing of the MPPT algorithm for STC. The algorithm is triggered with 2Hz and the angle of the reference voltage is changed, as detailed in Figure 11. As seen in Figure 12, the power stabilizes at 1670W, which means that with this method the MPP (1680W) is reached with 99.48% efficiency, in case of the simulations with voltage control.
1600 PV power [W] 1400 1200 1000 800

In order to show the performance of the proposed method the MPPT algorithm has also been tested in case of different irradiation conditions and compared with the classical P&O method. As seen in Figure 13 the irradiation has been changed according to the presented step function: 1000, 500, 300, 200, 100, 50, and back to 1000 W/m2 , each value being kept constant for 10 seconds in order to be sure that the MPPT algorithm has reached steady state conditions for each case. For these simulations the MPPT algorithm has been triggered every 0.1s. The efficiency of the MPPT is calculated using:

MPPT =

PPV 100 PMPP

(3)

As seen on Figure 13 the algorithm can follow the MPP with a very high accuracy in case of high irradiation conditions. The efficiency is above 99.8%. The only case when the efficiency is lower than the previous limit is in case the irradiation was below 100W/m2, in which case the efficiency was 99.6%, harvesting PPV=130W instead of the ideal PMPP=131W.
Reference and Output power [W] Irradiation step change 2000 1500 1000 500 0

10

20

30

40

50

60

70

80

90

100

110

500 PV voltage [V]

600

450

20

40

60

80

100

120

400

600 PV voltage [V]

350 10 20 30 40 50 60 70 80 90 100 110

550
MPPT efficiency [%] 100 99.8 99.6 99.4 99.2 99 10 20 30 40 50 60 Time [s] 70 80 90 100 110

500

450

20

40

60

80

100

120

0.1 MPPT reference 0.08 0.06 0.04 0.02 0 0 20 40 60 Time [s] 80 100 120

Figure 13. MPPT algorithm behavior in case of irradiation step change

The efficiency of the MPPT is calculated using:

MPPT =

PPV 100 PMPP

(5)

Figure 12. Hill-climb of MPPT algorithm

As seen on Figure 13 the algorithm can follow the MPP with a very high accuracy in case of high irradiation conditions. The efficiency is above 99.8%. The only case when the efficiency is lower than the previous limit is in case the irradiation was below 100W/m2, in which case

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the efficiency was 99.6%, harvesting PPV=130W instead of the ideal PMPP=131W. In order to have an idea about the performance of the proposed dP-INC MPPT algorithm, its performance has been compared with the classical P&O method. First a startup has been simulated, measuring the time needed for the hill-climb of both methods, in case of 1000W/m2 irradiation. As detailed in Table 2, the P&O method needs 13s to arrive to the MPP, while the dP-INC gets there in a little bit more than 2s. The proposed method is faster because it uses bigger steps, when the working point is far from the MPP, therefore in certain cases arrives faster to the MPP, than the classical P&O. In case of the irradiation step change, there has not been a big difference between the speeds of the two methods, as observed in the results detailed in Table 2. V. CONCLUSIONS A novel MPPT algorithm (dP-INC) has been presented, that can be used in case of voltage controlled PV inverters. As detailed the algorithm can detect whether the current working point is close to the MPP or not and adjust the increment accordingly. It can track the MPP with very high accuracy 99.9% in case of high levels of irradiation. The lowest efficiency of 99.6% was in case of 50W/m2 irradiation. Furthermore the algorithm has been compared with the classical P&O and the simulation results have shown that in certain cases the dP-INC method finds the MPP faster then the classical P&O, due to the fact that it uses bigger increments in case it is far from the MPP. REFERENCES
[1] W. Xiao, J. Lind, W. Dunford, and A Capel, Real-Time Identification of Optimal Operating Points in Photovoltaic Power Systems, IEEE Transactions on Industrial Electronics, vol.. 53, no. 4, August 2006.

[2]

T. Esram, P.L.Chapman, Comparison of Photovoltaic Array Maximum Power Point Tracking Techniques IEEE Transactions on Energy Conversion, vol.. 22, no. 2, June 2007. J. Park, J. Ahn, B. Cho, and G. Yu, Dual-Module-Based Maximum Power Point Tracking Control of Photovoltaic Systems, Transactions on Industrial Electronics, vol.. 53, no. 4, August 2006. M. Calais, H. Hinz, A Ripple-based Maximum Power Point Tracking Algorithm for Single-Phase, Grid Connected Photovoltaic System, Solar Energy Vol. 63, No. 5, pp. 277 282, 1998 Josep M. Guerrero, Jos Matas, Luis Garca de Vicua, Miguel Castilla, Jaume Miret, Wireless-Control Strategy for Parallel Operation of Distributed-Generation Inverters, IEEE Transactions on Industrial Electronics , vol.53, no.5, Oct. 2006, pp. 1461-1470. Josep M. Guerrero, Jos Matas, Luis Garca de Vicua, Miguel Castilla, Jaume Miret, Decentralized Control for Parallel Operation of Distributed Generation Inverters Using Resistive Output Impedance, IEEE Transactions on Industrial Electronics , vol.54, no.2, April 2007, pp. 9941004. K. De Brabandere, B. Bolsens, J. Van den Keybus, a. Woyte, J. Driesen, R. Belmans, A Voltage and Frequency Droop Control Method for Parallel Inverters, IEEE Transactions on Power Electronics,vol.22, no.4,July 2007,pp.1107-1115. M. Routimo; M. Salo; H. Tuusa; Current sensorless control of a voltage-source active power filter, Applied Power Electronics Conference and Exposition, 2005. APEC 2005. Twentieth Annual IEEE, Vol.3, Iss., 6-10, March 2005 pp. 1696- 1702. P. Mattavelli, F. Pinhabel Marafao, Repetitive-Based Control for Selective Harmonic Compensation in Active Power Filter, IEEE Trans on Industrial Electronics, VOL.51 , NO.5, October 2004, pp. 1018-1024.

[3]

[4]

[5]

[6]

[7]

[8]

[9]

[10] R. Mastromauro; M. Liserre.; A. DellAquila; A gridconnected photovoltaic system with universal power quality conditioner functionality; Proceedings of EPE 2007 12th European Conference on Power Electronics and Applications, 2-5 September 2007, Aalborg, Denmark.

Table 2: Performance comparison: P&O vs. dP-INC

W/m

P&O dP-INC

Hill climb 13.1s 2.2s

1000 500 3s 2.5s

500 300 2.5s 2.5s

300 200 2s 2s

200 100 3s 3s

100 50 3s 3s

50 100 3s 3s

100 200 3s 3s

200 300 2s 2s

300 500 2.5s 2s

500 1000 3s 2s

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Publication VI
T. Kerekes, R. Teodorescu, M. Liserre, Common mode voltage in case of transformerless PV inverters connected to the grid; IEEE International Symposium on Industrial Electronics, 2008. ISIE 2008. June 30 2008-July 2 2008; Page(s):2390 2395

139

Common Mode Voltage in case of Transformerless PV Inverters Connected to the Grid


T. KEREKES* R. TEODORESCU**
**Aalborg University Pontoppidanstaede 101 9220 Aalborg DENMARK Tel: +45 9635 9240 Fax: +45 9815 1411
ret@iet.aau.dk

M. LISERRE*

* Politecnico di Bari via E. Orabona 4 70125 Bari ITALY Tl: +39 0805963912 Fx: +39 0805963410
tak@iet.aau.dk liserre@ieee.org

Abstract: For safety reasons grid connected PV systems include galvanic isolation. In case of transformerless inverters, the leakage ground current through the parasitic capacitance of the PV panels, can reach very high values. A common-mode model based on analytical approach is introduced, used to predict the common-mode behavior, at frequencies lower than 50kHz, of the selected topologies and to explain the influence of system imbalance on the leakage current. It will be demonstrated that the neutral inductance has a crucial influence on the leakage current. Finally experimental results will be shown for the NPC topology, emphasizing the low leakage current for the case of a grid connection without galvanic isolation. I INTRODUCTION

Grid connected photovoltaic (PV) systems have an important role in distributed power generation. With the help of governmental incentives their usage becomes more and more widespread within the community. According to the latest International Energy Agency Photovoltaic Power Systems (IEA-PVPS T1-15:2006) report, the annual rate of growth of the cumulative installed capacity in the IEA PVPS countries was at an impressive 42%. The PV market in Germany had a 75% growth during the year 2005 with more than 600MWp of installed capacity. The majority of these installations were rooftop systems due to the high buyback rates of the Renewable Energy Market Act that set a feed-in tariff of 0.513 EUR/kWh in the case of rooftop PV installations. [1] Most of the single-phase installations are small scale PV systems, of up to 5-6 kWp [2]-[7]. A single-phase system means that there is a pulsating AC power on the output, whilst the input is a smooth DC. Large DC capacitors are required which decrease the lifetime and reliability of the whole system.

On the other hand in a three phase system, there is constant AC power on the output, which means that there is no need for large capacitors, leading to smaller cost and a higher reliability and lifetime of the whole system. Also the power output of these systems can be higher, reaching up to 10-15 kWp in case of rooftop applications. For safety reasons, most PV systems have a galvanic isolation, either in the DC-DC boost converter in the form of a high frequency transformer, or on the AC output side, in the form of a bulky low frequency transformer. Both of these added galvanic isolations increase the cost and size of the whole system and decrease the overall efficiency. A higher efficiency, smaller size & weight and a lower price for the inverter is possible in the case where the isolation transformer is omitted [8]. These transformerless solutions offer all the aforementioned advantages, but there are some safety issues caused by the solar panel parasitic capacitance to ground, which is formed between the PV array terminals and the frame, which is normally grounded. Fig. 1 shows a typical grid connected PV system with the modeled parasitic capacitances, marked with grey lines, present at the DC+ and DC- terminals of the PV array.

Fig. 1: Grid connected PV system including the parasitic capacitance to ground of the PV array

978-1-4244-1666-0/08/$25.00 '2008 IEEE

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The PV terminals are marked with P (DC+ terminal) and Q (DC- terminal) and their potential is defined relative to ground. Voltage fluctuations of the P and Q terminals would cause leakage currents flowing from the panel terminals to the ground. The level of the leakage current depends on the amplitude and frequency content of the voltage fluctuations, as well as the value of the parasitic capacitance [9], also called leakage capacitance. This resulting leakage capacitance value depends on many factors; some of these are enumerated below [10]: PV panel and frame structure surface of cells, distance between cells module frame weather conditions humidity dust or salt covering the PV panel type of EMC filter The aim of the work presented in this paper is to introduce a common-mode model based on analytical approach for the three-phase inverter connected to the utility grid. This model will be used to predict the common-mode behavior, at frequencies lower than 50kHz, of the selected topologies and to explain the influence of system imbalance on the ground leakage current. It will also be shown, that the neutral inductance has a crucial influence on the common-mode behavior of the topology, thereby directly influencing the ground leakage current of the system. Experimental results will be presented in case of the NPC topology in order to validate the simulation model. II COMMON MODE MODEL OF THE THREE-PHASE INVERTER

connection between the switches and the grounded heatsink; Ct represents the stray capacitance between the transformer windings; LA, LB and LC are the output inductance used to control the current injected into the grid; LcA, LcB and LcC represent the series inductance of the phases; LcG represents the inductance between the ground connection of the inverter and the grid;

For a PV system of 15kW base power, the base impedance can be calculated, based on the following equation:

Zb =

V 2 (400V )2 = = 10.6 P 15kW

(1)

Using this base impedance, a base capacitance can be calculated for a frequency of f = 50kHz (that is the frequency limit for the performed analysis):

Cb =

1 1 = = 0.3 F Zb 2 f Z b

(2)

All the capacitances smaller than 3nF (1% of Cb) can be neglected, because they are not influent at frequencies below 50kHz. In a grid connected PV system with isolation transformer, the common mode current can only find its path through the stray capacitances of the transformer (Ct). Due to the fact that this capacitance has values of order of 100 pF, the common mode current at frequencies lower than 50kHz will be strongly reduced and the higher frequencies can be filtered by the EMI filter. Mainly this is the reason why in case of PV systems with galvanic isolation (with a transformer) the low frequency leakage current behavior is not influenced by the converter topology or modulation technique.

PV systems usually have an isolation transformer between the PV panels and the grid. Such a system is presented in Fig. 1, including the parasitic capacitance of the PV array (CG-PV) connected between ground and each terminal of the PV. In order to show the path for the common mode current the stray elements are added to the system in Fig. 2 [12].

Fig. 2: Three-phase grid connected PV system showing the most important components

Fig. 3: Model of three-phase grid connected PV inverter, using voltage sources

CAG, CBG and CCG are the stray capacitance between the converter output points and ground, present for all three legs of the inverter; these depend on the

On the other hand, in case of transformerless PV systems, the common mode behavior is greatly influenced by the chosen topology or PWM modulation. In this case, as also shown in Fig. 3, the PV is directly connected to the grid and

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common mode voltages present at the PV panel terminals lead to leakage ground currents. II.a Model of common-mode and differential-mode voltages

In order to analyze the system regarding common-mode and differential-mode behavior, first it is necessary to introduce these concepts. In case of a three-phase system with no neutral connection, the common-mode and differential-mode voltages will be derived between each phase, therefore there will be three cases: case 1: common-mode voltage for phase A and B case 2: common-mode voltage for phase B and C case 3: common-mode voltage for phase C and A
Fig. 5: Model showing the common-mode and differential-mode voltages (step 2)

Only case 1 will be show in calculation, because the other two cases are similar. The common mode voltage is defined as the average of the sum of voltages between the outputs and the common reference. In this case the common reference is taken to be the negative terminal of the PV (marked with Q). The commonmode voltage for phase A and B is defined as:

Furthermore, the influence of the output inductors and the heatsink to ground capacitance can be separated (Fig. 6):

Vcm AB =

VAQ + VBQ 2

(3)

The differential mode voltage is defined as the difference between the two voltages: (4) Vdm AB = VAQ VBQ = VAB From here the voltages between the converter output points and the reference point Q can be expressed as:

Fig. 6: Model showing the common-mode and differential-mode voltages (step 3)

VAQ = VBQ

Vdm AB + Vcm AB 2 V = dm AB + Vcm AB 2

(5)

Knowing that the heatsink to ground capacitance is the same for all the legs of the inverter, Vab2 will be always zero, due to the fact that the difference between the CBg and CAg is zero (Fig. 7).
L L A V =V B ab1 dm 2 L + L B A

Using these equations, a common-mode model for the system can be derived starting from Fig. 1.

Vcmm-AB

Vdm-AB A

LA LB

LcA LcB

Lg Lg N

B Vcmm-AB -Vdm-AB

Fig. 7: Simple model showing the total common mode voltage Vcmm-tot

CG-PV

CBG

CAG

LcG

The common-mode voltage can be calculated for the inverter and is:

Fig. 4: Model showing the common-mode and differential-mode voltages (step 1)

Vcmm3~ =

Vcmm AB + Vcmm BC + VcmmCA V AQ + VBQ + VCQ = 3 3

Since the common-mode voltage is present in both legs, the circuit in Fig. 1 can be modified as shown:

(6) In case there is imbalance between the output inductors, there is also common-mode voltage generated by the differential-mode voltage and then the total-common mode voltage of the inverter will be:

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Vcmmtot = Vcmm 3~ +

Vab1 + Vbc1 + Vca1 3

(7)

The above equation is used to predict the total commonmode voltage due to the modulation strategy and imbalance for the system. II.b Leakage current in case of unbalanced condition

As mentioned in II.a, the total common-mode voltage is also influenced by the output filter inductors. Unbalance between the phases leads to a common-mode voltage component influenced by the difference between the inductors on the phases. This influence is shown for the case of a threephase system with no Neutral connection on Fig.8 as well as for the case of a three-phase system with Neutral connection on Fig.9. Subplot (a) shows the case of balanced condition, followed by the simulated (b) and calculated (c) unbalanced conditions.
NO unbalance - common-mode voltage (a) 0 -200 -400 -600 UNBALANCE - simulated common-mode voltage (b) 0 -200 [V] -400 -600 UNBALANCE - calculated equivalent common-mode voltage (c) 0 -200 [V] -400 -600 0.04 0.042 0.044 0.046 0.048 0.05 0.052 0.054 0.056 0.058 Time [s] 0.06

As seen in Fig.8, the simulated common-mode voltage, shown on subplot (b), matches the modeled common mode voltage, show on subplot (c), in case of unbalance conditions, when LA=1.3 LB. In case the Neutral line is connected, from the point of view of the common-mode model, the three-phases of the inverter can be modeled as three individual single-phases, as presented in [12] and the result is a constant total common-mode voltage, leading to very low leakage ground current, as shown also in the simulations for the 3FB-SC and 3xNPC topologies. In case there is some inductance present in the Neutral line, the total common-mode voltage is not constant any more. A small inductance of LN=10H present in the Neutral, can lead to high frequency common-mode voltage, that would generate leakage ground currents that could reach amplitudes greater then the threshold stated in VDE-0126-1-1. Fig.9 presents the simulated and calculated common-mode voltage. Subplot (a) presents the case with no inductance in the Neutral line, in which case the common-mode voltage is constant. Then the next two subplots present the case when a LN=10H inductance is present in the Neutral line. This results in a common-mode voltage having high frequency ripple, leading to increased leakage current flow to ground. III EXPERIMENTAL RESULTS

In order to verify the simulation results, an experimental setup has been done, made up of a single-phase NPC leg connected to the grid, tested as an inverter. In fact the threephase NPC topology can be obtained using three independent single-phase inverters, connected through the common Neutral.

Fig.8. Total common-mode voltage 3FB topology, showing balanced condition and unbalanced condition both simulated and calculated waveforms
NO unbalance - common-mode voltage (a) 360 [V] 340

UNBALANCE - simulated common-mode voltage (b) 360 [V] 340

UNBALANCE - calculated equivalent common-mode voltage (c) 360 [V] 340 0.04 0.042 0.044 0.046 0.048 0.05 0.052 0.054 0.056 0.058 Time [s] 0.06

Fig.10. Picture showing the most important components of the experimental setup

Fig.9. Total common-mode voltage 3FBSC topology, unbalanced condition (L1=10H in the Neutral)

Fig.10 shows the picture of the experimental setup, made up of the grid connected NPC inverter. For the LCL filter on the grid side Lf=3mH inductors were used with a Cf=4.5F capacitor. Furthermore the sensors, gate drivers and the TI DSP are shown, used for the control of the system. The used current control is the same as in the case of the simulations, having harmonic compensation for the 3rd and 5th order harmonics.

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As seen in Fig.12, the 5th harmonic compensation works, showing components at the fundamental frequency (50Hz) and 7th respective 9th order harmonics, for which no harmonic compensation has been added. Fig.13 shows the common mode voltage of the NPC topology. As measured on Ch3, the common-mode voltage is constant, showing no high frequency variations. An FFT of the common-mode voltage confirms that only the DC component is present. This means that the leakage ground current generated by this topology is very low, as also shown in case of the simulations.

[100mA/div and 50Hz/div]

Fig.13. Common mode voltage harmonic content: Channel 1: grid current [5A/div]; Channel 2: grid voltage [200V/div]; Channel 3: voltage between DC+ terminal and ground [100V/div]; Channel M: FFT of Channel 3 [100V/div and 1.25kHz/div]

IV

CONCLUSIONS

Fig.11. Electrical circuit of the experimental setup

The experimental setup has the components reported in:


Digital control MOSFET (S1-S4) Diode (D) DC capacitor (C) Filter Grid DC supply (VDC) TABLE I PARAMETERS OF THE EXPERIMENTAL SETUP TI TMS320F2812 eZdsp kit IXYS 82N60P (600V, 82A) IXYS DSEP 30-06BR (600V, 30A) C=1mF, 450V Lf=3mH, Cf=4.5F Vg=217 Vrms, 50Hz DELTA Elektronika, 330V, 5A

In this paper a detailed analysis of the problem of the leakage current in transformerless converters has been carried out. The adopted common mode model of the system has revealed that connecting the supply Neutral to the middle of the DC-link capacitors will result in low ripple voltage at both DC-link terminals of the PV array leading to a very low leakage current level, below the VDE 0126-01-01 standard requirement of 300mA. However the presence of inductance in the Neutral line can lead to high frequency components in the common-mode voltage, leading to leakage ground currents, higher than the allowed level given in the standards. Therefore it is crucial that the Neutral line has very low inductance, in case of transformerless PV systems.
REFERENCES Trends in photovoltaic applications; Survey report of selected IEA countries between 1992 and 2005; Report IEA-PVPS T115:2006; H. Ertl, J. W. Kolar and F. C. Zach, "A novel multicell DC-AC converter for applications in renewable energy systems", IEEE Transactions on Industrial Electronics, vol. 49, no. 5, October 2002. pp. 1048-1057. M. Liserre, A. Pigazo, A. Dell'Aquila and V. M. Moreno, "An Anti-Islanding Method for Single-Phase Inverters Based on a Grid Voltage Sensorless Control", IEEE Transactions on Industrial Electronics, vol. 53, no. 5, October 2006. pp. 1418 - 1426. H. Koizumi, T. Mizuno, T. Kaito, Y. Noda, N. Goshima, M. Kawasaki, K. Nagasaka, and K. Kurokawa, "A Novel microcontroller for grid-connected photovoltaic systems", IEEE Transactions on Industrial Electronics, vol. 53, no. 6, December 2006. pp. 1889 - 1897. F. Blaabjerg, R. Teodorescu, M. Liserre and A. V. Timbus, "Overview of control and grid synchronization for distributed power generation systems", IEEE Transactions on Industrial Electronics, vol. 53, no. 5, October 2006. pp. 1398 - 1409.

[1]

[2]

[3]

[4]

[5] Fig.12: Grid current harmonic content: Channel 1: grid current [5A/div]; Channel 2: grid voltage [200V/div]; Channel M: FFT of the grid current

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[6]

G. M. Martins, J. A. Pomilio, S. Buso and G. Spiazzi, "Threephase low-frequency commutation inverter for renewable energy systems", IEEE Transactions on Industrial Electronics, vol. 53, no. 5, October 2006. pp.1522-1528. J.-M. Kwon, K.-H. Nam, and B.-H. Kwon, "Photovoltaic power conditioning system with line connection", IEEE Transactions on Industrial Electronics, vol. 53, no. 4, June 2006. pp. 1048 - 1054. J. M. Carrasco, L. G. Franquelo, J. T. Bialasiewicz, E. Galvan, R. C. Portillo Guisado, M. A. M. Prats, J. I. Leon and N. MorenoAlfonso, "Industrial electronics power-electronic systems for the grid integration of renewable energy sources: A survey", IEEE Transactions on Industrial Electronics, vol. 53, no. 4, June 2006. pp. 1002 - 1016. M. Calais, V. Agelidis; Multilevel converters for single-phase grid connected photovoltaic systems, an overview, IEEE ISIE 1998 ; pp. 172 - 178

Symposium Photovoltaische Sonnenenergie, Staffelstein, Germany 2003, pp. 89-98 [11] D. Krug, K. Jalili, M. Malinowski and S. Bernet; Design and comparison of 2.3kV Medium Voltage Multi-Level Converters for Industry Applications; Industry Applications Conference, 39th IAS Annual Meeting, Seattle, USA, 03-07 Oct. 2004. [12] E. Guba, P. Sanchis, A. Ursa, et al; Ground currents in Singlephase Transformerless Photovoltaic Systems; Progress in Photovoltaics: Research and Applications; 2007, pp.629-650 [13] T. Kerekes, R. Teodorescu, M. Sumner, et al, Evaluation of Three-phase Transformerless Photovoltaic Inverter Topologies, EPE 2007, Aalborg, Denmark, 2-5 Sep.2007 [14] DKE Deutsche Kommission Elektrotechnik Elektronik Informationstechnik im DIN und VDE, DIN VDE 0126-1-1, 2006, Paragraph 4.7.1. Photovoltaik.

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Publication VII
A. Dell'Aquila, M. Liserre, R. Mastromauro and T. Kerekes, A Single-Phase Voltage Controlled Grid Connected Photovoltaic System with Power Quality Conditioner Functionality; IEEE Transactions on Industrial Electronics; (accepted for publication)

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A Single-Phase Voltage-Controlled Grid-Connected Photovoltaic System With Power Quality Conditioner Functionality
Rosa A. Mastromauro, Member, IEEE, Marco Liserre, Senior Member, IEEE, Tamas Kerekes, Student Member, IEEE, and Antonio DellAquila, Member, IEEE

AbstractFuture ancillary services provided by photovoltaic (PV) systems could facilitate their penetration in power systems. In addition, low-power PV systems can be designed to improve the power quality. This paper presents a single-phase PV system that provides grid voltage support and compensation of harmonic distortion at the point of common coupling thanks to a repetitive controller. The power provided by the PV panels is controlled by a Maximum Power Point Tracking algorithm based on the incremental conductance method specically modied to control the phase of the PV inverter voltage. Simulation and experimental results validate the presented solution. Index TermsMaximum Power Point Tracking (MPPT) algorithm, shunt controller, single-phase photovoltaic (PV) inverter.

Fig. 1.

(a) Power ow through a line. (b) Phasor diagram.

I. I NTRODUCTION MONG the renewable energy sources, a noticeable growth of small photovoltaic (PV) power plants connected to low-voltage distribution networks is expected in the future [1], [2]. As a consequence, research has been focusing on the integration of extra functionalities such as active power ltering into the PV inverter operation [3], [4]. Distribution networks are less robust than transmission networks, and their reliability, because of the radial conguration, decreases as the voltage level decreases. Hence, usually, it is recommended to disconnect low-power systems when the voltage is lower than 0.85 pu or higher than 1.1 pu [5]. For this reason, PV systems connected to low-voltage grids should be designed to comply with these requirements but can also be designed to enhance the electrical system, offering ancillary services [6]. Hence, they can contribute to reinforce the distribution grid, maintaining proper quality of supply that avoids additional investments. However, low-voltage distribution lines have a mainly resistive nature, and when a distributed power generation system (DPGS) is connected to a low-voltage grid, the grid frequency and grid voltage cannot be controlled by independently adjusting the active and reactive powers [7][9]. This problem, together with the need of limiting the cost and size of DPGS, which should remain economically competitive even

when ancillary services are added, makes the design problem particularly challenging. This paper proposes to solve this issue using a voltagecontrolled converter that behaves as a shunt controller, improving the voltage quality in case of small voltage dips and in the presence of nonlinear loads. Shunt controllers can be used as a static var generator for stabilizing and improving the voltage prole in power systems and to compensate current harmonics and unbalanced load current [10][18]. In this paper, the PV inverter not only supplies the power produced by the PV panels but also improves the voltage prole, as already pointed out [19]. The presented topology adopts a repetitive controller [20][27] that is able to compensate the selected harmonics. Among the most recent Maximum Power Point Tracking (MPPT) algorithms [28][31], an algorithm based on the incremental conductance method has been chosen [32][35]. It has been modied in order to take into account power oscillations on the PV side, and it controls the phase of the PV inverter voltage. This paper is organized as follows. Section II discusses the possible voltage and frequency support provided by a DPGS converter connected to the grid. Section III discusses the use of shunt controllers for voltage dip compensation. The PV system improved with shunt controller functionality is proposed in Section IV. Section V presents the simulation results, and Section VI shows the experimental results. Finally, Section VII presents the conclusions. II. V OLTAGE AND F REQUENCY S UPPORT The power transfer between two sections of the line connecting a DPGS converter to the grid can be studied using a shortline model and complex phasors, as shown in Fig. 1. When the DPGS is connected to the grid through a mainly inductive line

Manuscript received October 15, 2007; revised July 29, 2008. First published August 26, 2008; current version published October 9, 2009. R. A. Mastromauro, M. Liserre, and A. DellAquila are with Politecnico di Bari, 70125 Bari, Italy (e-mail: mastromauro@deemail.poliba.it). T. Kerekes is with the Institute of Energy Technology, Aalborg University, 9220 Aalborg, Denmark. Digital Object Identier 10.1109/TIE.2008.2004383

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Fig. 2. Use of a shunt controller for voltage dip compensation. (a) Simplied power circuit of the current-controlled shunt controller. (b) Simplied power circuit of the voltage-controlled shunt controller.

X R, R may be neglected. If the power angle is also small, then sin and cos 1, and = = XPA (1) = VA VB XQA VA V B = (2) VA where VA , PA , and QA denote, respectively, the voltage, active power, and reactive power in section A, and VB is the voltage in section B, as indicated in Fig. 1. For X R, a small power angle , and a small difference VA VB , equations (1) and (2) show that the power angle predominantly depends on the active power, whereas the voltage difference VA VB predominantly depends on the reactive power. In other words, the angle can be controlled by regulating the active power, whereas the inverter voltage VA is controlled through the reactive power. Thus, by independently adjusting the active and reactive powers, the frequency and amplitude of the grid voltage are determined. These conclusions are the basis of the frequency and voltage droop control through active and reactive powers, respectively [7]. In this paper, the relation (1) has been adopted to optimize the power extraction from PV panels (MPPT). III. S HUNT C ONTROLLERS FOR V OLTAGE D IP M ITIGATION Shunt devices are usually adopted to compensate small voltage variations that can be controlled by reactive power injection. The ability to control the fundamental voltage at a certain point depends on the grid impedance and the power factor of the load. The compensation of a voltage dip by current injection is difcult to achieve because the grid impedance is usually low and the injected current has to be very high to increase the load voltage. The shunt controller can be current or voltage controlled. When the converter is current controlled, it can be represented as a grid-feeding component [Fig. 2(a)] that supports the grid voltage by adjusting its reactive output power according to the grid voltage variations. When the converter is voltage controlled, it can be represented as a grid-supporting component [Fig. 2(b)] that controls its output voltage. However,

Fig. 3. Vector diagram of the shunt controller providing only reactive power. (a) Current-controlled converter in normal conditions. (b) Voltage-controlled converter in normal condition. (c) Vector diagram for compensation of a voltage dip of 0.15 pu.

also in this second case, the control action results in injecting the reactive power in order to stabilize the voltage. The vector diagrams of a shunt controller designed to provide only reactive power are reported in Fig. 3. When the grid voltage is 1 pu, the converter supplies the reactive power absorbed by the load, and the vector diagram of the current- or voltage-controlled converter is the same, then, in the rst case, it is controlled by the compensating current IC , and in the second one, it is controlled by the load voltage, as underlined in Fig. 3(a) and (b). When a voltage sag occurs, the converter provides reactive power in order to support the load voltage, and the grid current I g has a dominant reactive component, i.e., I g + I C = I load . (3)

The amplitude of the grid current depends on the value of the grid impedance since Ig = V Lg jLg (4)

where V Lg is the inductance voltage drop shown in Fig. 3(c). If the shunt controller supplies the load with all the requested active and reactive powers, in normal conditions, it provides a compensating current I c = I load ; hence, the system operates as in island mode, and I g = 0. In case of a voltage dip, the converter has to provide the active power required by the load, and it has to inject the reactive power needed to stabilize the load voltage, as shown in Fig. 4(b). The grid current in this case is reactive. It can be seen that V load = E + V Lg . (5)

Hence, during a voltage sag, the amount of reactive current needed to maintain the load voltage at the desired value

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Fig. 4. Vector diagram of the shunt controller providing both active and reactive powers. (a) Normal conditions. (b) Vector diagram for compensation of a voltage dip of 0.15 pu.

is inversely proportional to Lg . This means that a large inductance will help in mitigating voltage sags, although it is not desirable during normal operation. IV. PV S YSTEM W ITH S HUNT -C ONNECTED M ULTIFUNCTIONAL C ONVERTER In case of low-power applications, it can be advantageous to use the converter that is parallel connected to the grid for the compensation of small voltage sags. This feature can be viewed as an ancillary service that the system can provide to its local loads. The proposed PV converter operates by supplying active and reactive powers when the sun is available. At low irradiation, the PV converter only operates as a harmonic and reactive power compensator. As explained in Section III, it is difcult to improve the voltage quality with a shunt controller since it cannot provide simultaneous control of the output voltage and current. In addition, a large-rated converter is necessary in order to compensate voltage sags. However, this topology is acceptable in PV applications since the PV shunt converter must be rated for the peak power produced by the panels. In the proposed system, the PV converter operates as a shunt controller; it is connected to the load through an LC lter and to the grid through an extra inductance L of 0.1 pu, as shown g in Fig. 5. Usually, in case of low-power applications, the systems are connected to low-voltage distribution lines whose impedance is mainly resistive. However, in the proposed topology, the grid can be considered mainly inductive as a consequence of L g addition on the grid side. However, since the voltage regulation is directly affected by the voltage drop on the inductance L , g it is not convenient choosing an inductance L of high value in g order to limit the voltage drop during grid normal conditions. It represents the main drawback of the proposed topology. A. Control of Converter The proposed converter is voltage controlled with a repetitive algorithm. An MPPT algorithm modies the phase displacement between the grid voltage and the ac voltage produced by the converter in order to force it to inject the maximum available power in the given atmospheric conditions. Hence, current injection is indirectly controlled. The amplitude of the current depends on the difference between the grid voltage and the voltage on the ac capacitor Vc . The phase displacement between these two voltages determines the injected active power (decided by the MPPT algorithm), and the voltage amplitude
Fig. 5. Grid-connected PV system with shunt controller functionality.

Fig. 6. Proposed repetitive-based controller. (a) Control scheme. (b) Openloop Bode diagram of the system obtained using kFIR = 1, Na = 0, and Nh = {1; 3; 5}.

difference determines the reactive power exchange with the grid. The injected reactive power is limited by the fact that a voltage dip higher than 15% will force the PV system to disconnect (as requested by standards). The active power is limited by the PV system rating and leads to a limit on the maximum displacement angle dmppt . Moreover, the inverter has its inner proportional integral (PI)-based current control loop and overcurrent protections. A phase-locked loop (PLL) detects the amplitude Vpeak and phase grid of the grid voltage. Then, the phase displacement dmppt is provided by the MPPT algorithm described

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Fig. 7.

Flowchart of the modied MPPT algorithm.

in Section IV-B. The voltage error between Vref and Vc is preprocessed by the repetitive controller, which is the periodic signal generator of the fundamental component and of the selected harmonics: in this case, the third and fth ones are compensated (Fig. 6). The proposed repetitive controller is based on a niteimpulse response (FIR) digital lter [20]. It is a moving or running lter, with a window equal to one fundamental period, dened as FDFT (z) = 2 N
N 1

waveform that is phase shifted by 90 with respect to the corresponding grid voltage. B. MPPT Algorithm The power supplied from a PV array mostly depends on the present atmospheric conditions (irradiation and temperature); therefore, in order to collect the maximum available power, the operating point needs to continuously be tracked using an MPPT algorithm [28]. To nd the maximum power point (MPP) for all conditions, an MPPT control method based on the incremental conductance method [32], [34], which can tell on which side of the PV characteristic the current operating point is, has been used. The MPPT algorithm modies the phase displacement between the grid voltage and the converter voltage, providing the voltage reference Vref . Furthermore, there is an extra feature added to this algorithm that monitors the maximum and minimum values of power oscillations on the PV side. In case of single-phase systems, the instant power oscillates with twice the line frequency. This oscillation in power on the grid side leads to a 100-Hz ripple in voltage and power on the PV side. If the system operates in the area around the MPP, the ripple of the power on the PV side is minimized [33]. This feature can be used to detect in which part of the powervoltage characteristics the system operates. It happens in the proposed control scheme where information about the power oscillation can be used to nd out how close the current operating point is to the MPP, thereby slowing down the increment of the reference, in order not to cross the MPP. A owchart of the MPPT algorithm is shown in Fig. 7, explaining how the angle of the reference voltage is modied in order to keep the operating point as close to MPP as possible. The MPP can be tracked by comparing the instantaneous conductance Ipv_k /Vpv_k to the incremental conductance dIpv /dVpv , as shown in the owchart. Considering the powervoltage characteristic of a PV array, it can be observed

cos
i=0 hNh

2 h(i + Na ) N

z i (6)

where N is the number of samples within one fundamental period, Nh is the set of selected harmonic frequencies, and Na is the number of leading steps determined to exactly track the reference. The repetitive controller ensures a precise tracking of the selected harmonics, and it provides the reference for the inner loop. In it, a PI controller improves the stability of the system, offering a low-pass lter function. The PI controller Gc Gc (s) = kp + ki s (7)

is designed to ensure that the low-frequency poles have a damping factor of 0.707. The open-loop Bode diagram of the system is shown in Fig. 6(b): stability is guaranteed since the phase margin is about 45 . In normal operation mode, the shunt-connected converter injects the surplus of active power in the utility grid, and at the same time, it is controlled in order to cancel the harmonics of the load voltage. At low irradiation, the PV inverter only acts as a shunt controller, eliminating the harmonics. Controlling the voltage Vc , the PV converter is improved with the function of voltage dip compensation. In the presence of a voltage dip, the grid current Ig is forced by the controller to have a sinusoidal

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Fig. 8. Performance of the voltage-controlled shunt converter with MPPT algorithm: grid voltage E and load voltage Vload .

Fig. 10. Active and reactive power provided by the shunt-connected multifunctional converter to compensate the voltage sag of 0.15 pu.

Fig. 11. Powervoltage characteristic of the PV array and current and voltage on the PV side in the presence of a grid voltage sag of 0.85 pu.

Fig. 9. Performance of the voltage-controlled shunt converter with MPPT algorithm: grid current Ig , converter current IC , and load current Iload .

that, operating in the area on the left side of the MPP, dmppt has to decrease. This decrement is indicated in Fig. 7 with side = 1. Moreover, operating in the area on the right side of the MPP, dmppt has to increase, and it is indicated with side = +1. The increment size determines how fast the MPP is tracked. The measure of the power oscillations on the PV side is used to quantify the increment that is denoted with incr in Fig. 7. V. S IMULATION R ESULTS The PV system with power quality conditioner functionality has been tested in the simulation with the following system parameters: the LC lter made by 1.4-mH inductance, 2.2-F

capacitance, and 1- damping resistance; an inductance L of g 0.1 pu; and a 1-kW load. The control has been validated in the presence of sudden changes of the PV power caused, for example, by irradiation variations. The reported tests show the behavior of the MPPT for a voltage sag. The results refer to the case of a controlled inverter in order to collect the maximum available power (i.e., 2 kW). The controller parameters are kFIR = 0.3, N = 128 (sampling frequency = 6400 Hz), Na = 0, kp = 4.5, and ki = 48. The set of test aims to demonstrate the behavior of the system during a voltage sag and the interaction of the voltage control algorithm with the MPPT algorithm. The simulation results, shown in Figs. 8 and 9, are obtained in case of a voltage dip of 0.15 pu. During the sag, the inverter sustains the voltage for the local load (Fig. 8), injecting a mainly reactive current into the grid. The amplitude of the grid current Ig grows from 4.5 to 8.5 A, as shown in Fig. 9, which corresponds to the reactive power injection represented in Fig. 10. The inductance L connected in series with the grid impedance g limits the current owing through the grid during the sag.

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Fig. 12. Laboratory setup.

Fig. 15. Experimental results obtained in case of distorting load and without shunt converter. (A) Grid voltage (300 V/div). (C) Load voltage (300 V/div). (1) Load current (10 V/div).

Fig. 13. Experimental results in case of a voltage sag of 0.15 pu. (A) Grid voltage (300 V/div). (C) Load voltage (300 V/div). (1) Grid current (10 V/div).

Fig. 16. Experimental results in case of distorting load and shunt converter connected to the grid. (A) Grid voltage (300 V/div). (C) Load voltage (300 V/div). (1) Load current (10 V/div).

Fig. 17. Load voltage harmonic spectrum in case of distorting load: (black bars) without shunt converter, (white bars) with shunt converter connected to the grid.

Fig. 14. Experimental results in case of a voltage sag of 0.15 pu. (1) Capacitive current injected into the grid to sustain the voltage sag.

When the voltage sag of 0.15 pu occurs, the converter current grows from 8 to 10.5 A. For this reason, the shunt controller is not a good choice to compensate for deeper dips. Fig. 11 demonstrates the robustness of the presented MPPT algorithm to the voltage dip. In fact, in it are shown the voltage and current on the PV side during the sag. They are not signicantly inuenced by the dip.

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Fig. 18. Graphical User Interface of the solar panel simulator software.

VI. E XPERIMENTAL R ESULTS In order to verify the previous analysis, some experiments have been carried out on a laboratory setup (Fig. 12) to test the performance of the PV system with shunt controller functionality. The hardware setup, shown in Fig. 12, consists of the following equipment: a Danfoss VLT 5006 7.6-kVA inverter (whose only two legs are used), two series-connected dc voltage sources to simulate the PV panel string, and the dSPACE 1104 system. The PV converter is connected to the grid through an LC lter whose inductance is 1.4 mH, and the capacitance is 2.2 F in series with a resistance of 1 . In addition, an inductance L of 15 mH (0.1 pu) has been added on the grid g side of the converter, as explained in the previous sections. The experimental tests have been made with grid voltage approximate background distortion THD = 1.5%. They have been executed with two different kinds of loads. In the rst case, the voltage sag compensation capability has been tested when the system feeds a purely resistive load, absorbing 1200 W. In the second one, the performances of the proposed system in the presence of a highly distorting load have been analyzed. A. Voltage Sag Compensation The system has been tested in the following conditions: dc voltage Vdc = 460 V. The results obtained in the simulation in the case of a voltage sag of 0.15 pu are experimentally conrmed in Fig. 13. During the dip, the load voltage remains constant and equal to the desired voltage. The shunt-connected converter injects a reactive current into the grid in order to compensate the load voltage. The current is mainly capacitive, as shown in Fig. 14. B. Voltage Harmonic Compensation in Case of Highly Distorting Load The performances of the shunt-connected converter have been analyzed in the presence of a distorting load consisting of

a single-phase diode bridge connected via a 10-mH inductance to the grid. The bridge feeds a 500-F capacitor in parallel with a 100- resistor. Before connecting the shunt converter, the load voltage appears highly distorted (as shown in Fig. 15), and the voltage THD is around 17%. When the shunt converter is connected to the grid, it compensates the voltage harmonics introduced in the system by the distorting load, as evident in Fig. 16, where the voltage THD is 2%. A detailed harmonic spectra comparison between the cases in Figs. 15 and 16 is reported in Fig. 17. C. Test With Solar Panel Simulator This section proves the capability of the system to compensate a voltage dip when the inverter is fed by two PV arrays connected in parallel. In fact, the two dc voltage sources used in the laboratory to feed the inverter have been controlled by a software that implements the PV voltagecurrent characteristics as a function of irradiance (see Fig. 18). The test has been done considering a xed power level of 700 W and a voltage dip of 0.15 pu occurring for 1.5 s. The experimental results are reported in Fig. 19: the dc voltage is not signicantly inuenced by the sag. VII. C ONCLUSION In this paper, a single-phase PV system with shunt controller functionality has been presented. The PV converter is voltage controlled with a repetitive algorithm. An MPPT algorithm has specically been designed for the proposed voltage-controlled converter. It is based on the incremental conductance method, and it has been modied to change the phase displacement between the grid voltage and the converter voltage maximizing the power extraction from the PV panels. The designed PV system provides grid voltage support at fundamental frequency and compensation of harmonic distortion at the point of common coupling. An inductance is added on the grid side in

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[14] [15]

[16]

[17] [18] [19] Fig. 19. Experimental results obtained in case of dc voltage sources controlled by a solar panel simulator and in the presence of a voltage dip of 0.15 pu. (1) DC current (10 V/div). (2) Load voltage (400 V/div). (3) Grid voltage (400 V/div). (4) DC voltage (200 V/div). [20] [21]

order to make the grid mainly inductive (it may represent the main drawback of the proposed system). Experimental results conrm the validity of the proposed solution in case of voltage dips and nonlinear loads. R EFERENCES
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itor DC link, IEEE Trans. Ind. Electron., vol. 53, no. 2, pp. 477485, Apr. 2006. B.-R. Lin and C.-H. Huang, Implementation of a three-phase capacitorclamped active power lter under unbalanced condition, IEEE Trans. Ind. Electron., vol. 53, no. 5, pp. 16211630, Oct. 2006. I. Exteberria-Otadui, A. Lpez de Heredia, H. Gaztaaga, S. Bacha, and M. R. Reyero, A single synchronous frame hybrid (SSFH) multifrequency controller for power active lters, IEEE Trans. Ind. Electron., vol. 53, no. 5, pp. 16401648, Oct. 2006. G. Escobar, P. Mattavelli, A. M. Stakovis, A. A. Valdez, and J. Leyva-Ramos, An adaptive control for UPS to compensate unbalance and harmonic distortion using a combined capacitor/load current sensing, IEEE Trans. Ind. Electron., vol. 54, no. 2, pp. 839847, Apr. 2007. D. O. Abdeslam, P. Wira, J. Merckl, D. Flieller, and Y.-A. Chapuis, A unied articial neural network architecture for active power lters, IEEE Trans. Ind. Electron., vol. 54, no. 1, pp. 6176, Feb. 2007. M. Routimo, M. Salo, and H. Tuusa, Current sensorless control of a voltage-source active power lter, in Proc. 20th IEEE Annu. APEC, Mar. 610, 2005, vol. 3, pp. 16961702. P. Wang, N. Jenkins, and M. H. J. Bollen, Experimental investigation of voltage sag mitigation by an advanced static VAr compensator, IEEE Trans. Power Del., vol. 13, no. 4, pp. 14611467, Oct. 1998. P. Mattavelli and F. Pinhabel Marafao, Repetitive-based control for selective harmonic compensation in active power lter, IEEE Trans. Ind. Electron., vol. 51, no. 5, pp. 10181024, Oct. 2004. F. Bottern and H. Pinehiro, A three-phase UPS that complies with the standard IEC 62040-3, IEEE Trans. Ind. Electron., vol. 54, no. 4, pp. 21202136, Aug. 2007. G. Escobar, A. A. Valdez, J. Leyva-Ramos, and P. Mattavelli, Repetitivebased controller for a UPS inverter to compensate unbalance and harmonic distortion, IEEE Trans. Ind. Electron., vol. 54, no. 1, pp. 504510, Feb. 2007. G. Escobar, P. R. Martnez, and J. Leyva-Ramos, Analog circuits to implement repetitive controllers UIT feedforward for harmonic compensation, IEEE Trans. Ind. Electron., vol. 54, no. 1, pp. 567573, Feb. 2007. G. Escobar, P. R. Martnez, J. Leyva-Ramos, and P. Mattavelli, A negative feedback repetitive control scheme for harmonic compensation, IEEE Trans. Ind. Electron., vol. 53, no. 4, pp. 13831386, Aug. 2006. R. Gri, R. Cardoner, R. Costa-Castell, and E. Fossas, Digital repetitive control of a three-phase four-wire shunt active lter, IEEE Trans. Ind. Electron., vol. 54, no. 3, pp. 14951503, Jun. 2007. R. A. Mastromauro, M. Liserre, and A. DellAquila, Study of the effects of inductor nonlinear behaviour on the performance of current controllers for single-phase PV grid converters, IEEE Trans. Ind. Electron., vol. 55, no. 5, pp. 20432052, May 2008. R. A. Mastromauro, M. Liserre, A. DellAquila, and R. Teodorescu, Performance comparison of current controllers with harmonic compensation for single-phase grid converter, in Proc. 10th Int. Conf. Optimization Elect. Electron. Equip. OPTIM, Brasov, Romania, May 1819, 2006. W. Xiao, J. Lind, W. Dunford, and A. Capel, Real-time identication of optimal operating points in photovoltaic power systems, IEEE Trans. Ind. Electron., vol. 53, no. 4, pp. 10171026, Aug. 2006. H. Patel and V. Agarwal, Maximum power point tracking scheme for PV systems operating under partially shaded conditions, IEEE Trans. Ind. Electron., vol. 55, no. 4, pp. 16891698, Apr. 2008. I. Kim, M. Kim, and M. Youn, New maximum power point tracker using sliding-mode observer for estimation of solar array current in the gridconnected photovoltaic system, IEEE Trans. Ind. Electron., vol. 53, no. 4, pp. 10271035, Aug. 2006. W. Xiao, N. Ozog, and W. G. Dunford, Topology study of photovoltaic interface for maximum power point tracking, IEEE Trans. Ind. Electron., vol. 54, no. 3, pp. 16961704, Jun. 2007. J. Park, J. Ahn, B. Cho, and G. Yu, Dual-module-based maximum power point tracking control of photovoltaic systems, IEEE Trans. Ind. Electron., vol. 53, no. 4, pp. 10361047, Aug. 2006. H. Hinz and P. Mutschler, Voltage source inverters for grid connected photovoltaic systems, in Proc. 2nd World Conf. Exhib. Photovolt. Solar Energy Convers., Wien, Austria, Jul. 1998, pp. 20452048. T. Esram and P. L. Chapman, Comparison of photovoltaic array maximum power point tracking techniques, IEEE Trans. Energy Convers., vol. 22, no. 2, pp. 439449, Jun. 2007. F. Liu, S. Duan, F. Liu, B. Liu, and Y. Kang, A variable step size INC MPPT method for PV systems, IEEE Trans. Ind. Electron., vol. 55, no. 7, pp. 26222628, Jul. 2008.

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Rosa A. Mastromauro (S05M09) received the M.Sc. and Ph.D. degrees in electrical engineering from the Politecnico di Bari, Bari, Italy, in 2005 and 2009, respectively. Since 2005, she has been with the Converters, Electrical Machines and Drives Research Team, Politecnico di Bari, where she is engaged in teaching the course of power electronics. Her research interests include power converter control for distributed power generation systems based on renewable energies. Dr. Mastromauro is a member of the IEEE Industrial Electronics Society, the IEEE Power Electronics Society, the IEEE Industrial Application Society, the IEEE Women in Engineering Society, and the Italian Electrotechnical and Electronic Association. She is a Reviewer for IEEE conference proceedings and journals.

Tamas Kerekes (S06) was born in Cluj-Napoca, Romania, in 1978. He received the Electrical Engineer Diploma, with specialization in electric drives and robots, in 2002 from the Technical University of Cluj, Cluj-Napoca, and the M.Sc. degree in the eld of power electronics and drives in 2005 from Aalborg University, Aalborg, Denmark, where he is currently working toward the Ph.D. degree with the Institute of Energy Technology. The topic of the Ph.D. program is analysis and modeling of transformerless PV inverter systems.

Marco Liserre (S00M02SM07) received the M.Sc. and Ph.D. degrees in electrical engineering from the Politecnico di Bari, Bari, Italy, in 1998 and 2002, respectively. Since January 2004, he has been an Assistant Professor with the Politecnico di Bari, where he is engaged in teaching courses of power electronics, industrial electronics, and electrical machines. He has authored or coauthored more than 127 technical papers, 28 of them published or to be published in international peer-reviewed journals, and three chapters of a book. These works have received more than 800 citations. He has been a visiting Professor at Aalborg University, Denmark, Alcala de Henares, Spain, and at Christian-Albrechts University of Kiel, Germany. His current research interests include industrial electronics applications to distributed power generation systems based on renewable energies. Dr. Liserre is a Senior Member of the following societies: Industrial Electronics Society (IES), Power Electronics Society, and Industry Applications Society. He was a Reviewer for international conferences and journals. Within the IES, he has been responsible for student activities, an AdCom member, an Editor of the newsletter, and responsible for region 8 membership activities. He has been involved in the IEEE conferences organization in different capacities. He is an Associate Editor of the IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS. He is the Founder and the Editor-in-Chief of the IEEE Industrial Electronics Magazine 20072009. He is the Founder and the Chairman of the Technical Committee on Renewable Energy Systems of the IEEE Industrial Electronics Society. He has been a Guest Co-Editor-in-Chief of the IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS for the Special Section Voltage and current control of power converters. He is also an Organizer and a Guest Co-Editor-in-Chief of the new Special Section on Renewable Energy Systems of the IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS. He has received the IES 2009 Early Career Award. He will be the Co-Chairman of the International Symposium on Industrial Electronics (ISIE 2010), that will be held in Bari 47 July 2010. He has been giving lectures at different universities and tutorials for the following conferences: IEEE Energy Conversion Congress and Exposition (ECCE) 2009, IEEE Power Electronics Specialists Conference (PESC) 2008, International Symposium on Industrial Electronics (ISIE) 2008, European Conference on Power Electronics and Applications (EPE) 2007, Annual Conference of the IEEE Industrial Electronics Society (IECON) 2006, ISIE 2006, and IECON 2005.

Antonio DellAquila (M87) received the M.Sc. degree in electrical engineering from Universit di Bari, Bari, Italy, in 1970. Since 1970, he has been working with the Converters, Electrical Machines and Drives Research Team, Universit di Bari. He is currently the Dean of the Faculty of Engineering and a Full Professor of electrical machines with Politecnico di Bari, Bari, where he is also in charge of courses on power electronics and electrical drives. He has published over 100 technical papers in the elds of electrical machines models, transient analysis of rotating machines, inverter-fed induction machine performance, digital signal processing for nonsinusoidal waveforms, Kalman ltering for real-time estimation of induction motor parameters, and control, monitoring, and diagnostic of ac drives. His current research interests include harmonic pollution produced by electronic power systems, PWM techniques for power converters, power converters in renewable energy conversion systems, active power lters, multilevel inverters, and intelligent control of power electronics equipment with fuzzy logic controllers. Prof. DellAquila is a member of the IEEE Power Engineering Society and the Italian Electrotechnical and Electronic Association (A.E.I.T.). He is Dean of the Faculty of Engineering, Politecnico di Bari, Italy.

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Publication VIII
T. Kerekes, R. Teodorescu, M. Liserre, C. Klumpner and M. Sumner, Evaluation of Three-phase Transformerless Photovoltaic Inverter Topologies, IEEE Transactions on Power Electronics (accepted for publication)

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Evaluation of Three-Phase Transformerless Photovoltaic Inverter Topologies


Tamas Kerekes, Member, IEEE, Remus Teodorescu, Senior Member, IEEE, Marco Liserre, Senior Member, IEEE, Christian Klumpner, Senior Member, IEEE, and Mark Sumner, Senior Member, IEEE

AbstractThis paper analyzes and compares three transformerless photovoltaic inverter topologies for three-phase grid connection with the main focus on the safety issues that result from the lack of galvanic isolation. A common-mode model, valid at frequencies lower than 50 kHz, is adopted to study the leakage current paths. The model is validated by both simulation and experimental results. These will be used to compare the selected topologies, and to explain the inuence of system unbalance and the neutral conductor inductance on the leakage current. It will be demonstrated that the later has a crucial inuence. Finally, a comparison of the selected topologies is carried out, based on the adopted modulation, connection of the neutral and its inductance, effects of unbalance conditions, component ratings, output voltage levels, and lter size. Index TermsInverters, modulated (PWM) inverters. leakage currents, pulsewidth-

Fig. 1. Grid-connected PV system including the parasitic capacitance to ground of the PV array.

I. INTRODUCTION RID-CONNECTED photovoltaic (PV) systems have an important role in distributed power generation. With the help of governmental incentives, their usage becomes more and more widespread within the community. According to the latest International Energy Agency (IEA) Photovoltaic Power Systems (PVPSs) report [1], the annual rate of growth of the cumulative installed capacity in the IEA PVPS countries was at 36% in 2006, slightly lower than for the previous year, when it was at an impressive 42%. Germany is still the leader in the grid-connected PV market, with more than 950 kWp of installations in the year 2006, a bit more than the previous year (860 kWp). The majority of these installations were rooftop systems due to the high buyback rates of the Renewable Energy Market Act that set a feed-in tariff of 0.518 EUR/kWh in the case of new PV installations, and this rate is guaranteed for a period of 20 years [1]. Most of the single-phase installations are small-scale PV systems of up to 56 kWp. A single-phase system means that there is a pulsating ac power on the output, whilst the input is a smooth dc. Large dc capacitors are required that decrease the lifetime and reliability of the whole system [2]. On the other hand, in

Manuscript received June 5, 2008; revised September 5, 2008 and Feburary 17, 2009. Current version published August 28, 2009. Recommended for publication by Associate Editor T. Shimizu. T. Kerekes and R. Teodorescu are with the Institute of Energy Technology, Aalborg University, Aalborg 9220, Denmark (e-mail: tak@iet.aau.dk; ret@iet.aau.dk). M. Liserre is with the Politecnico di BariDipartimento di Elettrotecnica ed Elettronica, Bari 70125, Italy. C. Klumpner and M. Sumner are with the Department of Electrical and Electronic Engineering, The University of Nottingham, Nottingham NG7 2RD, U.K. Color versions of one or more of the gures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identier 10.1109/TPEL.2009.2020800

a three-phase system, there is constant ac power on the output, which means that there is no need for large capacitors, leading to smaller cost, and a higher reliability and lifetime of the whole system. Also, the power output of these systems can be higher, reaching up to 1015 kWp in case of rooftop applications. For safety reasons, most PV systems have a galvanic isolation, either in the dcdc boost converter in the form of a highfrequency transformer, or on the ac output side, in the form of a bulky low-frequency transformer. Both of these added galvanic isolations increase the cost and size of the whole system, and decrease the overall efciency. A higher efciency, smaller size and weight, and a lower price for the inverter are possible in the case where the isolation transformer is omitted [3], [7], [11]. These transformerless solutions offer all the aforementioned advantages, but there are some safety issues caused by the solar panel parasitic capacitance to ground, which is formed between the PV array terminals and the frame, which is normally grounded. Fig. 1 shows a typical grid-connected PV system with the modeled parasitic capacitances (CG -PV ), marked with gray lines, present at the dc+ and dc terminals of the PV array, as mentioned in [9] and [15]. The German standard, VDE0126-1-1, deals with grid-connected PV systems, and gives the requirements for limits regarding ground leakage and fault currents [12]. The aim of this paper is to offer a comprehensive analysis of the three-phase transformerless converter with respect to the problem of the leakage current. Three topologies are compared: the three-phase full-bridge dc/ac voltage-source inverter (VSI) (3FB), which is one of the simplest and most widely used topology. The second one is the three-phase full-bridge VSI with a split capacitor on the input side (3FB-SC), same as the 3FB, but in this topology, the middle point of the dc-link capacitors is connected to the grid neutral. Finally, the third topology is the three-phase-modularized neutral-point-clamped VSI topology (3xNPC), known for the high conversion efciency and low harmonic content of its output [17].

0885-8993/$26.00 2009 IEEE


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Fig. 2. Three-phase grid-connected PV system showing the most important components (with galvanic isolation).

In Section II, the common model of the three-phase transformerless inverter is presented to study the inuence of the common-mode voltage on the leakage ground current. In Section III, the model is validated by simulation and experimental result. In Section IV, experimental results will be presented in the case of the NPC conguration to validate the simulation model. Finally, in Section V, all the topologies are compared in terms of adopted modulation, connection of the neutral and its inductance, effects of unbalance conditions, component ratings, output voltage levels, and lter size. II. THREE-PHASE INVERTER LEAKAGE CURRENT PATH STUDY PV systems usually have an isolation transformer between the PV panels and the grid. Fig. 1 shows such a system, including the parasitic capacitance of the PV array (CG -PV ) connected between ground and each terminal of the PV array. In order to show the path for the common-mode current, the stray elements are added to the system in Fig. 2 [15]. 1) CA G , CB G , and CC G are the stray capacitances between the converter output points and ground, present for all three legs of the inverter; these depend on the connection between the switches and the grounded heatsink. 2) CG -PV is the parasitic capacitance, also called as leakage capacitance. 3) Ct represents the stray capacitance between the transformers primary and secondary windings. 4) LA , LB , and LC are the output inductances used to control the current injected into the grid. 5) LcA , LcB , and LcC represent the series inductances of the phases. 6) LcN represents the series inductance of the neutral when connected. 7) LcG represents the inductance between the ground connection of the inverter and the grid. In order to adapt the model to the need of studying the leakage current (limited to 50 kHz) rather than a general common-mode current that can have higher frequencies content, the base capacitance at 50 kHz should be calculated. The base impedance for the system under investigation is Zb = V2 S (1)

Fig. 3. Three-phase grid-connected PV system with the inverter modeled as a voltage source (without galvanic isolation).

where V is the rms value of the three-phase grid voltage and S is the apparent power of the three-phase converter. The equivalent base capacitance can be calculated for a frequency of f = 50 kHz (i.e., the frequency limit for the performed analysis) Cb50 kHz = 103 b Zb (2)

where b is the base frequency and is equal to 314 rad/s. If we consider a 15-kVA inverter, where Zb is 11 , from (2) it is possible to calculate Cb50 kHz resulting in 0.3 F, then all the capacitances smaller than 1% of Cb50 kHz (3 nF in the example) can be neglected, because they have a reactance 100 times bigger than the base capacitive reactance and their inuence can be neglected at frequencies below 50 kHz. In a grid-connected PV system with isolation transformer, the common-mode current can only nd its path through the stray capacitances of the transformer (Ct ). Due to the fact that this capacitance has values of the order of 100 pF, the common-mode current at frequencies lower than 50 kHz will be strongly reduced, and the higher frequencies can be ltered by the electromagnetic interference (EMI) lter [15]. Mainly, this is the reason why in case of PV systems with galvanic isolation (with a transformer), the low-frequency leakage current behavior is not inuenced by the converter topology or modulation technique. On the other hand, in case of transformerless PV systems, the common-mode behavior is greatly inuenced by the chosen topology or pulsewidth modulation (PWM). In this case, as also shown in Fig. 3, the PV is directly connected to the grid, and common-mode voltages present at the PV panel terminals lead to leakage ground currents. A. Model of Common-Mode and Differential-Mode Voltages In order to analyze the system regarding common-mode and differential-mode behavior, rst, it is necessary to consider the following steps. In case of a three-phase system with no neutral connection, the common-mode and differential-mode voltages will be derived between two phases J and K, with J = K and J, K = {A, B, C}.

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Fig. 4. Model showing the common-mode and differential-mode voltages J, K = {A, B, C}.

Fig. 6. Simple model showing the common-mode voltage for the three-phase system.

capacitors (CK G and CJ G shown in Fig. 4) can be neglected, due to the fact that the two legs of the inverter are the same in most cases. In case the stray capacitors CK G and CJ G are not equal, then their inuence is very small, due to their small size and can be neglected, so they are not shown in Fig. 5. As presented in (7), Vab1 can be different from zero in case of difference between the inductor values
Fig. 5. Simplied model of common-mode voltage for phases A and B.

Vab1 = VAB The common-mode voltage is dened as the average of the sum of voltages between the outputs and the common reference. In this case, the common reference is taken to be the negative terminal of the PV (marked with Q). The common-mode voltage for phase J and K is dened as V J Q + VK Q . (3) Vcm -J K = 2 The differential-mode voltage is dened as the difference between the two voltages Vdm -J K = VJ Q VK Q = VJ K . (4)

LB LA . 2 (LB + LA )

(7)

Therefore, the total common-mode voltage, including the contribution from inductor unbalance, is dened by (8) Vcm m tot = Vcm m 3 + where Vcm m 3 = Vcm m -AB + Vcm m -BC + Vcm m -CA 3 VAQ + VBQ + VCQ . = 3 Vab1 + Vbc1 + Vca1 3 (8)

From (3) and (4), the voltages between the converter output terminals and the reference point Q can be expressed as Vdm -J K + Vcm -J K (5) 2 Vdm -J K + Vcm -J K . VK Q = (6) 2 Using (5) and (6), a common-mode model for the system can be derived, as shown in Fig. 4. Using Thevenins theorem, the model in Fig. 4 can be rearranged as reported in Fig. 5. In this way, the simplied model of the common-mode voltage is obtained for phases A and B, showing the voltage source for the common mode as well as the voltage source representing the contribution given by the differential-mode voltage and the unbalance of the grid-side inductances, as explained in the following. In case there is unbalance between the output inductors (LA = LB = LC ), there is also common-mode voltage generated by the differential-mode voltage, and this also contributes to the total common-mode behavior of the system. The inuence of the VJ Q =

(9)

Equation (8) is used to predict the total common-mode voltage, due to the modulation strategy and unbalance for the system. Fig. 6 presents the simplied model, showing the commonmode voltage sources for the three-phase system. The common-mode voltage described by (9) charges and discharges the parasitic capacitance CG -PV , and the current through this capacitance depends on the amplitude and frequency content of the voltage across the capacitor, as well as the value of the leakage capacitance [9]. This resulting leakage capacitance value depends on many factors [10]: 1) PV panel and frame structure; 2) surface of cells and distance between cells; 3) module frame; 4) weather conditions; 5) humidity; 6) dust or salt covering the PV panel; 7) type of electromagnetic compatibility (EMC) lter.

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Fig. 8.

Three-phase full-bridge topology.

Fig. 7.

PV inverter control strategy for grid interconnection. Fig. 9. Grid current and voltage for phase A in the case of a system with transformer (with galvanic isolation).

III. THREE-PHASE PV-SYSTEM BEHAVIOR IN TERMS OF LEAKAGE CURRENT Fig. 7 shows the control of the PV-system under investigation. Usually, PV systems employ a current control loop in order to have quasi-sinusoidal current and unity power factor. An LCL-lter is installed on the grid-side and the dynamics of the current should be well damped [5], in order to not have highfrequency ripple, either caused by nonltered PWM or caused by undamped resonance of the LCL-lter. In fact, this ripple could be confused with the effect of the leakage current. A suitable Maximum Power Point Tracking algorithm (MPPT) [6] (shown in Fig. 7) guarantees the maximum power extraction from the PV-panels [4]. An anti-islanding algorithm is adopted too [8] to prevent the PV-system from energizing a portion of the utility grid when the grid is switched-off. In case of the simulations, the switching frequency was set to fsw = 10 kHz, which was also the frequency of the current control loop. In order to simplify the simulation, the PV array was modeled with a dc voltage source and Vdc = 650 V. The input-side dc-link capacitance Cdc = 1 mF and ESR = 0.150 . The grid-side LCL-lter has been considered with capacitors in delta connection for the 3FB and 3FB-SC, and in star connection for the 3xNPC with the middle point connected to the neutral line (Lf = 3 mH lter inductance and Cf = 4.5 F lter capacitance). The grid parameters are: frequency fg = 50 Hz, rms voltage Vg = 230 V, grid inductance Lg = 50 H, grid resistance Rg = 0.5 , and grid capacitance Cg = 1 F. The leakage capacitance between the cells and the grounded frame was modeled with a simple capacitance between the PV array terminals and ground. This capacitance, as mentioned in [10], can have values up to 50150 nF/kW, depending on the atmospheric conditions and size/structure of the panels. The value of the simulated leakage capacitance was chosen to be CG -PV = 100 nF for each terminal of the array.

Fig. 10. Grid current and voltage for phase A in the case of a transformerless system (without galvanic isolation).

A three-phase control strategy is used in case of the 3FB and 3FB-SC. The 3xNPC has three individual single-phase controls on each phase. A. Three-Phase Full-Bridge VSI (3FB) This topology, presented in Fig. 8, is the simplest and most widely used one for general applications with three-phase systems. Simulation results for grid voltage and current for phase A are shown in Figs. 9 and 10. In order to show that the current control performs as expected, two simulation cases are selected. The graph in Fig. 9 shows the grid current in case of a system with galvanic isolation between the PV array and ac grid, when no current is owing through the leakage capacitance. The graph in Fig. 10 represents the same grid current, with the difference that, in this case, there is no galvanic separation between the PV array and ac grid, and the leakage current has a path through ground. As seen in Fig. 11, there are high-frequency components in the common-mode voltage. Due to the high-frequency switching between Vdc , the generated leakage current will be very high. A Fast Fourier Transform (FFT) of the ground leakage current, presented in Fig. 12, reveals the harmonic components having 4.5 A amplitude at the switching frequency and 0.4 A at twice the switching frequency. The rms value of the simulated leakage current has been calculated and is 3.2 A, which is very high, well above the 300 mA threshold level stated in the VDE 0126-1-1 standard,

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Fig. 11. Simulation results for a transformerless 3FB. (a) DC+ terminal voltage to ground. (b) Leakage ground current.

Fig. 14. Simulation results for 3FB-SC, showing (a) the dc+ terminal voltage to ground and (b) the leakage ground current in milliamperes.

Fig. 12.

FFT of ground leakage current for 3FB topology without transformer.

Fig. 13.

Three-phase full-bridge VSI with split capacitor topology.

Fig. 15. Simulation results for 3FB-SC with staggered PWM, showing (a) the dc+ terminal voltage to ground and (b) the leakage ground current in milliamperes.

regarding ground leakage currents and fault currents in case of grid-connected PV systems [12]. B. Three-Phase Full-Bridge VSI With Split Capacitor (3FB-SC) The 3FB-SC topology, presented in Fig. 13, is similar to the previous one, with the difference being the input dc-link capacitor and PV array, and is split into two halves, and the middle point is connected to the neutral point of the grid. This topology is equivalent to three independent single-phase halfbridge inverters. The same current control used by the 3FB is also applied in this case for the control of the switches. For the PWM modulation, two strategies will be used. The rst one is the PWM using a single triangular carrier signal for all three phases, and

the second PWM will use three triangular signals displaced by 120 , also referred as interleaved PWM, the aim being to have the switching harmonics in the grid current that cancels out in the neutral current [14]. By using the interleaved triangular signals for the PWM, the common-mode voltage for the three phases can be reduced. The simulation results in Figs. 14 and 15 show that the voltage uctuations present at dc+ and dc are much smaller, than in the case of the 3FB-SC, due to the connection of the capacitors middle point to the neutral line that holds its potential to zero. As seen in Figs. 14 and 15, the terminal voltage to ground has very little ripple. This means that with this topology, the leakage current is greatly reduced, having peak values of a few milliamperes, slightly smaller for the interleaved PWM. In both cases, the rms value of the leakage current has been calculated

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Fig. 16. Modularized topology, based on three single-phase neutral-pointclamped inverters.

to be 0.23 mA for the 3FBSC and slightly smaller, 0.13 mA, for the interleaved PWM. Both cases have the leakage current well below the standard requirement of 300 mA. C. Three-Phase Neutral-Point-Clamped VSI (3xNPC) Multilevel converters, like the NPC shown in Fig. 16 [17], are interesting for renewable applications due to the following advantages with respect to the standard six-switches full-bridge inverter. 1) The voltage stress on switches is reduced, due to the series connection of the switches and thus voltage sharing. 2) The output-phase voltage has more than two levels, thereby having a lower harmonic content. 3) The output lter size is smaller because of lower dv/dt. 4) Better overall efciency because switching losses are reduced due to the fact that lower voltage (600 V) switches are used. Using the aforementioned criteria, a three-phase version of this topology was taken into consideration and simulated. Each leg is controlled individually as it would be done in case of a single-phase three-level inverter, having three separate current controllers for each phase. Hence, the output current is always synchronized with its own phase voltage. As seen in Fig. 17, simulation results conrm that this topology is also suitable to be used as inverter in a three-phase transformerless PV system, having almost no voltage ripple present at the terminals of the PV panel, and leading to a very small leakage current to ground. In this case also, the leakage current is calculated to have an rms value of 0.7 mA, which is well below the standard requirement, making it an excellent solution for transformerless PV systems. D. Leakage Current in Case of Unbalance Filter Inductance Condition As mentioned in Section II-A, the total common-mode voltage is also inuenced by the output lter inductors. Unbalance between the phases leads to a common-mode voltage component inuenced by the difference between the inductors on the phases. Fig. 18 presents the two cases: the case of no unbalance is shown in the top subplot, and the unbalance condition is shown in the other two subplots, which present the commonFig. 17. Simulation results for 3xNPC, showing the dc+ terminal voltage to ground (upper gure) and the leakage ground current (lower gure).

Fig. 18. Total common-mode voltage 3FB topology, unbalanced condition. (a) NO unbalance common-mode voltage. (b) UNBALANCE simulated common-mode voltage. (c) UNBALANCE calculated equivalent commonmode voltage.

mode voltage in case of simulation (subplot in the middle) and calculation based on the equations from Section II-A. As seen in Fig. 18, the simulated voltage matches the modeled commonmode voltage, in case of unbalance conditions, when LA = 1.3 LB . In case the neutral line is connected, from the point of view of the common-mode model, the three-phases of the inverter can be modeled as three individual single phases, as presented in [15], and the result is a constant total common-mode voltage, leading to very low leakage ground current, as shown in the rst subplot in Fig. 19, which represents the simulation results for the 3FB-SC and 3xNPC topologies.

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Fig. 20.

Electrical circuit of the experimental setup.

Fig. 19. Total common-mode voltage 3FBSC topology, unbalanced condition (L 1 = 10 H in the neutral). (a) NO unbalance common-mode voltage. (b) UNBALANCE simulated common-mode voltage. (c) UNBALANCE calculated equivalent common-mode voltage.

In case there is some inductance present in the neutral line, for example, due to the EMI lter, the total common-mode voltage is not constant anymore. A small inductance of LcN = 10 H present in the neutral can lead to high-frequency commonmode voltage that would generate leakage ground currents that could reach amplitudes greater than the threshold stated in the German standard regarding grid connection of PV systems: VDE0126-1-1 [12]. The bottom two subplots in Fig. 19 present the simulated and calculated common-mode voltage when 10 H inductance is present in the neutral line. This results in a common-mode voltage, which is not constant any more, leading to increased leakage current ow to ground. Very high attention should be carried out for designing an inductance-free neutral connection. IV. EXPERIMENTAL RESULTS In order to verify the simulation results, an experimental setup has been done, which is made up of a single-phase NPC leg connected to the grid, tested as an inverter. In fact, the threephase NPC topology can be obtained using three independent single-phase inverters, like the one shown in Fig. 20, connected through the common neutral. Fig. 21 shows the picture of the experimental setup made up of the grid-connected NPC inverter. For the LCL lter on the grid side, Lf = 3 mH inductors were used with a Cf = 4.5 F capacitor. Furthermore, the sensors, gate drivers and the Texas Instruments (TI) Digital Signal Processor (DSP) are shown, which are used for the control of the system. The experimental setup has the components reported in Table I. The used current control is the same as in the case of the simulations. Fig. 22 shows the common-mode voltage of the NPC topology. As measured on Ch3, the common-mode voltage, measured between the dc+ terminal and the ground connection, is constant, showing no high-frequency variations.

Fig. 21. Picture showing the most important components of the experimental setup, the scheme of which is reported in Fig. 20. TABLE I PARAMETERS OF THE EXPERIMENTAL SETUP

An FFT of the common-mode voltage conrms that only the dc component is present. This means that the leakage ground current generated by this topology is very low, as also shown in case of the simulations. To validate the model presented in Section II-A, the commonmode voltage in case of three-phase inverters has been measured for the 3FB and 3FB-SC topologies. As seen in Fig. 23, the common-mode voltage matches the results presented in Fig. 18 both for the balanced and unbalanced cases. Furthermore, the common-mode voltage has been measured for the 3FB-SC topology as well. As seen in Fig. 24, the commonmode voltage is constant in case of balanced condition, while in case there is inductance present in the neutral line, the common-mode voltage is not constant, but has high-frequency

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Fig. 22. Common-mode voltage harmonic content: channel 1: grid current [5 A/div], channel 2: grid voltage [200 V/div], channel 3: voltage between dc+ terminal and ground [100 V/div], channel M: FFT of channel 3 [100 V/div and 1.25 kHz/div].

Fig. 24. Total common-mode voltage 3FB-SC topology, balanced condition (channel 3) and unbalanced condition (channel R1).

Fig. 23. Total common-mode voltage 3FB topology, balanced condition (channel R1) and unbalanced condition (channel R2).

components that could lead to ground leakage currents, as discussed in Section II-A. V. COMPARISON This section proposes an overall comparison, reported in Table II, of the three topologies considering not only the behavior in terms of leakage current to ground, but also the number of switching devices, passive components, size of the output lter, and other auxiliary devices. In terms of power devices, it can be said that the 3xNPC needs twice the switching elements and six extra diodes than the other two topologies. The advantage in this case is that the switching elements need only half of the voltage rating compared to those in case of the 3FB and 3FB-SC.

Regarding the voltage balancing control, in case only the middle point of the capacitors is connected to the neutral line and the middle point of the PV array is left unconnected, then an extra function is required to manage the voltage unbalance of the input capacitors. This unbalance is a result of the direct connection of the capacitance to the load, in which case, the load current is drawn from the capacitance and not from the PV array, causing a voltage unbalance between the upper and lower capacitances [13]. As already pointed out, the most important aspect for the transformerless PV systems, and as a consequence, the main topic of the paper, is the ground leakage current. As detailed in Table II, the 3FB has high common-mode voltage, and therefore, the leakage current is very high, having a calculated rms values of 3.2 A, in case the galvanic isolation is missing. On the contrary, the 3FB-SC and 3xNPC topologies have almost no voltage uctuation. Because of the small voltage ripple, the leakage ground current complies with the requirement stated in the VDE 0126-1-1 standard [12]. Moreover, lower ripple in the grid current is obtained in the case of the 3FB topology with galvanic isolation. In fact, there is no path for the leakage ground current to ow and the homopolar triple harmonics of the grid current are cancelled, resulting in lower harmonic distortion of the grid current. On the other hand, in case of transformerless grid connection, the highest grid current ripple (5 A) is in case of the 3FB topology, while in case of the 3FB-SC, the grid current ripple is only 2.5 A, and in the case of the 3xNPC topology, it is only 1.25 A. In order to comply with IEEE 929 standard, different LCL lters are needed in the three cases. Using the design criteria reported in [16], the required LCL components in terms of overall reactive power are reported in Table II. Particularly, it is evident that in the 3xNPC case, the lter size is 20% smaller than in case of the 3FB. Together with a higher efciency, up to 98%, it makes the 3xNPC the most effective topology for a transformerless PV converter.

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TABLE II COMPARISON FOR THE DIFFERENT TOPOLOGIES

VI. CONCLUSION In this paper, a detailed analysis of the problem of the leakage current in transformerless converters has been carried out. The adopted common-mode model of the system has revealed that connecting the supply neutral to the middle of the dc-link capacitors will result in low ripple voltage at both dc-link terminals of the array, leading to a very low leakage current level, well below the VDE 0126-01-01 standard requirement of 300 mA. Hence, both 3FB-SC and 3xNPC topologies are suitable, from the leakage current point of view, as transformerless PV inverters. However, the presence of inductance in the neutral line can lead to high-frequency components in the common-mode voltage, leading to leakage ground currents, higher than the allowed level given in the standards. Therefore, it is crucial that the neutral line has very low inductance in case of transformerless PV systems. REFERENCES
[1] Trends in photovoltaic applications , Survey report of selected IEA countries between 1992 and 2006, Rep. IEA-PVPS T1-16, 2007. [2] G. Petrone, G. Spagnuolo, R. Teodorescu, M. Veerachary, and M. Vitelli, Reliability issues in photovoltaic power processing systems, IEEE Trans. Ind. Electron., vol. 55, no. 7, pp. 25692580, Jul. 2008. [3] R. Gonzalez, E. Gubia, J. Lopez, and L. Marroyo, Transformerless singlephase multilevel-based photovoltaic inverter, IEEE Trans. Ind. Electron., vol. 55, no. 7, pp. 26942702, Jul. 2008. [4] M. Liserre, A. Pigazo, A. DellAquila, and V. M. Moreno, An antiislanding method for single-phase inverters based on a grid voltage sensorless control, IEEE Trans. Ind. Electron., vol. 53, no. 5, pp. 14181426, Oct. 2006. [5] M. Liserre, R. Teodorescu, and F. Blaabjerg, Stability of photovoltaic and wind turbine grid-connected inverters for a large set of grid impedance values, IEEE Trans. Power Electron., vol. 21, no. 1, pp. 263272, Jan. 2006. [6] S. Jain and V. Agarwal, A single-stage grid connected inverter topology for solar PV systems with maximum power point tracking, IEEE Trans. Power Electron., vol. 22, no. 5, pp. 19281940, Sep. 2007. [7] R. Gonz lez, J. L pez, P. Sanchis, and L. Marroyo, Transformerless a o inverter for single-phase photovoltaic systems, IEEE Trans. Power Electron., vol. 22, no. 2, pp. 693697, Mar. 2007.

[8] L. Asiminoaei, R. Teodorescu, F. Blaabjerg, and U. Borup, Implementation and test of an online embedded grid impedance estimation technique for PV inverters, IEEE Trans. Ind. Electron., vol. 52, no. 4, pp. 1136 1144, Aug. 2005. [9] M. Calais and V. Agelidis, Multilevel converters for single-phase grid connected photovoltaic systems, an overview, in Proc. ISIE 1998, pp. 172178. [10] H. Schmidt, B. Burger, and C. Siedle, Gef hrdungspotenzial transfora matorloser WechselrichterFakten und Ger chte, in Proc. 18th Symp. u Photovoltaische Sonnenenergie, Staffelstein, Germany, 2003, pp. 8998. [11] T. Kerekes, R. Teodorescu, and U. Borup, Transformerless photovoltaic inverters connected to the grid, in Proc. APEC 2007, Feb. 25Mar. 01, pp. 17331737. [12] Automatic Disconnection Device Between a Generator and the Public Low-Voltage Grid, Paragraph 4.7.1. Photovoltaik, DKE Deutsche Kommission Elektrotechnik Elektronik Informationstechnik im DIN UND VDE, Standard DIN VDE 0126-1-1, Feb., 2006. [13] S. Monge, S. Somavilla, J. Bordonau, and D. Boroyevich, Capacitor voltage balance for neutral-point-clamped converter using the virtual space vector concept with optimized spectral performance, IEEE Trans. Power Electron., vol. 22, no. 4, pp. 11281135, Jul. 2007. [14] L. Yu-Tzung and T. Ying-Yu, Digital control of a multi-phase interleaved PWM inverter with minimal total harmonic distortion, in Proc. IEEE PESC 2007, pp. 503509. [15] E. Guba, P. Sanchis, A. Urs a, J. Lopez, and L. Marroyo, Ground cur u rents in single-phase transformerless photovoltaic systems, Prog. Photovoltaics: Res. Appl., vol. 15, pp. 629650, 2007. [16] M. Liserre, F. Blaabjerg, and S. Hansen, Design and control of an LCLlter based three-phase active rectier, IEEE Trans. Ind. Appl., vol. 41, no. 5, pp. 12811291, Sep./Oct. 2005. [17] A. Nabae, I. Takahashi, and H. Akagi, A new neutral-point-clamped PWM inverter, IEEE Trans. Ind. Appl., vol. IA-17, no. 5, pp. 518523, Sep./Oct. 1981.

Tamas Kerekes (S06M09) was born in Cluj-Napoca, Romania, in 1978. He received the Electrical Engineer diploma from the Technical University of Cluj-Napoca, Cluj-Napoca, in 2002, and the Master of Science degree in power electronics and drives from the Institute of Energy Technology, Aalborg University, Aalborg, Denmark, where he is currently working toward the Ph.D. degree.

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Remus Teodorescu (S94M99SM02) received the Dipl.Ing. degree in electrical engineering from the Polytechnical University of Bucharest, Bucharest, Romania, in 1989, and the Ph.D. degree in power electronics from the University of Galati, Galati, Romania, in 1994. Since 1998, he has been with the Power Electronics Section, Institute of Energy Technology, Aalborg University, Aalborg, Denmark, where he is currently a Full Professor, and the Founder and the Coordinator of the Green Power Laboratory, and is engaged in the development and testing of grid converters for renewable energy systems. He is also the Coordinator of the Vestas Power Program. He has authored or coauthored more than 120 papers, one book, and three patents (pending). His current research interests include design and control of power converters used in renewable energy systems, distributed generation of mainly wind power and photovoltaics, computer simulations, and digital control implementation. Prof. Teodorescu is an Associate Editor for the IEEE POWER ELECTRONICS LETTERS and the Chair of the IEEE Danish Joint Industrial Electronics Society/ Power Electronics Society/Industry Applications Society (IAS) Chapter. He is a corecipient of the Technical Committee Prize Paper Awards at the IEEE IAS Annual Meeting 1998 and the ABB Prize Paper Award at the IEEE Optim 2002.

Christian Klumpner (S00M02SM08) was born in Resita, Romania, in 1972. He received the Ph.D. degree in electrical engineering from the Politehnica University of Timisoara, Timisoara, Romania, in 2001. From 2001 to 2003, he was a Research Assistant Professor in the Institute of Energy Technology, Aalborg University, Aalborg, Denmark. Since October 2003, he has been a Lecturer at the School of Electrical Engineering, University of Nottingham, Nottingham, U.K. His current research interests include power electronics and ac drives, with special focus on direct power conversion (matrix converters). Dr. Klumpner received the Isao Takahashi Power Electronics Award in 2005 at the International Power Electronics Conference organized by the Institute of Electrical Engineers of Japan (IEEJ) in Niigata. He is also a recipient of the 2007 IEEE Richard M. Bass Outstanding Young Power Electronics Engineer Award.

Marco Liserre (S00M02SM07) received the M.Sc. and Ph.D. degrees in electrical engineering from the Polytechnic of Bari, Bari, Italy, in 1998 and 2002, respectively. Since January 2004, he has been an Assistant Professor with the Polytechnic of Bari, where he is engaged in teaching courses of power electronics, industrial electronics, and electrical machines. He has authored or coauthored more than 127 technical papers, 28 of them published or to be published in international peer-reviewed journals, and three chapters of a book. He has been a visiting Professor at Aalborg University, Denmark, Alcala de Henares, Spain, and at Christian-Albrechts University of Kiel, Germany. He has been giving lectures in different universities and tutorials for the following conferences: IEEE Power Electronics Specialists Conference (PESC) 2008, International Symposium on Industrial Electronics (ISIE) 2008, European Conference on Power Electronics and Applications (EPE) 2007, Anual Conference of the IEEE Industrial Electronics Society (IECON) 2006, ISIE 2006, and IECON 2005. His current research interests include industrial electronics applications to distributed power generation systems based on renewable energies. Dr. Liserre is a senior member of the following societies: Industrial Electronics Society (IES), Power Electronics Society, and Industry Applications Society. He was a Reviewer for international conferences and journals. Within the IES, he has been responsible for student activities, an AdCom member, an Editor of the newsletter, and responsible for region 8 membership activities. He has been involved in the IEEE conferences organization in different capacities. He is an Associate Editor of the IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS. He is the Founder and the Editor-in-Chief of the IEEE INDUSTRIAL ELECTRONICS MAGAZINE. He is the Founder and the Chairman of the Technical Committee on Renewable Energy Systems of the IEEE Industrial Electronics Society. He has been a Guest Co-Editor-in-Chief of the IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS for the Special Section Voltage and current control of power converters. He is also an Organizer and a Guest Co-Editor-in-Chief of the new Special Section on Renewable Energy Systems of the IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS. He has received the IES 2009 Early Career Award. He will be the Co-Chairman of the International Symposium on Industrial Electronics (ISIE 2010), that will be held in Bari on July 4-7, 2010.

Mark Sumner (M93SM05) received the B.Eng. degree in electrical and electronic engineering from Leeds University, Leeds, U.K., in 1986, and the Ph.D. degree from the University of Nottingham, Nottingham, U. K., in 1990. He was with Rolls Royce, Ltd., Ansty. He was a Research Assistant at Nottingham University, where he was appointed as a Lecturer in October 1992 and is currently an Associate Professor and a Reader in the Power Electronic Systems, and is engaged in research work on induction motor drives. His research interests cover control of power electronic systems including sensorless motor drives, diagnostics and prognostics for drive systems, power electronics for enhanced power quality and novel power system fault-location strategies.

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Publication IX
T. Kerekes, R. Teodorescu, P. Rodriquez, G. Vazquez and E. Aldabas, A new highefficiency single-phase transformerless PV inverter topology; IEEE Transactions on Industrial Electronics (accepted for publication)

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A new high-efficiency single-phase transformerless PV inverter topology


Tams Kerekes, Member, IEEE, Remus Teodorescu, Senior Member, IEEE, Pedro Rodrguez, Member, IEEE, Gerardo Vzquez, Student Member, IEEE, Emiliano Aldabas, Member, IEEE

ABSTRACT: There is a strong trend in the photovoltaic (PV) inverter technology to use transformerless topologies in order to acquire higher efficiencies combining with very low ground leakage current. In this paper a new topology, based on the HBridge with a new AC bypass circuit consisting in a diode rectifier and a switch with clamping to the DC midpoint is proposed. The topology is simulated and experimentally validated and a comparison with other existing topologies is performed. High conversion efficiency and low leakage current is demonstrated. I INTRODUCTION

smaller weight and size than their counterparts with galvanic separation. Transformerless PV inverters use different solutions to minimize the leakage ground current and improve the efficiency of the whole system, an issue that has previously been treated in many papers [4]-[11].

Photovoltaic inverters become more and more widespread within both private and commercial circles. These grid connected inverters convert the available direct current supplied by the photovoltaic (PV) panels and feed it into the utility grid. According to the latest report on installed PV power, during 2007 there has been a total of 2.25GW of installed PV systems, out of which the majority (90%) has been installed in Germany, Spain, USA and Japan. At the end of 2007 the total installed PV capacity has reached 7.9 GW of which around 92% is grid connected [1]. There are two main topology groups used in case of grid connected PV systems and they are: with and without galvanic isolation [2]. Galvanic isolation can be on the DC side, in the form of a high frequency DC-DC transformer or on the grid side in the form of a big-bulky AC transformer. Both of these solutions offer the safety and advantage of galvanic isolation, but the efficiency of the whole system is decreased, due to power losses in these extra components. In case the transformer is omitted the efficiency of the whole PV system can be increased with an extra 1-2%. The most important advantages of transformerless PV systems can be observed in Fig. 1, like: higher efficiency, smaller size and weight compared to the PV systems that have galvanic isolation (either on the DC or AC side). 1 Fig. 1 has been made from the database of more than 400 commercially available PV inverters, presented in a commercial magazine about PV systems [3]. Transformerless inverters are represented by the dots (Transformerless), while the triangles represent the inverters that have a low-frequency transformer on the grid side (LF-transformer) and last the stars represent the topologies including a high-frequency DC-DC transformer (HF-transformer), adding a galvanic isolation between the PV and grid. The conclusion drawn from these graphs is that transformerless inverters have higher efficiency,
1 Copyright (c) 2009 IEEE. Personal use of this material is permitted. However, permission to use this material for any other purposes must be obtained from the IEEE by sending a request to pubs-permissions@ieee.org.

In order to minimize the ground leakage current through the parasitic capacitance of the PV array, several techniques have been used. One of them is to connect the midpoint of the DC-link capacitors to the neutral of the grid, like the half-bridge, Neutral Point Clamped (NPC) or three-phase full bridge with a split capacitor topology, thereby continuously clamping the PV-array to the neutral connector of the utility grid. Half-bridge and NPC type of converters have very high efficiency, above 97%, as shown in [6]. Furthermore the topology proposed in [6] reduces the DC current injection, which is an important issue in case of transformerless topologies and is limited by different standards. The non injection of DC current into the grid is

Fig. 1: Advantages and drawback of different inverter topologies

topologically guaranteed by adding a second capacitive divider to which the neutral terminal of the grid is connected. An extra control loop is introduced that compensates for any DC current injection, by controlling the voltage of both capacitive dividers to be equal. A disadvantage of half-bridge and NPC type of converters is that for single phase grid connection they need a 700V DC-link. Another solution is to disconnect the PV-array from the grid, in case of H-Bridge (HB) inverters, when the zero vector is applied to the load (grid). This disconnection can be done either on the DC side of the inverter (like the topology from [4] and H5 topology from SMA [13]) or on the AC side (like the HERIC topology from Sunways[12]) In this paper a new topology called HB-ZVR (H-Bridge Zero Vector Rectifier) is proposed where the mid-point of the DC link is clamped to the inverter only during the Zero Vector period by means of a diode rectifier and 1 switch. In section II a comparison of known transformerless topologies and the HB-ZVR is performed using simulation, focusing on the voltage to earth and ground leakage current. In section III experimental results are shown, confirming the simulations. Section IV presents the efficiency curve of the compared topologies. II TRANSFORMERLESS TOPOLOGY ANALYSIS:

Vdc=350V, input DC voltage Cdc=250F, DC-link capacitor CG-PV=100nF, parasitic capacitance of PV array Fsw=8kHz, switching frequency for all cases except the switching frequency for unipolar PWM has been chosen to be Fsw=4kHz, so the output voltage of the inverter has the same frequency for all cases. II.1 HB with unipolar switching

As discussed in previous works [8],[11] the common mode voltage generated by a topology and modulation strategy can greatly influence the ground leakage current that flows through the parasitic capacitance of the PV array. Generally the utility grid does not influence the common mode behavior of the system, so it can be concluded that the generated common mode voltage of a certain inverter topology and modulation strategy can be shown using a simple resistor as load. Therefore in case of the simulations only a resistive load is used and the common-mode voltage is measured between the DC+ terminal of the DC source and the grounded middle-point of the resistor as shown in Fig. 2.
DC+

Most single-phase HB inverters use unipolar switching in order to improve the injected current quality of the inverter, which is done by modulating the output voltage to have three levels with twice the switching frequency. Moreover this type of modulation reduces the stress on the output filter and decreases the losses in the inverter. The positive active vector is applied to the load by turning ON S1 and S4, as shown in Fig. 3. The negative active vector is done similarly, but in this case S2-S3 is turned-ON. In case of the unipolar switching pattern, the zero voltage state, during the positive voltage, is achieved by short circuiting the output of the inverter, as detailed in Fig. 4, which results in a high frequency content in the generated common-mode voltage. As seen in Fig. 6, in case of a transformerless PV system using this type of topology and modulation, the high-frequency common-mode voltage, measured across CG-PV, will lead to very high leakage ground current, making it unsafe, therefore not usable (recommended) for transformerless PV applications.

Cdc

S1

S3

A
PV

Lf Lf Cf

R R

Cdc

S2

S4

DC

Lf Cf Lf

R R

CG-PV

PV
DC-

Fig. 3. HB-Unip topology, active vector applied to load, using S1-S4 for positive voltage

CG-PV

AC
PV

Cdc

S1

S3

Fig. 2. Test setup used for common-mode voltage measurement

Lf Lf Cf

R R

In the following simulation results obtained using Matlab Simulink with the PLECS toolbox are shown. The simulation step size is 0.1s, with an 8kHz switching frequency. Simulation parameters: Lf=1.8mH, filter inductance Cf=2F, filter capacitor R=7.5, load resistance
CG-PV

Cdc

S2

S4

Fig. 4. HB-Unip topology, zero vector applied to load, using S1-S3 for positive voltage

freewheeling period of S1 and S4. On the other hand, during the negative half-wave S5 is switched ON and is used during the freewheeling period of S2 and S3 [12].

Cdc

S1

S3

A
PV

Lf Lf Cf

R R

Cdc

S2

S4

CG-PV

Fig. 5. HB-Unip topology, load current and inverter output voltage

This way, using S5 or S6 as detailed in Fig. 8, the zero voltage vector is realized by short-circuiting the output of the inverter, during which period the PV is separated from the grid, because S1-S4 or S2-S3 are turned OFF. As shown in Fig. 9, the output voltage of the inverter has three levels and the load current ripple is very small, although in this case the frequency of the current is equal to the switching frequency. As seen in Fig. 10, the inverter generates no common-mode voltage therefore the leakage current through the parasitic capacitance of the PV would be very small.

Fig. 8. HERIC topology, zero vector applied to load, using S6 during positive half-wave

Fig. 6. HB-Unip topology, voltage to ground and ground leakage current

II.2

HERIC Highly Efficient and Reliable Inverter Concept

This topology, shown in Fig. 7, combines the advantages of the three-level output voltage of the unipolar modulation with the reduced common-mode voltage, as in the case of bipolar modulation. This way the efficiency of the inverter is increased, without compromising the common-mode behavior of the whole system.
Cdc
S1
S3

Fig. 9. HERIC topology, load current and inverter output voltage


S5
S6

A
PV

Lf Lf Cf

R R

Cdc

S2

S4

CG-PV

Fig. 7. HERIC topology, active vector applied to load, using S1-S4 during positive half-wave

The zero voltage vector is realized using a bidirectional switch shown with a grey background in Fig. 7. This bidirectional switch is made up of 2 IGBTs and 2 diodes (S5-S6). During the positive half-wave of the load (grid) voltage, S6 is switched ON and is used during the

Fig. 10. HERIC topology, voltage to ground and ground leakage current

II.3

Proposed topology (HB-ZVR)


Cdc
S1
S3

Another solution for generating the zero voltage vector can be done using a bidirectional switch made of 1 IGBT and 1 diode bridge. The topology is detailed in Fig. 11, showing the bidirectional switch, as an auxiliary component with a grey background. This bidirectional switch is clamped to the midpoint of the DC-link capacitors in order to fix the potential of the PV array also during the zero voltage vector when S1-S4 and S2-S3 are open. An extra diode is used to protect from shortcircuiting the lower DC-link capacitor. During the positive half wave S1-S4 is used to generate the active vector, supplying a positive voltage to the load, as show in Fig. 11. The zero voltage state is achieved by turning ON S5 when S1-S4 are turned OFF, as shown in Fig. 13. The gate signal for S5 will be the complementary gate signal of S1S4, with a small deadtime to avoid short-circuiting the input capacitor. Using S5 it is possible for the grid current to flow in both directions, this way the inverter can feed also reactive power to the grid, if necessary. During the negative half wave of the load voltage, S2S3 are used to generate the active vector and S5 is controlled using the complementary signal of S2-S3 and generates the zero voltage state, by short-circuiting the outputs of the inverter and clamping them to the midpoint of the DC-link. During the deadtime, between the active vector and the zero state, there is a short period while all the switches are turned OFF, when the freewheeling current finds its path through the antiparallel diodes to the input capacitor. This is shown in Fig. 12 and leads to higher losses, compared to the HERIC topology, where the freewheeling current finds its path through the bidirectional switch, either through S5 or S6, depending on the sign of the current.
Cdc
S1
S3

A
S5

Lf Cf Lf

R R

PV

Cdc
S2 S4

CG-PV

Fig. 13. HB-ZVR topology, zero vector applied to load, using S5, during positive half-wave

A
PV

S5

Lf Lf Cf

R R

Fig. 14. HB-ZVR load current and inverter output voltage

Cdc

S2

S4

Q
CG-PV

Fig. 11. HB-ZVR topology, active vector applied to load, using S1-S4, during positive half-wave

Cdc

S1

S3

A
S5
PV

Lf Lf Cf

R R

Cdc

S2

S4

Fig. 15: HB-ZVR topology, voltage to ground and ground leakage current

CG-PV

Fig. 12. HB-ZVR topology, dead-time between turn-OFF of S1-S4 and turn-ON of S5, during positive half-wave

As shown in Fig. 14, the output voltage of the inverter has three levels, taking into account the freewheeling part during deadtime. In this case also, the load current ripple

is very small and the frequency is equal to the switching frequency. To show that this topology does not generate a varying common-mode voltage, Vcm has been calculated for the switching states regarding the positive, zero and negative vectors:

Vcm =

VAQ + VBQ 2

(1) (2) (3) (4)


Fig. 16. Experimental setup, modular solution

As detailed by equations (1)-(4), the common-mode voltage is constant for all switching states of the converter. Therefore the leakage current through the parasitic capacitance of the PV would be very small, as observed in Fig. 15. III EXPERIMENTAL RESULTS

V Positive: VAQ =dc ; VBQ = Vcm =dc V 0 2 Vdc Vdc Vdc Zero: VAQ = ; VBQ = Vcm = 2 2 2 V Negative: VAQ = 0; VBQ =Vdc Vcm = dc 2

In case of the experimental results, the setup has the same parameters as was the case of the simulations: Vdc=350V, Cdc=250F, Lf=1.8mH, Cf=2F, Fsw=8kHz, deadtime=2.5s. To compare the behavior of the different inverters, all three topologies have been tested using the same components. PM75DSA120 Intelligent Power Modules with maximum ratings of 1200V and 75A from Mitsubishi as IGBTs and DSEP 30-06BR with maximum ratings of 600V 30A as diodes from IXYS have been used in the diode bridge of the proposed topology. The modular based setup shown in Fig. 16 makes it possible to test the different topologies, like: full-bridge with bipolar or unipolar modulation, the HERIC topology and the proposed HB-ZVR, using the same components. III.1 HB with unipolar switching (experiment) The main advantage of the HB inverter with unipolar switching is that the output voltage has three-levels and the frequency of the output voltage is the double of the switching frequency, thereby increasing the efficiency of the inverter and decreasing the size of the output filter. But the major drawback of this topology is the high frequency common-mode voltage, which makes it unsuitable to be used for transformerless PV systems. As seen in Fig. 17, the unipolar PWM strategy used in case of the HB topology generates a high-frequency common mode voltage, measured between the DC+ terminal of the DC-link and ground, shown by channel 1 in Fig. 17. As also shown in Fig. 17, the FFT represented by channel M, details the spectrum of the common mode voltage. This common-mode voltage has very high amplitudes both at DC and the switching frequency. Also a low frequency component can be seen on the measured voltage, which is caused by the 100Hz single-phase power variation.

Fig. 17. Common-mode voltage (FFT) and ground current, FB-unipolar

This varying common-mode voltage generates a very high ground leakage current that is only limited by the parasitic capacitance of the PV array. In this case the leakage current reaches to peaks around 6A as shown by channel 2 in Fig. 17. III.2 HERIC (experiment) As presented in the simulation results (II.2), the HERIC topology generates a constant common-mode voltage, by disconnecting the PV from the load (grid) during the state of the zero vector, when the output of the inverter is short circuited. This separation assures, that the common-mode voltage acting on the parasitic capacitance of the PV array does not change in time, therefore keeping the leakage current at very low values, well below the standard requirement of 300mA, given by VDE-0126-1-1, the German standard for grid connected PV systems. As shown in Fig. 18 the voltage measured between the DC+ terminal of the DC-link and ground is constant and has no high frequency content, represented by channel 1 on the scope. An FFT of channel 1 also shows only a DC component of the measured voltage. Furthermore, the leakage current, represented by channel 2 in the scope results in Fig. 18, is also very low, with an RMS value around 22mA.

Fig. 18. Common mode voltage (FFT) and ground current, HERIC

compared topologies, as detailed in Table 1 and shown also in Fig. 20. The HB-ZVR topology has a slightly lower efficiency, due to the fact that the bidirectional switch is controlled with the switching frequency, while in case of the HERIC topology, the bidirectional switch is only switched with the mains frequency. With a maximum efficiency of 94,88% it is a very attractive solution for transformerless PV systems. The HB-Bip topology has the lowest efficiency, due to the high losses as a result of the two level voltage output. The efficiency of the HB-Unip topology has not been included in the efficiency comparison of the transformerless topologies from Fig. 20 and Table 1, because of the influence of the galvanic isolation, where extra losses, as high as 2%, are possible due to the added transformer.
100% 98% 96% 94% 92% 90% 88% 86% 84% 500W

III.3 HB-ZVR (experiment) As mentioned in II.3 the HB-ZVR topology generates the zero voltage vector in a similar way as the HERIC topology, but using another solution for the bidirectional switch configuration. Of course the common-mode behavior of the topology is similar, as was the case of the HERIC topology. As shown in Fig. 19 the voltage measured between the DC+ terminal of the DC-link and ground is constant and has no high frequency content, represented by channel 1 on the scope picture. An FFT of this voltage also shows only a DC component without any high frequency components.

HB-Bip HERIC HB-ZVR

1000W

1500W

2000W

2500W

2800W

Fig. 20. Efficiency curve of the different topologies (Vdc=350V)

Fig. 19. Common mode voltage (FFT) and ground current, HB-ZVR

In this case also, as detailed by channel 2 in the scope results from Fig. 19, the leakage current, has also very low values, with an RMS value around 27mA. IV EFFICIENCY

In case of a single-phase grid connection, the required minimum DC-link input voltage of the inverter, in the European case, has to be at least 350V, otherwise a boost stage is required. The tests have been done with an input voltage of Vdc=350V. The HERIC topology, as also suggested by its name, has very high conversion efficiency throughout the whole working range and has the best efficiency within the

Nowadays most PV inverters are current controlled, injecting only active power into the utility grid. In case there are many inverters injecting active power at the same time, the voltage at Point of Common Coupling (PCC) might rise over the limits stated in the standards and trigger the safety of the inverters leading to disconnection or limit the power production below the available power. This leads to extra losses because not all the available PV power is fed into the grid. In case PV inverters would have a P-Q implemented control, the before mentioned drawback could be dealt with by injection of reactive power, thereby controlling the voltage at PCC. Therefore the capability of injecting reactive power would be a major advantage of future PV inverters, improving the total production of the PV system. The advantage of HB-ZVR is that the HERIC topology, with the implemented PWM strategy, is only ideal for PV systems that supply the grid with active power, otherwise said to have the power factor: cos = 1 . This is because the bidirectional switch of the HERIC topology made up of S5 and S6 is not controlled to be turned-ON simultaneously, therefore current can only flow in a predefined direction, defined by the currently turned-ON switch. On the other hand, in case of the HB-ZVR, it does not matter what the sign the load current has, it will always find a path through the bidirectional switch, made up of a diode bridge and a switch. This makes it possible to have a reactive power flow that can be used to support the utility

grid with additional services any time during the functioning of the inverter. Disadvantage of HB-ZVR is the lower conversion efficiency, than it was in the case of the HERIC topology, due to the high-frequency switching pattern of the auxiliary switch S5, while in case of the HERIC topology S5 and S6 are switched with the grid frequency. V CONCLUSION

[4]

R. Gonzalez, J. Lopez, P. Sanchis, L. Marroyo; Transformerless Inverter for Single-Phase Photovoltaic Systems; IEEE Transactions on Power Electronics, Volume 22, Issue 2, March 2007, Page(s): 693 697 B. Sahan, A.N. Vergara, et al.; A Single-Stage PV Module Integrated Converter Based on a Low-Power CurrentSource Inverter; IEEE Transactions on Industrial Electronics, Volume 55, Issue 7, July 2008, Pages(s): 26022609 R. Gonzalez; E. Gubia, J. Lopez, L. Marroyo; Transformerless Single-Phase Multilevel-Based Photovoltaic Inverter; IEEE Transactions on Industrial Electronics, Volume 55, Issue 7, July 2008, Page(s): 2694-2702 J. Selvaraj, N.A. Rahim, Multilevel Inverter For GridConnected PV System Employing Digital PI Controller; IEEE Transactions on Industrial Electronics, Volume 56, Issue 1, January 2009, Page(s): 149-158 E. Guba, P. Sanchis, A. Ursa, et al; Ground currents in Single-phase Transformerless Photovoltaic Systems; Progress in Photovoltaics: Research and Applications; 2007, Page(s): 629-650 T. Kerekes, R. Teodorescu, U. Borup; Transformerless Photovoltaic Inverters Connected to the Grid, Applied Power Electronics Conference, APEC 2007; 25th Feb. 2007- 1st Mar. 2007 Page(s): 1733 1737 T. Kerekes, R. Teodorescu, C. Klumpner, M. Sumner, D. Floricau, R. Rodriguez; Evaluation of three-phase transformerless photovoltaic inverter topologies; European Conference on Power Electronics and Applications, 2nd-5th Sep. 2007, Page(s): 1-10 T. Kerekes, R. Teodorescu, M. Liserre; Common-mode voltage in case of transformerless PV inverters connected to the grid; International Symposium on Industrial Electronics, ISIE 2008; 29th Jun. 1st Jul. 2008, Page(s): 2390-2395 EP 1 369 985 A2; Europeische Patentanmeldung, European Patent Office EP 1 626 494 A2; Europeische Patentanmeldung, European Patent Office D. Geibel, J. Jahn and R. Juchem; Simulation model based control development of a multifunctional PV-inverter; 12th European Conference on Power Electronics and Applications; 2nd-5th Sep. 2007, Page(s): 1-10

[5]

[6]

Transformerless inverters offer a better efficiency, compared to those inverters that have a galvanic isolation. On the other hand, in case the transformer is omitted, the generated common-mode behavior of the inverter topology greatly influences the ground leakage current through the parasitic capacitance of the PV. Bipolar PWM generates a constant common-mode voltage, but the efficiency of the converter is low, due to the two level output voltage. Using unipolar PWM modulation, the output of the converter will have three levels, but in this case the generated common-mode voltage will have high frequency components, that will lead to very high ground leakage currents. This paper introduced a transformerless topology and gave an alternative solution for the bidirectional switch, used to generate the zero voltage state. The constant common-mode voltage of the HB-ZVR topology and its high efficiency makes it an attractive solution for transformerless PV applications.
REFERENCES [1] [2] Trends in photovoltaic applications: survey report of selected IEA countries between 1992 and 2007; Report IEAPVPS T1-T17:2008 J.M. Carrasco, L.G. Franquelo et al.; Power-Electronic Systems for the Grid Integration of Renewable Energy Sources: A Survey; IEEE Transactions on Industrial Electronics, Volume 53, Issue 4, July 2008, Page(s): 10021016 2007 Photon International, The Photovoltaic Magazine, Apr.

[7]

[8]

[9]

[10]

[11]

[12] [13] [14]

[3]

HB-Bip HERIC HB-ZVR

500W 84,37% 93,45% 90,38%

Table 1. Efficiency at different input power with Vdc=350V

1000W 90,27% 94,71% 92,79%

1500W 92,49% 95,31% 93,78%

2000W 93,66% 95,6% 94,39%

2500W 94,28% 95,85% 94,76%

2800W 94,51% 95,94% 94,88%

Tams Kerekes (S06-M09) was born in 1978 in Cluj-Napoca, Romania. He obtained his Electrical Engineer diploma in 2002 from Technical University of Cluj, Romania, with specialization in Electric Drives and Robots. In 2005, he graduated the Master of Science program at Aalborg University, Institute of Energy Technology in the field of Power Electronics and Drives. In Sep. 2005 he began the PhD program at the Institute of Energy Technology, Aalborg University. The topic of the PhD program is: "Analysis and modeling of transformerless PV inverter systems".

Remus Teodorescu (S94M99 SM02) received the Dipl.Ing. degree in electrical engineering from the Polytechnical University of Bucharest, Bucharest, Romania, in 1989 and the Ph.D. degree in power electronics from the University of Galati, Galati, Romania, in 1994. Since 1998, he has been with the Power Electronics Section, Institute of Energy Technology, Aalborg University, Aalborg East, Denmark, where he is currently a Full Professor. He has more than 120 papers published, one book, and three patents (pending). His areas of interest are design and control of power converters used in renewable energy systems, distributed generation of mainly wind power and photovoltaics, computer simulations, and digital control implementation. He is the Founder and Coordinator of the Green Power Laboratory, Aalborg University, where he is focusing on the development and test of grid converters for renewable energy systems. He is also the Coordinator of the Vestas Power Program.

Dr. Teodorescu is the corecipient of the Technical Committee Prize Paper Awards at the IEEE Industry Applications Society (IAS) Annual Meeting 1998 and the Third-ABB Prize Paper Award at the IEEE Optim 2002. He is an Associate Editor for the IEEE POWER ELECTRONICS LETTERS and the Chair of the IEEE Danish Joint Industrial Electronics Society/Power Electronics Society/IAS Chapter.

Pedro Rodrguez (S99M04) received the B.S. degree in electrical engineering in1989 from the University of Granada, Granada, Spain, and the M.S. and Ph.D. degrees in electrical engineering from the Technical University of Catalonia (UPC), Barcelona, Spain, in 1994 and 2004, respectively. In 1990, he joined the faculty of UPC as an Assistant Professor, where he is currently an Associate Professor. In 2005, he was a visiting researcher in the Center for Power Electronics Systems, Virginia Tech, USA. In 2006 and 2007, he was a Post-doc researcher in the Institute of Energy Technology, Aalborg University (AAU), Denmark, where he lectures PhD. courses from 2006. He is now the Head of the Research Group on Renewable Electrical Energy Systems at the UPC and co-Supervisor of the Vestas Power Programme in partnership collaboration with the AAU. He has coauthored about 100 papers in technical journals and conferences. He is the holder of four patents. His research interest is focused on applying power electronics to distributed energy systems and power quality. Dr. Rodriguez is a Member of the IEEE Power Electronics, IEEE Industrial Electronics, and IEEE Industry Application Societies.

Gerardo Vzquez was born in Mxico, Mxico in 1977. He received the B.Sc. degree in electronic engineering from the Technical Institute of Apizaco, Tlaxcala, Mxico, in 2003 and the M.S. degree in electronic engineering from the National Centre of Research and Technological development, Cuernavaca, Mxico, in 2006. He is currently working toward the Ph.D. degree in electrical engineering at Technical University of Catalonia. Since 2006 he has been a researcher with the Department of Electrical Engineering at Technical University of Catalonia. His research interests include power converters and control for nonconventional energy sources. Emiliano Aldabas (S97A99M04) was born in Teruel, Spain, in 1964. He received the M.Eng. degree in electrical engineering and the Ph.D. degree from the Universitat Politcnica de Catalunya (UPC), Terrassa, Spain, in 1992 and 2002, respectively. In 1993, he joined the Electronic Engineering Department, UPC, as an Assistant Professor. From 1998 to 2007, he was a Lecturer. In 2008, he joined the Electrical Engineering Department, UPC, as an Associate Professor. He is currently a member of the Electrical Engineering Research Group, UPCs Terrassa Campus, and EduQTech Group. His research interests are power electronics, modulation, current controllers, adjustable-speed drives, highperformance drive systems, in particular, hysteresis current controllers for power inverters, on which topic he has authored several technical papers. Dr. Aldabas is a member of the IEEE Industrial Electronics, IEEE Power Electronics, and IEEE Education Societies.

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