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Course Objectives:
To understand modern computers, their evolution, and trade-offs at the HW/SW interface, Instruction Set Architecture Understand the design of a modern computer system and Datapath design

Key terms:
Computer Arithmetic- Performance and Metrics- Pipelining-Control design Design-I/O System Design Memory System

To introduce the basic concepts concerning the internal architecture and operation of a CPU to first-year students of computer science, the utilization of a simplified model of a CPU ,jointly with proper simulation and visualization tools is essential. In this way, students master the basic concepts of computer architecture easily. The approach to introduce computer architecture education presented is conditioned by the prior knowledge of the students. So, the complexity of the internal architecture of the CPU must be simplified to a maxi-mum in order to concentrate the efforts of teachers and students on the aspects relative to the operation of the architecture. The Simple CPU and its simulator are used in the first term in the course calledComputer Structure. THE Simple CPU The Simple CPU is a CPU of 16 bits (for data and addresses).This format allows the operation of a complete CPU to be fully illustrated, while maintaining the manageability of the length of the numbers. It is based on a single internal bus which connects8 general purpose registers (R0-R7) to the arithmetic-logic unit(ALU). The registers of the Simple CPU are classified as being available (A) or not available (NA) to the low-level programmer and are summarized in table I.

The Simple CPU is seen to lack elemental instructions, such as multiply or divide, as well as all the mechanisms relative to subroutines and stack management. These instructions have been deliberately omitted in order to maximize the simplicity of the CPU. Furthermore, in the first term of the course, the students do not have the concept of subroutine in high-level language, so there is little point in explaining how the architecture supports the subroutines. The Simple CPU uses only three addressing modes: the immediate mode, which allows an 8-bitconstant to be loaded in a register, the register mode and the indirect memory addressing through a register. The immediate and memory addressing are supported only by the MOV instruction. To execute each instruction, the Simple CPU requires several steps, using one clock cycle per step. The first three steps are devoted to fetching the instruction from memory and updating the PC. They are identical for all the instructions. The fourth and successive steps are devoted to carrying out the operations defined by the instructions, so they are different for each instruction. In table II, the control signals of the first three steps are presented, and in the table III the specific control signals for the ADD R0,R1,R2 instruction is shown. In the tables of control signals for each instruction, only the signals that are activated in each step appear. Possible 2 Marks: 1. What is computer architecture?

2. What is hardware and software interface?