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The counter can be used in either Binary or BCD operation. The counter consists of type D flip–flop stages with a gating structure to provide toggle flip–flop capability. Inc.5 V lin. per Package† 500 Tstg Storage Temperature TL Lead Temperature (8–Second Soldering) P SUFFIX PLASTIC CASE 648 D SUFFIX SOIC CASE 751B ORDERING INFORMATION MC14XXXBCP MC14XXXBCL MC14XXXBD Plastic Ceramic SOIC TA = – 55° to 125°C for all packages.0 Vdc to 18 Vdc Internally Synchronous for High Speed Logic Edge–Clocked Design — Count Occurs on Positive Going Edge of Clock • Asynchronous Preset Enable Operation • Capable of Driving Two Low–power TTL Loads or One Low–power Schottky TTL Load Over the Rated Temperature Range • Pin for Pin Replacement for CD4029B ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ MAXIMUM RATINGS* (Voltages Referenced to VSS) Symbol VDD Parameter DC Supply Voltage Value Unit – 0.5 to VDD + 0.0 V Vin. PIN ASSIGNMENT PE 1 16 VDD Q3 2 15 CLK P3 3 14 Q2 P0 4 13 P2 Cin 5 12 P1 mW Q0 6 11 Q1 – 65 to + 150 _C Cout 7 10 U/D 260 _C VSS 8 9 B/D * Maximum Ratings are those values beyond which damage to the device may occur. 1995 120 MOTOROLA CMOS LOGIC DATA . It is also useful in A/D and D/A conversion and for magnitude and sign generation. per Pin ± 10 mA PD Power Dissipation. • • • • Diode Protection on All Inputs Supply Voltage Range = 3. Vout Input or Output Voltage (DC or Transient) – 0.0 mW/_C From 65_C To 125_C Ceramic “L” Packages: – 12 mW/_C From 100_C To 125_C TRUTH TABLE Carry In Up/Down Preset Enable Action 1 X 0 No Count 0 1 0 Count Up 0 0 0 Count Down X X 1 Preset X = Don’t Care REV 3 1/94 MC14029B Motorola. This complementary MOS counter finds primary use in up/down and difference counting and frequency synthesizer applications where low power dissipation and/or high noise immunity is desired. lout Input or Output Current (DC or Transient). †Temperature Derating: Plastic “P and D/DW” Packages: – 7.5 to + 18. SEMICONDUCTOR TECHNICAL DATA       L SUFFIX CERAMIC CASE 620 The MC14029B Binary/Decade up/down counter is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure.

05 0.00001 ± 0.9 2.5 7.36 0.g.05 — — — 0.64 – 1.0 11 — — — 3.95 14.05 Vdc “1” Level VOH 5.0 4.5 or 0.0 10 15 0.9 – 2. Per Package) (CL = 50 pF on all outputs.88 2.005 0.4 0. V = (VDD – VSS) in volts.0 µAdc Input Capacitance (Vin = 0) Cin — — — — 5.0 10 15 — — — 4.5 Vdc) Output Drive Current (VOH = 2.0 10 15 – 3.95 9. †To calculate total supply current at loads other than 50 pF: IT(CL) = IT(50 pF) + (CL – 50) Vfk where: IT is in µA (per package).05 0.36 – 0. Unused outputs must be left open.2 — — — — – 2.50 8.25 — — — 3.95 14.0 10 20 — — — 0.0 5.015 5.95 — — — Vdc 5.0 — — — 1.95 9.0 4.6 Vdc) (VOH = 9.5 7.3 – 3.010 0.75 1.05 0. This device contains protection circuitry to guard against damage due to high static voltages or electric fields.20 µA/kHz) f + IDD IT = (1.2 — — — 0.5 Vdc) (VOL = 1.0 Vdc) (VO = 1. ** The formulas given are for the typical characteristics only at 25_C.58 µA/kHz) f + IDD IT = (1.ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS) Characteristic Output Voltage Vin = VDD or 0 Symbol – 55_C 25_C 125_C VDD Vdc Min Max Min Typ # Max Min Max Unit “0” Level VOL 5.5 or 1.0 11 2. CL in pF.5 Vdc) (VOH = 13.88 – 2.5 Vdc) (VO = 9.05 — — — 0 0 0 0.0 10 15 — — — 0.95 5.05 0.05 0. MOTOROLA CMOS LOGIC DATA MC14029B 121 .0 10 15 3.95 — — — 4.0 10 15 — — — 1.51 – 1.2 – 0.0 10 15 — — — 5.0 7.3 3.0 — — — 2. f in kHz is input frequency.4 – 4. precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit.5 3.4 — — — — IOL 5.1 — ± 1.0 11 — — — 5.8 — — — 0.64 1.4 – 0.0 10 15 4.51 1. all buffers switching) mAdc IT = (0.0 – 0..5 Vdc) (VO = 1.0 10 15 Vin = 0 or VDD Input Voltage “0” Level (VO = 4. Vin and Vout should be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD.0 or 9.25 – 8. However.7 – 0.0 Vdc) (VO = 13.4 — — — mAdc Input Current Iin 15 — ± 0.95 9.001.75 5.5 Vdc) (VOH = 4.05 0. Unused inputs must always be tied to an appropriate logic voltage level (e.5 3.5 Vdc) VIL “1” Level VIH (VO = 0.5 — — pF Quiescent Current (Per Package) IDD 5.25 4.1 — ± 0.4 Vdc) (VOL = 0.95 14.5 Vdc) Vdc Vdc IOH Source Sink Total Supply Current**† (Dynamic plus Quiescent.50 6.8 — — — — – 1.0 5.70 µA/kHz) f + IDD µAdc #Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.0 10 20 — — — 150 300 600 µAdc IT 5. and k = 0.5 or 13.6 – 4. For proper operation.0 or 1.5 or 4.5 Vdc) (VOL = 0. either VSS or VDD).5 7.0 4.25 8.6 4.5 3.

7 ns/pF) CL + 95 ns tPLH.0 10 2.66 ns/pF) CL + 97 ns tPLH.5 ns/pF) CL + 25 ns tTLH.55 ns/pF) CL + 9.7 ns/pF) CL + 230 ns tPLH.0 MHz Preset Removal Time The Preset Signal must be low prior to a positive–going transition of the clock.0 10 15 — — — 200 100 90 400 200 180 5. trem 5.0 10 15 150 60 40 75 30 20 — — — ns Up/Down Setup Time 5. TA = 25_C) All Types Characteristic Symbol Output Rise and Fall Time tTLH. tPHL = (1. tPHL = (0.5 ns tTLH.0 10 15 340 140 100 170 70 50 — — — ns Binary/Decade Setup Time 5.66 ns/pF) CL + 192 ns tPLH. 7 ns/pF) CL + 465 ns tPLH. tPHL = (1.0 10 15 — — — 235 100 80 470 200 160 5. tPHL = (0. tPHL = (0.66 ns/pF) CL + 97 ns tPLH.ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ SWITCHING CHARACTERISTICS* (CL = 50 pF.0 4. tPHL = (1.0 10 15 — — — 320 145 105 640 290 210 tW(cl) 5.5 ns/pF) CL + 35 ns tPLH. tTHL = (1.0 10 15 — — — 175 50 50 360 120 100 5.0 8.0 10 15 130 70 50 65 35 25 — — — ns Clock Pulse Width Clock Pulse Frequency Carry In Setup Time Preset Enable Pulse Width tW ns ns ns ns * The formulas given are for the typical characteristics only at 25_C.5 ns/pF) CL + 75 ns tPLH. MC14029B 122 MOTOROLA CMOS LOGIC DATA .5 ns/pF) CL + 75 ns tPLH.0 10 15 — — — 4.5 ns/pF) CL + 75 ns tPLH.75 ns/pF) CL + 12.66 ns/pF) CL + 47 ns tPLH. tPHL = (1. tPHL = (0.5 ns/pF) CL + 125 ns tPLH.0 10 15 320 140 100 160 70 50 — — — ns 5. tPHL = (0. tPHL = (0. tPHL VDD Min Typ # Max 5.0 10 15 — — — 100 50 40 200 100 80 Unit ns ns 5. tPHL PE to Q tPLH.66 ns/pF) CL + 97 ns tPLH. tPHL = (1. tPHL Cin to Cout tPLH. tPHL = (0.7 ns/pF) CL + 230 ns tPLH.0 10 15 180 80 60 90 40 30 — — — ns fcl 5. tPHL = (0. tPHL Clk to Cout tPLH. tTHL = (0.5 ns tTLH. tPHL = (0.0 10 15 — — — 250 130 85 500 260 190 5. tTHL Propagation Delay Time Clk to Q tPLH. #Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.0 10 15 160 80 60 80 40 30 — — — ns Clock Rise and Fall Time tr(cl) tf(cl) 5. tTHL = (0.0 5. tPHL PE to Cout tPLH.7 ns/pF) CL + 230 ns tPLH.0 10 15 — — — — — — 15 5 4 µs tsu 5. tPHL = (0.

01 µF CERAMIC ID 500 pF Q0 Q1 Q2 CL CL Q3 CL Cout CL CL 20 ns 20 ns 50% CLK 90% 10% VARIABLE WIDTH VDD VSS Figure 1. Switching Time Test Circuit and Waveforms MOTOROLA CMOS LOGIC DATA MC14029B 123 . Power Dissipation Test Circuit and Waveform VDD PE Cin B/D U/D CLK P0 P1 P2 P3 PROGRAMMABLE PULSE GENERATOR Q0 Q1 Q2 CL CL Q3 CL CL Cout CL VSS tW tsu CARRY IN OR UP/DOWN OR BINARY/DECADE trem 1/fcl VDD VSS VDD VSS VDD VSS 50% CLOCK 50% tW PRESET ENABLE 20 ns Cout ONLY 90% 10% Q0 OR CARRY OUT 10% tTLH 90% VOH VOL tPLH tTHL tPHL tPLH Figure 2.VDD PE Cin B/D U/D CLK P0 P1 P2 P3 PULSE GENERATOR 0.

Divide by N BCD Down Counter and Timing Diagram (Shown for N = 123) MC14029B 124 MOTOROLA CMOS LOGIC DATA .TIMING DIAGRAM CLOCK CARRY IN UP/DOWN BINARY/DECADE PE P0 P1 P2 P3 Q0 Q1 Q2 Q3 CARRY OUT COUNT 0 1 2 3 4 Q3 Q2 Q1 Q0 Cout Cin MC14029B U/D MSD PE B/D P3 P2 P1 P0 CLK “1” 5 6 7 8 9 8 7 6 Q3 Q2 Q1 Q0 Cout Cin MC14029B U/D PE B/D P3 P2 P1 P0 CLK VDD 5 4 3 1 0 0 9 Q3 Q2 Q1 Q0 Cout Cin MC14029B U/D LSD PE B/D P3 P2 P1 P0 CLK VDD “2” 2 6 7 0 OUTPUT VDD VDD “3” INPUT CLOCK CLOCK Cout 1 (LSD) Cout 2 Cout 3 (MSD) * tW 122 123 0 1 9 10 11 99 100 101 119 120 121 122 COUNT 123 PE ^ 900 ns @ VDD = 5 V Figure 3.

MOTOROLA CMOS LOGIC DATA CLOCK UP/DOWN CARRY IN PRESET ENABLE BINARY/DECADE 15 10 5 1 9 P0 6 Q0 CLK Q1 CLK Q0 1 P1 TE Q1 PE P1 12 TE Q0 PE P0 4 Q1 P2 14 CLK Q2 TE Q2 PE P2 13 Q2 P3 2 CLK Q3 TE Q3 PE P3 3 Q3 7 CARRY OUT LOGIC DIAGRAM MC14029B 125 .

50 1.200 0.30 7.170 0.54 BSC 1.21 0.065 0.015 0. 5.050 BSC 0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY.27 BSC 1. 2.44 0.008 0.750 0.270 0.240 0.80 3.175 0.740 0.50 7.62 BSC 0_ 15 _ 0. 3.015 0.93 6.08 0.65 2. DIMENSION B DOES NOT INCLUDE MOLD FLASH.145 0.008 0. –A– 16 9 1 8 B F C L S –T– K H G D J 16 PL 0.305 0_ 10 _ 0.25 (0.040 MILLIMETERS MIN MAX 19.05 19.125 0.25 (0.050 BSC 0. 1982.38 3.49 ––– 5. 1982.015 0. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. DIMENSION F MAY NARROW TO 0.100 BSC 0.27 BSC 0.38 2.130 0. CONTROLLING DIMENSION: INCH.010) M T A T B M S INCHES MIN MAX 0.01 S P SUFFIX PLASTIC DIP PACKAGE CASE 648–08 ISSUE R NOTES: 1.21 0.020 0. 4. –B– C L DIM A B C D E F G H K L M N –T– K N SEATING PLANE M E F J G D 16 PL 0.770 0.77 2.39 0.80 19.110 0.85 3.69 4.51 1.010) 16 PL 0.010) MC14029B 126 SEATING PLANE M T A M M DIM A B C D F G H J K L M S INCHES MIN MAX 0.53 1.01 MOTOROLA CMOS LOGIC DATA .54 BSC 0. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL.015 0.295 0.70 0. 2. DIMENSIONING AND TOLERANCING PER ANSI Y14. 3. 4.785 0.295 ––– 0.250 0. DIMENSIONING AND TOLERANCING PER ANSI Y14.OUTLINE DIMENSIONS L SUFFIX CERAMIC DIP PACKAGE CASE 620–10 ISSUE V –A– 16 9 1 8 NOTES: 1. CONTROLLING DIMENSION: INCH.040 MILLIMETERS MIN MAX 18.300 BSC 0_ 15 _ 0.25 (0.055 0.10 7.74 0_ 10 _ 0.55 6.040 0.31 7.18 4.021 0.020 0.5M.020 0.35 6.02 1.76 (0.5M. ROUNDED CORNERS OPTIONAL.100 BSC 0.40 1.39 0.51 1.

Motorola does not convey any license under its patent rights nor the rights of others.20 0.019 0.150 0. directly or indirectly. Inc. and expenses.5M. employees. 852–26629298 MOTOROLA CMOS LOGIC DATA ◊ *MC14029B/D* MC14029B MC14029B/D 127 . and reasonable attorney fees arising out of.244 0. 4.25 (0. Arizona 85036.com – TOUCHTONE 602–244–6609 INTERNET: http://Design–NET.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. nor does Motorola assume any liability arising out of the application or use of any product or circuit. Buyer shall indemnify and hold Motorola and its officers.016 0.O.25 (0. DIMENSIONING AND TOLERANCING PER ANSI Y14.004 0.00 3. 03–81–3521–8315 MFAX: RMFAX0@email.25 0.T. Motorola makes no warranty.OUTLINE DIMENSIONS D SUFFIX PLASTIC SOIC PACKAGE CASE 751B–05 ISSUE J –A– 16 NOTES: 1.068 0.40 1. Phoenix. MAXIMUM MOLD PROTRUSION 0.15 (0.393 0.008 0. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0. Motorola.127 (0. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. representation or guarantee regarding the suitability of its products for any particular purpose. damages. Motorola and are registered trademarks of Motorola. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application.010 0. How to reach us: USA/EUROPE/Locations Not Listed: Motorola Literature Distribution. Ltd.27 BSC 0. Hong Kong. costs. and distributors harmless against all claims.25 0. All operating parameters. Tatsumi–SPD–JLDC. including “Typicals” must be validated for each customer application by customer’s technical experts.019 Motorola reserves the right to make changes without further notice to any products herein.010) M T B S A S J DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9. 1–800–441–2447 or 602–303–5454 JAPAN: Nippon Motorola Ltd. 3. CONTROLLING DIMENSION: MILLIMETER.. Tokyo 135. subsidiaries.mot.80 6.50 INCHES MIN MAX 0.006) PER SIDE. 9 –B– 1 P 8 PL 0. intended. 6F Seibu–Butsuryu–Center.009 0. 1982. any claim of personal injury or death associated with such unintended or unauthorized use.010) 8 M B S G R K F X 45 _ C –T– SEATING PLANE M D 16 PL 0.35 1.157 0. P.. affiliates.K.com ASIA/PACIFIC: Motorola Semiconductors H. Japan. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION.049 0.sps.75 0.054 0. Inc.80 4. even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.25 1.25 0_ 7_ 5.014 0. Tai Po.050 BSC 0. 51 Ting Kok Road. or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. 5.009 0_ 7_ 0.386 0.10 0. N.19 0.. 8B Tai Ping Industrial Park.35 0. or authorized for use as components in systems intended for surgical implant into the body. is an Equal Opportunity/Affirmative Action Employer. and specifically disclaims any and all liability. Box 20912. or other applications intended to support or sustain life. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.80 10. Motorola products are not designed.00 1. 2. including without limitation consequential or incidental damages.49 0.229 0. 3–14–2 Tatsumi Koto–Ku.