Microelectronics Journal

Microelectronics Journal 32 (2001) 763767 www.elsevier.com/locate/mejo

A semi-theoretical relationship between the breakdown voltage of eld plate edge and eld plate design in planar PN junction terminated with nite eld plate
Jin He*, Xing Zhang
Institute of Microelectronics, Peking University, Beijing, 100871, China Received 7 March 2001; revised 2 May 2001; accepted 10 May 2001

Abstract A semi-theoretical relationship is presented between the breakdown voltage of the eld plate edge and the eld plate design in terms of the nite length and the thickness for a planar PN junction in this brief for the rst time. As the effect of the oxide thickness of the eld plate on the breakdown voltage is similar to the junction radius of the planar PN junction, the effect of the eld plate length is just similar to the lateral radius of the planar junction. From this analysis, a simple closed form solution suitable for calculating the breakdown voltage of the eld plate edge has been obtained and the theoretical prediction is well veried by the previous experimental data and our numerical simulation results. q 2001 Elsevier Science Ltd. All rights reserved.
Keywords: Planar junction; Curvature effect; Power devices; Field plate termination; Breakdown voltage

1. Introduction It is well known that the breakdown voltage of the planar PN junction is limited by the curvature of the junction edge to some extent [1]. In order to improve the breakdown voltage of high-voltage power devices, a number of junction termination techniques such as eld plate, eld limited ring, bevel angle, junction termination extension and varied lateral doping have been developed in the recent twenty years [2]. Among these, the eld plate structure has become a commonly used means owing to its simplicity in the fabrication process and the effective in improvement of the breakdown voltage in the eld of the high-voltage semiconductor power devices. The previous analytical and numerical investigations have provided well understanding for the breakdown characteristics of the planar junction with the eld plate termination [35]. Some useful analytical formulae, which delineate the deep insight into the device physics, have been used for the optimum design of the high voltage power devices. However, most of the previous analytical treatments were restricted to the eld plate structure with a sufciently large length [35]. This case is rare in the practical device design in order to save the occupied silicon
* Corresponding author. Tel.: 186-10-62752549; 62751789. E-mail address: hjin@ime.pku.edu.cn (J. He). fax: 186-10-

area. For the nite length of the eld plate, a strong dependence of the breakdown voltage on it was found in recent numerical analysis [6], and a few analytical works discussed this effect [79]. However, their results were either the numerical or the complex, very no convenient for the use in the device design. The aim of this work is to present a closed form simple relationship between the breakdown voltage of the eld plate edge and the used eld plate parameters. In this brief, the breakdown voltage is expressed in terms of the eld plate thickness normalized with junction depth and eld plate length normalized with the lateral radius of the junction. The analytical results agree with the previous experimental data and some numerical simulation, showing the validity of the semi-theoretical expression presented here. 2. Theory analysis The planar PN junction terminated with the eld plate structure is shown in Fig.1. The junction depth and the window width of the mask for the planar junction are described in terms of the parameters rj and Rm. The eld plate length and thickness are dened as LFP and tox, respectively. If the breakdown voltage were to be determined by the enhanced surface eld of the curved junction in the absence

0026-2692/01/$ - see front matter q 2001 Elsevier Science Ltd. All rights reserved. PII: S 0026-269 2(01)00053-2

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Fig. 1. Cross-section of a PN junction terminated with the eld plate with the thickness of tox and length of LFP.

ment that the electric displacement vector be continuous through the interface implies that the eld in the oxide will related to the eld in the silicon by the ratio of the permittivities of the two materials, the eld in the silicon being lower than the eld in the oxide by this ratio. Considering the qualitative similarity between the eld at the edge of the eld plate an the eld at the edge of a planar junction, one thinks the thickness of the oxide might play a role similar to the junction depth in the planar junction. This effect is observed experimentally and veried by the comparison of the theoretical and experimental results. Based on the same consideration, one expects the length of the eld plate might play a role similar to the junction lateral radius in the planar junction. The oxide thickness, therefore, play a role similar to a junction depth given by: r 0j

of the eld plate termination, it would be expressed by the results of Kim et al. [10] describing the planar junction in the normalized form: " !1=7 !2 !6=7 rj rj BVC 1 7x 2 1 12 x21 8 BVpp Wc Wc ( 2 rj Wc rj Wc !x11 1 x11 ! 7x 2 1 8 !1=7

esi zt eox ox

Similarly, we would express the length of the eld plate in a manner similar to the lateral radius of the planar junction. This effect is well demonstrated by the 3-D simulation as shown in Fig. 2, Basic the aforementioned principle, the eld plate length gives a equivalent lateral radius for the eld plate edge eld distribution R 0m

!x21=7 )2=x11 # 1

esi zL eox FP

where BVPP 5.34 z 10 13 z N 23/4 and Wc 2.67 10 10 N 27/8 are the breakdown voltage and maximum depletion layer width at breakdown of the plane planar junction, respectively; x is the junction shaping factor, which can be expressed as: x Rm =rj 1 2=Rm =rj 1 1 2 Eq. (1) is reduced to the spherical junction case when x is equal to 2 and approaches to the result of that of the cylindrical junction reported by Baliga and Ghandhi [1]. If deeply look at the situation at the edge of the eld plate in more detail, we can nd that the crowding of the eld lines at the edge of the eld plate bears some similarity to that at the edge of the junction in the absence of the eld plate, as reported by V. Patrick O'Neil and Paul G. Alonas [3]. Moreover, the effect of the eld plate length on the eld distribution thus the breakdown voltage is similar to that of the lateral radius of the planar junction, as shown in Fig. 2(a) and (b) where both the lateral radius and the eld plate length simultaneously extend the depletion layer along the lateral direction. However, there are two main differences: (a) the geometry involves a plane interface between the oxide and silicon rather than the curved interface in the radius of curvature case; (b) the eld passes through two different dielectric materials which have different permittivities. The require-

According to the above discussion, the reasonable approximation to the breakdown voltage of the eld plate edge with the nite length is therefore given by Eq. (1) with a modied eld shaping factor x 0 given by: x 0 ; R 0m =r 0j 1 2=R 0m =r 0j 1 1 5

The breakdown voltage BVFP, at the eld plate edge where the breakdown is induced by the peak electrical eld at the eld plate edge, consists of voltages sustained in the silicon and in oxide which are denoted by Vsi and Vox, respectively. Vsi is easily obtained by Eq. (1) with the modied eld shaping factor x 0 ; Vox, can derived by assuming that, at the silicon oxide interface, the magnitude of the electrical eld in the oxide is e si/e ox times larger than the critical electrical eld in silicon. Thus, the breakdown voltage of the he closed form expression for the breakdown voltage of the eld plate edge of a planar junction is therefore given by: " !1=7 !2 !6=7 r 0j r 0j 1 7x 0 2 1 BVFP 0 12 x 21 8 Wc Wc ( 2 r 0j Wc r 0j Wc !x 0 11 ! 1 x 11
0

7x 0 2 1 8

!1=7

!x 0 21=7 )2=x 0 11 # z BVPP 1 Ecur z tox z

esi eox

(6)

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Fig. 2. (a) Potential contours of a PN junction at VR 200 V, rj 10, Rm 30 mm obtained by 3-D semiconductor device simulator, DESSIS-ISE, where contours 10 V/step. (b) Potential distribution of a PN junction at VR 200 V, rj 10, Rm 15, tox 0.5 LFP 10 mm obtained by 3-D device simulator, DESSIS-ISE, contours 10 V/step.

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Fig. 3. (a) Comparison of the analytical results (curve lines) with the experimental ( ) and simulation ( z ) results as a function of the eld plate thickness with eld plate length as a running parameter and substrate doping concentration is 1 10 14 cm 23. (b) Comparison of the analytical results (curve lines) with the simulation results ( ) as a function of the eld plate length with eld plate thickness as a running parameter and substrate doping concentration is 1 10 14 cm 23.

where Ecur

"

7x 0 2 1 r 0 8 Wc

#1=7 zEc ;

Ec is the critical peak eld of the parallel-plane junction with the background doping concentration N [10]. 3. Model verication In order to verify the analytical model discussed in the previous section and to validate the predicted accuracy of this analytical work, the analytical results and previous experimental and numerical simulation data are plotted simultaneously for comparison in the following discussions. The device parameters used in the present simulation are as follows: The doping proles of P 1-region is assumed to be Gaussian with a surface doping concentration

Np1 5 10 19 cm 23; The origin planar junction is assumed to be cylindrical at its termination with the radius curvature rj equal to the junction depth and the P 1 window width opening is larger enough so that the lateral curvature effect on the breakdown voltage can be neglected; The eld plate parameters are dened as the variable parameters in the simulation. In Fig. 3, the breakdown voltage of the eld plate edge is analytically obtained and compared with the experimental [3] and our simulation results as a function of the thickness of the eld plate with the length of the eld plate being a running parameter from 0.01 to 6 Wc. At rst, one can observe there is reasonably close agreement between the analytical results and experimental data. Secondly, the analytical results predicted by aforementioned model have also been well veried by the numerical simulations as shown by the black circle points in this gure in the cases of larger and smaller eld plate length values. Thirdly, the

J. He, X. Zhang / Microelectronics Journal 32 (2001) 763767 Table 1 Comparisons of the analytical results with the experimental and simulation for the different eld plate design rj(mm) 4 9 4 9 10 N (cm 23) 1 10 14 1 10 14 1 10 14 1 10 14 1.58 10 14 tox(mm) 2.15 2.65 1.75 2.30 2.70 2.5 2.5 2.5 3 3 3 0.5 0.5 1.5 LFP (mm) 50 50 50 50 50 10 20 30 40 60 80 140 40 140 Analytical BV (V) 530 607 465 554 613 539 564 575 651 659 662 289 198 493

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Experimental (e) or simulated (s) BV(V) 570 e [3] 615 c [3] 510 e [3] 590 e [3] 660 e [3] 568 s 590 s 597 s 661 s 670 s 678 s 295 e [4] 222 s 550 e [4]

breakdown voltage shows a satisfaction trend with an increase of eld plate length 0.016 Wc, which critical eld plate length strong depends on the eld plate thickness. In general, the thicker the eld plate, the longer the critical eld plate. This prediction agrees with the previous numerical simulation performed by Ref. [6]. In Fig. 3b, the breakdown voltage of the eld plate edge is also analytically obtained and further compared with the simulation numerical results as a function of the length of the eld plate with tox varying from 0.01 to 4.05 mm. A good agreement between the analytical and simulations for the breakdown voltage as a function of the length of the eld plate with the different eld plate thickness is obtained for the wide range of the eld plate length. This accordance between the analytical results and the experimental and the numerical simulation has been further well demonstrated in Table 1. 4. Conclusion A simple semi-theoretical analytical expression for the breakdown voltage of the PN junction using a eld plate with the nite length has been developed. The theoretical values predicted by the analytical expression presented here agree well with the previous experimental and simulation results, showing the validity of the model presented here. Thus, it could be expected that this analytical expression is a useful tool for the prediction of the breakdown characteris-

tics of the PN junction terminated eld plate and in the optimum design of the eld plate in terms of the thickness and length. References
[1] B.J. Baliga, S.K. Ghandhi, Analytical solutions for the breakdown voltage of abrupt cylindrical and sphere junctions, Solid-State Electronics 19 (1976) 739744. [2] B.J. Baliga, Modern Power Devices, Wiley, New York, 1987. [3] Patrick V. O'Neil, Paul G. Alonas, Relation between oxide thickness and the breakdown voltage of a planar junction with eld relief electrode, IEEE Trans. on Electron Devices 26 (1979) 10101098. [4] F. Conti, M. Conti, Surface breakdown in silicon planar diodes equipped with eld plate, Solid-State Electronics 15 (1972) 93105. [5] A. Rusu, C. Bulucea, Deep-depletion breakdown voltage of silicon dioxide/silicon MOS capacitors, IEEE Trans. on Electron Devices 26 (1979) 202205. [6] C.B. Goud, K.N. Bhat, Two-dimensional analysis and design considerations of high-voltage planar junctions equipped with eld plate and guard ring, IEEE Trans. on Electron Devices 38 (1991) 14971504. [7] Jin He, Xing Zhang, Ru Huang, Yang Yuan Wang, An analytical model for the two-dimensional surface eld prole of the PN junction with eld plate termination, Chinese Journal of Semiconductors, 2001, No. 6. [8] S.K. Chung, D.C. Yoo, Y.I. Choi, An analytical method for twodimensional eld distribution of a MOS structure with a nite eld plate, IEEE Trans. on Electron Devices 42 (1995) 192194. [9] J.I. Kim, Y.I. Choi, et al., Analytical expressions for the three-dimensional effect of planar junctions, IEEE Trans. on Electron Devices 41 (1994) 16611665. [10] DESSIS-ISE. 6.0, Integrated System Engineering, 2000.