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CD4013BMS

December 1992

CMOS Dual ‘D’-Type Flip-Flop
Pinout
Q1 1 14 VDD 13 Q2 12 Q2 11 CLOCK 2 10 RESET 2 9 D2 8 SET 2

Features
• High-Voltage Type (20V Rating) • Set-Reset Capability • Static Flip-Flop Operation - Retains State Indefinitely With Clock Level Either “High” Or “Low” • Medium-Speed Operation - 16 MHz (typ.) Clock Toggle Rate at 10V • Standardized Symmetrical Output Characteristics • 100% Tested for Quiescent Current at 20V • Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC • Noise Margin (Over Full Package Temperature Range): - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V • 5V, 10V and 15V Parametric Ratings • Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices”

Q1 2 CLOCK 1 3 RESET 1 4 D1 5 SET 1 6 VSS 7

Functional Diagram
VDD 14 6 5 3 4 8 9 11 F/F2 12 13 F/F1 2 1

SET 1 D1 CLOCK 1

Q1 Q1

Applications
RESET 1

• Registers • Counters

SET 2 D2

Q2 Q2

• Control Circuits

CLOCK 2

Description
CD4013BMS consists of two identical, independent data type flip-flops. Each flip-flop has independent data, set, reset, and clock inputs and Q and Q outputs. These devices can be used for shift register applications, and, by connecting Q output to the data input, for counter and toggle applications. The logic level present at the D input is transferred to the Q output during the positive going transition of the clock pulse. Setting or resetting is independent of the clock and is accomplished by a high level on the set or reset line, respectively. The CD4013BMS is supplied in these 14 lead outline packages: Braze Seal DIP Frit Seal DIP Ceramic Flatpack H4Q H1B H3W

RESET 2

10

7 VSS

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

File Number

3080

7-62

2. .8 -1. . 2. .5V VDD = 10V. -55oC to +125oC Package Types D.5V to VDD +0. . . . . .5 11 1. . Derate Linearity at 12mW/oC to 200mW Device Dissipation per Output Transistor . . DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1 2 VDD = 18V. VOL < 0. +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +125oC -55oC +25oC. . θja θjc Ceramic DIP and FRIT Package . . 70oC/W 20oC/W o Maximum Package Power Dissipation (PD) at +125 C For TA = -55oC to +100oC (Package Type D. . . H Storage Temperature Range (TSTG) . No Load (Note 3) VDD = 5V. 100% testing being implemented. . .53 -1. . . Any One Input. . . 3 1. . VOUT = 13. VOL < 1. . .5V DC Input Current. -55oC -55oC -55oC o 14. . Limit is 0.5V. .5V. +175oC TABLE 1. +265oC At Distance 1/16 ± 1/32 Inch (1.4 3. . . No Load VDD = 15V. . . . . +125oC.5V VDD = 15V. +125oC. . . . 2. . . . VOUT = 0.5V VDD = 5V. . . . VOUT = 1. . . . . .7 VOH > VOL < VDD/2 VDD/2 3. . F. . . . . 7-63 . . +125oC. . 3 1. For accuracy. . . .5V VDD = 10V. .4V VDD = 10V. . . . .-0. VOUT = 0. . .Specifications CD4013BMS Absolute Maximum Ratings DC Supply Voltage Range. 3 1 1 1 1 1 1 1 1 1 7 7 8A 8B 1. . . . . VIN = VDD or GND Input Voltage Low (Note 2) Input Voltage High (Note 2) Input Voltage Low (Note 2) Input Voltage High (Note 2) VIL VIH VIL VIH VDD = 5V. . .53 1. . . .5V. -55oC +25oC. . VOUT = 2. . . . . . +125oC. 100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature . . . . . 2. . 2. Go/No Go test with limits applied to inputs 3. -65oC to +150oC Lead Temperature (During Soldering) . -0. . +125oC. LIMITS TEMPERATURE +25 C +125 oC o PARAMETER Supply Current SYMBOL IDD CONDITIONS (NOTE 1) VDD = 20V. . . .5V VDD = 15V.5 4 - V V V V NOTES: 1. . . . . . . VOH > 13.8 0.5 -0. . VIN = VDD or GND VDD = 18V. .8 UNITS µA µA µA nA nA nA nA nA nA mV V mA mA mA mA mA mA mA V V V -55o C +25 C +125oC -55oC +25oC +125oC -55oC +125oC. .5 -2. . . K) . . . (VDD) .7 2. . . . . VIN = VDD or GND Input Leakage Current IIL VIN = VDD or GND VDD = 20 3 1 2 VDD = 18V Input Leakage Current IIH VIN = VDD or GND VDD = 20 3 1 2 VDD = 18V Output Voltage Output Voltage Output Current (Sink) Output Current (Sink) Output Current (Sink) Output Current (Source) Output Current (Source) Output Current (Source) Output Current (Source) N Threshold Voltage P Threshold Voltage Functional VOL15 VOH15 IOL5 IOL10 IOL15 IOH5A IOH5B IOH10 IOH15 VNTH VPTH F VDD = 15V. . . 80oC/W 20oC/W Flatpack Package . VIN = VDD or GND VDD = 20V. 3 1. . . 3 1. . . VOL < 1. . . . . . 500mW For TA = +100oC to +125oC (Package Type D. . . .050V max. . . . . VIN = VDD or GND MIN -100 -1000 -100 - MAX 2 200 2 100 1000 100 50 -0. . VIN = VDD or GND VDD = 3V. .5V 3 1. . . . .5V VDD = 5V. +25oC. . 2. . . All Inputs . . VOH > 4. . . ISS = -10µA VSS = 0V. K. voltage is measured differentially to VDD. . . F. K) . . . VOUT = 9. . 2. . . . IDD = 10µA VDD = 2. VOL < 0. VOH > 13.±10mA Operating Temperature Range . -55oC +25oC. .4 -3. . .5V to +20V (Voltage Referenced to VSS Terminals) Input Voltage Range. . . F. . . VOUT = 4. 3 +25oC. VOH > 4. . .59mm ± 0. . . . . . . . . . . .6V VDD = 5V. . . . .95 0. -55oC +25oC.8V. All voltages referenced to device GND.5V. . . .79mm) from case for 10s Maximum Reliability Information Thermal Resistance . . . . .5V VDD = 15V. . . .5V VDD = 15V. . . .

-55oC +25oC. 11 VDD = 5V. No Load VDD = 10V. -55oC LIMITS MIN 3. VOUT = 9.5V 1. +25oC +125oC VDD = 15V. 100% testing being implemented. VOUT = 4. 2 +25oC. Reset to Q Propagation Delay Set to Q. VDD = 5V.5V 1.5V 1.6 -0. 2 1. -55oC and +125oC limits guaranteed. +125oC. CL = 50pF. -55oC +25oC. VIN = VDD or GND 9 10. 2 +125oC -55oC Output Current (Source) IOH5B VDD = 5V. -55oC +25oC. +25oC MIN 4.0 30 2. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL IDD CONDITIONS VDD = 5V. VOUT = 0. -55oC +125oC -55oC Output Current (Sink) IOL10 VDD = 10V. 2 TEMPERATURE -55oC.95 9.9 1.0 120 50 50 -0. 2 1.4 4. No Load VDD = 5V. VIN = VDD or GND 9 10. 2 1. 2 +125oC -55oC Output Current (Sink) IOL15 VDD = 15V. 2 -55oC. VOUT = 1. VOUT = 2.2 UNITS µA µA µA µA µA µA mV mV V V mA mA mA mA mA mA mA mA mA mA mA mA +125oC VDD = 10V. 2 1. +125oC. VIN = VDD or GND 1.15 -1.36 0.95 0. -55oC +25oC +125oC. No Load VDD = 10V. -55oC +25oC +125oC. 2) VDD = 5V. Q Maximum Clock Input Frequency NOTES: SYMBOL TPHL1 TPLH1 TPHL2 CONDITIONS (NOTE 1.Specifications CD4013BMS TABLE 2. TABLE 3.5/1. VIN = VDD or GND NOTES 1.64 -1. 11 TTHL TTLH FCL VDD = 5V. 11 VDD = 5V.5 3.5V 1. 2 +125oC -55oC Output Current (Source) IOH5A VDD = 5V. Q Propagation Delay Set to Q. 2 +125oC -55oC Output Current (Source) IOH10 VDD = 10V. +125oC.4V 1. 2 -55oC. +25oC +125oC Output Voltage Output Voltage Output Voltage Output Voltage Output Current (Sink) VOL VOL VOH VOH IOL5 VDD = 5V.35 MAX 300 405 400 540 300 405 200 270 UNITS ns ns ns ns ns ns ns ns MHz MHz PARAMETER Propagation Delay Clock to Q.0 60 2.9 -4. 11 TPLH2 VDD = 5V.36 -0. Reset to Q Transition Time Clock to Q. +125oC. No Load VDD = 5V. RL = 200K 2. VIN = VDD or GND 9 10. 11 +25oC +125oC. VIN = VDD or GND +25oC +125oC.6 2.64 0. VOUT = 0. VIN = VDD or GND 9 10.6V 1.2 MAX 1. 2 +125oC -55oC 7-64 . AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS TEMPERATURE 9 10. VIN = VDD or GND 1. -55oC 1. -55oC +25oC +125oC.

ISS = -10µA NOTES 1. 3 2. 2. 2. +125oC. 2. 3 1. 2 1. 3 1. 2. -55oC +25oC +25oC +25oC +25 C +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC o MIN +7 8 12 - MAX -2. 3 1. 2. 3 1. 4 TEMPERATURE +25oC +25oC MIN -2. 3 1. 3 1. TABLE 4. VOL < 1V VDD = 10V. The parameters listed on Table 3 are controlled via design or process and are not directly tested. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER Output Current (Source) SYMBOL IOH15 CONDITIONS VDD =15V. 3 2.8 MAX 7. 2. VIN = VDD or GND VDD = 10V. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current N Threshold Voltage SYMBOL IDD VNTH CONDITIONS VDD = 20V. 3 1. Q Maximum Clock Input Frequency Minimum Data Setup Time VIL VIH TPHL1 TPLH1 TPHL2 VDD = 10V.Specifications CD4013BMS TABLE 3. 3 2. 3 1.5 -0. 2.2 UNITS µA V CIN Any Input 1. +125oC. Q Propagation Delay Set to Q Reset to Q Propagation Delay Set to Q Reset to Q Transition Time Clock to Q.4 -4. VOH > 9V. 3 1. -55oC +25oC. 2. 3 1. 2. 2. 3 1. 3 1. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 2.2 3 130 90 170 120 130 90 100 80 40 20 15 140 60 40 180 80 50 7. 3 1. 2 +25oC.5 UNITS mA mA V V ns ns ns ns ns ns ns ns MHz MHz ns ns ns ns ns ns ns ns ns pF 7-65 . 2. VOL < 1V VDD = 10V VDD = 15V VDD = 10V VDD = 15V TPLH2 VDD = 10V VDD = 15V TTHL TTLH FCL VDD = 10V VDD = 15V VDD = 10V VDD = 15V TS VDD = 5V VDD = 10V VDD = 15V Minimum Clock Pulse Width TW VDD = 5V VDD = 10V VDD = 15V Minimum Set or Reset Pulse Width TW VDD = 5V VDD = 10V VDD = 15V Input Capacitance NOTES: 1. All voltages referenced to device GND. 4 1. RL = 200K. 2. 3 1. 3 1. 2 TEMPERATURE +125oC -55oC Input Voltage Low Input Voltage High Propagation Delay Clock to Q. 2. 2 1. 3 1. 2. VOH > 9V. 2.5V NOTES 1. TF < 20ns. 2. CL = 50pF. Input TR. VOUT = 13. 3.

9 POST-IRRAD Table 4 CONFORMANCE GROUPS Group E Subgroup 2 7-66 . VIN = VDD or GND VDD = 3V.2µA ± 20% x Pre-Test Reading ± 20% x Pre-Test Reading DELTA LIMIT TABLE 6. Cumulative for Static 1 and 2. 4 1. 8A. Deltas 1. 9 1. IOL5. ISS = -10µA VSS = 0V. 9 POST-IRRAD Table 4 READ AND RECORD PRE-IRRAD 1. IOH5A IDD. 3. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC PARAMETER Supply Current . 7. 8A. 9 1. 3. 4 1. 7. Deltas 1. 11 1. 8B. 2. 9. Deltas 2. 9 1. 8A. 11.35 x +25oC Limit UNITS V V V V ns NOTES: 1. 7. 3% Functional. 10. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER N Threshold Voltage Delta P Threshold Voltage P Threshold Voltage Delta Functional SYMBOL ∆VNTH VPTH ∆VPTH F CONDITIONS VDD = 10V. Input TR. 8B.8 ±1 VOL < VDD/2 1. 5% Parameteric. TF < 20ns. 3. IOL5. IOL5. 2. 4. 2. 9 1. All voltages referenced to device GND. See Table 2 for +25oC limit. 7. 7. 9 Subgroups 1. VIN = VDD or GND Propagation Delay Time TPHL TPLH VDD = 5V 1. TABLE 7. 11 IDD. 10. IOH5A READ AND RECORD IDD.Specifications CD4013BMS TABLE 4. 9. 3. 3. 10. CL = 50pF. IDD = 10µA VDD = 18V. 7.2 VOH > VDD/2 MAX ±1 2. 2. 7.MSI-1 Output Current (Sink) Output Current (Source) SYMBOL IDD IOL5 IOH5A ± 0. 10. RL = 200K. IOL5. 8A. 9. 4 +25oC NOTES 1. APPLICABLE SUBGROUPS CONFORMANCE GROUP Initial Test (Pre Burn-In) Interim Test 1 (Post Burn-In) Interim Test 2 (Post Burn-In) PDA (Note 1) Interim Test 3 (Post Burn-In) PDA (Note 1) Final Test Group A Group B Subgroup B-5 Subgroup B-6 Group D MIL-STD-883 METHOD 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 Sample 5005 Sample 5005 Sample 5005 Sample 5005 GROUP A SUBGROUPS 1. 11 1. Read and Record TABLE 5. 7. TOTAL DOSE IRRADIATION MIL-STD-883 METHOD 5005 TEST PRE-IRRAD 1. 2 3 Subgroups 1. 7. 3. 2. 9. 8B. 9 1. IDD = 10µA VSS = 0V. IOH5A NOTE: 1. 8B. 2. 4 1 TEMPERATURE +25oC +25oC +25oC +25oC MIN 0. 7. 9. IOH5A IDD. 3.

11 5.Specifications CD4013BMS TABLE 8. Subgroup 2.5V 50kHz 25kHz Logic Diagram *4(10) RESET CL p TG n CL CL p TG n CL MASTER SECTION CL p TG n CL CL p TG n CL Q 1(13) CL CL BUFFERED OUTPUTS Q 2(12) SLAVE SECTION *5(9) DATA *6(8) SET *3(11) CL 14 7 VDD VSS * All inputs are protected by CMOS protection network FIGURE 1. Each pin except VDD and GND will have a series resistor of 10K ± 5%. 12.5V 2. sample size is 4 dice/wafer. 14 1. 13 1. VDD = 18V ± 0. ONE OF TWO IDENTICAL FLIP-FLOPS TRUTH TABLE CL* D 0 1 X X X X X X X R 0 0 0 1 0 1 S 0 0 0 0 1 1 Q 0 1 Q 0 1 1 Q 1 0 Q 1 0 1 No Change Logic 0 = Low Logic 1 = High * = Level change X = Don’t care N(N) = FF1/FF2 terminal assignments 7-67 . Each pin except VDD and GND will have a series resistor of 47K ± 5%. 12. 6-8. 2. 2. 13 3. VDD = 10V ± 0. 0 failures. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION Static Burn-In 1 (Note 1) Static Burn-In 2 (Note 1) Dynamic BurnIn (Note 1) Irradiation (Note 2) NOTE: 1.5V OPEN 1. 13 GROUND 3-11 7 4. 8-11. 12. 12. 10 7 VDD 14 3-6. 8-11. 9 9V ± -0. 2. 2. 13 1. 14 14 3-6. Group E.

TYPICAL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS PROPAGATION DELAY TIME (tPHL. tPLH) (ns) AMBIENT TEMPERATURE (TA) = +25oC 250 250 200 SUPPLY VOLTAGE (VDD) = 5V 200 SUPPLY VOLTAGE (VDD) = 5V 150 150 10V 100 15V 50 100 10V 15V 50 0 20 40 60 80 100 LOAD CAPACITANCE (CL) (pF) 0 20 40 60 80 100 LOAD CAPACITANCE (CL) (pF) FIGURE 6. MINIMUM OUTPUT LOW (SINK) CURRENT CHARACTERISTICS DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V -5 0 0 -5 -10 -15 0 0 OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) -10V -20 -25 -10V -10 -15V -30 -15V -15 FIGURE 4.0 GATE-TO-SOURCE VOLTAGE (VGS) = 15V 12. tPLH) (ns) AMBIENT TEMPERATURE (TA) = +25oC FIGURE 5. TYPICAL PROPAGATION DELAY TIME vs LOAD CAPACITANCE (SET TO Q OR RESET TO Q) 7-68 .5 5. TYPICAL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V FIGURE 3.0 7.5 10.5 10V 10V 5V 0 5 10 15 5V 0 5 10 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE 2. CLOCK OR RESET TO Q) FIGURE 7. TYPICAL PROPAGATION DELAY TIME vs LOAD CAPACITANCE (CLOCK OR SET TO Q.0 2. MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS PROPAGATION DELAY TIME (tPHL.CD4013BMS Typical Performance Characteristics OUTPUT LOW (SINK) CURRENT (IOL) (mA) OUTPUT LOW (SINK) CURRENT (IOL) (mA) AMBIENT TEMPERATURE (TA) = +25oC AMBIENT TEMPERATURE (TA) = +25oC 30 25 20 15 10 5 GATE-TO-SOURCE VOLTAGE (VGS) = 15V 15.

0198 inches . TYPICAL POWER DISSIPATION vs FREQUENCY Chip Dimensions and Pad Layout CO N CT TA YO UR LO L CA S E AL S O FF IC E FO R Dimension in parenthesis are in millimeters and are derived from the basic inch dimensions as indicated.004 inches X 0. 0.004 inches MIN 0. TYPICAL MAXIMUM CLOCK FREQUENCY vs SUPPLY VOLTAGE FIGURE 9.15. tf = 5ns CL = 50pF 30 25 20 15 10 5 (Continued) 104 DISSIPATION PER DEVICE (PD) (µW) 8 6 4 2 CLOCK FREQUENCY (fCL) (MHz) 103 SUPPLY VOLTAGE (VDD) = 15V 10V 10V 5V CL = 50pF CL = 15pF AMBIENT TEMPERATURE (TA) = +25oC INPUT tr = tf = 20ns 8 6 4 2 102 8 6 4 2 10 8 6 4 2 0 5 10 15 SUPPLY VOLTAGE (VDD) (V) 20 1 102 2 4 6 8 103 2 104 105 106 INPUT FREQUENCY (ft) (HZ) 4 68 2 4 68 2 4 68 2 4 68 FIGURE 8. METALLIZATION: Thickness: 11kÅ − 14kÅ.0. Silane AL.CD4013BMS Typical Performance Characteristics AMBIENT TEMPERATURE (TA) = +25oC tr.0218 inches DIE THICKNESS: 7-69 .4kÅ . Grid graduations are in mils (10-3 inch).6kÅ. PASSIVATION: BOND PADS: 10.

the reader is cautioned to verify that data sheets are current before placing orders. Mail Stop 53-204 Melbourne.CD4013BMS All Intersil semiconductor products are manufactured. FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. However. Taiwan Limited 7F-6. assembled and tested under ISO9000 quality systems certification.2111 FAX: (32) 2. no responsibility is assumed by Intersil or its subsidiaries for its use.intersil. Box 883. Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029 File Number 70 . Belgium TEL: (32) 2.724. O. Information furnished by Intersil is believed to be accurate and reliable.05 ASIA Intersil (Taiwan) Ltd. Accordingly.22. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. 101 Fu Hsing North Road Taipei. see web site http://www. Rue de la Fusee 1130 Brussels. For information regarding Intersil Corporation and its products. nor for any infringements of patents or other rights of third parties which may result from its use. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. No. Intersil products are sold by description only.724.