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DC to DC Converter Basics

Course Objective: to enable FAEs to identify the customer's key power supply requirements and recommend the right power management product for the application. This course will teach the basics of linear, inductive, switched capacitor DC to DC converter products from Portable Power Systems perspective. It will not cover controllers, battery chargers, supervisors, LED drivers or products for specific purposes such as PMUs, LMUs, RF-PA drivers, CCFL drivers, TFT power supplies etc.

Course Map/Table of Contents


1. Course Navigation 1. 1.1 Course Navigation 2. Overview of DC-DC converters and topologies 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 2.1 DC to DC converter basics 2.2 DC to DC converters characteristics 2.3 Comparison of topologies 2.4 System requirements 2.5 Linear Regulator 2.6 The Inductive switcher 2.7 The Charge Pump Buck Regulator 2.8 Inductive Boost Regulator 2.9 The Charge Pump Boost Regulator 2.10 Chapter 1 Test

3. Bode Plots 1. 2. 3. 4. 5. 6. 7. 3.1 Feedback system 3.2 Poles and Zeros 3.3 Single pole and zero networks 3.4 Multiple poles and zeros 3.5 Stability Criterion 3.6 Application to output network of a linear regulator 3.7 Chapter 2 Test

4. Discrete Components 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 4.1 Transistors 4.2 Diodes 4.3 Inductors 4.4 Inductor characteristics 4.5 Shielded inductors 4.6 Capacitor construction 4.7 Capacitor size codes 4.8 Capacitance vs Frequency 4.9 Capacitance vs Temperature 4.10 Capacitance vs Voltage 4.11 Capacitance vs Voltage and Tempature 4.12 Chapter 3 Test

5. Linear Regulators 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 5.1 Linear regulator overview 5.2 LDO evolution 5.3 Drop out voltage 5.4 Ground current 5.5 LDO stability 5.6 Load regulation 5.7 Adaptive stabilization 5.8 Noise consideration 5.9 Thermal considerations 5.10 Shutdown 5.11 Selecting an LDO 5.12 Chapter 4 test

6. Inductive Buck Regulators 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 6.1 Switcher model 6.2 Switcher Analysis 6.3 Inductor selection analysis 6.4 Inductor Selection calculation 6.5 Inductor choice 6.6 Currents in various components 6.7 Capacitor selection analysis 6.8 Loss models 6.9 Low Iout load - DCM 6.10 Low Iout load - PFM and LDO modes 6.11 Transient response 6.12 Chapter 5 test

7. Charge Pump Regulators 1. 2. 3. 4. 5. 6. 7.1 Charge pump basics 7.2 Gain Matrix 7.3 Switched cap losses 7.4 Gain Hopping 7.5 SwCap Benefits 7.6 Chapter 6 test

8. Choosing the right regulator solutions

2. 3. 4. 5. 6.

7.2 Gain Matrix 7.3 Switched cap losses 7.4 Gain Hopping 7.5 SwCap Benefits 7.6 Chapter 6 test

8. Choosing the right regulator solutions 1. 2. 3. 4. 5. 6. 7. 8.1 Gather needs 8.2 Situation 1 8.3 Situation 2 8.4 Situation 3 8.5 Situation 4 8.6 An analytical approach 8.7 A word about the final test

Course Navigation
1.1 Course Navigation

Course Navigation
This course is organized like a book with multiple chapters. Each chapter may have one or more pages. The previous and next arrows move you forward and back through the course page by page.

The left navigation bar takes you to any chapter. It also contains the bookmarking buttons, 'save' and 'go to.' To save your place in a course, press the 'save' button. The next time you open the course, clicking on 'go to' will take you to the page you saved or bookmarked. The 'Go to Final Test' button on the left navigation bar takes you back to the Analog University course listing, where you started. Take the course final test by clicking on 'Test Yourself.' The top services bar contains additional information such as glossary of terms, who to go to for help with this subject and an FAQ. Clicking home on this bar will take you back to the course beginning. Don't miss the hints, references, exercises and quizzes which appear at the bottom of some pages.

Overview of DC-DC converters and topologies


This chapter will provide overview of the various topologies used in the DC to DC converter products from Portable Power Systems perspective. 2.1 DC to DC converter basics 2.2 DC to DC converters characteristics 2.3 Comparison of topologies 2.4 System requirements 2.5 Linear Regulator 2.6 The Inductive switcher 2.7 The Charge Pump Buck Regulator 2.8 Inductive Boost Regulator 2.9 The Charge Pump Boost Regulator 2.10 Chapter 1 Test

DC to DC converter basics
Every electronic system is designed to operate from a supply voltage, which is usually assumed to be constant. A voltage regulator provides this constant DC output voltage and contains circuitry that continuously holds the output voltage at the design value regardless of changes in load current or input voltage, assuming that the load current and input voltage are within the specified operating range for that regulator. In portable systems, the input voltage is often a battery, a DC voltage. DC to DC converter type regulators take such DC input voltage and produce the required output voltage which could be higher or lower than the input battery voltage. When the output voltage set point is less than the input voltage, such regulator is called a Buck converter. When the output voltage set point is higher, it is a Boost converter. A feedback input is necessary for the regulator to know the state of the output voltage so that it can be kept with in the tolerances required by the power supply design requirements. The converters control the output voltage to the specifications by comparing the output voltage (or current or both) to an internal reference.

In case of a Linear regulator the power is transferred continuously from Vin to Vout In case of a Switching regulator the power is transferred from Vin to Vout in bursts. There are two main types of the switching regulators - inductive and charge pump (capacitive). Not every electronic system needs a regulator. The electronics in a typical system can operate within a narrow band (5% or 10%) around their rated voltage. The battery output voltage declines as the battery discharges. To prolong the usable life of the system, one could use electronics that operate at voltages toward the low end of the battery discharge. But, then the fresh battery voltage would far exceed the upper tolerance of the electronics. If the electronics were to be chosen for the upper end of battery voltage, then the battery would soon discharge to the lower tolerance of the electronics. One way to address this issue is wider range electronics, but this could be an expensive proposition. Another way is to use a regulator. If the battery voltage range is narrow (e.g. from NiCd cells), a low-dropout linear regulator may be suitable to produce a regulated lower output voltage. If the system voltage is higher than the battery voltage range, or within the range, then a switching regulator in a boost or buck-boost configuration can be used.

DC to DC converters characteristics
Each regulator product is designed for certain output voltage and maximum load for a given input voltage range. It is important to know these system requirements before beginning to select a regulator product for the power supply design. Li-Ion Battery input over time

The ratio of output power (Vout*Iout) to input power (Vin*Iin) is called Efficiency of the converter. The chart below shows efficiency of an inductive buck regulator with PWM/PFM mode autoswitching. Such regulator and the modes will be covered later in this course. The change over time, of the output voltage and current as response to a change in the input voltage or load, is called the Transient response. Specifically, the response to input change is called line regulation and the response to load change is called load regulation.

Ideal regulator will have no change to the set output voltage. Some regulators will have a small ripple in the output voltage even at steady state when input voltage and output load is stable. This ripple is called steady state output noise. This ripple could be caused by coupling from other sources in the system e.g. ground or trace to trace coupling. It could also be caused by elements of design of the power supply itself. The switching regulators, by their very nature, have some ripple in their output even at steady state.

Comparison of topologies
Comparing the 3 alternatives side by side shows that the choice of topology and National product solution will depend on the power design priorities. The lowest cost solution will, most often, be the Linear regulators. However, this is not the most power efficient and could create local heating in case of high load applications. The higher the difference between Vin and Vout, worse the linear regulator efficiency. The inductor in the inductive (also known as Magnetic) switcher could consume a lot of board space but this is the most power efficient configuration. The charge pump (also known as switched capacitor) configuration provides smaller external components, and less of them, than the inductive switcher and better efficiency than the linear regulator. Comparison matrix: The matrix assumes same system requirements implemented with different option and not an optimized selection.

Linear, Inductive and Charge Pump configurations side by side:

To pass the test at the end of this chapter, study of the parametric table is essential.

For a list of available parts, use Product table at www.national.com and look under Power management.

Parametric Table of National Semiconductor products

System requirements
There are many devices in a portable electronic system with power needs that differ from one another. For example, analog i/o devices such as the display or audio amp may have a fixed voltage and current need, where as a processor or RF amp may need to dynamically scale the voltage and/or current provided to it. Further, a processor may have multiple voltages to support, for example, its core, i/o or integrated analog peripherals. Deep submicron design processors sometimes offer pins for reverse biasing the substrate to reduce current from leakage during quiescent condition. Following diagram shows an example cellular handset block diagram with examples of various types of regulators used. The Microprocessor, DSP core and i/o voltage levels are often much lower than the battery voltage. For achieving high efficiency, typically a switching regulator is used for supplying the processors.

For small voltage differences, Linear regulators are the simplest and least expensive solution. Switch mode regulators are often used when high efficiency is desired over a wide range of voltage/current situation such as LED backlighting, the processors and the RF power amplifier (PA).

Linear Regulator
A linear regulator can be represented as a variable resistor between the input and output. It can only provide a buck (or step down) function. It can not be used for boosting the output voltage above the input voltage. It requires the least external components, produces the least noise and costs the least due to its simplicity. However, it has the worst efficiency when the Vin to Vout difference is big. The linear regulator is a type of buck regulator. Vout can not be larger than Vin. The linear regulator functions like a variable resistor. This impedance is varied as the Iout load or the Vin input varies. The current through this resistor is same as the load, Iout. Additional power is required for sense and control circuits. For large Vin-Vout difference, the linear regulator has low efficiency.

Typical use - supply voltages close to input voltage e.g. 3V from a 3.3V rail. Also as a follow up, i.e. second stage, after a switcher. For example, provide 1.5V or 1.3V from a 1.8V generated by a switcher.
Over 1Billion Units of the LP3985 LDO have been shipped to date! The LP3985 is offered in the tiny SMD 5bump package measuring only 1 mm x 1.5 mm;

The Inductive switcher


The Inductive switcher is the most efficient topology. It is also known as Magnetic switcher. In the Inductive switcher the energy is pulsed from Vin to Vout through the inductor. The Inductor acts as a reservoir of energy during every pulse. As the voltage reaches the desired level, only the energy needed by the load needs to be drawn from Vin and transferred to Vout.

Typical use - Generate low supply voltage to a processor core (e.g. 1.5V, 1.8V, 2.5V) or i/o (2.5V, 3.3V) from the main supply rail such as 3.3V/5V rail or from the Battery (e.g. Li-Ion 2.7V-5.5V).

The Charge Pump Buck Regulator


The Charge Pump Switcher is also known as switched capacitor regulator. The charge from Vin is stored on a capacitor. Then this stored charge is transferred (switched) to the output. Since charge pump switchers produce discrete (integral and fractional) multiples of input voltage, fine granular regulation must be achieved with post regulation, typically a linear regulator inside the charge pump switcher device. This post regulation typically leads to worse efficiency than that of the inductive switchers. By creating multiple discrete gains and gain hopping among them helps newer charge pump switchers achieve better efficiencies. Charge pump buck regulators are used typically when space and cost are more important than efficiency but the large difference between input and output voltage suggests use of a switcher for better efficiency than the linear regulator.

Inductive Boost Regulator


This topology will be covered in further detail in a course on LED lighting since that is its predominant application. The Inductive switcher can also be used in the boost configuration to provide Vout > Vin. The typical use of this topology is to drive a series of white LEDs for backlighting. Each white LED requires 3-4V forward voltage to turn it on. Stringing LEDs allows matching the current, and hence the emitted light, through them. But, stringing means total drop is as much as 20V, which must be derived by boosting the available battery voltage.

The Charge Pump Boost Regulator


Like the Inductive switcher, the Charge Pump switcher can also be used to boost voltage so that Vout > Vin. Its typical use is also to drive white LEDs. This topology will be covered in further detail in the course on LED lighting. The charge pump boost is used for small boost (to ~5V) for parallel LED driver application. It is also used with external diodes and capacitors for supplying the positive and negative voltage supply for the row drivers (gate voltage) in the TFT panel power supplies.

Chapter 1 Test
This is a chapter review test only. To take this test, you will need to have reviewed the parametric table on National's website or have it in front of view. This is an "open book" test. Click next to go to the test.
To pass this test study of the parametric table is essential. Follow the net link below.

Parametric Table of National Semiconductor products

To pass this test study of the parametric table is essential. Follow the net link below.

Parametric Table of National Semiconductor products

Test for Chapter 1, Overview of DC to DC converters


Select the appropriate answer for each question or enter the answer in the blank provided. When you are done, click the button to submit your answers and find out your score.

1. Which of the following is NOT a linear regulator? A. LP3984 B. LM2931 C. LM2750 D. LP3990 1 Correct Answer: C 2. Which of the following IS an Inductive regulator ? A. LM3670 B. LM2750 C. LP3881 D. LM2770 2 Correct Answer: A 3. Which of the following IS a switched capacitor regulator ? A. LM2931 B. LM2770 C. LM3671 D. LP3971 3 Correct Answer: B 4. What is another name for an inductive regulator ? A. NPN regulator B. charge pump regulator C. Linear regulator D. Magnetic regulator 4 Correct Answer: D 5. What type of a regulator is typically used for powering a Digital baseband core and i/o ? A. Switched cap boost regulator B. Magnetic buck regulator C. Linear regulator D. Battery charger 5 Correct Answer: B 6. Which of the following topology is the least cost ? A. The linear regulator B. The inductive regulator C. The switched cap regulator D. The boost regulator 6 Correct Answer: A 7. When Vin to Vout difference and load currents are large, which of the following topology has the highest power efficiency ? A. The linear regulator B. The inductive regulator C. The switched cap regulator D. The charge pump regulator 7 Correct Answer: B 8. What is one of the main reasons for poorer efficiency of the charge pump regulators compared to inductive regulators ? A. The capacitors can be switched faster B. The charge pump granularity is too smooth C. The inductors can be switched faster D. The charge pump gain can only be discrete and finite 8 Correct Answer: D 9. Which of the following topology generates the most EMI noise ? A. The linear regulator B. The charge pump regulator C. The inductive regulator D. The switched capacitor regulator 9 Correct Answer: C 10. Which of the following topology generates the least output voltage ripple ? A. The linear regulator

C. The inductive regulator D. The switched capacitor regulator 9 Correct Answer: C 10. Which of the following topology generates the least output voltage ripple ? A. The linear regulator B. The charge pump regulator C. The inductive regulator D. The magnetic boost regulator 10 Correct Answer: A

Bode Plots
Regulators use feedback to monitor and control the output voltage. This chapter introduces Bode plots and provides an overview of how to analyze feedback system stability. 3.1 Feedback system 3.2 Poles and Zeros 3.3 Single pole and zero networks 3.4 Multiple poles and zeros 3.5 Stability Criterion 3.6 Application to output network of a linear regulator 3.7 Chapter 2 Test

Feedback system
Feedback provides means to alter the dynamic response of a system to the desired behavior. Consider the system in the diagram where G is the intrinsic response of the regulator and H is the response of the feedback and added compensation circuits. The product G*H is known as the loop gain.

The ratio of the controlled output (Vout or Iout in a regulator) to the reference input (Vin or Iin in a regulator) is called the closed loop gain, not be confused with the loop gain which does not include the loop closure. The closed loop gain is given by G/(1+G*H). The plot of the gain magnitude and phase over the frequency spectrum (plotted on logarithmic scale) is known as the Bode plot. The shape of such a Bode plot of the loop gain and the critical crossover points are useful in analyzing stability of a closed loop system. The summation where the loop closes can be thought as adding 180 degree phase shift since the signal amplified through the loop is being subtracted. If the loop gain itself has 180 degree phase shift, then the total phase shift is 360 degrees. In this case, the closed loop is essentially amplifying (and not reducing) the effect of incoming stimulus. This could make the system unstable! The gain shown on the Bode plot is 20 log L, where L is the closed loop gain and the logarithm is taken to the base 10. The units are dB (decibels). Because the base is 10, a gain ratio of 10 will result in 20dB difference. A ratio of 2 will result in roughly 6dB difference (log of 2 to base 10 is roughly 0.3010, times 20 is roughly 6). The frequencies are also plotted on a logarithmic scale and a ratio of 10 is known as a decade. A system whose gain decreases by a factor of 10 for every 10 fold increase in frequency will, thus, be said to have a 20dB/decade rolloff (decrease).

Gain ratio of 10 is a difference of 20dB, gain ratio of 20 means 26dB, gain ratio of 100 means 40dB

Poles and Zeros


If the system gain being plotted on a Bode plot were to be represented as an equation with numerator and denominator, then the roots of the numerator are called Zeros and the roots of the denominator are called Poles. The frequency located at the root of the pole or zero is called the crossover frequency. A single pole will lead to a 20dB/decade rolloff in gain starting at the crossover frequency and an S shaped change in phase of 90degrees over 2 decades centered at the cross over frequency.

A single zero will lead to a 20dB/decade increase in gain starting at the crossover frequency and an S shaped change in phase of 90degrees over 2 decades centered at the cross over frequency.

The links below provide additional information on Bode Plots. The first link has mathematical treatment and Matlab code.
Bode plot are used with what are called LTI - Linear Time Invariant systems. Response of a time variant system changes over time e.g. wearing out components may change their impedance. Response of nonlinear systems depend on the stimulus (input) itself e.g. Diode current vs voltage. Either of these systems can still be analyzed with Bode plots so long as they are broken down into piecewise linear systems and pieces analyzed separately.

Mathematical treatment of Bode Plots

Single pole and zero networks


A single pair made up of a resistor and a reactive element (capacitor or inductor) will lead to a single pole or zero. RC or LR = single pole, low pass, or lag network -20dB/dec -45deg/decade; -90deg max CR or RL = single zero, high pass, or lead network +20dB/dec, +90deg max The crossover frequency is given by 1/RC, or 1/LR. The ESR of a capacitor could create an inherent RC pair.

Multiple poles and zeros


Often the circuit has multiple resistors and capacitors which introduce higher (more than first) order to the numerator or the denominator of the loop gain. The resistance associated with the capacitor on Cout, the equivalent resistance of the load and the resistances in the feedback network can form such multiple pole, zero network. In addition, the inductor in a buck regulator, along with the output capacitor also introduces second order to the network. A single pair made up of capacitor and inductor will lead to a double pole or zero. Following figures show a simple double pole and a simple double zero. LC = double pole, low pass, lag network -40dB/dec, -90deg/dec; -180deg max LC = double zero, high pass, or lead network +40dB/dec, +180deg max

The second order system can be represented by an equation of the following nature:

The below plot shows different possible Bode plots resulting from a second order system. This system is critically damped when Q=0.707 i.e. no peaking. Increasing Q causes peaking of magnitude and increasing slope of phase. As the Q value decreases, the system becomes more stable but less responsive. As the Q value increases, the systems becomes more responsive but less stable.

Stability Criterion
As explained earlier, a feedback system could become unstable when the phase of the closed loop gain becomes 180 degrees while the gain is still positive. This becomes the stability criterion - that is, the phase margin must be less than 180 degrees at the frequency where the gain is positive. Conversely, the gain must be less than unity at a frequency where the phase of the system is 180 degrees. For systems with monotonically decreasing gain, the difference, between the actual phase and 180 degrees when the gain reaches unity, is known as the phase margin. On the Bode plot below, the phase margin is 80 degrees. The difference, between the actual gain (below unity) and 0dB (unity) when the phase reaches 180 degrees, is known as the gain margin.

Ironically, as the system approaches the stability limit, it gets more responsive. In control system terms, such systems are called underdamped systems. A regulator that is more responsive, and quick to react to an input voltage change or load change, is also closer to instability. This stability criterion will be referred again during the analysis of regulator products in subsequent chapters.
A well-designed FB control system will have:

Example of a book for Mathematical treatment of the system stability:

Modern Control Systems, 10th Edition, by Richard C. Dorf , University of California, Davis Robert H Bishop , University of Texas at Austin Prentice Hall Publisher ISBN number: 0-13-145733-0
Application to output network of a linear regulator
Consider the output stage of a linear regulator (which will be handled in further details in a subsequent chapter). The capacitor on the output, the output impedance of the error amplifier, the capacitance of the switching FET and the equivalent resistance of the load form a network with multiple poles and, possibly one zero.

Following plot shows just two poles, assuming the output capacitance has negligible equivalent resistance.

Following plot shows just two poles, assuming the output capacitance has negligible equivalent resistance.

Following plot shows just two poles and a single zero resulting from the equivalent resistance of the output capacitor.

Chapter 2 Test
This is a chapter review test only. To take this test, you will need to have reviewed Chapter 2. This is an "open book" test. Click next to go to the test.

Test for Chapter 2, Bode Plots


Select the appropriate answer for each question or enter the answer in the blank provided. When you are done, click the button to submit your answers and find out your score.

1. In a closed loop feedback system with G as forward gain and H as feedback gain, the LOOP GAIN is given by: A. GH B. G/(1+GH) C. G D. H 11 Correct Answer: A 2. In a closed loop feedback system with G as forward gain and H as feedback gain, the CLOSED LOOP GAIN is given by: A. G B. G/(1+GH) C. H D. GH 12 Correct Answer: B 3. A system where the gain decreases 100 times for every 10 times increase in frequency is known to have roll-off given by: A. 20 dB/decade B. 10 dB/decade C. 40 dB/decade D. None of the above 13 Correct Answer: C 4. In a system with only one pole, the least (most negative) phase angle value reached is:

B. 10 dB/decade C. 40 dB/decade D. None of the above 13 Correct Answer: C 4. In a system with only one pole, the least (most negative) phase angle value reached is: A. 0 degrees B. 180 degrees C. +90 degrees D. -90 degrees 14 Correct Answer: D 5. In a system with only two poles, at frequencies higher than both the poles, the gain changes at the rate of: A. 20 dB/decade B. 40 dB/decade C. 10 dB/decade D. None of the above 15 Correct Answer: B 6. In a system with two poles and a zero, where the zero frequency is between the two pole frequencies, the gain change between the zero and the upper pole is given by: A. 20 dB/decade B. 40 dB/decade C. 10 dB/decade D. None of the above 16 Correct Answer: D 7. In a system with two poles and a zero, where the zero frequency is between the two pole frequencies, the gain change between the lower pole and the zero is given by: A. 20 dB/decade B. 40 dB/decade C. 10 dB/decade D. None of the above 17 Correct Answer: A 8. In a system with multiple poles and zeros, the Q value where the system is critically damped, is given by: A. 50 B. 100 C. 0.707 D. 1 18 Correct Answer: C 9. In a system with multiple poles and zeros, the lower the Q value, the more the system is: A. stable and less responsive B. responsive and less stable C. unpredictable D. stable and responsive 19 Correct Answer: A 10. In order to improve the stability of a system with two poles separated a decade in frequency, it is necessary to: A. Insert a pole at a frequency between the two poles B. Insert a zero at a frequency higher than where the phase becomes 180degrees C. Insert a zero at a frequency lower than where phase becomes 180 degrees D. Insert a pole at a frequency higher than both the poles 20 Correct Answer: C

Discrete Components
Discrete components form an important part of the regulator design. The capacitor on the input provides charge storage. The inductor in an inductive buck regulator and the switched capacitors in a charge pump regulator store energy during gain phase that is released to the output during the load phase. It is important to understand the types of discrete components and their characteristics in order to choose the right components for the design. 4.1 Transistors 4.2 Diodes 4.3 Inductors 4.4 Inductor characteristics 4.5 Shielded inductors 4.6 Capacitor construction 4.7 Capacitor size codes 4.8 Capacitance vs Frequency 4.9 Capacitance vs Temperature 4.10 Capacitance vs Voltage 4.11 Capacitance vs Voltage and Tempature 4.12 Chapter 3 Test

4.10 Capacitance vs Voltage 4.11 Capacitance vs Voltage and Tempature 4.12 Chapter 3 Test

Transistors
Transistors are 3 terminal elements where the current and voltage across 2 of the terminals are controlled by either current in the third terminal (BJT base) or voltage on the third terminal (FET gate). Since this course does not deal with controllers, the treatment here will be limited to the characteristics of integrated transistor elements, particularly the MOSFETs. MOSFETS are used as a controlled impedance device of the linear regulators, as switches in the switching regulators and various other parts of the design of the regulators, but the focus below will be on the first two aspects. Following diagram shows the current-voltage relationship of a MOSFET.

When the drain to source voltage (Vds) is low, the MOSFET operates in the linear region, where the drain to source current is proportional to the drain to source voltage.

The controlled impedance device of some LDOs are MOSFETs operating in this region. The gate to source voltage and the ratio of the Length over the Width of the transistor determines the ON resistance (Rds-on) of the transistor. Other factors that determine Rds-on, such as the doping concentration, junction depth, carrier mobility etc, are process technology dependent. The minimum length is also dependent on the process technology used. The lowest Rds-on that can be achieved, then, is a trade-off between die area used to get the widest width economical. Also, bigger the device, larger the current (power not transferred to output) needed to drive it, and hence lower the efficiency. The other factor determining Rdson, ie the highest gate to source voltage, is limited by the voltage level at which the regulator is operating. The MOSFETs used as switches in regulators typically operate in on or off mode - full current, no current. This is achieved by operating the MOSFET in what are called as saturated mode and cut off mode. Saturated mode is where the MOSFET current varies only as a function of the gate to source voltage and does not vary much with Vds.The current, Ids, in this mode is a square function of the Vgs and also depends on the ratio of Width over Length of the MOSFET.

Economics (widest transistor feasible) determines the highest current that can be supported by the switch. Finally, the cutoff mode is where the current through the switch is zero. As can be seen from the above equation, as the gate to source voltage Vgs lowers below the threshold voltage Vth, the current drops to zero. This is called the cutoff mode.

Diodes
A diode is formed when a p-type semiconductor material is connected to an n-type semiconductor material forming a junction. The material used for the p and n type and the way the junction is formed, distinguishes the various types of diodes. Diodes are used in shunt regulators, as switch to ground in non-synchronous buck regulators and a switch to the pumped voltage in case of non-synchronous boost regulators. Synchronous regulators use transistors in place of diodes. Newer regulators are either synchronous or use internal diodes. Hence the treatment of diodes will be kept brief. A p-n semiconductor junction has built-in potential which must be overcome before current can flow.

For normally doped silicon, this built in potential, amounts to about 0.7V. Thus, the minimum voltage needed for current to flow in the forward direction (from p to n) is about 0.7V. Specially doped diodes called Schottky diode have low "forward voltage" of about 0.2V. In shunt regulators, diodes are used in reverse bias. The minimum voltage needed for current to flow in the reverse direction (from n to p) varies depending on the doping concentrations. For normally doped semiconductor diodes, the breakdown ranges from 6V to 100V. Very high doping levels result in lower breakdown voltages. Such diodes, called Zener diodes, are used for providing low reference voltage in shunt regulators.
LEDs are diodes where the hole-electron recombination energy is released in the form of light. Direct bandgap materials such as Ga-As, GaP, GaInP provide enough conduction band electrons to make efficient light emission possible. Silicon is indirect bandgap material and not very well suited for use in making LEDs.

Inductors
Inductors are formed by a wire wound around a ferromagnetic core. The type of core and the number of turns determines the inductor value. Other characteristics are also determined by how the turns are wound, the thickness (gauge) of the wire used, the physical size of the inductor etc.

Inductors
Inductors are formed by a wire wound around a ferromagnetic core. The type of core and the number of turns determines the inductor value. Other characteristics are also determined by how the turns are wound, the thickness (gauge) of the wire used, the physical size of the inductor etc. Inherent to any conducting wire is an element of resistance. Also, the insulating material added around the wire, to prevent short circuit from one turn of the coil to another, acts as a dielectric that adds capacitance between the turns. So, each inductor comes with an inherent resistance and capacitance. In addition, at higher frequencies, current tends to flow closer to the conductor surface, an effect known as the skin effect. Thus, the total impedance offered by an inductor varies with voltage and frequency applied to it. An example inductor impedance vs frequency graph is shown below.

Attached table shows an example of inductor specifications. In addition to the inductance value, tolerance and the physical size also listed are the DCR, SRF and Saturation current. Each of these will be now discussed.

Inductor characteristics
Besides inductance value, suppliers specify several other characteristics important for selecting an inductor to use in a regulator. Following table (clipped from a Coilcraft ap note - see link below) shows definitions of the terms used to specify an inductor.

These inductor characteristics are interdependent. The current through the inductor depends on the applied voltage (waveform and duty cycle) and the inductor impedance. But, the impedance depends on the DC resistance (DCR), the applied signal frequency, and the component temperature. As the current flows, due to core saturation and self heating the characteristics of the inductor changes. So, each of the characteristics are specified with a measurement method. It is advisable to use the inductor well below its rated specifications. Following graphs illustrate two of the effects described - inductance change with current and temperature.

impedance. But, the impedance depends on the DC resistance (DCR), the applied signal frequency, and the component temperature. As the current flows, due to core saturation and self heating the characteristics of the inductor changes. So, each of the characteristics are specified with a measurement method. It is advisable to use the inductor well below its rated specifications. Following graphs illustrate two of the effects described - inductance change with current and temperature.

Coilcraft Ap note on selecting inductors

Shielded inductors
Inductors are made by winding a wire around a ferromagnetic core. When current flows through the inductor, magnetic flux builds up in the core. If not properly shielded, this flux creates electromagnetic interference in circuits around the inductor. Following picture shows the difference between the construction of a shielded and an unshielded inductor (Pictures courtesy Panasonic)

Following pictures illustrate the difference between the magnetic flux from a shielded versus an unshielded inductor. (Pictures courtesy Coilcraft) Unshielded Inductor Flux:

Following pictures illustrate the difference between the magnetic flux from a shielded versus an unshielded inductor. (Pictures courtesy Coilcraft) Unshielded Inductor Flux:

Shielded Inductor Flux:

Capacitor construction
A Capacitor is two conducting parallel plates with a dielectric compound (insulator) between them. The type of dielectric distinguishes the various types of capacitors. Electrolytic capacitors are polar; their terminals are not reversible. Aluminum and Tantalum capacitors are a type of electrolytic capacitors. Ceramic capacitors are not electrolytic; their terminals are reversible. Electrolytic capacitors are more stable over voltage and temperature than the Ceramic capacitors but they have worse ESR. The capacitance value of an ideal capacitor is given by: , where C is the capacitance, A is the area of the two parallel plates, t is the distance between the parallel plates and e is the permittivity of the dielectric material between the parallel plates. Following picture shows the spread of capacitor technology, voltage rating, capacitor value and application spectrum (Source AVX). Also shown are the construction of an electrolytic (Source Kemet) and a ceramic (multilayer) capacitor (Source AVX).

Aluminum Electrolytic Low Cost Wide voltage ratings Wide capacitance ratings Higher ESL ESR increases in cold Tantalum Small size vs C High capacitance Low ESR (30-150mohm) Use caution on input Being replaced by niobium

Specialty Polymer Aluminum Very Low ESR (10-50mohm) High capacitance Small size Limited suppliers Ceramic X5R or X7R best temperature coefficient Lowest ESR (1-10mohm) Can generate audible noise in some applications DC Bias reduces capacitance Small size, Low cost

For additional information, visit the websites of suppliers listed under the net links.
Standard Tantalum capacitors use Tantalum powder for (positive) anode plate, Tantalum pentoxide (Ta2O5) as dielectric and Manganese dioxide (MnO2) as cathode (negative) plate.

Kemet capacitors AVX capacitors Murata capacitors Panasonic Capacitors

Capacitor size codes


The capacitor sizes are specified either in the EIA surface mount device (SMD) specifications, such as 0201, 3216 or the EIA capacitor size specifications such as Size A, B, C etc (typically used for Tantalum capacitors). The SMD specifications are a set of 2 numbers, each 2 digits and each specifying size in mils (one thousandths of an inch). So, a 1206 component would be 120mils by 60mils. Note that there is a metric version (EIAJ or JIS) of this spec where 1220 would mean 1.2mm by 2.0mm. Beware! The EIA capacitor codes (e.g A,B,C etc) are outlined in the below table.(source: Kemet). The numeric dimensions are in mm and the number after the "-" signifies the maximum height.

For each of the capacitor codes, the detailed physical dimensions for standard and low profile capacitors are shown below (Source: Kemet).

Capacitance vs Frequency
The sheet resistance of the conductive plates of the capacitor and the wires that link these conductive plates to the terminals of the capacitors lead to a parasitic resistance that is called the ESR (Equivalent Series Resistance). The termination loop of the terminal wires also lead to a small and often negligible parasitic inductance called the ESL (Equivalent Series Inductance). Thus, the total impedance of a capacitor varies over the frequency at which it is used. Following graph illustrates how characteristic of some capacitors vary over frequency.

Note in the below plot of actual capacitors, the ceramic capacitors have the lowest ESR.

Several factors affect the ESR: Thickness and material of the electrodes Area and aspect ratio of the electrodes Number of layers and parallel termination that form the electrodes Electrode surface flatness and metallization density Distributed resistance of the dielectric Frequency of operation

Several factors affect the ESR: Thickness and material of the electrodes Area and aspect ratio of the electrodes Number of layers and parallel termination that form the electrodes Electrode surface flatness and metallization density Distributed resistance of the dielectric Frequency of operation Below is a plot of ESR for various capacitors. Note that the ESR for ceramics can be as small as 1% of that of the Tantalum capacitors.

Following picture illustrates the distributed resistance in the construction of a Tantalum capacitor, leading to higher ESR.

Although the ESL is negligible in most capacitors, some of the same factors that affect ESR, also affect ESL: Area and aspect ratio of the electrodes Number of layers and parallel termination that form the electrodes Cover layer thickness Case size

Capacitance vs Temperature
Dielectrics vary in their response to the temperature and voltage. EIA created classifications of material called Class I and Class II and further nomenclature for the amount of variation in the Class II dielectrics. Due to the inherent ESR, the capacitor self heats during operation raising its temperature. The capacitance value chosen to be used in the application must include this potential change over the temperature. The variation in the Class I materials is specified in ppm (parts per million). It is typically less than 3000ppm (< 0.3%), so it will be ignored in this discussion. EIA

Capacitance vs Temperature
Dielectrics vary in their response to the temperature and voltage. EIA created classifications of material called Class I and Class II and further nomenclature for the amount of variation in the Class II dielectrics. Due to the inherent ESR, the capacitor self heats during operation raising its temperature. The capacitance value chosen to be used in the application must include this potential change over the temperature. The variation in the Class I materials is specified in ppm (parts per million). It is typically less than 3000ppm (< 0.3%), so it will be ignored in this discussion. EIA standard EIA-198-D specifies a 3digit code to name classI and classII materials. See the netlink for the details of classI naming. One particular noteworthy classI type is C0G (C stands for 0, 0 often confused as letter O is multiplier of 0 and G stands for +/- 30ppm). This type is also called NPO (negative positive zero, meaning zero change for either positive or negative change in temperature). EIA standard The table below lists codes used for Class II materials, more commonly seen.

ClassII materials typically have high dielectric constant and, therefore, are volumetrically more efficient. That is, higher capacitance for smaller size! That makes them worthwhile to use in spite of this temperature dependency. Following figure shows (source Milestone Global Technology) capacitance variation of 3 classes of ClassII dielectrics over commonly used temperature range. Some times, National Semiconductor datasheets specifically warn against using one or the other of these classII material based capacitors. For additional discussion on the topic of temperature variation of dielectrics see the net links below.

Classifying dielectrics for Temp coeff EIA-198-D standard for class materials in section 2

Capacitance vs Voltage
ClassII dielectric materials also change their capacitance value over time and with applied DC voltage, AC voltage. The effect over time is called aging and tends to lower the capacitance. The application of DC voltage tends to lower the capacitance, whereas the application of AC voltage (within a small signal range) tends to increase the capacitance. The plots below show representative effects of age, DC voltage and AC voltage taken from an AVX X7R capacitor datasheet. The capacitance value for use in a regulator must be chosen to take into account all of these effects. ClassII materials typically have high dielectric constant and, therefore, are volumetrically more efficient. That is, higher capacitance for smaller size! That makes them worthwhile to use in spite of this voltage dependency.

The plot below, of capacitance values vs temperature and DC bias, was made from data taken at National Semiconductor. Note that a 10uF rated capacitor could measure as little as 3.5uF at low temperature and with 1.8V DC bias!

Capacitance vs Voltage and Tempature


Finally presenting some vendor data on voltage and temperature effects together. The first plot was provided by TDK, the second one is from AVX. Note that the classI materials exhibit negligible temperature and DC bias effects. The class II materials exhibit significant effects and could yield capacitance values as little as 25-30% of the rated value. Beware of how the capacitance is specified and how it is used!

Chapter 3 Test
This is a chapter review test only. To take this test, you will need to have reviewed Chapter 3. This is an "open book" test. Click next to go to the test.

Chapter 3 Test
Select the appropriate answer for each question or enter the answer in the blank provided. When you are done, click the button to submit your answers and find out your score.

1. What can reduce the Rdson of a MOSFET in the linear region ? A. Increasing the MOSFET gate to source voltage B. Increasing the Width of the MOSFET C. either of the above D. none of the above 21 Correct Answer: C 2. What can increase the current of a MOSFET in the saturation region ? A. Increasing the MOSFET gate to source voltage B. Increasing the Length of the MOSFET C. either of the above D. none of the above 22 Correct Answer: A 3. What is the magnitude of the reverse breakdown voltage for a lightly doped silicon diode ? A. 0.2V B. 0.7V C. 3V D. 8V 23 Correct Answer: D 4. At very high frequencies, what is relation of the impedance of an inductance versus frequency A. logsquare increase versus the log of frequency B. loglinear increase versus the log of frequency C. flat versus the frequency D. loglinear decrease versus the log of the frequency 24 Correct Answer: B 5. In the inductor specifications, what is the meaning of Isat ? A. The current at which the inductor core saturates B. The current at which the inductor heats beyond rated temperature C. either of the above D. neither of the above 25 Correct Answer: A 6. What should be done to reduce EMI due to magnetic flux from the inductor ? A. Add a capacitor in parallel B. Add a magnetic shield C. Use a nonmagnetic core D. Use insulated wire in the winding 26 Correct Answer: B 7. Which of the following type of capacitors has the lowest ESR ? A. Aluminum Electrolytic B. Specialty Polymer C. Multi-Layered Ceramic Capacitor (MLCC) D. Tantalum 27 Correct Answer: C 8. Which of the following designates a 2.0mm x 1.3mm x 1.2 mm body size capacitor ? A. Code T B. Code U C. 1220-12 D. 2012-12 28 Correct Answer: D 9. How can capacitor impedance vs frequency curve provide ESR value ? A. It is the impedance at the minimum point of the curve B. It is the asymptotic value of impedance at low frequencies C. It is the asymptotic value of impedance at high frequencies D. It can't be derived from the impedance vs frequency curve 29 Correct Answer: A

9. How can capacitor impedance vs frequency curve provide ESR value ? A. It is the impedance at the minimum point of the curve B. It is the asymptotic value of impedance at low frequencies C. It is the asymptotic value of impedance at high frequencies D. It can't be derived from the impedance vs frequency curve 29 Correct Answer: A 10. Which of the following capacitor types is best suited as Cout for a 2MHz switching inductive buck regulator whose temp specs are -55C to 125C ? A. X5R B. Y5V C. X7R D. NPO 30 Correct Answer: C 11. What type of diode do shunt regulators use ? A. Schottky B. Zener C. Either of the above D. None of the above 31 Correct Answer: B 12. What is the meaning of Irms of an inductor ? A. Current level at which the core saturates B. Current at which the inductance drops to half the rated value C. RMS current value of the saturation current D. Current level that causes maximum allowable temperature rise 32 Correct Answer: D 13. What is the meaning of DCR of an inductor ? A. Dynamic Current Rating B. Dynamic Component of the Resistance C. Static (or D.C.) resistance D. None of the above 33 Correct Answer: C 14. What is the drawback of using ceramic capacitors ? A. Capacitance varies with DC bias and temperature B. Reverse polarity can not be used C. ESR is higher than other types D. Ceramic capacitors can be found in small sizes 34 Correct Answer: A 15. Class I materials (capacitor dielectrics) are also called: A. NPO B. COG C. either of the above D. None of the above 35 Correct Answer: C

Linear Regulators
This chapter discusses linear regulators in further detail. Concept of stability is discussed with the use of Bode plots. Additional topics include Line and load regulation, noise sources, shutdown and selection of external components in the design. Most of the treatment will be for CMOS Low Drop Out regulators with only an introduction to other type of linear regulators such as NPN, PNP and discrete regulators. 5.1 Linear regulator overview 5.2 LDO evolution 5.3 Drop out voltage 5.4 Ground current 5.5 LDO stability 5.6 Load regulation 5.7 Adaptive stabilization 5.8 Noise consideration 5.9 Thermal considerations 5.10 Shutdown 5.11 Selecting an LDO 5.12 Chapter 4 test

Linear regulator overview


The linear voltage regulator behaves as a variable resistance between the input and the output. One of the limitations to the efficiency of this circuit is due to the fact that the linear device must drop the difference in voltage between the input and output. The power dissipated by the linear device is (Vi-Vo) x Io. This leads to poor efficiency when the difference between Vi and Vo is large. On the other hand, the linear regulators have many desirable characteristics, such as simplicity, low output ripple, excellent line and load regulation, fast response time to load or line changes and low EMI.

Linear regulator overview


The linear voltage regulator behaves as a variable resistance between the input and the output. One of the limitations to the efficiency of this circuit is due to the fact that the linear device must drop the difference in voltage between the input and output. The power dissipated by the linear device is (Vi-Vo) x Io. This leads to poor efficiency when the difference between Vi and Vo is large. On the other hand, the linear regulators have many desirable characteristics, such as simplicity, low output ripple, excellent line and load regulation, fast response time to load or line changes and low EMI.

LDO evolution
Early linear regulators used Zener diodes and simple discrete circuits for implementing the regulator. Modern regulators use feedback and compensation networks to provide for the efficiency, stability and low noise demanded by the applications.

Drop out voltage


Drop out voltage is the minimum difference between unregulated input voltage and the regulated output voltage for which the regulator will operate within specifications. Some datasheets specify the Vout at which the Drop Out Voltage is measured. For example, one datasheet footnote states that the dropout voltage is the difference between Vin and Vout, at which Vout drops 100mV below its nominal value.

Linear regulators can be used with bipolar or MOS transistors. Following figure shows four common configurations and their drop out voltages. For linear regulators using MOS transistors, the drop out voltage is proportional to the Rdson and the operating current. Further, the Rdson depends on the length and width of the transistor and the operating voltage. Larger the width and higher the operating voltage, lower the Rdson. However, using bigger transistors is less economical due to bigger die area needed.

Although the bipolar linear regulators have higher drop out voltages, they can support higher (>7V) input voltages and have better transient response than their MOS counterparts. On the other hand, linear regulators using MOS devices can support very low dropouts, low quiescent current, improved noise performance and low power supply rejection.

Ground current
The component of the current from the input that does not go to the load is the component that is used by the linear regulator itself. This current is called the ground current, because it flows to the ground, instead of the load. It is usually a very small fraction of the load current.

At high load currents, the power loss through the series power regulating device is the largest contributor to the low efficiency of the linear regulator while the ground current is a significant contributor at quiescent (no load) condition.

The ground current is also a function of the input voltage.

LDO stability
Following figures show external components connected to an LDO and a model including the internal circuits of the LDO.

If the ESR of the Cout is ignored, the loop gain has 3 poles: an internal pole from the error amplifier (P1), a pole from the load resistor and capacitor (P2) and a distant pole from the switching series power transistor (Ppwr). The third pole is usually quite high compared to the other two and ignored in the analysis. By themselves, the two poles P1 and P2, lend the loop unstable as the phase goes below 180 before the gain goes to unity. However, the ESR of the Cout adds a zero usually between P1 and P2. This corrects the phase and the loop is stable. As we noticed in the previous chapter, Ceramic capacitors have negligible ESRs but Tantalum capacitors don't. LDOs designed to be stable with ceramic capacitors, add the needed Zero internally.

The LP298x family was the first to be stable with ceramic capacitors.

Load regulation
There is a direct correlation between the transient performance and ground current or efficiency. The more the current available to the loop, faster the internal capacitive nodes can be charged and discharged and hence faster the response. However, the faster the response, the more risk there is of overshoot on the output of the LDO and less stability. The picture below shows response to a load change. Note that the LDO may be able to keep the output voltage within tolerance (output tolerance) but may not be the same absolute voltage at different load conditions. Load regulation is defined as the change in the output voltage driven by a change in the load current. It is specified in terms of % error (change over nominal) over load current step (e.g. %/mA)

The startup time, or initial load response, is critical in high performance systems that desire quick on time. A Linear regulator is said to be ON when it has reached 95 % of the required output. The startup time is effected by the gain bandwidth of the loop, amount of output current required and dropout voltage. The way to make the startup time fast is to turn on the pass transistor as quickly as possible. Since the drive of this pass transistor is output of the error amp (see figure below), the bandgap reference voltage must startup quickly. This faster startup of the bandgap introduces risk of overshoot on the output of the LDO.

To minimize the overshoot a capacitor can be applied to the Bandgap, this reduces noise but reduces the speed of the Bandgap reference. This technique of adding capacitor to the bandgap is particularly used on LDOs that support RF PAs. For LDOs that support digital circuits such as processors, generally noise cap is not used.

To minimize the overshoot a capacitor can be applied to the Bandgap, this reduces noise but reduces the speed of the Bandgap reference. This technique of adding capacitor to the bandgap is particularly used on LDOs that support RF PAs. For LDOs that support digital circuits such as processors, generally noise cap is not used.

Adaptive stabilization
Stability can be improved by adding load sensing and adding internal zero compensation. By sensing the load and using a zero compensation network, a zero can be placed directly on top of P2, thereby effectively eliminating it.

The zero will track up and down in frequency to follow P2 as the load changes. This only works if the load capacitance, and therefore the frequency of P2 at any given load, is known. Now the only thing which can affect stability is the higher frequency poles which are not shown on the diagram. If the ESR of the capacitor is increased too much, then the bandwidth will increase as the zero will move to below the unity gain frequency. Otherwise these high frequency poles should not cause problems.

Noise consideration
Output noise is a indicator of the interference generated by internal circuits. The main culprit is the reference voltage generator, the bandgap circuit. Noise is specified in uV/sqrt of Hz. See graph below:

Placing a capacitor on the output of the bandgap helps in reducing the noise.

In some LDOs, instead of an external bypass there is an internal filter circuit removing the need for an external bypass capacitance.

Often the input supply to an LDO comes from the output of a switching regulator or other voltage rail generator such as a battery charger. Such output has ripple voltage. The ability of an LDO to reject such ripple and provide a smoother output is called PSRR (Power Supply Rejection Ratio). Regulators with lower drop out voltage also tend to pass on more ripple and, therefore, have worse PSRR.

Thermal considerations
For Linear regulators that support high power, a large load and/or a large dropout voltage, there can be substantial amount of heat generated due to the losses inherent to the regulator. The rise in the silicon junction temperatures, due to the power consumption is given by the following equation:
where Theta ja is the thermal resistance of the package, Ta is the Ambient temperature and Tj is the temperature at the silicon junction.

Most silicon based products are designed to operate reliably under a certain maximum junction temperature. Beyond this junction temperature, reliable operation is not guaranteed; Even permanent physical damage is possible. Proper selection of package, derating load power consumption and/or proper system ventilation design is essential. To Choose the proper package, one must calculate the maximum Theat ja allowable. The equation above can be rewritten as: For an LDO, the power consumption is given by: Then, given ambient temperature and maximum tolerable junction temperature from the product data sheet, maximum Theta ja is given by: If the required linear regulator is not available in the package with the necessary Thetaja, system redesign is necessary, including power derating, proper ventilation etc.
You will need to know about the Theta ja information from the power selection guide to pass test for this chapter.

You will need to know about the Theta ja information from the power selection guide to pass test for this chapter.

Shutdown
Because LDO power consumption is directly proportional to the load current, LDOs that support large loads tend to get hot from the internal power dissipation. Proper thermal spreading in the application board must be considered to avoid overheating. To prevent irreversible damage, LDOs have built in thermal shutdown.

Thermal shutdown:
The temperature at which a given linear regulator device will go into thermal shutdown is specified in its datasheet (typical parameter name TSD, common value 160deg C). Shutdown is accomplished by switching the series power transistor to OFF. The temperature drop at which the device will turn back ON is also specified in the datasheet as thermal shutdown hysteresis (common value 20deg C). If the output of the linear regulator is shorted or overloaded, the regulator will supply a maximum of short circuit current limit (specified in the datasheet). If the regulator is not provided with proper heat transport, it will soon overheat and reach the thermal shutdown limit. The device will cycle between ON and OFF until the condition causing the current limit and/or heat issue is/are removed.

Active shutdown:
For large loads, the output load capacitance, either inherent or added on the application board can be quite large. During active load condition, the charge stored on this capacitor can be quite large, as well. When the power is shut off, this charge can take quite long time to dissipate. To speed up power shut off, some LDOs have active shutdown to drain the output load even after the series regulated device shuts off and output is no longer being provided power from the input.

Selecting an LDO
LDOs are the best regulator when the difference between input and output is small or load (Iout) is low or the efficiency is a secondary concern compared to the output noise, ripple, cost and solution size. Below is a summary of LDO characteristics and suggestions for selection on an LDO. Besides the input and output voltage and the physical size, the table below lists a few of LDO characteristics and applications best suited.

Other specs studied through out this chapter may be also needed for making a final product selection. These specs include, for example, the PSRR, package (for ThetaJa), current limit and thermal shutdown temperature. The datasheets of the individual products must be referred for these specs.

Application note AN1148


AN-1148: Application Note 1148 Linear Regulators: Theory of Operation and Compensation http://www.national.com/an/AN/AN-1148.pdf

Chapter 4 test
This is a chapter review test only. To take this test, you will need to have reviewed Chapter 4, have studied the parametric table (or Power Selection Guide) section on the linear regulators (or have them in front of you) and selected datasheets as called out in the questions. This is an "open book" test. Click next to go to the test.

Chapter 4 test
Select the appropriate answer for each question or enter the answer in the blank provided. When you are done, click the button to submit your answers and find out your score.

1. For use with an RF products such as LNA, PLL, TCXO, which of the following LDO is most suitable ? Hint: download datasheets and look up PSRR and Output Noise (calculate in case of LM1084) A. LM1084-3.3 B. LP3995-2.5 C. LP3892 D. LP3928 36 Correct Answer: B 2. What is the efficiency of an LDO with the following characteristics: Vout = 1.8V, Vin = 2.5V, Iout = 50mA, Ignd = 100uA, uSMD5 package ? A. 72.0 B. 60.0 C. 99.9 D. 71.9 37 Correct Answer: D 3. Which of the following linear regulators has the least drop out voltage ? A. NPN regulator B. Quasi LDO C. PNP LDO D. CMOS LDO 38 Correct Answer: D 4. What is the most likely reason for an LDO to not be stable with ceramic capacitor on Vout ? A. The LDO is designed to use internal stabilization B. The LDO is designed to use built in capacitors C. The LDO is designed to use Tantalum capacitor on Vout D. The LDO is designed with CMOS FETs. 39 Correct Answer: C 5. At what ambient temperature will the LDO under following conditions reach Thermal shutdown : uSMD5 package with ThetaJa = 255 degC/Watt, Vout = 1.8V, Iout = 100mA, Vin = 2.5V, Thermal shutdown temp = 160C ? A. 178C B. 143C C. 97C D. 115C 40 Correct Answer: B 6. Why is a capacitor needed on the bypass pin of an LDO ? A. To stabilize the LDO B. To provide additional pole C. To reduce the noise D. To speed up the LDO 41 Correct Answer: C 7. What is adaptive stabilization ?

A. To stabilize the LDO B. To provide additional pole C. To reduce the noise D. To speed up the LDO 41 Correct Answer: C 7. What is adaptive stabilization ? A. Adjusting feedback based on sensing load current B. Adding poles based on output voltage C. Adding zeros based on the output voltage D. Adjusting feedback based on sensing output voltage 42 Correct Answer: A 8. When is low (more negative or higher absolute magnitude PSRR critical ? A. When the input comes from a Lithium Ion battery B. When the input voltage has a lot of ripple C. When the output needs to support digital processors D. When the output load is nonlinear 43 Correct Answer: B 9. What is active shutdown ? A. Quick drain of input capacitor B. Quick shutdown of the pass transistor C. Quick drain of output capacitor D. Quick thermal shutdown 44 Correct Answer: C 10. Which of the following is best suited for analog baseband ? Hint: Use Parametric Table to look up Iq and Dropout Voltage; Download datasheets for PSRR. A. LP3892 B. LP3928 C. LP3963 D. LP3990 45 Correct Answer: D 11. For an LDO with Iq negligible compared to Iout, the efficiency can be written as: A. Vout / Vin B. 100 % C. Vin / Vout D. Can not be determined without additional information 46 Correct Answer: A 12. Which type of diode was used in early linear regulators ? A. Zener B. MOS C. Schottky D. None 47 Correct Answer: A 13. In a series regulator using a bipolar transistor as the series element, which of the following describes the difference between the Vin and the Vout ? A. Vce B. Vcb C. Vceo D. Vbe 48 Correct Answer: A 14. How is the drop out voltage defined ? Hint: see notes in the electrical characteristics section of the datasheets for the LP3981, LP3990 and the LP3883. A. Vout - Vin at which Vout drops 500mV below its nominal value B. Minimum Vout - Vin required to maintain Vout within 2% of its nominal value C. Maximum Vout - Vin at which the regulator will operate within specifications D. None of the above 49 Correct Answer: B 15. For an LDO, what is the ground current Ignd ? A. The component of the current from the input that goes to the load B. The short circuit current from the input that goes to ground C. The component of the current from the input that does not go to the load D. None of the above 50 Correct Answer: C 16. What is the relationship of Ignd to LDO efficiency ? A. Higher contribution at maximum load current B. Higher contribution at lower temperatures C. Lower contribution at higher temperatures D. Higher contribution at lower load current 51 Correct Answer: D 17. What is load regulation of an LDO ? A. Change in the load current for change in the output voltage

C. Lower contribution at higher temperatures D. Higher contribution at lower load current 51 Correct Answer: D 17. What is load regulation of an LDO ? A. Change in the load current for change in the output voltage B. Change in the load current for change in the input voltage C. Change in the output voltage for change in the input voltage D. Change in the output voltage for change in the load current 52 Correct Answer: D 18. Which of the following slows down the response of an LDO to a load step ? A. Large band gap reference output voltage B. Large value output capacitor C. Large drive to the pass transistor inside the LDO D. Large pass transistor inside the LDO 53 Correct Answer: B 19. Why is calculating junction temperature important ? A. At elevated junction temperature, the LDO ground current increases B. At low junction temperatures, the LDO is faster to start up C. At elevated junction temperature, reliable operation is not guaranteed D. Ambient temperature affects the junction temperature 54 Correct Answer: C 20. What is thermal shutdown of an LDO ? A. At junction temperature beyond the rated value, the pass transistor is shut off B. At junction temperature beyond the hysterisis value, the pass transistor is shut off C. At junction temperature beyond the rated value, the output is drained to ground D. None of the above 55 Correct Answer: A

Inductive Buck Regulators


This chapter discusses inductive buck regulators in further detail. The discussion is limited to integrated FET synchronous regulators. Except for a brief coverage, the discussion is also limited to devices with integrated compensation networks. The chapter starts with the analysis of the switching operation. Then selection of inductors, input and output capacitors is discussed. Loss models, light loads, various modes of operation for light loads and efficiency are discussed. Finally, transient response, stability and external compensation is discussed. 6.1 Switcher model 6.2 Switcher Analysis 6.3 Inductor selection analysis 6.4 Inductor Selection calculation 6.5 Inductor choice 6.6 Currents in various components 6.7 Capacitor selection analysis 6.8 Loss models 6.9 Low Iout load - DCM 6.10 Low Iout load - PFM and LDO modes 6.11 Transient response 6.12 Chapter 5 test

Switcher model
The diagram below shows model of an inductive buck regulator. The switch is thrown alternatively between position 1 and 2. When the switch is in position 1, the inductor and the output load get energy from the input Vg. When the switch is in position 2, the inductor releases the stored energy to the output, while the input capacitor continues to get energy from the input source.

Shown below is the same model but separated in the two states of the switch. When the switch is in position 1:

Shown below is the same model but separated in the two states of the switch. When the switch is in position 1:

When the switch is in position 2:

Assuming, then, that output voltage is nearly constant (small ripple approximation), the current through the inductor increases with a constant slope. Similarly, when the switch is in position 2, the inductor current decreases with a constant slope.

Switcher Analysis
The DC value of the inductor current is the same as the output current. The output voltage is equal to the duty cycle times the input voltage. Since the average current through the capacitor must be zero, the average current through the inductor is equal to the load current. The inductor saturation current must be higher than the load current.

Since the average voltage across the inductor must be zero, the output voltage is proportional to DVg, where D is the switch duty cycle.

Inductor selection analysis


Recalling from the analysis of switch in position 1, the inductor charging equation is:

The increasing part of the inductor current can be written as:

(change in iL) = (slope) (length of subinterval)


Or:

Using, Ts=1/fs and reorganizing terms, the above equation can be rewritten as

The decreasing part of the inductor current can be written as:

Both the equations represent the same value. After substituting, V=D*Vg, and recognizing that to get minimum ripple, the maximum values of fs and Vg (or Vin) must be used, the equation can be rewritten as:

Inductor Selection calculation


Using the analysis of the previous page and a sample regulator specification, an inductor value will now be calculated. Consider the buck regulator product specifications shown below:

Using the analysis of the previous page and a sample regulator specification, an inductor value will now be calculated. Consider the buck regulator product specifications shown below:

So as to not exceed the switch current limit, the maximum allowable Iout plus one half of the ripple current together can not exceed the minimum specified switch current limit. Typically the ripple current is allowed to be 20%-50% of Iout. If total ripple current is 40% of Iout, then the maximum current value reached is 1.2*Iout. Since this maximum current value can not exceed the minimum specified switch current limit, the maximum Iout gets limited to Ilim-min divided by 1.2. Using the specification table above and maxium ripple current of 40%, the maximum allowable Iout is 830mA/1.2, or roughly 690mA. To keep some safety margin, the maximum Iout allowable is chosen to be 600mA for the following calculation. This means that the total ripple current, 40% of Iout, is 240mA. Plugging relevant values from the table above and this ripple current, into the inductor selection equation from the previous page in this chapter, the inductor value selected would be roughly 3.15uH as shown below.

The inductor supplier specifies 20% tolerance of the inductor. Sometimes it may be 10% or 30%, check the supplier specs. If the above calculated value is to be the low end of that 20% tolerance (i.e. 80% of typical), then the typical value would be 1.25 times higher (see graphics below). For the above example, this value would be 3.94uH. The nearest standard value inductor is 4.7uH. The next page will show how to select a specific component from one of the inductor suppliers, taking into account some of the other key inductor characteristics.

Inductor choice
In selecting a specific inductor from a supplier, the following must be considered: the physical dimensions based on system space limitations, the value as calculated on previous page, the maximum current the inductor will carry versus the inductor's current rating, EMI interference tolerated by the system and economic considerations. The inductor selected must maintain the minimum chosen value while supporting the maximum load current across the rated temperature. When current flows through an inductor, due to self heating (see try this), its temperature will rise. The inductor temperature may also rise due to heat generated by other components in the system. The inductor current rating is specified in two ways: 1. Isat which is the current at which the core saturates and 2. Irms which is the current at a given temperature rise. Table below shows a sample inductor specification (from Coilcraft)

The inductor value from the previous page was 4.7uH. The current it must carry (Iout*1.2) was 720mA. The Coilcraft table above shows that 7 inductors can meet these two requirements. These are all the parts including LPO4815 and those to the right of it on the row showing 4.7uH inductor value. The choice can be further narrowed by using some other criterion such as size. For example, if 1.0mm height were a requirement, the only inductor that meets it is the LPO3010. What happens is a different inductor is chosen ?

The inductor value from the previous page was 4.7uH. The current it must carry (Iout*1.2) was 720mA. The Coilcraft table above shows that 7 inductors can meet these two requirements. These are all the parts including LPO4815 and those to the right of it on the row showing 4.7uH inductor value. The choice can be further narrowed by using some other criterion such as size. For example, if 1.0mm height were a requirement, the only inductor that meets it is the LPO3010. What happens is a different inductor is chosen ? If an inductor is chosen that is of lower-value (e.g. 1.5uH) than the equations above suggest, following problems may be encountered: Higher inductor ripple current, so that the inductor current limit is engaged at a lower-than-expected load current. Higher ripple voltage on the output, which may be seen as excessive noise by the load; Lower crossover frequency pushing the regulator closer to instability. If an inductor is chosen with lower Isat or Irms, the reduction in the inductor value at higher actual current level (e.g. Iout > Isat) could also have same issue as choosing a lower value inductor (see above discussion). Conversely, if an inductor with higher Isat or Irms is chosen but it has higher DCR, it leads to higher DC losses in the inductor and consequent lower overall efficiency. The higher ripple current, the first issue in the lower value inductor discussion above, also has an increases the AC loss in the inductor. Graph below shows impact of various inductor choices.

Since max Vin and min Fs are used to calculate L, once L is selected, higher actual Fs or lower actual Vin, will lead to lower ripple current. However, lower actual value of the inductor (due to manufacturing variations in the inductor) will produce higher ripple current. This must be accounted in selecting max Iout allowable given the switch limit.

Selection guide for Coilcraft SMT Power inductors

Calculating Rise in Inductor Temperature

Currents in various components


When switch 2 is closed, the current in the inductor and the switch are the same; The current in the output capacitor is the difference between the inductor current and the output load current. When switch 2 is open, it carries no current.

Currents in various components


When switch 2 is closed, the current in the inductor and the switch are the same; The current in the output capacitor is the difference between the inductor current and the output load current. When switch 2 is open, it carries no current.

When switch 1 is closed, the current in the inductor and the switch are the same; The current in the input capacitor is the difference between the inductor current and the battery input current. When switch 1 is open, it carries no current. The input capacitor charges during this time, thus keeping the battery current nearly constant and avoiding the rippling current through the rest of the system.

The average and rms values of currents in the switches are given by:

The rms value of the currents in the input and output capacitors are given by:

The rms value of the currents in the input and output capacitors are given by:

Capacitor selection analysis


The output capacitor provides storage capacity that reduces output voltages ripple. The input capacitor provides the storage capacity needed to reduce the input current ripple from propagating back to the source (e.g. battery) and the rest of the system. Picture below shows just the current and voltage waveforms in the output capacitor. The following equation can be used to calculate the minimum value of the output capacitor as a function of the target output voltage and inductor current ripples.

Loss models
There are two types of losses. Conduction and switching losses. The conduction losses are driven by the equivalent resistance of switches and passive components. The switching losses are proportional to the switching frequency. Switching loss mechanisms: Charging/discharging of capacitance at MOSFET gates and switch node Inductive switching transitions, eddy-current and core losses The inductor switching losses are due the ripple current and equivalent series resistance (ESR) of the inductor at the switching frequency:

Oscillator and other miscellanous losses in the regulator internal circuits Following pictures show models of the regulator including equivalent resistances of the switches and the inductor. These resistances contribute to the conductive losses.

Following pictures show models of the regulator including equivalent resistances of the switches and the inductor. These resistances contribute to the conductive losses.

At low Iout, majority of the losses are due to ripple current. At high Iout, the conduction losses dominate. The loss in the inductor is given by:

Below picture illustrates the loss over the Iout range and shows AC vs DC components.

Low Iout load - DCM


Remember that the inductor ripple current magnitude depends only on the chosen inductor value, input, output voltages and the switching frequency of the regulator design. The inductor ripple current magnitude does not depend on the Iout load. When the Iout load reduces below the ripple level, the inductor currents can go negative. During this time, the inductor current is not productive (leads to loss but no contribution to Iout). To improve efficiency and avoid such losses, there are 3 ways regulators handle this light load situation: ZCD (zero crossing detect), PFM (Pulse Frequency Modulation), LDO (no switching). The first two are also called discontinuous mode (DCM). This is because there is a time period where neither switch is conducting. DCM:

By detecting the reversal of inductor current the switch2 also shuts off i.e. both switches off during this time. This is known as the discontinuous mode (DCM) of operation. In non-synchronous regulators that use diode instead of NFET in the position of switch2, the DCM occurs automatically. The synchronous regulators that use DCM mode implement zero cross detect.

At the CCM/DCM boundary the inductor current ripple equals the output load current:

At light loads, in DCM, the duty cycle is significantly lower than in CCM. The analysis of currents and voltages earlier in the chapter no longer apply. But, similar analysis can be used to show that the following equations apply:

The MOSFETs used as switches have lower limits on how fast they can be opened and closed. This minimum possible on-time (tp,min) of the PMOS limits, in constant frequency PWM mode, the minimum load current (Io,min) at which the output stays in regulation. If the output load current is reduced beyond Io,min the output voltage

The MOSFETs used as switches have lower limits on how fast they can be opened and closed. This minimum possible on-time (tp,min) of the PMOS limits, in constant frequency PWM mode, the minimum load current (Io,min) at which the output stays in regulation. If the output load current is reduced beyond Io,min the output voltage will start to rise, limited only by over voltage protection or some other breakdown mechanism. This minimum load current is given by:

Low Iout load - PFM and LDO modes


Another method employed by regulators, to prevent wasteful negative inductor currents at low loads, is PFM mode. At Vout close to Vin, the LDO mode is used by some regulators. PFM mode is a type of discontinuous conduction mode. From analysis similar to that in PWM mode, one can derive the equations shown in the figures below.

PFM mode can be implemented with single pulse per cycle or multiple pulses per cycle. The equations showed above assumed single pulse mode. The pictures below show waveforms with single and multiple pulse modes and operation of PFM mode.

Below graph shows comparison of efficiency for CCM mode without zero cross detect (negative inductor current losses), with zero cross detect (DCM-zcd) and PFM (DCM-PFM) modes.

By combining PFM and PWM modes in the same regulator and providing automatic switching, high efficiency can be achieved over a wide output load current range. Following picture illustrate the efficiency of such combination.

The picture below illustrate the 3 possible modes of a regulator and their relative merits. Some regulators combine PFM and PWM and others combined PWM and LDO modes. Which regulator should be used depends on the relative priority of requirements such as: Difference between Vout and Vin, Proportion of time spent at light loads

Transient response
Once the inductors and capacitors are chosen for a given Vout, Vin and Iout, what happens when the load Iout changes ? The ability of the regulator to keep the Vout in regulation to such input or load changes is called line and load regulation (line for input change). The transient response shows how quickly a regulator gets the Vout back in regulation. Recall that the output voltage is sensed at the feedback pin of the regulator. This is called voltage mode feedback. When the output load current changes, it momentarily translates to a voltage change at the output, due to the output impedance of the regulator, the ESR of the output capacitor etc. Some regulators also sense the switch current for better transient response. That is called current mode feedback. In response to the load change, the regulator adjusts the duty cycle or frequency depending on the PWM/PFM mode of operation. This translates to change in the currents in the various components and ultimately change in the input source current. At steady state, the duty cycle goes back to satisfy the Vout = D * Vin equation. Similar change in frequency and or duty cycle occurs in response to a line (input supply voltage or current change), to keep the output voltage in regulation. Following pictures show a stable regulator responding to a change in input, load and both.

The smaller the parasitic impedances e.g. ESR of Cout, DCR and ESR of the inductor and faster the switches, the quicker the regulator will react to a load transition. However, such smaller impedances also could lead to higher ripple, noise and compromised stability i.e. loss of ability to reach steady state. Following pictures show the load and line transient response of a marginal regulator and a load transient response of an unstable regulator.

Following pictures show the transient response and output voltage ripple as a function of various output capacitor values.

In case of the load current dropping below the ripple current, some form of DCM (ZCD or PFM) will get activated. The PFM mode is activated by sensing the switch current level for several consecutive cycles (this detail will be specified in the datasheet). The PFM mode is exited if the output voltage falls below a threshold set for the PFM mode (specified in the datasheet and PWM Vout activation threshold). Following pictures show transition between PFM and PWM modes.

Chapter 5 test
This is a chapter review test only. To take this test, you will need to have reviewed Chapter 5 and also have studied the parametric table of the inductive buck regulators or have it in front of you. This is an "open book" test. Click next to go to the test.

Chapter 5 Test
Select the appropriate answer for each question or enter the answer in the blank provided. When you are done, click the button to submit your answers and find out your score.

Chapter 5 Test
Select the appropriate answer for each question or enter the answer in the blank provided. When you are done, click the button to submit your answers and find out your score.

1. What value inductor should be used for a switching buck regulator with the following requirements: Vin=3Vmin, 3.6Vmax; Vout=1.8V; Switching frequency=1MHz, maximum ripple current allowable = 40%, Switch current limit = 250mA? A. 6.8 micro Henry B. 9 micro Henry C. 11.25 micro Henry D. 5.2 micro Henry 56 Correct Answer: A 2. For a buck regulator with calculated inductor value of 6.8uH (including the 20% tolerance) and Iout load max = 600mA (15% max ripple allowed), which of the inductors below is the best choice, if minimum solution area is also a key criterion? Hint: Use the Coilcraft inductor table shown on the inductor choice page in the chapter on inductive buck regulators. A. LPO3310-6.8uH B. DO3314-6.8uH C. LPO6013-6.8uH D. LPO6610-6.8uH 57 Correct Answer: B 3. What is the best choice for Cout, given the following buck regulator requirements: Vin=3Vmin, 3.6Vmax; Vout=1.8V; Switching frequency=1MHz, maximum inductor ripple current allowable = 20%, Iout load = 400mA min, 1A max; maximum Vout ripple allowable = 2% Vout ripple? A. 4uF B. 20uF C. 1uF D. 2uF 58 Correct Answer: C 4. A design requires an inductive buck regulator with Vout=1.2V, Iout-max=300mA, switching frequency=1MHz. Which of the following is an inductive buck regulator that meets these requirements ? Hint: use parametric table and filter by the needed characteristics. A. LM2598 B. LM3671 C. LM5008 D. LM3670 59 Correct Answer: D 5. A design requires an inductive buck regulator with Vout=1.2V, and switching frequency=2MHz. The load current can vary dramatically from max of 600mA to a low of 10mA. Which of the following is an inductive buck regulator that meets these requirements ? Hint: Download datasheets and look for products with multiple modes that cater varying loads. A. LM3671 B. LM5008 C. LM2612 D. LM3661 60 Correct Answer: A 6. A design requires an inductive buck regulator with Vin=3.3V, Vout=1.35V. The load current can vary dramatically from max of 450mA to a low of 10mA. During the low current consumption, the Vout noise must be extremely low. Which of the following is an inductive buck regulator that meets these requirements ? Hint: Download datasheets and look for products with low noise modes that also cater varying loads. A. LM3670 B. LM3661 C. LM3671 D. LM5008 61 Correct Answer: B 7. What inductor characteristics is related to the AC loss in the inductor ? A. Inductor DCR B. Inductor Isat C. Inductor height D. Inductor ESRf 62 Correct Answer: D 8. Why does low Iout operation without zero crossing detect or PFM mode lead to lower efficiency ? A. The inductor current exceeds the switch limit B. The switches forward bias C. The inductor current goes negative D. The output capacitor saturates 63 Correct Answer: C 9. What determines the DCM/CCM boundary ? A. Output voltage ripple B. Inductor current ripple C. Input voltage ripple D. none of the above 64 Correct Answer: B 10. For the LM3671, which of the following triggers entering the PFM mode ? A. The inductor current becomes discontinuous for 32 or more clock cycles

C. Input voltage ripple D. none of the above 64 Correct Answer: B 10. For the LM3671, which of the following triggers entering the PFM mode ? A. The inductor current becomes discontinuous for 32 or more clock cycles B. The inductor current exceeds the switch current limit C. The inductor current drops to twice the ripple current of the design. D. The inductor current remains constant for 32 or more clock cycles 65 Correct Answer: A 11. What is the assumption made to derive that the inductor current in an inductive buck regulator linearly rises and falls ? A. The Vout and Vin ripples are small B. The inductor voltage changes linearly C. The Cin and Cout don't consume any current D. The Vin changes linearly 66 Correct Answer: A 12. In analysis of inductive buck regulator, why is the average inductor current the same as the load current ? A. The average current in the output capacitor is zero B. The average current in the input capacitor is zero C. The inductive buck regulators have nearly 100% efficiency D. None of the above 67 Correct Answer: A 13. In an inductive buck regulator with PWM duty cycle D, what is the relationship between the Vin and the Vout ? A. Vout = Vin * D B. Vout = Vin / D C. Vout = Vin * D / (1-D) D. Vout is constant independent of D 68 Correct Answer: A 14. What is the relation between the nominal inductor value and the switching frequency, as suggested by the inductor selection analysis ? A. L is directly proportional to the switching frequency B. L is inversely proportional to the switching frequency C. L is directly proportional to the square of the switching frequency D. L has no relation to the switching frequency 69 Correct Answer: B 15. To get the minimum inductor value needed for an inductive buck regulator, which of the following must be used in the inductor selection analysis ? A. Maximum switching frequency and Maximum input voltage B. Minimum switching frequency and Minimum input voltage C. Minimum switching frequency and Maximum input voltage D. Maximum switching frequency and Minimum input voltage 70 Correct Answer: C 16. What is the consequence of choosing an inductor of value smaller than suggested by the inductor selection analysis for an inductive buck regulator ? A. Higher ripple currents, Lower ripple voltage, Higher AC losses B. Lower ripple currents, Higher ripple voltages, Higher AC losses C. Higher ripple currents, Higher ripple voltage, Lower DC losses D. Higher ripple currents, Higher ripple voltage, Higher AC losses 71 Correct Answer: D 17. What is the relative magnitude of the current in the output capacitor of an inductive buck regulator ? A. The output capacitor current is same as the load current B. The output capacitor current is same as input capacitor current C. The output capacitor current is same as the inductor current D. The output capacitor carries just the inductor ripple current 72 Correct Answer: D 18. Which of the following is NOT suggested by the output capacitor selection analysis ?> A. The output capacitor should be inversely proportional to the switching frequency B. The output capacitor should be proportional to the input capacitor C. The output capacitor should be proportional to the inductor ripple current D. The output capacitor should be inversely proportional to the output ripple voltage 73 Correct Answer: B 19. What is the advantage of using PFM mode in an inductive buck regulator ? A. Lower ripple voltage at low loads B. Higher efficiency at maximum rated loads C. Higher efficiency at low loads D. Lower ripple voltage at maximum rated loads 74 Correct Answer: C 20. What is the consequence of choosing an output capacitor of value smaller than suggested by the capacitor selection analysis for an inductive buck regulator ? A. Quicker response to a load step but higher ripple voltage and less stable B. Slower response to a load step but lower ripple voltage and more stable

74 Correct Answer: C 20. What is the consequence of choosing an output capacitor of value smaller than suggested by the capacitor selection analysis for an inductive buck regulator ? A. Quicker response to a load step but higher ripple voltage and less stable B. Slower response to a load step but lower ripple voltage and more stable C. Quicker response to a load step and more stable but higher ripple voltage D. Slower response to a load step, higher ripple voltage and less stable 75 Correct Answer: A

Charge Pump Regulators


This chapter will provide details of how charge pump buck regulators operate. After introduction of the basics of how charge pump regulators work, gain hopping and efficiency are discussed. Additional topics include selection of external components in the design. 7.1 Charge pump basics 7.2 Gain Matrix 7.3 Switched cap losses 7.4 Gain Hopping 7.5 SwCap Benefits 7.6 Chapter 6 test

Charge pump basics


Charge pump regulators operate by alternatively charging capacitors from the input supply and transferring the charge to the output. The time when the capacitors are charging from the input is called the gain phase and the transfer to output is called the common phase. Unity gain and inverters: Figure below shows a single capacitor being switched from Vin to Vout. Switches S1 and S3 close while S2 and S4 are open. Then, switches S2 and S4 close while S1 and S3 open. The charge transferred every gain phase is q1=C*Vin. At the end of the common phase, the charge remaining on the capacitor is q2=C*Vout. The amount that got transferred is, then, q1-q2=C(Vin-Vout).

If the frequency at which the switch toggles, from position 1 to position 2, is Fs, then the average current supported is Iout = C*Fs*(Vin-Vout). By assigning R = 1/(C*Fs), this equation can be seen to represent an equivalent voltage source of magnitude Vin and output impedance R. At low frequencies this is the dominant part of the output impedance. If high switching frequencies were used, the switch impedance becomes significant. In this case, the Vout is roughly equal to Vin. By reversing the connections to the output and ground, the circuit can implement an "inverter" or negative voltage generator. For this purpose, the capacitor must NOT be polarized (no Electrolytics!).

Doubler and Half gain: Figure below also shows a single capacitor switching topology but the switch connections are different. Instead of being disconnected at the end of gain phase, the input supply is connected to the capacitor in common phase. But, the terminal of the capacitor where the input connects is not the same between the gain and the common phases.

During the gain phase, the capacitor accumulates charge q1=C*Vin, as previously. However, during the common phase, the voltage across the capacitor is (Vout-Vin). If the charge on the capacitor is not drained, the output voltage will equal double that of the input voltage - Vout = 2 * Vin. By Reversing the position of the Vout and Vin, in the doubler above, the regulator becomes fractional gain (1/2).

During the gain phase, the capacitor accumulates charge q1=C*Vin, as previously. However, during the common phase, the voltage across the capacitor is (Vout-Vin). If the charge on the capacitor is not drained, the output voltage will equal double that of the input voltage - Vout = 2 * Vin. By Reversing the position of the Vout and Vin, in the doubler above, the regulator becomes fractional gain (1/2).

Gain Matrix
By using two capacitors and various connection combinations, many different gains can be achieved. In the figure below, two capacitors are used in two different connection modes to create a 1/2 gain and 3/2 gain.

The charge on plate p2 of C1 is equal and opposite to the charge on plate p1 of C2, provided there is no drain from the node Out (charge conservation). When the switches are in position 1, during gain phase, C1 and C2 are charged to a total potential Vin. Using the charge conservation principle above and the equation for charge on each of the capacitor, q=CV, the following equations result: C1*V1=C2*V2, V1=C2*V2/C1, Vin=V1+V2=V2(C2/C1+1), V2=Vin/(1+C2/C1)=Vin/2 if C2=C1 When the switches are in position 2, V2=V1=Vout. Therefore, Vout=Vin/2 The second configuration is essentially the same as the first except that in switch position 2, the following equation applies: Vout=V+Vin, where V is the voltage across the capacitor. V=Vin/2, from previous discussion. Therefore, Vout=Vin(1+1/2)=1.5Vin, Gain of 3/2! Following figure shows a few more configurations of C1 and C2 and the resulting gains that can be achieved. The PDF file in the Tell me More section gives deeper insight into the configurations and number of switches required for various gain values.

Mengzhe Ma Master's Thesis on switched cap matrix for various gains


http://web.engr.oregonstate.edu/~moon/research/files/Mengzhe_Ma.pdf

Switched cap losses


Note that such architecture, described so far, can only achieve only discrete and finite ratios. Typically a post regulator, a linear regulator, follows the switched capacitors for fine granular of the output voltage.

Alternatively, the switch resistance itself can be varied to get the effect of a postregulator. The figure below shows a doubler with switch resistances modulating the output granular control.

The Vout equation becomes, Vout = (Gain * Vin) - (Iout * Rout), where Rout is the effective output impedance, including the linear regulator (Rdson) , the switched capacitor structure (1/Fs*C, as shown previously), any ESR of the capacitors and the impedance of the switches (Rsw).

The fine adjustment can be accomplished by one of 2 methods: Method 1: Control Switching Frequency (FSW) Pulse-Frequency Modulation (PFM) involves slowing switch frequency when charge is not needed at the output. While this is easy to implement, the ripple varies with load. Method 2: Control Internal Switch FET resistance (RSW) In this method, the switch gate drive is modulated similar to LDO regulation. The implementation becomes more complex and the frequency range is tight, but the result is low output ripple.

Gain Hopping
For a fixed gain, Vout and Iout, the efficiency of a switched cap regulator is inversely proportional to the input voltage. In order to provide high efficiency over a wide range of input voltage, newer regulators provide multiple gains and switch the gains depending on input voltage. The input current of a charge pump regulator can be expressed as, Iin= (Iout x Gain) + Iq, where Iq is the current needed for the regulator itself, The efficiency of the regulator can be expressed as,

As Vin goes up, Gain can go down to improve Efficiency. There are two ways to keep Vout in regulation as Vin goes up. Change the gain, Increase the effective resistance by lowering switching frequency or changing the linear regulator impedance. The second set of actions increases power that is not transferred to output, changing gain does not! Changing gain maintains the highest efficiency possible. The regulators that allow for this "gain hopping", use trigger mechanism based on target output voltage levels. For minor changes (<1%), PFM (frequency modulation) is used. At bigger differences, gain change brings back the output in regulation.

SwCap Benefits
Switched capacitors provide high efficiency and small footprint, a compromise between linear regulators and inductive regulators. They also provide simpler implementations for integral gains such as inverters and doublers. Switched cap regulators provide: Higher efficiency than an LDO: Smaller solution size than a Magnetic solution. They require only 4 small external ceramic capacitors. Lower radiated noise than a magnetic solution Lower cost than a magnetic solution A few notes about the capacitors used: Since most switched cap regulators switch polarity on the fly capacitors, electrolytics can not be used. Ideally use ceramic capacitors in all places. Since capacitor ESR could be a big loss (low efficiency) contributor, use capacitors with low ESR For supporting wide temperature range, use X7R or X5R temperature coefficients! No Y5V or Z5U !! Output Capacitor (Cout) value chosen is inversely proportional to output voltage ripple. Input Capacitor (Cin) provides charge reservoir for fly caps. Higher capacitance value of Cin keeps input voltage ripple low. Fly Capacitor(s) transfer charge from input to output. Their size determines pump strength (output current capability).

Chapter 6 test
This is a chapter review test only. To take this test, you will need to have reviewed Chapter 6 and also have studied the parametric table of the switched capacitance regulator or have it in front of you. This is an "open book" test. Click next to go to the test.

Chapter 6 review test


Select the appropriate answer for each question or enter the answer in the blank provided. When you are done, click the button to submit your answers and find out your score.

1. Which of the following is a switched cap inverter product ? A. LM3670

Select the appropriate answer for each question or enter the answer in the blank provided. When you are done, click the button to submit your answers and find out your score.

1. Which of the following is a switched cap inverter product ? A. LM3670 B. LM2661 C. LM2770 D. LM2750 76 Correct Answer: B 2. An unity gain switched cap regulator with C=10uF and switching frequency of 100KHz, can be represented as a voltage source with what impedance ? A. 1 ohm B. 0.1666 ohm C. 2 ohm D. 1 Kohm 77 Correct Answer: A 3. A switched cap doubler can NOT be used to produce which of the following gains ? A. 2 B. -2 C. 1/2 D. Any of the above, i.e. none of the gains above can be produced 78 Correct Answer: B 4. Which of the following is a switched cap doubler product ? A. LM2661 B. LM3955 C. LM2681 D. LM2751 79 Correct Answer: C 5. What does gain hopping mean ? A. Gain is changed depending on the input voltage range B. Gain is changed based on the output voltage C. Gain is reduced at high efficiencies D. Gain is increased when the output current drops 80 Correct Answer: A 6. Why is gain hopping used ? A. To get most accurate output voltage at any input voltage B. To get best efficiency at any input voltage C. To get most accurate output voltage at any output current D. To get least output voltage ripple at any input voltage 81 Correct Answer: B 7. Which of the following is a switched cap regulator with gain 1/2 ? A. LM2664 B. LM2707 C. LM2770 D. LM2685 82 Correct Answer: C 8. Which of the following is a switched cap regulator that implements gain hopping ? A. LM3990 B. LM3670 C. LM2686 D. LM2770 83 Correct Answer: D 9. What type of capacitors can be used for flying caps ? A. ceramic caps B. tantalum caps C. special polymer caps D. Niobium caps 84 Correct Answer: A 10. Which type of capacitor can be used in a unity gain switched capacitor ? A. tantalum caps B. ceramic caps C. Both of the above D. None of the above 85 Correct Answer: C 11. How is the output impedance of a switched capacitor regulator related to the switching frequency ? hint: Ignore resistive losses A. It is not related at all B. It is directly proportional C. It is proportional to the square root of frequency

85 Correct Answer: C 11. How is the output impedance of a switched capacitor regulator related to the switching frequency ? hint: Ignore resistive losses A. It is not related at all B. It is directly proportional C. It is proportional to the square root of frequency D. It is inversely proportional 86 Correct Answer: D 12. For a switched capacitor doubler, during the common phase, which of the following statements is false ? A. The voltage across the fly capacitor remains the same as in the gain phase B. The voltage across the fly capacitor equals Vout - Vin C. The fly capacitor gains no further charge during the common phase D. The voltage across the fly capacitor doubles 87 Correct Answer: D 13. What is the minimum number of switches required for a switched capacitor doubler ? A. 1 B. 2 C. 3 D. 4 88 Correct Answer: D 14. How is the input current of a switched capacitor regulator related to the output current ? hint: Ignore Iq A. Iout = Iin * Gain B. Iin = Iout * Gain C. Either of the above D. None of the above 89 Correct Answer: B 15. Which of the following is NOT a technique for fine adjustment of the gain of a switched capacitor regulator ? A. Change the switch resistance B. Change the switching frequency C. Change the output capacitor D. Change the fly capacitor 90 Correct Answer: C

Choosing the right regulator solutions


This is the concluding chapter that analyzes a few different application requirements and solutions using all the concepts learned in the course. 8.1 Gather needs 8.2 Situation 1 8.3 Situation 2 8.4 Situation 3 8.5 Situation 4 8.6 An analytical approach 8.7 A word about the final test

Gather needs
When selecting a device for the application, it is important to understand the following requirements of the design. Output voltage level and regulation needed - is the output protected from surges ? what maximum output voltage protection is required ? Output load dynamics such as microprocessor load that changes with various states of the processor. Efficiency requirements - will the input source be large reservoir like line power ? or is it a battery that will it be charged often ? or is it a limited supply battery that must be managed well ? Other considerations of the input supply e.g. variation of the input supply - is it a battery ? is it simple stepped down AC line with lot of ripple ? what is the output impedance of the supply source ? how far is it from the power solution ? Physical and environmental issues - e.g. any height limitations ? how is the ventilation for taking away heat ? area available for the power solution ? what is the ambient temperature of operation ? what are the manufacturing requirements e.g. surface mount vs through hole, PCB line, contact limitations, Lead-free, solder reflow temperatures etc. ? Finally the cost available to implement the power solution and relative merits of all of the above.

Situation 1
Consider a system with nominal battery input voltage of 4.5V and a processor with 1.8V core voltage, 3.3V for i/o as well as some analog circuits. The processor maximum current consumption is 500mA. It also has a powerdown mode where it consumes 100uA. The processor code spends over 90% of the time in this low power mode. The analog circuits include a 10 bit AtoD converter that requires a stable reference voltage. The battery is recharged often and can be assumed to be a low output impedance stable reference voltage. Single regulator will not be adequate since at least two separate voltage levels are required. Further, to avoid noise from switching i/o pins to feed into the analog

Consider a system with nominal battery input voltage of 4.5V and a processor with 1.8V core voltage, 3.3V for i/o as well as some analog circuits. The processor maximum current consumption is 500mA. It also has a powerdown mode where it consumes 100uA. The processor code spends over 90% of the time in this low power mode. The analog circuits include a 10 bit AtoD converter that requires a stable reference voltage. The battery is recharged often and can be assumed to be a low output impedance stable reference voltage. Single regulator will not be adequate since at least two separate voltage levels are required. Further, to avoid noise from switching i/o pins to feed into the analog circuits, it is unwise to use same regulator for both i/o and analog. This means 3 regulators are needed. But, what type shall they be ? The processor load is dynamic and low most of the time. Even though the voltage difference is large, between the battery voltage, 5V and the processor need of 1.8V, a linear regulator can be used since the average power consumption is low. The analog circuits need a stable reference with preferably no ripple. Therefore, a switching regulator is not the right choice, in this case either. For keeping the noise low, capacitors with low ESR should be used. The i/o circuits could use either a switching or a linear regulator. Since the battery is charged often, efficiency and long life does not seem to be a major concern. The difference in battery and i/o voltage need is small. Again, a linear regulator can be used. This system could use 3 separate linear regulators. For preventing noise feeding from one to the other, the linear regulators should be placed as close to the load as possible.

Situation 2
Consider a system with nominal battery input voltage of 4.5V and two processors. One is a RISC application processor, another a Digital Signal Processor (DSP) for audio and graphics processing needed in the system. Both processors need 1.8V core voltage, 2.5V for i/o. The i/o of the two processors interact with each other. There are no sensitive analog peripherals connected to either of the processors. This is a low cost consumer appliance that is not charged very often. Efficiency and cost are big concern in this system. The input supply is low ripple but finite (not charged often). Linear regulators alone will not be adequate since the difference in input supply (4.5V) and output need (1.8/2.5) is large. Since the two processor i/o interact and share the same voltage, a common regulator could serve them both. The 1.8V and 2.5V are both close to fractional gains (1/2 and 2/3) that can be achieved by a high efficiency charge pump regulator. If the post-regulator of the charge pump regulator does not provide the needed output voltage, LDOs could be used. If costs and physical dimensions permit, an inductive regulator can also be used.

Situation 3
Consider a system that already has a 5V rail. A peripheral board is to be added to this system. This peripheral board contains one high performance DSP processor that runs most of the time and sensitive analog circuits and a RF tuner connected to coax cable i/o (NOT antenna). The 5V rail is output of a switching regulator with 3% tolerance. The peripheral board carries 15 different individual analog circuits. Ten of them need 3.3V, remaining five need 2.5V, all of them need 1% tolerance. The DSP requires 2.5V for core, 3.3V for i/o, 400mA during peak operation and 100uA in idle mode. Balancing the dynamic processor requirements against the low noise requirements of the sensitive circuit will require careful partitioning. Neither power efficiency, nor board area appears to be a concern. The input supply has higher tolerance and potentially ripple than required by the analog circuits. The 3.3V and 2.5V levels can be achieved by one or two buck regulators. While the 2.5V level could use switched capacitor buck regulator, the 3.3V would be more efficiently generated with an inductive regulator. Both of these levels would need to be followed by linear regulators for the low noise requirements of the analog peripherals. The solution would consist of two inductive buck regulators, one (3.3V) followed by 10 low noise linear regulators, the other (2.5V) with 5 low noise linear regulators.

Situation 4
Consider a handheld instrument system with nominal battery input voltage of 4.5V. The system includes a processor with 1.8V core voltage, 3.3V for i/o. There is a separate analog custom circuit with 2.5V and 3.3V need. The instrument is used in the field where long life of operation between battery charges is critical. The analog circuits are not demanding, mostly low resolution circuits. The processor is used only while processing the readings but there is not much difference in the active vs idle current consumption. The analog circuits are always active. Especially there is a crystal oscillator on the processor as a reference clock, a PLL to produce the processor clock frequency and a Real Time Clock (RTC) peripheral. All these clock references require 3.3V. All of the circuits together consume less than 100mA average. Efficiency is the top critical concern in this system. The power consumption is not very high. The difference between the 4.5V battery and the voltage needs of the processor and analog circuits is too high for a linear regulator to be a good fit. An inductive buck regulator designed for output voltage close to 3.3V followed by linear regulators for low ripple output could satisfy the analog 3.3V, 2.5V and the processor i/o needs. Another buck regulator or a linear regulator to step down to 1.8V will isolate any noise from the i/o feeding into the processor core supply. The buck regulator may need an LDO mode, when the processor is in shutdown mode, to provide for the RTC and the crystal oscillator.

An analytical approach
The following table shows an analytical approach to an example where use of LDO is being evaluated against use of an inductive buck regulator

To prepare such analysis, detailed information about the application is needed. Such information includes the power consumption over time of the components whose power will be supported by the regulator being designed. Good luck buck designers!!

A word about the final test


Chapter 7 does not have a test. The comprehensive test on the Analog University will cover all material in this course.To take the test, you will need to have reviewed the entire course, including all the net links and the parametric table on National's website.

BJT
Bipolar Junction Transistor - example use - series element of an NPN linear regulator

CCFL
Cold Cathode Fluorescent Lamp

CMOS
Complementary MOS - See MOS in this glossary; Complementary refers to use of both P type and N type MOS devices

dB
Short for Decibel - a logarithmic scale typically used for system gain or power levels, commonly found in audio, RF and control system applications.

DCR
DC Resistance - DC stands for Direct Current (as opposed to Alternating or AC), which in this case means not varying in time. It is measured either with fixed voltage (non-time-varying) or extrapolating back to zero frequency by measuring resistance at multiple frequencies.

DSP
Digital Signal Processing (or Processor) - A technique (product) for managing signals digitally.

EIA
Eletronics Industries Alliance - Sets many standards notable ones used in this course are codes for capacitor sizes and dielectric materials

ESL
Equivalent Series L - L stands for Inductance - this parameter is used for capacitors to indicate parasitic inductance, introduced typically due to the eletrode wires.

ESR
Equivalent Series Resistance - typically found in capacitor, inductor and battery specifications

FAE
Field Application Engineer - For whom these courses are intended

FAQ
Frequently Asked Question

FET
field-effect transistor: a transistor in which most current flows in a channel whose effective resistance can be controlled by a transverse electric field. When the control electrode is isolated from the channel by oxide, such FET are called MOSFET or MOS for short.

LDO
Low Drop Out - a type of linear regulator where the minimum voltage difference between input voltage and output voltage is very low. Typically such regulators use single pass transistor, either a BJT or MOS.

LED
Light Emitting Diode - A special diode that emits light when certain level of voltage is applied and certain current passes through it.

Low Drop Out - a type of linear regulator where the minimum voltage difference between input voltage and output voltage is very low. Typically such regulators use single pass transistor, either a BJT or MOS.

LED
Light Emitting Diode - A special diode that emits light when certain level of voltage is applied and certain current passes through it.

Li
Lithium - Key element used in Lithium Ion and Lithium Polymer batteries

LMU
Lighting Management Unit - Integrated Circuit with ability to support multiple LED lighting and means to program the circuit for different lighting effects such as LED current, order of lighting etc

LNA
Low Noise Amplifier - Typically used in RF receiver input circuits

MLCC
Multi Layer Ceramic Capacitors - type of ceramic capacitors manufactured with multiple layers

MOS
Metal Oxide Semiconductor transistor - describing the three layers in vertical dimension that characterize such transistors. Most modern MOS use Polysilicon instead of Metal as Gate electrode

MOSFET
Metal Oxide Semiconductor Field Effect Transistor - See MOS and FET listed in this Glossary separately

NiCd
Nickel Cadmium - One of the chemistries used in batteries

NPN
Type of BJT where N type material is used for collector and emitter and P type is used for the base.

PA
Power Amplifier - Typically used to drive antenna in RF transmitter circuits

PFM
Pulse Frequency Modulation - A technique used for controlling the on versus off time of switches used in power management circuits

PLL
Phase Locked Loop - Typically used as part of a frequency generator

PMU
Power Management Unit - Integrated Circuit that incorporates multiple power management circuits such as 2 or more buck regulators, additionally one or more LDOs etc. PMUs are typically programmable for setting the regulator voltages etc

PNP
Type of BJT where P type material is used for collector and emitter and N type is used for the base.

ppm
Parts Per Million - typically used to indicate errors e.g. defective parts as fraction of those shipped or capacitance value error as fraction of nominal value

PPS
Portable Power Systems - A division of National Semiconductor with focus on developing power management products for low voltage (typically <12V input voltage) and low power level (typically <2A).

PSRR
Power Supply Rejection Ratio - Ability of a circuit to prevent variations on power line from reaching the output. The term is typically used with amplifiers but also with LDOs to indicate the LDO ability to stop input ripple from showing up at output

PWM
Pulse Width Modulation - A technique used for controlling the on versus off time of switches used in power management circuits

RF
Radio Frequency

PWM
Pulse Width Modulation - A technique used for controlling the on versus off time of switches used in power management circuits

RF
Radio Frequency

RISC
Reduced Instruction Set Computer - A modern type of computer architecture, originally intended to reduce cost and speed up computers by simplifying the instruction set and implementation. Now hybrid combinations of CISC (Complex Instruction Set Computer) and RISC pervail.

RMS
Root Mean Square - Square root of mean of squares of the elements - typically used to indicate average of an alternating (positive and negative) current or voltage

SMD
Surface Mount Device - Term used for components in special packages designed for mounting on circuit boards without needing holes for the component pins.

SMT
Surface MounT - See SMD in this glossary

SRF
Self Resonant Frequency - Parameter of an inductor, frequency at which the inductor is resonant - it is a function of the product of the inductor value and its parasitic capacitance value.

TCXO
Temperature Compensated Crystal (X) Oscillator - typically used in RF circuits to provide fixed frequency reference indepedent of operating temperature

TFT
Thin Film Transistor - Used in flat panel displays

Frequently Asked Questions


A list of FAQs follows:

Questions
What is the difference between power management products from the Portable Power Systems Product Line versus those from the Power Management Product Line ?

Answers
What is the difference between power management products from the Portable Power Systems Product Line versus those from the Power Management Product Line ? Answer Portable Power Systems target systems lower than 2W and input voltages below 12V.

Contact/Help Information
For additional information on getting started go to http://www.national.com/analog/training/getting_started To contact us, and send feedback go to http://wwwd.national.com/feedback/newfeed.nsf/newfeedback?openform&category=pwdesignuniv For Frequently Asked Questions go to http://www.national.com/analog/training/faqs Thank you, PowerWise Design University Team

DC to DC Converter Basics Copyright 2010 by National Semiconductor, Portable Power Systems All rights reserved