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For many years power supply engineers have been aware of the difficulty of obtaining a good stability margin and high-frequency transient performance from the continuousinductor-mode (incomplete energy transfer) flyback and boost converters. For stable operation of such converters, it is generally necessary to roll off the gain of the control circuits at a much lower frequency than with the buck regulator topologies. It has been demonstrated mathematically15 that this problem is the result of a negative zero in the small-signal duty cycle control to output voltage transfer function. The negative sign locates this zero in the right half of the complex frequency plane. Although a rigorous mathematical analysis is essential for a full understanding of the problem, for many, the mathematical approach alone will not provide a good grasp of the dynamics of the effect, and the following explanation by Lloyd H. Dixon Jr. will be found most helpful.


A Bode plot of the right-half-plane zero has the characteristic of a rising 20 dB/decade gain with a 90 phase lag above the zero frequency instead of the 90 phase lead of a left-halfplane zero. It is considered impossible to compensate this effect by normal loop compensation methods, and the designer is obliged to roll off the gain at a lower frequency, giving poor transient response. In simple terms, the right-half-plane zero is best explained by considering the transient action of a continuous-mode flyback converter. In this type of circuit, the output current from the transformer secondary is not continuous; it flows only during the flyback period, when the primary power switching device is off. When a transient load is applied to the output, the first action of the control circuit is to increase the on period of the power switch (so as to increase the input current in the primary inductance in the longer term). However, the large primary inductance will prevent any rapid increase in primary current, and several cycles will be required to establish the final value. With a fixed-frequency converter, the first, and immediate, effect of increasing the on period is to reduce the flyback period. Since the primary current, and hence the flyback current, will not change much in the first few cycles, the mean output current will now immediately decrease (rather than increasing, as was required). This reverses the longer term control action during the transient, and with the 90 phase shift already present from the inductor, gives 180 of phase shift. This is the cause of the right-half-plane zero.



It would seem that the only cure for this effect is to change the pulse width slowly over a large number of cycles (that is, roll off the gain at a low frequency) so that the inductor current can follow the change. Under these conditions, the dynamic output reversal will not occur; however, the transient response will be rather poor. The following discussion by Lloyd H. Dixon, Jr. provides a more complete explanation. (Adapted from the Unitrode Power Supply Design Seminar Manual, Reference 15. Reprinted with permission of Unitrode Corporation.)


In small-signal loop analysis, poles and zeros are normally located in the left half of the complex s-plane. The Bode plot of a conventional or left-half-plane zero has the gain magnitude rising at 20 dB/decade above the zero frequency with an associated phase lead of 90. This is the exact opposite of a conventional pole, whose gain magnitude decreases with frequency and whose phase lags by 90. Zeros are often introduced in loop compensation networks to cancel an existing pole at the same frequency; likewise, poles are introduced to cancel existing zeros in order to maintain total phase lag around the loop less than 180 with adequate phase margin. The right-half-plane (RHP) zero has the same 20 dB/decade rising gain magnitude as a conventional zero, but with 90 phase lag instead of lead. This characteristic is difficult if not impossible to compensate. The designer is usually forced to roll off the loop gain at a relatively low frequency. The crossover frequency may be a decade or more below what it otherwise could be, resulting in severe impairment of dynamic response. The RHP zero never occurs in circuits of the buck family. It is encountered only in flyback, boost, and Cuk circuits, and then only when these circuits are operated in the continuous-inductor-current mode. Figure 3.9.1 shows the basic flyback circuit operating in the continuous mode with its current waveforms. In flyback as well as boost circuits, the diode is the output element. All current to the output filter capacitor and load must flow through the diode, so the steadystate DC load current must equal the average diode current. As shown in Fig 3.9.1b, the inductor current equals the peak diode current, and it flows through the diode only during the off or free-wheeling portion of each cycle. The average diode current (and load current) therefore equals the average inductor current IL times (1-D), where D is the duty ratio (often called duty cycle).

FIG. 3.9.1 (a) and (b)



If D is modulated by a small ac signal d whose frequency is much smaller than the switching frequency, this will cause small changes in D from one switching cycle to the next. Figure 3.9.2 shows the effects of a small increase in duty ratio (during the positive half cycle of the applied signal). The first effect is that the temporarily larger duty ratio causes the peak inductor current to increase each switching cycle, with an accompanying increase in the average inductor current. If the signal frequency is quite low, the positive deviation in duty ratio will be present for many switching cycles. This results in a large cumulative increase FIG. 3.9.2 in inductor current, whose phase lags d by 90. This change in inductor current flows through the diode during the off time, causing a proportional change in output current, in phase with the inductor current. The second effect is more startling: The temporary increase in duty ratio during the positive half cycle of the signal causes the diode conduction time to correspondingly decrease. This means that if the inductor current stays relatively constant, the average diode current (which drives the output) actually decreases when the duty ratio increases. This can be clearly seen in Fig. 3.9.2. In other words, the output current is 180 out of phase with d. This is the circuit effect which is mathematically the right-half-plane zero. It dominates when the signal frequency is relatively high so that the inductor current cannot change significantly.

Duty Ratio Control Equations The equations for the flyback circuit are developed starting with the voltage VL across the inductor, averaged over the switching period: VL Vi D Vo (1 D) (Vi Vo ) D Vo (9.1)

Modulating the duty ratio D by a small AC signal d whose frequency is much smaller than the switching frequency generates an ac inductor voltage v L : vL (Vi Vo )d vo (1 D) (Vi Vo )d (9.2)

Assuming Vi is constant, v L is a function of d and of vo the ac voltage across the output filter capacitor. At frequencies above filter resonance, vo becomes much smaller than v L , and the second term may be omitted. The ac inductor current L varies inversely with frequency and lags v L by 90. Substituting for v L in Eq. (9.2) gives L in terms of d: L vL j L j Vi Vo d L (9.3)

Referring to Fig. 3.9.1, the inductor provides current to the output through the diode only during the off portion of each cycle: Io I L (1 D) (9.4)



Differentiating Eq. (9.4), the ac output current o has two components (see Fig. 3.9.1)one component in phase with L and the other 180 out of phase with d: o L (1 D) I L d (9.5)

Substituting for L in Eq. (9.3) gives o in terms of the control variable d In a continuousmode flyback circuit, (1 D) Vi / (Vi Vo ): o j (Vi Vo )(1 D) d ILd L j Vi d ILd L (9.6)

The first term is the inductor pole, which dominates at low frequency. Its magnitude decreases with frequency, and the phase lag is 90. At a certain frequency the magnitudes of the two terms are equal. Above this frequency, the second term dominates. Its magnitude is constant, and the phase lag is 180. This is the RHP zero, occurring at frequency z where the magnitudes are equal. Figure 3.9.3 is a Bode plot of this equation (arbitrary scale values). Above fz, the rising gain characteristic of the RHP zero cancels the falling gain of the inductor pole, but the 90 lag of the RHP zero adds to the inductor pole lag, for a total lag of 180. The Bode plot of the entire power circuit would also include the output filter capacitor pole, which combines with the inductor pole, resulting in a second-order resonant characteristic at a frequency well below the RHP zero. The ESR of the filter capacitor also results in an additional conventional zero.

FIG. 3.9.3

The RHP zero frequency is calculated by equating the magnitudes of the two terms in Eq. (9.6) and solving for z: Vi (9.7) Z LI L



Substitute Eq. (9.4) for IL and Vo /Ro for Io. In a flyback circuit, Vi / Vo (1 D) Vi / (Vi Vo ):

(1 D) /D;

RoVi (1 D) LVo

Ro (1 D)2 LD

RoVi 2 LVo (Vi Vo )


Current-Mode Control Equations Equations (9.1), (9.2), (9.4), and (9.5) pertain to the flyback continuous-mode power circuit and are valid for any control method, including current-mode control. Equation (9.3) is valid for current-mode control, but it applies to the inner, current control loop. Solve Eq. (9.3) for d in terms of iL and substitute for d in Eq. (9.5): o L (1 D) j LIL L (Vi Vo ) Vi L (Vi Vo ) j LIL L (Vi Vo ) (9.9)

Equations (9.6) and (9.9) are the same, except that in Eq. (9.6) the control variable is d for duty ratio control, whereas in Eq. (9.9) the control variable is L established by the inner loop and consistent with current-mode control. Unlike in Eq. (9.6) for duty ratio control, the first term in Eq. (9.9) is constant with frequency and has no phase shift. This term dominates at low frequency. It represents the small-signal inductor current, which is maintained constant by the inner current control loop, thus eliminating the inductor pole. The second term increases with frequency, yet the phase lags by 90, characteristic of the RHP zero. It dominates at frequencies above Z where the magnitudes of the two terms are equal. The RHP zero frequency Z may be calculated by equating the two terms of Eq. (9.9). The result is the same as Eq. (9.7) for duty ratio control. Figure 3.9.4 is the Bode plot of Eq. (9.9). The output filter capacitor will of course add a single pole and an ESR zero. Because the inductor pole is eliminated by the inner loop,

FIG. 3.9.4



the outer voltage control loop does not have a two-pole resonant (second-order) characteristic. However, the RHP zero is clearly still present with current-mode control.

1. Explain the cause of the right-half-plane zero. 2. Which power supply topologies display a right-half-plane zero in their duty ratio to output transfer functions? 3. In simple terms, explain the dynamics of the right-half-plane zero as applied to a fixedfrequency duty-ratio-controlled boost converter. 4. What methods are normally used to prevent instability in systems which have a righthalf-plane zero in the transfer function?