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the main challenge is the dynamic interaction among the control loops. UK c Simulation and Studies. However.Electric Power Systems Research 77 (2007) 721–729 Control system design for VSC transmission Dragan Jovcic a. Box 27. pe Keywords: VSC transmission. inverter AC voltage and the DC power. Ref. Tel. Lisa Lamont b. AREVA T & D. Introduction Corresponding author.: +44 1224 272 336. The main advantage of VSC power transmission is the high controllability.2 a b Received 22 June 2005. State-space methods. la.V. University of Ulster. Eigenvalue and robustness analysis with MATLAB software shows that the best fast feedback signals are inverter DC voltage and rectiﬁer AC voltage q component. received in revised form 6 April 2006. The proposed controller is tested using PSCAD/EMTDC for a wide range of small-signal step inputs and the design performance is conﬁrmed.06.ac. It is proposed in this study that the overall system stability and good robustness should be achieved with two high-gain feedback loops. Root loci. © 2006 Elsevier B. the ability to control independently active and reactive power at each terminal and the possibility for linking with dead networks.1 .1016/j. Scotland AB23 3UE. a complete VSC transmission system has four control inputs. The converter topologies and their ﬁring controls are in the development stage at many research centers.uk (L. These methods use fast-feedback to linearise.ac. The d–q current control reference inputs are further used for implementing P–V (or P–Q. 0378-7796/$ – see front matter © 2006 Elsevier B.com (K. [3. The fault controller regulates the local DC currents at each converter. decouple and simplify the feedback dynamics for d and q axis currents.jovcic@abdn. Stafford ST17 4LN. Refs. The possible issues with controllers [3–5] in VSC transmission are identiﬁed: al co Engineering Department. accepted 19 June 2006 Available online 4 August 2006 Abstract This paper investigates a suitable control system for a DC transmission system based on voltage source converters (VSC). The design is also tested for typical fault scenarios on AC and DC side to verify the fault controller operation. The th o r's rs on disadvantages are known as higher power losses and higher capital cost compared with conventional HVDC [1. The VSC transmission control under fault conditions is achieved with a separate controller that takes over system control for fault-level currents. 2 Tel. it is a truly non-linear multiple-input multiple-output (MIMO) system. but it is widely believed that some form of pulse width modulation (PWM) control with two control inputs will normally be used. University of Aberdeen. Because of the strong interactions among the control channels. UK Electrical and Mechanical Engineering.V.2]. From a control system standpoint.∗ . P. Each of the two VSC converters has two control inputs and the four control channels on a VSC transmission system offer potential for a versatile control. The slow controller consists of three PI controllers that regulate: rectiﬁer AC voltage.4] propose a method for controlling VSC transmission based on a decoupling controller at each converter station. Lamont). Jovcic). keith. Eigenvalues 1.epsr. These characteristics make VSC transmission attractive in many applications like the emerging interconnection with renewable energy sources. Newtownabbey BT37 OQB. All rights reserved.abbott@areva-td. Abbott). Thyristor converters. but it has already been implemented in a number of projects and it is likely to be further employed with higher voltage levels and in wider application areas .email@example.com ∗ Au A voltage source converters (VSC) transmission system is generally similar to its predecessor HVDC transmission system where the main difference is the use of voltage source converters instead of line commutated converters (LCC).  discusses the shortcomings of current measurement lag and further improves decoupling controller using an inner predictive control loop (for a UPFC test system).2006. namely modulation signal magnitude and angle at each of the two converter stations. Because of the semiconductor technology constraints.uk (D.: +44 2890 368565. Keith Abbott c. 1 Tel. doi:10. one at each converter. All rights reserved.: +44 1785 257111. or VDC –Q) control strategies at higher control level. UK py .O. E-mail addresses: d. VCS transmission is at present limited to lower power (around 300 MW). Aberdeen.
 operates at three levels: at the fastest level is the feedback linearisation. where the parameters are given in Appendix A. Each AC system has a typical short circuit level MVA of SCL = Vs2 /zth = 10. / Electric Power Systems Research 77 (2007) 721–729 Fig. for a range of input steps. The paper ﬁrstly reviews the analytical model for VSC transmission. In ref.  predictive current controller improves speed but only for the reference inputs. the model accuracy is conﬁrmed against non-linear simulation on PSCAD/EMTDC  platform. The converters are two-level with bipolar PWM ﬁring signal generation. • Such controller design considers only the local converter dynamics. these measurements are dependent on phase locked loop (PLL) output and they are noise contaminated which reduces the frequency range for accurate measurements.  and only the summary is given here. Jovcic et al. The current controller can regulate fault currents very well. In practice. which are important with VSC transmission. It is th o r's • Feedback linearisation/decoupling assumes that d–q axis currents and DC voltage signals are available at the bandwidth higher than the main control loops.6 in the nominal conﬁguration. are not considered. then the main AC current loops and the DC voltage is the slowest outer control loop. Consequently. 1. . The dynamics of the DC line or the interactions between the two converters. This model enables eigenvalue and frequency domain studies for the overall system in a wide frequency domain. The MATLAB model is a small-signal dynamic model linearised around the steady state. VSC test system schematic. also desired to fully test the design for wide range of step inputs (reference and disturbance) and also for a range of typical fault scenarios. • The control system in ref. on a more accurate non-linear simulator. and the fault controller in Section 6. Each of these subsystems is an independent state-space model and they are linked through the state-space input–output matrices. The controller should further enable current and voltage control during faults and fast fault recoveries. The system consists of a rectiﬁer and inverter equivalent AC systems. This implies larger overshooting and slower responses as shown in ref. which also guarantees good stability and robustness properties.722 D. The PWM frequency ratio is 21. . The controller model also includes a linearised PLL model at each converter station. DC voltage control is very important with VSC converters because of balancing issues since they are currently built of large number of small semiconductor units in series connection. On the other hand. this slows the main control loops. The test system is a 300 MW bi-pole VSC HVDC where only one pole (150 MW) is studied for simplicity. the DC circuit and the controller as shown in Fig. AC inverter system and the DC circuit that includes all control systems.26. • The same current controller is used for system protection under faults. but the control gains for fault conditions are detuned to enable equally satisfactory small-signal dynamics. during disturbances it can have poor responses in terms of overshooting and rise/settling times. The model consists of three individual units: AC rectiﬁer system. corresponding to short circuit ratio SCR = SCL/PDC = 6. and R/X = 0. The test system and modeling pe Rectiﬁer modulation signal magnitude Mmr Rectiﬁer modulation signal angle Mﬁr Inverter modulation signal magnitude Mmi Inverter modulation signal angle Mﬁi rs on Output The test system and the analytical MATLAB model are described in ref. which are optimized with respect to the allowed DC voltage ripple. the disturbance inputs rely on the current measurements. Since the DC voltage is controlled in the outer control loop. Table 1 Control system input and output pairing Input Au The aim of this study is to develop a fast VSC transmission controller with good DC voltage transient behavior at both converters. The small signal design is presented in details in Sections 3–5. 2. In ref. 1. The DC system corresponds to a 100 km cable and includes the DC side capacitors. The design is based on a small-signal linearised VSC transmission model developed earlier on MATLAB platform . Rectiﬁer AC voltage magnitude VACR Rectiﬁer DC power PDCR Inverter AC voltage magnitude VACI Inverter DC voltage VDCI al co py . The controller is tested in Section 7.
[3–5] concentrate on decoupling the two controllers at each converter. In this ﬁgure. The dynamic performance of such control system is however very poor. Only one of the control loops in such controller can have high gains and fast performance. VSC transmission controller structure. very difﬁcult. pe Au th o r's rs on The proposed controller structure is presented in Fig. . like LQG or Hinf . These considerations together with high converter harmonics make the application of conventional advanced control theories. To enable good robustness and disturbance rejection at each AC system. and high performance regulation of the DC voltage. The dynamic interactions between these two systems have important effect on VSC transmission dynamics and should be studied in controller design. The PI controller design rules are used (assuming all other loops are disconnected). 2. . This design approach considers dynamics of the overall AC–DC–AC system. 2.D. / Electric Power Systems Research 77 (2007) 721–729 723 Fig. the DC voltage controller at inverter side is designed ﬁrstly. because of the strong interactions among the control loops.e. Because of the interactions. 3. We can observe that the eigenvalues (diamonds) on branches A and B have poor damping and this will lead to low quality dynamic properties. Because of importance of accurate DC voltage control. and also it is difﬁcult to transmit on-line signals between rectiﬁer and inverter considering that the length of DC line can be very large. An HVDC system with the two connecting AC systems can be viewed as a dynamic system consisting of two coupled subsystems. i. in developing the controller. only several most dominant eigenvalues are shown for simplicity. We note that the considered AC–DC–AC system is complex. higher order system (model is of 34th order). Jovcic et al. VSC transmission controller structure The VSC transmission system is viewed as a multivariable four-input four-output plant. even modest gains lead to instabilities. If a PI control is used with each of these control loops it is possible to achieve decoupled steady-state control and output regulation as it is shown in ref. it is necessary to have a high-gain feedback controller at each converter station. There is a high-gain fast controller at rectiﬁer converter that rejects rectiﬁer side disturbances. The control inputs and the system outputs are paired as it is shown in Table 1. from HVDC system viewpoint this is a “local approach” since it neglects the DC line dynamics and the interactions between the two converters. 3 as diamonds. whereas the other variables have large overshootings and long settling times. The design in this research is directed primarily on resolving interactions between the two converters by considering dominant dynamics of the overall AC–DC–AC system. the rectiﬁer and the inverter system. multivariable. 4. While the designs in refs. The best achievable location of eigenvalues with a single PI controller is shown in Fig. Fast controller design The fast controller has crucial inﬂuence on the stability. and a fast inverter controller that improves inverter side stability. al co py . as shown in the study for conventional HVDC in ref. good robustness for AC parameter changes at each AC system. and the primary design goals are: good stability margins. The main design effort is therefore focused on developing structure and parameters of these two loops in such way that they do not negatively interact.
whereas the DC system parameters are typically constant. active and reactive power. represented by the lead compensator in Fig. As the result. namely: the two components of AC voltage and AC current. 3. and with the lead ﬁlter. which is important for eliminating rectiﬁer side disturbances. however. the improvement is modest and the eigenvalues on the branch B deteriorate.724 D. 3 lying on the branches A and B. We change the rectiﬁer and inverter co py . 4. thus moving roots to stable region.8]. Root locus with stabilizing VACRq feedback. to the left region with better damping. The candidate feedback signals are all locally available variables at the rectiﬁer converter. the analysis is centered on eigenvalue positioning and system robustness criteria. the best feedback signal is the rectiﬁer AC voltage q component (VACRq ) with rectiﬁer modulation magnitude (Mmr ). 5. Diamonds represent open loop eigenvalues (VDCI control only). which gives root locus as shown in Fig. 2. To stabilize the high frequency root locus and improve transient performance a zero is added in the rectiﬁer fast controller. the ﬁnal root locus is shown in Fig. / Electric Power Systems Research 77 (2007) 721–729 Fig. which are denoted by diamonds. 4. Note that the AC parameters can be expected to vary during the operation because of different topologies and loading [3. Root locus with stabilizing VACRq feedback. rs on al The robustness is tested during the design by changing parameters of the two AC systems. Fig. The goal is to move the two dominant eigenvalue pairs in Fig. All combinations of the ten outputs with each of the two rectiﬁer control inputs are evaluated and compared. We ﬁrstly create the list of candidate rectiﬁer feedback signals and examine the system performance for each candidate signal assuming a low order feedback controller. Au th o r's pe Fig. This signal is selected for feedback since it improves the position of the dominant eigenvalues (branch A). Considering the primary design goals. An additional fast feedback loop at rectiﬁer side is designed using root locus rules and the robustness indicators. Most importantly however because of the good direction of root locus branches it is possible to use high-gain rectiﬁer feedback. Jovcic et al. A particular attention is paid to the feedback signal selection at rectiﬁer side in order to avoid complex highorder controllers. 3. We can see that the dominant oscillatory mode (branch A ) has much better damping and also other modes have improved dynamics. a rectiﬁer fast controller is added. Robust stability condition for the range of rectiﬁer AC system strength (3 < SCL < 10): (a) systems with only VDCI feedback and (b) system with VDCI feedback and an additional VACRq fast stabilizing feedback. At the next step. However. and DC side voltages and currents. but the input and disturbance time domain responses are also monitored. which improves robustness. A systematic analysis with all candidate signals is carried and the results show that none of the 20 input–output combinations gives satisfactory improvement. A zero in the feedback transfer function increases the angles for asymptotes in the root locus .
5(a) that if we do not use high-gain feedback at rectiﬁer side (only fast inverter VDC feedback control is used) the system is sensitive to the changes in the rectiﬁer AC structure and the small-gain condition is not satisﬁed. / Electric Power Systems Research 77 (2007) 721–729 725 AC system strength in a wide range 3 < SCL < 10 (corresponding to 2 < SCR < 6. Therefore during the faults. the PI controller zero (z = −ki /kp ) and the controller gain kp . On the other hand. 6 shows the root locus for the rectiﬁer AC voltage feedback controller where the open loop system is the system with fast controller (the system designed in Section 4). they are not critical for stability. 6. Fig. which is sometimes used with power electronic drives . This is the control method that resembles the parallel current control. at each converter we have a high-gain voltage and current controller. the fault control disables (through the minimum elements) only the slow controllers. 5(b). The root locus method is used assuming the system with the fast controller as the open loop plant. but they must be incorporated to enable steady-state regulation of the output variables. Similar tests demonstrate that the additional feedback loop at rectiﬁer side also improves inverter side robustness. and on the stability margins. and their performance requirement is a zero-error output regulation with some reasonable settling time Ts < 400 ms. However. The system robustness is then tested using the small-gain theorem . In this case. 2. The plant transfer function with varying parameters is G(s) and it is represented using multiplicative uncertainty as: G(s) = Gn (s)(1 + M(s)) (2) pe 5. The system stability is guaranteed in the presence of multiplicative uncertainty M(s) if: M(s) < 1 T (s) (1) where T(s) is the complementary sensitivity function. 5 shows the robustness testing for the rectiﬁer AC system.I in Fig. respectively. the system with fast feedback at rectiﬁer is able to tolerate wide changes in the AC system strength as shown in Fig. as shown in Fig. The branch D also has negative inﬂuence after some initial improvements for low gains. Fig. We observe that branch C has negative inﬂuence and very fast approaching the Imaginary Au th o r's rs where Gn (s) is the nominal plant model. By reducing modulation magnitude. 2. Slow regulating controller design The two fast control loops are primarily responsible for the system stability and the disturbance rejection/robustness properties. al co py . it would act as a ﬁrm voltage source and this would cause high over-currents during faults. 2. The VSC transmission fault controller is inactive during the normal operation and it is designed to take over the system control during the fault conditions. Root locus with rectiﬁer AC voltage feedback. whereas the fast small-signal control loops are still active during the faults. in order to enable satisfactory fault ride-through. Slow controller design.6) by changing RACSR. The feedback ﬁlter parameters and the location of zero will change the shape of the root locus at higher and lower frequencies. and they are ﬁrstly determined. the AC voltage directly reduces and by keeping the AC voltage angle to zero the power transfer is reduced. Diamonds represent open loop eigenvalues (fast controller). VACI and PDCR . simulation shows that the best transient (fault recovery) performance is achieved if we use modulation magnitude at inverter side and modulation angle at rectiﬁer side. 2. 1 and by keeping the impedance angle (R/X) unchanged. is in general negative. It is found that the inﬂuence of slow feedback loops on the fast controller performance. 6 and with some iterative root-locus design it is possible to design the remaining two slow loops to enable good tracking of individual reference signals and only minimal deterioration of the fast controller performance. the fault controllers can reduce fault current by either acting on the modulation magnitude or on the modulation angle control input. The ﬁnally selected controller parameters are shown in Fig. The controller for fault conditions has primary task of overcurrent reduction. Since this controller is based on fast DC voltage control. The transition between steady state and fault control is achieved using the minimum elements. Fig. as seen in Fig. noted as fast controller. In general. axis implying the use of very low gains.D. Using a similar method as in Fig. Jovcic et al. It is seen in Fig. With each loop there are three design parameters: the feedback ﬁlter constant. the gains of the feedback controllers are increased to the point where they start interfering with the fast control loops (the gains are relatively low and root locus branches are short). 6. These three loops do not require fast responses. Since we are also interested in regulating the system outputs to the reference values we design PI controllers for the three loops: VACR . These results show that with HVDC transmission it is very important to have two high-gain. The ﬁnal controller gains are given in Fig. By observing the root locus and the VDCI responses. one at rectiﬁer and the other at inverter terminals.I and LACSR. VSC transmission control under faults on The small signal controller in Sections 4 and 5 is designed for the operation only around the steady state. and coordinated control loops.
The inverter converter regulates the fault currents in the negative direction. In the top graph we see that DC voltage with Fig. (b) at inverter side. th o r's pe Fig. Fig. 2.726 D. System response following a 10% DC voltage reference step. The references for the rectiﬁer controllers (AC voltage and DC power) are made dependent on the low-bandwidth ﬁltered rectiﬁer AC voltage. Protection zone for rectiﬁer and inverter controllers. al co py . The current controller structure is shown in Fig. and also location for the simulated faults. In order to further reduce the fault stresses. 7 shows the protection zone for each of the converter controllers. and rectiﬁer side traces are dotted lines. the reference signals for steady-state controllers are reduced during faults. The new controller is compared against the decoupling predictive VSC converter as presented in ref. 10 shows the system response after a 10% step on the VDCI reference. 8. At the simulation stage the controller gains are tuned to ﬁnal values. as represented by the “reference calculation” blocks in Fig. Fig. Fig. DC voltage reference calculation. 9. 8. to enable comparison. 7. Top: DC voltage. It is labeled as predictive in ﬁgures in this section. To simplify presentation the following curve labeling is used: thick traces correspond to the new controller. 7. as shown in Fig.1. The rectiﬁer converter controls the current in the positive direction (normal transfer direction) and it reduces overcurrents in case of faults anywhere to the right of the converter. System response following a 10% voltage drop (negative step 130 kV→117 kV) on the inverter AC source (Vsi ). Top: DC voltage. rs on 7. as shown in Fig. 11. 2. 10. The current controllers are connected to the control inputs as shown in Fig. Steady-state controller The designed system is simulated in PSCAD/EMTDC and a range of tests is performed. 9. / Electric Power Systems Research 77 (2007) 721–729 Fig. This strategy reduces power transfer during faults and enables gradual fault recovery. The predictive controller uses the same outer feedback loops as in Table 1. Simulated fault location is also shown. . and similarly references on the inverter side are dependent on the inverter AC voltage. Jovcic et al. bottom: AC terminal voltages. Simulation results Au Fig. 2. 8. Since it regulates the fault current in the same direction as the nominal current the rectiﬁer current limiter has current reference value at 30% above the nominal current. It has the current reference value of 0 and the current feedback sign is positive in order to activate the controller only in the case of negative currents. it prevents high currents in case of faults on the rectiﬁer AC system or on the DC system.e. bottom: AC terminal voltages. i. which are shown in Fig. Current limiting controller: (a) at rectiﬁer side.
signiﬁcantly outperforming the predictive controller. 11 and 12 implying that the system with the new controller is well “balanced” against rectiﬁer or inverter disturbances. Fig. rs the new controller responds very fast and with minimal overshooting. Top: DC voltage. It is evident that stability and disturbance rejection with the new controller are excellent. The inverter AC system strength is reduced over three times. to co py . Fig. System response following a 10% DC power reference step.D. bottom: DC current.1 s low resistance DC line fault. Top: DC voltage. Au th o r's pe Fig. but the predictive controller demonstrates lower AC disturbances as the result of internal local decoupling at each converter. / Electric Power Systems Research 77 (2007) 721–729 727 Fig. The lower graph shows that the rectiﬁer and inverter AC voltage controllers are able to maintain the control variables at the references. conﬁrming that slow controllers are able to regulate outputs within desired settling time. 13. Fig. on al Fig. 11. 15. The decoupling predictive controller cannot perform very fast in face of AC voltage disturbances. We also observe that the AC voltage controllers are able to maintain reference output values. 13 shows a 10% reference step on the DC power. 12 shows similar disturbance simulation on rectiﬁer side and equally good response are observed. System response following a 0. System response following a 10% DC voltage reference step with reduced strength at inverter side (SCL = 3). 14. bottom: AC terminal voltages. In Fig. Top: DC power. middle: AC terminal voltages. middle: AC terminal voltages. we test system for a common AC disturbance. System response following a 10% voltage drop (negative step 130 kV→117 kV) on the rectiﬁer AC source (Vsr ). Fig. and much better than with the predictive controller. 14 is a further practical robustness testing result. simulated as 10% voltage drop on the (remote source Vsi in Fig. bottom: DC voltage. Jovcic et al. 1) inverter side. We further observe similar magnitude of transient deviations in Figs. 12.
and DC power at rectiﬁer side. A comparison of current controller designs for VSC-HVDC. Topologies for VSC transmission. If not controlled.1 System parameter values Notation LACSR.L.  M. 16 conﬁrms that overvoltages and over-currents are kept low during an inverter fault.0135 H 34e − 06 F 130/90 Notation CDCR. Xu. Conclusions This paper presents a novel controller design for a VSC transmission system. middle: AC terminal voltages.R.1. 2001. following the root locus rules and robustness indicators. 2001. We note good dynamic properties and by comparing with the response in Fig. 10. bottom: DC current.I LACTSR. The slow controller consists of three PI regulating control loops using as feedback signals: AC voltage at rectiﬁer side. Appendix A. K. Note also larger transient over-voltages and over-currents with the decoupling-predictive control.36 1e − 09 F 0. Operational experience of HVDC light. in: Tenth European Conference on Power Electronics and Applications. model.1 s DC line fault. UK. Fig. It is postulated that system stability and good robustness can be achieved with two high-gain feedback loops: one at inverter side and another at rectiﬁer side. 119–124. The authors gratefully acknowledge the resources provided by AREVA T&D UK Ltd. September 2003.G. K. The fault controllers take over system control under fault conditions by overriding two slow control loops. The design is based on an accurate analytical Au th o r's rs on al co py . this fault would lead to very high (over 4 kA) positive rectiﬁer currents and negative inverter currents. good robustness and notably better performance than a controller based on two decoupling-predictive converter controllers.  J.2. Abbott. Poullain. in: Seventh International Conference on AC–DC Power Transmission IEE. The following typical HVDC faults are applied: a low impedance three-phase to ground AC faults at each converter terminal. The simulation tests on PSCAD/EMTDC conﬁrm that for a range of step inputs the system has high stability margins. pp. A. which complements the high-gain DC voltage feedback at inverter side. Durrant. in: Seventh International Conference on AC–DC Power Transmission IEE. The bottom graph demonstrates that the fault controllers are able to reduce the fault current to reference values (1. Northern Ireland. Jovcic et al. The testing for AC and DC system faults also conﬁrm low overvoltage and low over-current responses. Thomas.I LDCR. 119–124.728 D. VSC transmission is controlled using dedicated current controllers. System response following a ﬁve-cycle low resistance three-phase fault at the inverter AC bus. and a low impedance DC cable to ground fault. H. and a step is applied at the reference DC voltage. London. Benchaib. L. enabling coordinated study of the overall AC–DC–AC system. 15 shows a 0.I CDC n Value 0.052 H 0. Ericsson.T. Werner.  B.033 H 4. pp. Control under faults pe Fig. only little deviation in the performance is evident. Under the fault conditions.I RACSR. for system parameter values.I PREFDCR VREFDCI VREFACR VREFACI Value 40e − 06 F 1.I CACSR.85 150 MW 150 kV 130 kV 130 kV SCL = 3.3 and 0 kA) for the fault duration. 16. Acknowledgments This project is supported by Department of Employment and Learning (DEL).–Power Electronic Systems.I RDCR. and we see that after the fault clearing transition to the steady control is fast. The tests with rectiﬁer faults have shown similar results. / Electric Power Systems Research 77 (2007) 721–729 Table A. Andersen. S. Wong. References  K. UK. in: Seventh International This section presents the system testing with fault scenarios. Analysis of a robust DC-bus voltage control system for a VSC transmission scheme. 7. Top: DC voltage. Fig. Parameters See Table A. The best fast stabilizing feedback at rectiﬁer side is found to be AC voltage q component. 8. The two control loops can be designed using a suitable MATLAB model. AC voltage at inverter side. London.
Povh. / Electric Power Systems Research 77 (2007) 721–729 Conference on AC–DC Power Transmission IEE. He is a member of IEEE. pp. L. Mohan. IEE Proc. Manitoba HVDC research Center “PSCAD/EMTDC users manual”. I. I. Keith has published 20 technical papers and is a Chartered Engineer.E. HVDC systems and FACTS. D. Papic. 12 (November 4) (1997) 1734–1739. responsible for all ALSTOM’s HVDC. N. Postlethwaite. in: Applications and Design. (Hons. Multivariable Feedback Control.D. Robbins. W. Gen. 119–124. Member of the IEEE and Member of CIGRE Working Group 38-14 Simulation of HVDC and FACTS. 2003. 1997. UK in 2001 and is currently studying for Ph. Yugoslavia in 1993 and Ph. He also worked for the University of Ulster in period 2000–2004 and as a design engineer in the New Zealand power industry from 1999–2000. L. degree from the University of Ulster. in Control Engineering from the University of Belgrade. John Wiley and Sons. 1996. Distrib.) degree from University of Ulster. P. Jovcic et al.Sc.     Dragan Jovcic obtained a B.A. Power Eng. SVC and STATCOM analysis. K. Winnipeg. Lisa Lamont obtained B. Gen. England. M. 1995. Skogestad. degree in Electrical Engineering from the University of Auckland. Zunko. Pahalawaththa. D. Ogata. S. Inverter controller for very weak receiving AC systems. From 1981 to 1997. VSC Transmission model for analytical studies. His research interests lie in the areas of control systems. Soc. Keith joined ALSTOM T&D Power Electronic Systems in 1997 and is currently manager of the Simulation and Studies Department. IEEE 3 (July 13–17) (2003) 1737–1742. 146 (May 3) (1999) 235–240. he was head of department of Electrical & Electronic Engineering and associate dean of Engineering at Staffordshire University. Her research areas of interest are FACTS and control systems. Power Electronics Converters. Electronic & Control Engineering.Sc. Transm. IEEE Trans. 729  with the University of Aberdeen.D. London. Xu.) in Electrical Engineering in 1966 and M. N. New Zealand in 1999. She is a student member of IEEE. member of the IEE.M. Lamont. John Wiley & Sons. Meet.D. T. Keith Abbott obtained his B. by research at the University of Newcastle-upon-Tyne. He is currently a lecturer Au th o r's pe rs on al co   py . M. UK. D. Basic control of uniﬁed power ﬂow controller. Jovcic.He lectured from 1966 to 1981 at Sunderland Polytechnic in the Department of Electrical. Power Syst. Jovcic. where he has been since 2004. Zavahir. Scotland. Weinhold. Undeland. Prentice Hall International. (Hons.Sc. UK. Modern Control Engineering.P. 2001.
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