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CDX-C5850R

SERVICE MANUAL
AEP Model UK Model

Model Name Using Similar Mechanism CD Drive Mechanism Type Optical Pick-up Name

CDX-C570R/C580R MG-363T-121 KSS-521A

SPECIFICATIONS
CD player section
System Signal-to-noise ratio Frequency response Wow and flutter Compact disc digital audio system 90 dB 10 – 20,000 Hz Below measurable limit

Power amplifier section
Outputs Speaker outputs (sure seal connectors) Speaker impedance 4 – 8 ohms Maximum power output 40 W × 4 (at 4 ohms)

Tuner section
FM Tuning range Aerial terminal Intermediate frequency Usable sensitivity Selectivity Signal-to-noise ratio 87.5 – 108.0 MHz External aerial connector 10.7 MHz 12 dBf 75 dB at 400 kHz 65 dB (stereo), 68 dB (mono) Harmonic distortion at 1 kHz 0.8% (stereo), 0.6% (mono) Separation 35 dB at 1 kHz Frequency response 30 – 15,000 Hz MW/LW Tuning range

General
Outputs Line outputs (2) Power aerial relay control lead Power amplifier control lead Telephone ATT control lead Bass ±8 dB at 100 Hz Treble ±8 dB at 10 kHz 12 V DC car battery (negative ground) Approx. 178 × 50 × 185 mm (w/h/d) Approx. 182 × 53 × 162 mm (w/h/d) Approx. 1.2 kg Parts for installation and connections (1 set) Front panel case (1)

Tone controls Power requirements Dimensions Mounting dimension Mass Supplied accessories

MW: 531 – 1,602 kHz LW: 153 – 281 kHz Aerial terminal External aerial connector Intermediate frequency 10.7 MHz / 450 kHz Sensitivity MW: 30 µV LW: 50 µV

Design and specifications are subject to change without notice.

FM/MW/LW COMPACT DISC PLAYER
MICROFILM

–1–

(Open) LCD view angle alignment output (Not used in this set. Pin Name I/O 1 LD ON O Laser ON/OFF control output 2 3 4 5 6 7 8 9 – 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 – 48 49 50 51 52 53 54 55 FOK XLAT25 DATA25 XRST GFS NIL VCC NIL FLS SI/NOSE1 LCD SO/FLS SO LCD CKO BEEP NIL SQ SI NIL SQ CKO UNI SI UNI SO UNI CK C IN SIRCS TXT SI NIL TXT CKO CLOK25 SYSRST DEEMPH AMP ATT MD ON VSS C CD ON BUS ON NIL DVCC DVSS NIL ANGLE AVCC AVRH AVRL AVSS KEY IN0 – 2 RC IN0 QUALITY NIL MPDH S-METER VCC NS MASK I O O O I — — — I O O O — I — O I O I/O I I I — O O O O O O — — O O O — — — O — — — — I I I — I I — O Focus OK signal detection input CD signal processing latch output CD signal serial data output Reset output to CD signal processor IC. (Connect to ground in this set.) Analog power supply pin (+5 V) VREF + input of A/D converter.) Tuner multi path input S-meter voltage detection input Power supply pin (+5 V) Noise detection output Pin Description – 22 – . (Connect to ground in this set. VREF – input of A/D converter.) CD-TEXT data read clock output CD signal processing serial clock output System reset output De-emphasis output Power amplifier attenuator control output CD mechanism power control output Ground Power stabilization capacitor pin CD power control output BUS ON control output Power control output of A/D conversion.) Sub Q read clock output BUS system serial interface input BUS system serial interface output BUS system serial clock input/output Track jump No. IC PIN DESCRIPTION • IC801 MB90574APMT-G-200-BND (SYSTEM CONTROL) Pin No.SECTION 4 DIAGRAMS 4-1. (Open) Sub Q data input Not used. GFS signal detection input Not used. Not used. Analog ground Key input 0 – 2 Rotary commander input 0 Noise detection input Not used. VREF input of D/A converter. Ground of D/A converter. (Open) Front panel attachment detection input LCD serial data output LCD serial clock output BEEP output Not used. count input Remote commander input CD-TEXT data input Not used.) Power supply pin (+5 V) Not used. (Connect to ground in this set. (Connect to ground in this set.

103 104 105 106. Test mode initial setting detection input RDS IC data acquisition detection input FM ON output Tuner power control output I2C BUS serial data input/output I2C BUS serial clock output Front panel OPEN detection input Sub ceramic oscillator output (32 kHz) Sub ceramic oscillator input (32 kHz) SCOR signal detection input Backup power detection input CD-TEXT data setting completion signal detection input CD SENS signal detection input Key input acknowledge Telephone attenuate detection input Tuner stereo signal detection input/forced monaural output SEEK output Signal detector input WIDE select output NARROW select output Hardware standby input (Connect to pin (º (RESET).19 MHz) Power supply pin (+5 V) COM 8V control output Not used.) Operation mode input (Connect to VCC in this set.) LCD chip enable output Flash write input (Fixed at “H” in this set. Loading motor control output (Loading direction) Loading motor control output (Eject direction) Sled limit switch detection input Disc insertion detection input DOWN switch detection input Ground Disc self store detection input – 23 – – 24 – . (Open) Pin No. Fixed at “H” in this set. 89 90 91 92 93 94 95 96 97 98 99 100 101 102. 111 112 113 114 115 116 117 118 119 120 Pin Name ANT REM NIL CTL2 CD LD CD EJ L SW IN SW/(PH1) D SW VSS SELF SW/(IN SW) I/O O — — O O I I I — I Pin Description ANT REMOTE power control output Not used.) Reset input Ground Main ceramic oscillator input (4. (Open) Not used in this set.) Operation mode input (Connect to ground in this set. Accessory power detection input Disc insertion detection photo sensor input (Fixed at “H” in this set. 107 108 109 110 Pin Name AMP ON TXT ON VOL ATT NIL ATT RC IN1 TU ATT VSS NIL SSTOP TEST DAVN FM ON/AM ON TU ON SDA SCL NOSE2 X1A X0A SCOR BU IN DQSY CD SENS NIL TEL ATT ST/MONO SEEKOUT SD IN WIDE NARROW HSTX MD2 MD1.) Fixed at “L” in this set. (Open) Destination select input 1 (Fixed at “L” in this set.Pin No.) Rotary encoder input Illumination power control output System power control output Not used. 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88. Electric volume mute control output Not used. 2 LCD CE FLS W RE IN0. 0 RESET VSS X0 X1 VCC COM8V ON NIL AREA1 AREA2 LOUD BAND ACC IN PH3. UK model) or “H” (German model) in this set.19 MHz) Main ceramic oscillator output (4.) Destination select input 2 (Fixed at “L” (AEP. (Open) IF counter result signal detection input of PLL. 1 ILL ON PW ON NIL I/O O O O — O I O — — I I I O O I/O O I O I I I I I I I I/O O I O O — — — I — I O — O — I I I I I I O I I O O — Pin Description Power amplifier power control output Reset output to CD-TEXT decoder IC. (Open) System attenuate control output Rotary commander shift key input 1 Tuner attenuate output Ground Not used.

Note: • Voltage and waveforms are dc with respect to ground under no-signal conditions. • Refer to page 53 for IC Block Diagrams. SCHEMATIC DIAGRAM — CD MECHANISM SECTION — • Refer to page 32 for Waveforms. no mark : CD PLAY : Impossible to measure ∗ – 35 – – 36 – (Page 41) .CDX-C5850R 4-7.

SCHEMATIC DIAGRAM — MAIN SECTION (1/3) — • Refer to page 55 for IC Block Diagrams. (Page 36) (Page 44) (Page 45) Note: • Voltage is dc with respect to ground under no-signal (detuned) condition. no mark : FM ( ) : MW < > : CD PLAY – 41 – – 42 – .CDX-C5850R 4-9.

no mark : FM ( ) : MW < > : CD PLAY – 43 – – 44 – (Page 45) .CDX-C5850R 4-10. (Page 41) Note: • Voltage is dc with respect to ground under no-signal (detuned) condition. SCHEMATIC DIAGRAM — MAIN SECTION (2/3) — • Refer to page 53 for IC Block Diagrams.

CDX-C5850R 4-11. 4-12. no mark : FM ( ) : MW < > : CD PLAY – 45 – – 46 – . SCHEMATIC DIAGRAM — RELAY SECTION — (Page 42) (Page 51) (Page 44) Note: • Voltage is dc with respect to ground under no-signal (detuned) condition. SCHEMATIC DIAGRAM — MAIN SECTION (3/3) — • Refer to page 55 for IC Block Diagrams.

CDX-C5850R 4-15. SCHEMATIC DIAGRAM — DISPLAY SECTION — (Page 46) Note: • Voltage is dc with respect to ground under no-signal (detuned) condition. no mark : FM – 51 – – 52 – .

OUT TTL 39 DOUT 38 37 36 35 34 C4M FSTT XTSL XTAO XTAI TTL RF IV AMP2 FE BIAS 37 TTL IIL DATA REGISTER INPUT SHIFT REGISTER ADDRESS DECODER FE AMP 20 IIL IIL OUTPUT DECODER 19 CLK XLT 22 21 XRST DATA RF BIAS ASYI ASYO ASYE 14 15 16 17 18 16K RAM ERROR CORRECTOR 3 6 WDCK 19 33 MNTO 20 21 22 23 24 25 26 27 28 29 30 31 32 LRCK PCMD BCLK GTOP XUGF XPCK VDD GFS RFCK C2PO XROF MNT3 MNT1 F 38 F IV AMP TOG1-3 BAL1-3 FZC COMP FS1-4 TG1-2 TM1-7 PS1-4 E 39 18 VCC E IV AMP EI 40 TE AMP BAL1 BAL 3 BAL2 IC3 BA6796FP-T1 OP IN – OP IN + CH3-IN CH2-IN CH1-IN CH1 + CH1 – CH2 + CH2 – CH3 CH2 VCC CH1 HPF COMP VEE LPF COMP TRACKING PHASE COMPENSATION TM6 VREF ISET 17 ISET 28 27 26 25 24 23 22 21 20 19 18 17 16 15 41 TG1 16 TOG1 TOG2 TOG3 TM5 TM4 15 SL O SL M TED 42 LEVEL SHIFT VCC LEVEL SHIFT DRIVE BUFFER DRIVE BUFFER DRIVE BUFFER DRIVE BUFFER LEVEL SHIFT LPFI 43 TEI 44 WINDOW COMP ATSC DFCT TZC COMP FCS PHASE COMPENSATION TM3 TM2 14 SL P THERMAL SHUT DOWN DFCT TM1 FS1 TM7 FS2 13 TA O ATSC 45 TZC 46 TDFCT 47 TG2 LEVEL SHIFT VC 48 FS4 LOGIC CTL1 CTL2 FWD REV V/I DRIVE BUFFER DRIVE BUFFER DRIVE BUFFER DRIVE BUFFER DRIVE BUFFER 1 FEO 2 FEI 3 FDFCT 4 FGD 5 FLB 6 FE O 7 FE M 8 9 SRCH TGU 10 TG2 11 FSET F SET 12 TA M 1 OPOUT 2 CH4-IN 3 CH4 4 CTL1 5 CTL2 6 FWD 7 REV 8 TRAY 9 GND 10 CH5 – 11 COM 12 CH4 + 13 CH3 + 14 CH3 – – 53 – – 54 – .• IC Block Diagrams IC1 CXD2507AQ XLON SPOD SPOC SPOB SPOA CLKO VDD XLTO DATO CNIN SEIN CLOK XLAT IC2 CXA1782BQ PHD 2 RF M RF O PHD RF I CC1 CC2 IIL 36 35 34 33 32 31 30 29 28 27 26 25 64 63 62 61 60 59 58 57 56 55 54 53 52 PSWN 11 MAD 12 IIC-BUS SLAVE TRANSCEIVER 10 SCL 9 SDA 4 4 SIGNAL QUALITY DETECTOR 5 FOK MON MDP MDS LOCK TEST FILO FILI PCO VSS AVSS CLTV AVDD 1 2 3 4 5 6 7 8 9 10 11 12 13 SERVO AUTO SEQUENCER 5 14 CPU INTERFACE SUB CODE PROCESSOR 4 DIGITAL CLV DIGITAL PLL EFM DEMODULATOR 51 50 49 48 47 46 45 44 43 42 41 40 DATA XRST SENS MUTE SQCK SQSO EXCK SBSO SCOR VSS WFCK EMPH AFIN 13 PAUSE DETECTOR INTERFACE REGISTER VDDA VSSA MPX VREF 14 15 16 17 CLOCKED COMPARATOR POWER SUPPLY AND RESET 57kHz 8th ORDER BAND-PASS RDS/RDBS DEMODULATOR RDS/RDBS DECODER OSCILLATOR AND CLOCK TEST CONTROL MULTI-PATH DETECTOR 8 7 6 5 4 DAVN VDDD VSSD OSCI OSC0 APC LEVEL S SCOUT 18 CIN 19 LVIN 20 FOK 3 TCON 2 MPTH 1 MRO MIRR RF IV AMP1 DFCT 3 ASYMMETRY CORRECTOR 5 D/A INTERFACE DIGITAL OUT CLOCK GENERATOR FOK 24 23 LD IC602 SAA6588T-118 PHD 1 CP CB SENS C.

7V LRCIN 4 DIN BCKIN ZERO 5 6 7 INPUT INTERFACE 18 ML/MUTE MODE CONT ROL 17 MC/DM1 16 MD/DM0 15 RSTB 14 MODE ON – + ON + – DIGITAL FILTER THERMAL SHUT DOWN REGULATOR VREF NOISE SHAPER 5LEVE DAC LOWPASS FILTER CMOS AMP 5LEVEL DAC LOWPASS FILTER CMOS AMP 1 AMP ON CIRCUIT ON 2 AMP OUT 3 GND OVER VOLTAGE PROTECT 4 VCC D/C R 8 13 D/C L 12 VOUTL 11 VCC 5 VDD OUT VOUTR 9 AGND 10 – 55 – .IC401 TDA7462 PAUSE DETECT INPUT GAIN & AUTO ZERO TREBLE/ BASS CONTROL CIRCUIT FRONT FADER 28 27 26 25 24 23 SE3L SE3R MUTE SDA SCL PAUSE SE1L SE1R MD+ MD– CDL+ CDL– CDR– CDR+ PDR PDGND PDL SE2L SE2R 1 2 3 4 5 6 7 8 9 10 11 12 13 FRONT SIDE SELECTOR LOUDNESS CONTROL CIRCUIT VOLUME CONTROL CIRCUIT SOFT MUTE VOICE BANDPASS HP LP 22 OUT FL INPUT MULTIPLEXER & MIXING STAGE FRONT FADER COMPANDER REAR FADER LOUDNESS CONTROL CIRCUIT 21 OUT FR REAR SIDE SELECTOR 20 OUT RL INPUT GAIN REAR FADER 19 OUT RR BEEP SUBWOOFER LP FADER 18 SUBOUT+ 17 SUBOUT– SDA SUBWOOFER OUT IIC BUS DIGITAL CONTROL CIRCUIT SCL 16 VDD 15 GND CREF 14 POWER SUPPLY IC702 PCM1717E-ST2 IC901 BA4903 XTI DGND VDD 1 2 3 CLK CONTROL 20 XTO 19 CLKO 5.

IC601 TDA7427AD1TR 28 LPOUT VDD1 LP FM LP HC LP AM V REF 1 2 3 4 INLOCK DETECTOR TEST LOGIC SWITCH LP1/LP2 CHARGE PUMP PHASE COMP 11 BIT PROG COUNTER SWITCH SWM/DIR 6 BIT PROG COUNTER SWITCH SWM/DIR PRE COUNTER :32/33 SWITCH AM/FM 27 VDD2 26 GND AM 25 AM IN LCL/DX SEEK NIL MONO 5 6 7 8 24 FM IN PORT EXTENSION 23 NC OSCIN 9 OSCOUT 10 NC 11 SCL 12 SDA 13 BUS INTERFACE I2C REF OSCILLATOR 16 BIT PROG COUNTER SUPPLY & POWER ON RESET 22 GND D 21 VDD1 20 ADDR 19 HFREF 18 AMOSC 14 BIT PROG COUNTER TIMER CONTROL SWITCH OUT 17 DOUT/INLOCK IF AM 14 SWITCH AM/FM 11-21 BIT PROG COUNTER 16 SSTOP 15 IF FM IC703 LC89170M-T IC803 BA8270F-E2 VDD EXCK 1 14 VDD BUS ON 1 BUS ON SWITCH RESET SWITCH BATTERY SWITCH 14 VCC CPU INTERFACE RST 2 SBSO 2 32 WORD X 8 BIT DUAL PORT RAM CRC CHECKER 13 DQSY BATT 3 SCOR 3 12 SRDT 13 12 11 10 RST BUS ON CLK IN BU IN WFCK 4 11 SCLK MCK 5 XMODE 6 GND 7 TIMING & SYNCHRONIZATION SIGNAL PROTECTION 10 SW2 CLK 4 VREF 5 DATA 6 GND 7 9 DATA IN 8 DATA OUT 9 SW1 8 TEST – 56 – .