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DSP5636XEVMUM/AD 10/01 REV # 1.

DSP5636XEVM

Users Manual

Motorola, Incorporated Semiconductor Products Sector 6501 William Cannon Drive West Austin, TX 78735-8598

This document (and other documents) can be viewed on the World Wide Web at the following URL: http://e-www.motorola.com/webapp/sps/prod_cat This manual is one of a set of documents. You may need the following manuals to have complete product information: DSP56300 Family Manual DSP563xx Users Manuals Technical Data Sheets
OnCE is a trademark of Motorola, Inc. MOTOROLA INC. 2000, 2001

Rev. 1.3; published 10/01 Order this document by DSP5636XEVMUM/AD Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function, or design. Motorola does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. Motorola products are not authorized for use as components in life support devices or systems intended for surgical implant into the body or intended to support or sustain life. Buyer agrees to notify Motorola of any such intended end use whereupon Motorola shall determine availability and suitability of its product or products for the use intended. Motorola and b are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Employment Opportunity /Affirmative Action Employer.

CONTENTS
Paragraph Number Section 1.1 Section 2.1 2.1.1 2.1.2 2.2 2.3 2.3.1 2.3.2 2.3.3 2.3.4 Section 3.1 3.2 3.3 3.3.1 3.3.2 3.4 3.4.1 3.5 3.6 3.7 3.8 3.9 Section 4.1 Section 5.1 Title Page Number

1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 2 Setup and Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Software and Hardware setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Software Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Hardware setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Running the Pass Through Code. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pass Through Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ESAI Receive Interrupt Service Routines. . . . . . . . . . . . . . . . . . . . . . . . . . . ESAI Transmit Interrupt Service Routines . . . . . . . . . . . . . . . . . . . . . . . . . . DAX and DMA Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Main Loop. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 System Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Debug Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . External Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Analog I/O. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Analog Output Channels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Analog Input channels. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A/D Converter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A/D Operational Procedure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DSP Clock. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Host Microcontroller Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operation Mode Selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 2-1 2-1 2-2 2-5 2-5 2-5 2-6 2-6 2-6 3-1 3-1 3-2 3-2 3-3 3-3 3-3 3-3 3-4 3-6 3-6 3-6 3-7

4 Component Datasheets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1 Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1 5 Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1 Evaluation Module Parts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1

AppendixA Parallel Port Interface (PPI) Cable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1 A.1 PPI Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1 A.2 PPI Cable Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1 A.2.1 Connecting to the Target System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2 A.3 Connecting to the DSP5636XEVM for SPI mode . . . . . . . . . . . . . . . . . . . . . . . A-2 A.4 Connecting to the DSP5636XEVM for I2C mode . . . . . . . . . . . . . . . . . . . . . . . A-3 A.5 PPI Software Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-5 A.6 PPI Driver Libraries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-5 A.7 Demo Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-6

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CONTENTS
Paragraph Number A.8 A.9 Title Page Number

PPP Debugger Development Software. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-6 PPI Communication Recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-7

AppendixB Pass Through Code. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-1 B.1 Pass Through Code. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-1 AppendixC Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-1

INDEX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I-i

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List of Figures
Figure Number 1-1 2-1 2-2 3-1 3-2 3-3 3-4 A-1 A-2 Title Page Number

DSP5636XEVM Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-2 DSP5636XEVM Cable Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-2 EVM Board Layout and Default Jumper Settings . . . . . . . . . . . . . . . . . . . . . . . . . .2-4 External Memory Interface Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-2 Analog I/O Connectors (Rear View of EVM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-4 Digital I/O Connectors (Rear View of EVM). . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-5 Evaluation Module Power Supply Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-7 Adapter Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-4 Standard PPI Target Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-5

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List of Figures
Figure Number Title Page Number

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List of Tables
Table Number 2-1 2-2 3-1 3-2 3-3 4-1 4-2 5-1 A-1 Title Page Number

Jumpers as Installed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-3 DSP Core Voltage Selection Jumper (JP14). . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-3 Digital S/PDIF Output Source Selection Jumper (JP26) . . . . . . . . . . . . . . . . . . . .3-5 S/PDIF Transmitter Serial Data Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-5 DSP Operating Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-6 Documentation Location. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-1 Other Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-2 EVM Parts List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-1 SPI and I2C Required Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2

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List of Tables
Table Number Title Page Number

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About This Manual


This manual describes the functionality and use of the DSP5636XEVM (Evaluation Module). The DSP5636XEVM supports the DSP56362, DSP56364, DSP56366, and DSP56367 processors. Motorola offers several different ROM software versions of the DSP56362, DSP56366, and DSP56367 processors that are supported with this EVM. The various ROM versions are available to support technologies from third party licenses, such as Dolby Laboratories, DTS, and others. Note: To use the DSP56364, users must install an adaptor module into the EVM. Order this adapter from a Motorola distributor using part number DSP56364ADAPTER.

Organization
This book is organized into 5 sections and three appendices: Section 1, Overview Section 2, Setup and Operation Section 3, System Description Section 4, Component Datasheets Section 5, Bill of Materials Appendix A, Parallel Port Interface (PPI) Cable Appendix B, Pass Through Code Appendix C, Schematics

Suggested Reading
Additional reading that provides background for the information in this guide as well as general information about the Multimedia Architecture: IEC 958 Digital Audio Interface Standard Appropriate device users manual DSP56300 Family Manual

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About This Manual

Conventions
This document uses the following notational conventions: Messages displayed on screen and example code are presented in the courier fixedwidth font. Information entered by users is shown in bold font. File names, program names, and directories are in italics.

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Overview Introduction

SECTION OVERVIEW
1.1 INTRODUCTION

The DSP5636XEVM supports the DSP56362, DSP56364, DSP56366, and the DSP56367 processors. The following list highlights the primary features of the DSP5636XEVM. 24-bit DSP5636x Digital Signal Processors operating at speeds up to 150MHz. 256k x 24-bits of external SRAM and 128k x 8-bits of Flash ROM. One 20-bit stereo Analog-to-Digital converter (ADC), two 24-bit 6 channel Digital-to-Analog converters (DACs). RCA jacks for all analog audio input and output connections. Optical and transformer-isolated electrical S/PDIF stereo digital audio inputs and outputs. 50-pin expansion connector that provides capability for expansion and/or substitution of other input/output peripherals. This connector also simplifies interprocessor communication between other Motorola Evaluation Modules. MC68HC705C8 microcontroller that performs RS-232-to-OnCE port command conversions. Socketed DSP on the board for ease of changing the device. MC68HC908GP32 8 bit microcontroller for EVM intitialization, LCD display and button controls.

The following figure shows the DSP5636XEVM block diagram.

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External Memory User Interface


LCD Display

DSP5636X

SRAM
256K x 24

FLASH
256K x 8

68HC908GP32
Buttons/Keypad

Audio I/O
SHI
SDI0 A/D
PCM1800

Analog Input

DIR
Pa ra lle l Po rt

SDI1

AKM4112A

Digital Input

Debug
RS-232

DAX

SPDIF
Transmitter

Optical/Electrical L/R Main

SDO0 68HC05C3
68HC705C3

SDO1 SDO2 ESAI SDO3 SDO4

D/A
PCM1600

L/R Surround Center/Sub Mix down Auxiliary Surround

D/A
PCM1600

JTAG

2nd ESAI

Figure 1-1 DSP5636XEVM Block Diagram

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Setup and Operation Software and Hardware setup

SECTION

SETUP AND OPERATION


2.1 SOFTWARE AND HARDWARE SETUP

This section describes the hardware setup and software installation which is required to load, run, and debug programs in the DSP.

2.1.1

SOFTWARE INSTALLATION

The Evaluation Module demonstration software consists of a Domain Technologies CD containing Windows style user interface debug software and demonstration/test code. Use the following steps to install the software: 1. Insert the Domain Technologies CD into the CD-ROM drive. 2. Select and run the setup.exe program. 3. Select DSP563xxEVM from the menu. 4. Select Debug 56k from the menu. 5. A Software License Agreement will appear. To install EVM563xx, users must accept this agreement. Click on Yes from the menu. 6. A new screen will appear. Enter your name and company. Then click on NEXT. 7. Setup will install EVM563xx in the following directory: C:\Program Files\DomTech\EVM563xx Click on NEXT. 8. Setup will add program icons to the Program Folder. Users may enter a new folder name, or select one from the existing Folders list. Click on NEXT to continue. 9. Setup has enough information to start copying the program files. Click on NEXT to begin copying files. 10. The screen will clear and the Domain menu will appear. Click EXIT.

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Setup and Operation Software and Hardware setup

2.1.2

HARDWARE SETUP

Figure 2-1 shows the interconnection diagram for connecting the PC and the external power supply to the Evaluation Module board.
Connect cable to RS-232 port

P1 P2 or P3

PC-compatible Computer

External 8.5-9V Power

DB9 Interface Cable

DSP5636XEVM Figure 2-1 DSP5636XEVM Cable Connections Several jumpers on the board are available to set up the correct modes and other hardware settings. The jumpers should be in the default configuration, as shown in Figure 2-2. Note: It is critical that the DSP core voltage is set correctly using jumper JP14. Once the jumpers are set, use the following check list to proceed. Pin 1 can be identified by the notched corner on the silk-screening.

1. If a DSP56362 is installed on the board, then the jumper must be installed at pins 1 and 2 of JP29. If this is not done correctly, the DSP may not be properly grounded. In the case of a DSP56366 or a DSP56367 this jumper setting does not apply. 2. Set the DSP core voltage according to Table 2-2. See the specific datasheet to determine appropriate core voltage. 3. Connect the DB9P interface cable to the RS-232 port connection on the PC and P1 on the Evaluation Module board. This provides the connection that allows the PC to control board function. 4. Apply 8.5-9V AC/DC 1 amp power to the P2 or P3 connector on the Evaluation Module board. 5. The green Power LED will light when power is correctly applied.

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Setup and Operation Software and Hardware setup

Table 2-1 Jumpers as Installed


Jumper JP1 JP2 JP4 JP5 JP26 JP14 From 1 1 1 1 1 1 To 2 2 2 2 2 2 15 17 1 JP27 5 1 JP8 5 7 2 6 2 6 8 JP12 19 21 23 25 29 31 33 35 43 45 47 16 18 20 22 24 26 30 32 34 36 44 46 48 Jumper From 3 5 7 9 To 4 6 8 10 Jumper JP25 JP31 JP29 From 1 3 1 To 2 4 2

The DSP core voltage can be either 3.3v or 1.8v. It is critical that the correct voltage is set for the type of DSP installed on the board. See the specific DSP datasheet to determine appropriate core voltage. Table 2-2 DSP Core Voltage Selection Jumper (JP14)
Core Voltage 3.3v 1.8v JP14 1-2 2-3

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Figure 2-2 EVM Board Layout and Default Jumper Settings

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Setup and Operation Running the Pass Through Code

2.2

RUNNING THE PASS THROUGH CODE

An example program, passthru.asm, is provided to demonstrate EVM operation. Follow the procedures in the previous sections to configure the hardware and the Domain Debugger software. All jumpers should be installed as described in Table 2-1 and Figure 2-2. The following steps describe the hardware connections and how to load and run the Pass Through Code. 1. Connect an analog or digital output from a source such as a DVD or CD player to the corresponding input(s) on the EVM. Refer to Figure 3-2 and Figure 3-3 for location of the connectors on the EVM. Note: If using a digital input, use the Setup menu on the LCD display described in Digital I/O on page 3-4 to select either electrical or optical input.

2. Connect audio cables from the analog outputs, L and R at J7, to an audio amplifier. See Figure 3-2 for location of the connectors. 3. Apply power to the EVM and start the Domain Debugger software. 4. Load the passthru.cld program and run it using the Domain Debugger. Refer to the documentation for the Domain Debugger for information on loading and running a program.

2.3

PASS THROUGH OPERATION

The example program is a pass through routine where the DSP receives and passes back the audio data unaltered through the ESAI and DAX ports. The following sections briefly describe the main sections of the Pass Through code. All source code for the pass through code is included and does contain comments.

2.3.1

ESAI RECEIVE INTERRUPT SERVICE ROUTINES

The receive interrupt service routine esai_rx_isr moves the left data word from the receive data register (RX1) into the receive data buffer RX_BUFF_BASE. This routine also moves the right data word from the receive data register (RX1) into the receive data buffer RX_BUFF_BASE+1. The pointer to the receive data buffer (RX_PTR) has modulo of 2, so it alternates between the left and right data. If the serial receive shift register SDI1 is filled and ready to transfer to the receiver data register RX1 and RX1 is already filled, then the Receiver Overrun Error Flag (ROE) is set and

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Setup and Operation Pass Through Operation

the receive with exception interrupt service routine esai_rxe_isr is called. This routine clears the ROE bit and continues execution through the esai_rx_isr routine. The receive last slot interrupt service routine esai_rxls_isr resets the buffer pointer to RX_BUFF_BASE in case the pointer is corrupted after the last slot of the frame.

2.3.2

ESAI TRANSMIT INTERRUPT SERVICE ROUTINES

The transmit interrupt service routine moves the left and right data words from the transmit data buffer, TX_BUFF_BASE and TX_BUFF_BASE+1 respectively, to the transmit data registers TXn (TX0, TX1, TX2 and TX3). The pointer to the transmit data buffer (TX_PTR) has modulo of 2 so it alternates between the left and right data. If the serial transmit data register TXn is already filled and the processor tries to write another data sample to TXn, then the Transmitter Underrun Error Flag (TUE) is set and the transmit with exception interrupt service routine esai_txe_isr is called. This routine clears the TUE bit and continues execution through the esai_rx_isr routine. The transmit last slot interrupt service routine esai_txls_isr resets the buffer pointer to TX_BUFF_BASE in case the pointer is corrupted after the last slot of the frame.

2.3.3

DAX AND DMA OPERATION

The DAX port outputs the same audio information that is present at the analog outputs, only in a digital bitstream. The DAX port runs off a clock equal to 256 x fs making it compatible with most digital receiver inputs. The DAX port is serviced by a DMA channel rather than being interrupt driven like the ESAI. This means that when the DAX port is ready to send data a DMA channel is triggered to move the left and right audio data from the transmit data buffer to the DAX Audio Data Register. The transfer is made as a two word burst transfer (i.e. both left and right channels are moved each trigger). Note: For DAX information to appear on J3, the jumper at JP26 must be removed.

2.3.4

MAIN LOOP

In the main loop of the code a polling routine is performed on bit 6 of the ESAI Status Register (SAISR) which is the receive frame sync flag. Each time a frame sync occurs the contents of the receive data buffer is copied to accumulators A and B. After the moves to the

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Setup and Operation Pass Through Operation

accumulators a jump to the subroutine Stereo Process occurs. The Stereo Process subroutine is where a user can locate a processing routine of choice. The default content of the Stereo Process routine is nothing. After the Stereo Process routine, the data from the accumulators is moved to the transmit data buffer and code jumps back to the polling routine to wait for the next frame sync.

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System Description Debug Interface

SECTION

SYSTEM DESCRIPTION
This section describes some of the component blocks within the DSP5636XEVM such as the memory interface, A/D converter, and the D/A converters. For detailed information on specific components, such as the S/PDIF receiver at U10, refer to the specific manufacturers data sheet.

3.1

DEBUG INTERFACE

The JTAG/OnCE port of the DSP can be accessed using the standard Motorola toolset through the 14 pin header (JP10) on the board. Connect the command converter hardware purchased separately from Motorola or a third party to this header to use the debug tools. The on-board command converter also allows debugging using the JTAG/OnCE port. In this case, the Domain Debugger software is used. The RS-232/OnCE interface receives the serial data from the RS-232 transceiver and executes commands sent by the host computer. These commands perform the following: Reset the DSP Put the DSP in debug mode Release the DSP from debug mode Read and write to the OnCE port Read and write to the DSP

The RS-232 serial communication is performed in software on the MC68HC705 microcontroller. To use this port, connect a DB9 serial cable from a PC to the DB9 (P1) on the Evaluation Module. If the 14 pin JTAG/OnCE port is used for debugging, users must ensure that the serial DB9 connector at P1 is not connected. Similarly, the 14 pin connector at JP10 must not be attached if the Domain Debugger is used.

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System Description External Memory

3.2

EXTERNAL MEMORY

The external memory port of the DSP is interfaced to a 256x24 bit Fast Static RAM chip and to a 256x8 bit Flash ROM. Select the SRAM by configuring the DSPs address attribute register to assert the AA2 line. To keep the address stable during the entire bus cycle, insert a minimum of 1 wait state to the bus operation. Select the EPROM by configuring the DSPs address attribute register to assert the AA1 line. The Flash memory is written from the DSP. Note: The software required for writing to the flash is not currently completed. This feature will be added in a future version.

A0..A17 JP16 DSP AA2 AA1 JP17

ADDRESS SRAM A0..A17 A18 CE CE D0..D23 D0..D7 EPROM A0..A16

DATA D0..D23 JP15

Figure 3-1 External Memory Interface Diagram

3.3

ANALOG I/O

The Evaluation Module has two analog input channels (Left and Right), and eight analog output channels. Two additional channels can be added in future versions bringing the total to two input and ten output channels. The following lists show the current configuration for the EVM. The I/O connector is shown in Figure 3-2.

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System Description A/D Converter

3.3.1

ANALOG OUTPUT CHANNELS


Left (L) Right (R) Center (C) Subwoofer (S) Left Surround (LS) Right Surround (RS) Auxiliary channel 1 (Laux) Auxiliary channel 2 (Raux) Not implemented (Laux2) Not implemented (Raux2)

3.3.2

ANALOG INPUT CHANNELS


Left analog input (Lin) Right analog input (Rin)

3.4

A/D CONVERTER

The A/D converter is clocked by the AKM4112A digital receiver. The analog input is routed using the AKM4112A. When the PLL of the AK4112A is unlocked, the digital clocks are derived from the 12.288 MHz clock connected to the AKM4112A. This means that the sampling rate is 48 KHz and other rates are not supported for A/D operation. The following operational procedure is used.

3.4.1

A/D OPERATIONAL PROCEDURE

1. If a valid S/PDIF digital input is present at J1, then this digital signal is sent to the DSP through the SDI1 input of the ESAI. In this case, the analog signal at Rin and Lin at J8

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System Description Digital I/O

will not be selected. This condition is verified if the LED at D7 is illuminated, which indicates valid digital signal at J1 or J2. 2. If a valid S/PDIF input is not present at J1 or J2, in which case D7 is not lit, then the analog inputs at Lin and Rin at J8 are selected. Then the AD output is routed to SDI1 of the ESAI of the DSP. For reliable operation of the A/D do not connect a digital signal to J1 or J2.

J7
R L RS LS S C Raux Laux

J8
Raux2 Laux2 Rin Lin

Figure 3-2 Analog I/O Connectors (Rear View of EVM)

3.5

DIGITAL I/O

The Evaluation Module has a coaxial input at J1 and an optical S/PDIF input at J2. To select between the optical or the electrical S/PDIF input, follow the Setup menu on the LCD display. The EVM also has a coaxial output and an optical S/PDIF output. This set of outputs is multiplexed between one of the ESAI output channels of the DSP or the Digital Audio Transmitter (DAX) port. The selection between the DAX and the ESAI output of the DSP is determined by jumper JP26. Available jumper settings are shown in Table 3-1. If the ESAI output is selected, then one of the ESAI ports, SDO0-SDO3, are selected according to the jumper set at JP25. The S/PDIF transmitter receives data from the DSP on the serial data output SDOx line. The SDOx is configured by placing a jumper on the JP25 header as shown in Table 3-2.

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System Description Digital I/O

Note:

Only one jumper should be installed at JP25. If more that one jumper is installed, then two ESAI output lines will drive each other. Table 3-1 Digital S/PDIF Output Source Selection Jumper (JP26)
JP 26 Pins 1-2 ON OFF MODE

ESAI output is transmitted DAX output is transmitted

Table 3-2 S/PDIF Transmitter Serial Data Output


SDOx SDO0 SDO1 SDO2 SDO3 JP25 1-2 3-4 5-6 7-8

The Evaluation Module supports digital coaxial I/Os and optical I/Os. The primary set of digital outputs are connected to the DSP Digital Audio Transmitter (DAX). The secondary set of digital outputs are connected to the S/PDIF transmitter. Figure 3-3 shows the digital input and output connector configuration.

J2 OPTICAL J1 COAX J3 COAX

J4 OPTICAL

S/PDIF INPUT

ESAI/DAX OUTPUT S/PDIF

Figure 3-3 Digital I/O Connectors (Rear View of EVM)

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System Description DSP Clock

3.6

DSP CLOCK

The DSP clock is derived from the 9.8304 MHz oscillator Y6. The PINIT signal is tied low, which disables the PLL when it resets. Because of this, the PLLs multiplication factor must be configured in user software. If the multiplication factor is not set, the DSP operating clock is 4.9152 MHz. (One half of 9.8304 MHz).

3.7

HOST MICROCONTROLLER INTERFACE

The MC68HC908GP32 micro controller is intended for host communication with the DSP, initialization of the EVM, and for LCD control.

3.8

OPERATION MODE SELECTION

The DSP operating modes are selected by configuring JP8 to one of the modes shown in Table 3-3. Table 3-3 DSP Operating Mode
JP8 MODE DESCRIPTION PINS 7-8 MODD ON ON ON ON ON OFF OFF OFF OFF OFF PINS 5-6 MODC ON ON ON OFF OFF ON OFF OFF OFF OFF PINS 4-3 MODB ON ON OFF ON OFF ON ON ON OFF OFF PINS 2-1 MODA ON OFF ON OFF OFF ON ON OFF ON OFF

0 1 2 5 7 8 C D E F

EXPANDED MODE BOOTSTRAP FROM BYTE-WIDE MEMORY JUMP TO PROM STARTING ADDRESS BOOTSTRAP FROM SHI (SLAVE SPI MODE) BOOTSTRAP FROM SHI (SLAVE I2C MODE) EXPANDED MODE HI08 BOOTSTRAP IN ISA MODE HI08 BOOTSTRAP IN MC68HC711 NON-MUX MODE HI08 BOOTSTRAP IN 8051 MUX BUS MODE HI08 BOOTSTRAP IN 68302 BUS MODE

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System Description Power Supply

Refer to the appropriate device users manual for a detailed description of the operating modes.

3.9

POWER SUPPLY

The Evaluation Module requires an input voltage of 8.5-9V at 1 amp for both analog and digital circuits. It has separate digital and analog power and ground planes and voltage regulators to output the +5V, -5V, +3.3V, and 1.8V supplies. The DC-DC converter outputs the -5V supply. When power is supplied to the 2.5mm power connector P2 or to the 2-pin terminal block P3, the green LED D8 is illuminated. The polarity of the voltage applied to the EVM is not reversible. The power connector at P2 requires a supply with a center positive plug. The terminal block (P3) is color coded red for positive (closest to P2) and black for negative. To achieve best performance from the EVM, Motorola recommends the use of a grounded supply. For example, negative and earth ground should be tied together. Note: While the voltage regulators can accommodate higher input voltage potentials, the added heat dissipation required at these input voltage levels results in the regulator becoming dangerously warm. It is recommended that users do not subject the board to power inputs in excess of 10V.

+5V +5VA

5V REGULATOR P2 OR P3 8.5 9V AC/DC 3.3V REGULATOR

DC-DC CONVERTER

- 5V

3.3V

1.8V REGULATOR

1.8V

Figure 3-4 Evaluation Module Power Supply Diagram

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Component Datasheets Documentation

SECTION

COMPONENT DATASHEETS
4.1 DOCUMENTATION

Documentation for the audio components can be downloaded from the manufacturer websites shown in the following table. The Motorola web site for the appropriate manuals are: http://e-www.motorola.com/webapp/sps/prod_cat Table 4-1 Documentation Location
Motorola Devices DSP56362 DESCRIPTION Motorola Document Order Number

Product Brief User Manual Family Manual Datasheet

DSP56362P/D DSP56362UM/AD DSP56300FM/D DSP56362/D DSP56364P/D DSP56364UM/AD DSP56300FM/D DSP56364/D DSP56366P/D DSP56366UM/D DSP56300FM/D DSP56366/D DSP56367P/D DSP56367UM/D DSP56300FM/D

DSP56364

Product Brief User Manual Family Manual Datasheet

DSP56366

Product Brief User Manual Family Manual Datasheet

DSP56367

Product Brief User Manual Family Manual

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Component Datasheets Documentation

Table 4-2 Other Devices


Other Devices PCM1800 PCM1600 CS8404 DESCRIPTION Location

Technical Datasheet Technical Datasheet Technical Datasheet

http://www-s.ti.com/sc/psheets/sbas071/sbas071.pdf http://www-s.ti.com/sc/psheets/sbas116/sbas116.pdf http://www.cirrus.com/ftp/pubs/8403.pdf

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Bill of Materials Evaluation Module Parts

SECTION

BILL OF MATERIALS
5.1 EVALUATION MODULE PARTS

The following table contains information on the parts and devices in the Evaluation Module. Table 5-1 EVM Parts List
Reference Designator C2, C4, C6, C8, C50, C63 Description 0.01uF, CHIPCAP 0805 X7R 50V/10% TOL 0.1uF CHIPCAP 0805 50V/20% TOL Manufacturer PANASONIC Part Number ECU-V1H103KBG

C1, C3, C5, C7, C9, C10, C11, C12, C13, C14, C16, C18, C19, C21, C23, C24, C25,C29,C30, C40, C41, C43, C44, C48, C49, C51, C52, C53, C54, C55, C56, C57, C58, C60, C64, C70, C71, C84, C85, C95, C109, C111, C118, C134, C135, C136, C137 C15

AVX

08055E104MATMA

22uF TANTALUM LECTROLYTIC SMD 6.3V/EIA SIZE B/2K Reel 0.027uF CHIPCAP 0805 X7R 50V/10% TOL 4.7uF TANTALUM ELECTROL. SMD 6.3V/EIA SIZE A/2K Reel 100pF CHIPCAP 0805 50V/5% TOL 10uF TANTALUM ELECTROL. SMD 6.3V/EIA SIZE A

PANASONIC

ECS-T0JX226R

C17

PANASONIC

ECU-V1H273KBX

C20, C72, C73

PANASONIC

ECS-T0JY475R

C59, C46, C138, C139 C42, C45, C47, C68, C69, C80, C83, C86, C88, C89, C93, C94, C99, C103, C107, C110, C112, C113, C116, C117, C122, C126, C130, C140 C31, C74, C75, C79, C81, C92, C96, C102, C104, C115, C119, C125, C127 C76, C77 C27, C28, C132, C133

PANASONIC PANASONIC

ECU-V1H101JCG ECS-T0JY106R

1uF TANTALUM ELECTROL SMD CHIPCAP 1206 16V/20% TOL

PANSONIC

ECS-T1CY105R

470pF CHIPCAP 0805 50V/5% TOL 22pF CHIPCAP 0805 NPO 50V/5% TOL

PANASONIC NEWARK

ECU-V1H471JCX 92F5697

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Table 5-1 EVM Parts List


U3 C82, C90, C97, C100, C105, C108, C120, C123, C128, C131 C39 8-BIT MICROCONTROLLER 2700pF CHIPCAP 0805 NPO 50V/10% TOL MOTOROLA PANASONIC MC68HC705C8ACFB ECU-V1H272KBN

470uF RADIAL ALUMINUM ELECTROLYTIC 10V 8mmX11mm LS=3.5mm 1000uF MINI ALUM ELECTROL 16V/AXIAL/0.394X0.984 0.33uF CHIPCAP TANTALUM 35V/20% TOL 47uF SUBMINI ALUM ELECROL 10V/RADIAL/5X7 270pF CHIPCAP 0805 NPO 50V/10% TOL

XICON

XRL10V470

C32

XICON

XAL16V1000

C33,C34,C37

PANASONIC

ECS-T1VY334R

C35,C36,C38

XICON

MLRL10V47

C78, C87, C91, C98, C101, C106, C114, C121, C124, C129 D1 D7 D6 D2, D3, D4, D5, D8 XXU14

AVX

08055A2711KAT1A

YELLOW LED SMD 1206 RED LED SMD 1206 GREEN LED SMD 1206 RECTIFIER 1.0 AMP SMD DOUBLE ROW 16-PIN FEMALE HEADER RECEPTACLE FOR U14 SINGLE ROW 2 PIN HEADER 1X2 SINGLE ROW 3 PIN HEADER 1X3 DOUBLE ROW 8 PIN HEADER 2X4 DOUBLE ROW 14 PIN HEADER 2X7 DOUBLE ROW 20 PIN HEADER 2X10 DOUBLE ROW 50 PIN HEADER 2X25 DOUBLE ROW 36 PIN HEADER 2X18 DOUBLE ROW RIGHT ANGLE 8 PIN HDR 2X4 SINGLE ROW 8 PIN HEADER 1X8 DOUBLE ROW 4 PIN HEADER 2X2 DOUBLE ROW 6 PIN HEADER 2X3 RCA JACK OPTICAL TRANSMIT CONNECTOR OPTICAL RECEIVE CONNECTOR

QT OPTOELECTRONICS QT OPTOELECTRONICS QT OPTOELECTRONICS RECTRON BERG

QTLP650D-3 QTLP650C-2 QTLP650C-4 FM4001 68683-608

JP1, JP2, JP4, JP5, JP26 JP14 JP8, JP25 JP10, JP13, JP17 JP11,JP16 JP12 JP15 JP30

BERG BERG BERG BERG BERG BERG BERG DIGI-KEY

68001-402 68001-403 67997-408 67997-414 67997-420 67997-450 67997-436 S2122-04-ND

JP22 JP31 JP27,JP29 J1,J3 J4 J2

BERG BERG BERG VIMEX SHARP SHARP

68001-408 67997-404 67997-406 SCJ-0358B GP1F32T GP1F32R

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Table 5-1 EVM Parts List


J7,J8 K1 L1 L2, L3, L4, L5 P1 RCA JACK 3X2 SMD RELAY 1uH INDUCTOR SMD/2.5X3.2 FERRITE BEAD DB9 CONNECTOR RT ANGLE/PCB MOUNT 2.5MM POWER CONNECTOR 2 PIN TERMINAL BLOCK DIODE 350mW, 75V, SOD-123 10K CHIP RES 0805 1/10WATT 5% VIMEX MOUSER TOKO FUTURE MOUSER JA0600731G EB2-5NU TKS1025CT BL01RN1-A62 152-3409

P2 P3 D10 R2, R3, R4, R5, R6, R9, R10, R11, R12, R14, R20, R21, R22, R87, R88, R89, R93 R40, R44, R48, R52, R56, R60, R64, R68, R72, R76 R29 R7,R18 R31 R32 R41, R45, R49, R53, R57, R61, R65, R69, R73, R77 R16 R1, R15, R42, R46, R50, R54, R58, R62, R66, R70, R74, R78 R90,R91 R17 R30 R43, R47, R51, R55, R59, R63, R67, R71, R75, R79 R13,R81 R28 S1,S2,S3,S4,S5 T1,T2

SWITCHCRAFT AUGAT DIGI-KEY PANASONIC

RAPC-712 2SV-02 1N4148W-7 ERJ-6GEYJ103V

15K CHIP RES 0805 1/10WATT 5%

ROHM

MCR10EZHJ153

2.7K CHIP RES 0805 1/10WATT 5% 619 CHIP RES 0805 1/10WATT 1% 182 CHIP RES 0805 1/10WATT 1% 127 CHIP RES 0805 1/10WATT 1% 8.2K CHIP RES 0805 1/10WATT 5%

PANASONIC PANASONIC PANASONIC PANASONIC PANASONIC

ERJ-6GEYJ272V ERJ-6ENF6190V ERJ-6ENF1820V ERJ-6ENF1270V ERJ-6ENYJ822V

71.5 CHIP RES 0805 1/10WATT 1% 1K CHIP RES 0805 1/10WATT 5%

PANASONIC PANASONIC

ERJ-6ENF71R5V ERJ-6GEYJ102V

100K CHIP RES 0805 1/10WATT 5% 18K CHIP RES 0805 1/10WATT 5% 3.92K CHIP RES 0805 1/10WATT 1% 100 CHIP RES 0805 1/10WATT 1%

FUTURE PANASONIC PANASONIC PANASONIC

CR21-104J-T ERJ-6GEYJ183V ERJ-6ENF3921V ERJ-6ENF101V

10M CHIP RES 0805 1/10WATT 5% 56 CHIP RES 0805 1/10WATT 5% 6MM PUSHBUUTON SWITCH 96KHZ DIGITALTRANSFORMER

PANASONIC PANASONIC PANASONIC SCIENTIFIC CONVERSION MOTOROLA GSI

ERJ-6GEYJ106V ERJ-6GEYJ560V EVQ-QS205K SC979-03

U1 U11

DSP 144PIN/TQFP *please see note #90 256KX24 SRAM 3.3V/BGA

DSP56367 GS76024B-10

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Table 5-1 EVM Parts List


U12 U13 U14 U15 U4 U16 U28 U18 U19 EPROM 3.3V/32 PIN TQFP MICROCONTROLLER LCD 20CHAR X 2LINE GP1U28Y MAX3387ECUG MAX3485ECSA PLD DIGITAL AUDIO TRANSMITTER 20-BIT A/D CONVERTER 24-PIN/SSOP REG1117_3.3 REG1117_1.8 DELTA-SIGMA D/A CONVERTER OP-AMP SO-8 DIGITAL AUDIO RECEIVER 3.3V REGULATOR TO-220 5V REGULATOR TO-220 DC-DC CONVERTER 12.288MHZ CRYSTAL 9.8304MHZ OSCILLATOR SMD 3.6864MHZ CRYSTAL Standoffs ATMEL MOTOROLA POWERTIP SHARP MAXIM MAXIM LATTICE CRYSTAL BURR-BROWN AT29LV020-20TI MC68HC908GP32CFB PC2002LRU-AEA-B GP1U28Y MAX3387ECUG MAX3485ECSA ISP2064VE-100LT100 CS8404A-CS PCM1800E

U5 U8 U21,U24 U20,U22,U23,U25,U26 U10 U6 U7 U9 Y5 Y6 Y1 Mounting hardware for U14 and standoffs for the four corners of the PC board. Mounting hardware for U14 and standoffs for the four corners of the PC board.

BURR-BROWN BURR-BROWN BURR-BROWN Burr Brown AKM LINEAR TECH. MOTOROLA NEWPORT TECH. MMD CITIZEN MMD H.H. Smith

REG1117-3.3 REG1117A-1.8 PCM1600Y BBOPA2134UA AKM4112AVF LT1085CT-3.3 MC7805ACT NMF0505S B20AA1-12.288MHZ 300-7018-1-ND B20BA1-3.6864MHZ-3I 30F1463

Screws

Waldom

FN-817-C

PC Board

Westak

DSP56367EVM REV. 1.0 HS107-ND

XU6, XU7

Heatsink for U6, U7 T0-220, L=0.75, W=0.520, H=0.500 (above dimensions are in inches) DOUBLE ROW 16-PIN MALE HEADER MOUNTS TO BOTTOM SIDE OF U14 LCD SHUNT CONN., 2 POSITION

DigiKey

XU14

BERG

78933-416H

SHUNTS

3M

929955-06

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Table 5-1 EVM Parts List


XU1 (This part is mounted on a socket and the part information for the socket is given in the following columns) XXU7 XXXU7 XXXXU7 R19 R85,R86 R92 P3.1 P3.2 R94,R95 Yamaichi 144 pin TQFP socket Yamaichi Electronics IC149-144-145-S5

4-40 -3/8 BOLT 4-40 WASHER 4-40 NUT 464 CHIP RES 0805 1/10WATT 1% 5.62K CHIP RES 0805 1/10WATT 1% 8.66K CHIP RES 1206 1/10WATT 1% RED POWER LEVER BLACK POWER LEVER 150 CHIP RES 0603 1/10WATT 5%

SPC Technology SPC Technology SPC Technology PANASONIC PANASONIC XICON TYCO TYCO BC Components

SRH-0440-024-SN WLS04017SZ-C NH0440006SN-C ERJ-6ENF4640V ERJ-6ENF5621V ME290-8.66K/REEL 1447732-3 1447732-2 231220171501

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Parallel Port Interface (PPI) Cable

APPENDIX A PARALLEL PORT INTERFACE (PPI) CABLE


A.1 PPI OVERVIEW

This document describes the functionality and use of the Parallel Port Interface (PPI) cable (Revision A) with the DSP5636XEVM for developing applications. The PPI cable kit includes a PPI software installation disk consisting of the following: Note: Dynamic Linking Library (DLL) Demo Application PPI interface software development tool for developing an application The PPI cable does not function with the generic B ROM version of the DSPs. It is only applicable with software ROM versions.

The PPI Interface cable allows a personal computer (PC) to use a standard IBM compatible parallel port, to communicate with the DSP using the SHI port in SPI or I2C mode. Libraries are available which link into Microsoft Visual C++ 5.0, allowing user applications to communicate directly to the SPI or I2C port. Motorola provides implementation examples which allow users to communicate with a Motorola DSP5636XEVM according to the SHI protocol. This allows users the capability to read and write memory, run script files, and execute SHI commands. The Rev A PPI cable connects to a standard 10 pin Berg connector on the target board.

A.2

PPI CABLE INSTALLATION

This section describes the physical layout of the PPI cable and how to install the PPI cable on the DSP5636XEVM and on target systems in SPI or I2C mode.

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A.2.1

Connecting to the Target System

The PPI cable connects to the target board using a 10 pin IDC cable. The connector on the target board should be a 10-pin Berg connector, with 0.025" square posts, on 0.100" centers. The signals required for SPI and I2C modes are shown in the following table. Table A-1 SPI and I2C Required Signals
SPI Signals SS MISO MOSI SCK VDD BND I2C Signals SDA SCL VDD GND

If users cannot provide enough board space to place a full 10-pin header on the target board, then users must reduce the number of lines going to the target. Contact P&E Microcomputer Systems Inc. (www.pemicro.com) for production ready Gerber files of a small, pin reducing adapter board. The pin reducing adapter board takes the 10-pin PPI connector and breaks it into a 4-pin I2C connector and a 6-pin SPI connector. All that is needed to connect to these boards is either a 4 or 6 pin IDC cable that connects to their target. Note: If you are using the I2C capabilities of the PPI cable, the target must have pull-up resistors on the SDA and SCL lines.

A.3

CONNECTING TO THE DSP5636XEVM FOR SPI MODE

The current version of the DSP5636XEVM board does not have a standard PPI connector. To facilitate connection to the EVM, an adapter board has been provided with the PPI cable. This adapter board allows the PPI cable to be used with both the EVM board and other targets which support the standard PPI connector. The adapter board plugs into a portion of the EVM's JP12 jumper connector, and has a header which allows connection to the PPI cable. It has an additional connector which allows access to the jumper headers covered by the adapter. To connect the PPI cable to the EVM perform the following tasks:

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1. Make sure power to the EVM board is OFF. 2. Ensure that the jumpers on pins 1-12 of header J3 of the adapter board are connected in the same way as the jumpers on pins 15-26 of header JP12 of the EVM. 3. Remove EVM JP12 jumpers on pins 1-28. 4. Plug the adapter board onto pins 1-28 of JP12 making sure to orient pin 1 to pin 1. 5. Ensure that the adapter J3 jumper settings correspond to the way the jumpers were set on JP12 in Step 2. 6. Plug in the PPI cable ribbon connector onto J2, making sure to orient pin 1 to pin 1. 7. Connect the PPI cable to the parallel port of your PC. The adapter board hardware is shown later in this section.

A.4

CONNECTING TO THE DSP5636XEVM FOR I2C MODE

The DSP5636XEVM does not have pull-ups on the SDA and SCL lines. The adapter is configured from the factory to use the SPI protocol to communicate to the DSP5636XEVM. If users want to use the I2C protocol instead, it is required to set up the jumpers on the EVM and make hardware modifications to the 10-pin berg connector on the adapter board. The following modification are required: Add a pull-up resistor between pins 7 and 9 (VDD) Add a pull-up resistor between pins 4 and 9 Short pins 7 and 10 together on J2 of the adapter board bottom

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Parallel Port Interface (PPI) Cable

Top Side

Bottom Side

PPI Cable 2x5 Berg Male Connector (J2)

(J1) 2x14 Female Connector

Jumpers 2x6 Berg Male Connector (J3) Pin 1

Note: 2x6 Jumper Connector allows user to still connect jumpers for pins 15-26 of the JP12 Connector on the adapter

3-D View
Pin 1 Plug PPI Cable into 2x5 Berg Connector

Plug into the JP12 Connector on DSP56362EVM

Figure A-1 Adapter Board Layout

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Figure A-2 Standard PPI Target Connector

A.5

PPI SOFTWARE SUPPORT

Motorola provides a CD which contains an installation program for the PPI cable drivers, a sample application, a simple debugger, and documentation. To install this software, execute SETUP.EXE on the CD and follow the directions. Note: When running under Windows NT, a driver must be installed before the PPI routines will operate properly. This driver installation only has to be done once, and is described in the document titled Running under Windows NT. However, if you have a Privileged instruction error, reinstall the NT driver again. This driver may be freely distributed with applications built on these libraries.

A.6

PPI DRIVER LIBRARIES

The installed drivers allow PPI cable support to be built directly into an application created in any environment which can link to a 32-Bit DLL (Dynamically Linked Library). The driver is called UNIT_PPI.DLL. These interface routines are designed to be called from visual and non-visual applications running on Windows 95, Windows 98, and Windows NT. The drivers allow user applications to utilize the SPI or I2C protocol to communicate with a slave target. For example, if users want to allow changes to surround sound volumes of the DSP decoder. This example was created in Microsoft Visual C++ 5.0, and only provides a framework for users to create their own application. The call prototypes to the DLL are all located in a file called UNIT_PPI.H.

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Before making use of any calls in the DLL, users must call the load_dll( ) function in the header file to load the DLL into memory.

A.7

DEMO SOFTWARE

The sample executable applications included are titled SPIDEMO for the SPI interface and I2CDEMO for I2C interface. These applications are compiled and renamed versions of the PPIDEMO MSVC applications included in the kit. This demonstrates SHI communication through either the SPI (default) or I2C protocol. To switch the demo protocol to I2C, open SPIorI2C.H, and replace the following line:
#define use_spi_for_demo

with:
#define use_i2c_for_demo

Users must recompile the project for this change to take effect. The UNIT_PPI.H file contains the DLL prototype calls for both the I2C and SPI protocols. Note: Both protocols can not be used simultaneously.

A.8

PPP DEBUGGER DEVELOPMENT SOFTWARE

Motorola also provides a limited functionality debugger which works through the PPI cable and communicates to the DSP in real-time using Motorola's Post Processing Phase (PPP) protocol. The PPP and existing OnCE/JTAG debuggers offer different debugging features and capabilities. The PPP debugger is not a source level debugger like a OnCE/JTAG debugger, it only provides an SHI communication interface to a running DSP. The PPI debugger for Windows 95, Windows 98, and Windows NT allows users to load COFF files into memory, inspect memory, send DSP software architecture (SA) commands, and run macro files when the DSPs SA is running. For Post Processing Phase (PPP) applications debugging within the DSPs SA, the most effective debugging feature is to be able to monitor PPP control and status from the SHI interface when the DSPs SA is running. The PPI cable, through the SHI, can send debugging commands such as real-time read/write memory or registers and receive PPP responses from a running DSP, which traditional OnCE/JTAG port debug interfaces cannot provide. However, there are some advantages to

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using the PPI and OnCE/JTAG simultaneously for the PPP applications. The following steps provide an example on how to use the PPI and OnCE/JTAG interfaces together. 1. Set up hardware breakpoints using the OnCE/JTAG debugger to where the PPP program needs to be stopped for viewing registers or memory contents. 2. Start running the DSPs SA. The breakpoints have not occurred yet since the PPP has not been loaded. 3. Load a developing PPP application into the running DSP using the PPI cable. 4. Use the PPP debugger to send commands through the SHI to enable SA and activate the PPP program. 5. The program should run until the hardware breakpoint event occurs. Then users will be able to unfold the necessary debugging information for the problems in the PPP program. The executable is titled PPIDEVNT.EXE and comes with a help file that documents the debugger's functionality. Depending on whether the SPI or I2C interface is the target, users can select the proper PPP debugger icon from PPP Development Interface program icons in Start menu. Users can also do this from the command prompt by adding I2C to the debugger's command line. The default for PPPdevnt is SPI.

A.9

PPI COMMUNICATION RECOVERY

A very fast PC, or a long DB25 extension, may introduce occasional communications errors between the host PC and target DSP processor. When this happens in the debugger, the following error dialog box appears
Lost contact with board

To remedy this issue, increase either the IO_DELAY_CNT or CMD_DELAY_CNT parameters. Do this by creating a shortcut on the desktop and adding the parameter into the Target box after the PPPdevnt.exe in the properties. Refer to the PPDEVNT help file for more information. The default values for the debugger are IO_DELAY_CNT=25 (decimal) and CMD_DELAY_CNT=1000 (decimal). These values can be increased up to a value of $FFFF. Motorola recommends that you do not use a DB25 extension cable longer than 6 foot between the PC and PPI cable and do not use a ribbon cable longer than 18 inches from the PPI cable to the DSP.

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A-8

DSP5636XEVM Users Manual

MOTOROLA

Pass Through Code

APPENDIX B PASS THROUGH CODE


B.1 PASS THROUGH CODE

;************************************************************************** ; passthru.asmv1.0 ; meb 05/01/01 ; ; Copyright (c) MOTOROLA 2001 ; Audio Solutions Organization ; Digital Audio Applications ; ;Program Operation: ; ;************************************************************************** page 132,60 include ioequ.asm include vectors.asm list org RX_BUFF_BASEequ RX_data_1_2 RX_data_3_4 TX_BUFF_BASEequ TX_data_1_2 TX_data_3_4 RX_PTR TX_PTR flags RightReceiveequ x:$00 * ds ds * ds ds ds ds ds 0

1 1

; left input sample ; right input sample

1 1 1 1 1

; left output sample ; right output sample

;************************************************************************** org START main ori movep move movec movep move #$03,mr #$050009,x:M_PCTL #0,omr #0,sp #$000003,x:M_IPRP #$40,r6 ; mask interrupts ; DSP core at 9.8304x10=98.3MHz ; reset hardware stack pointer ; ESAI ints enabled and top Priority ; initialize stack pointer p:$100

MOTOROLA

DSP5636XEVM Users Manual

B-1

Pass Through Code

move move move move rep move move move move move

#>$FFFF,m6 #>RX_BUFF_BASE,r0 #>$FFFF,m0 #0,x0 #4 x0,x:(r0)+ #>RX_BUFF_BASE,x0 x0,x:RX_PTR #>TX_BUFF_BASE,x0 x0,x:TX_PTR

; linear addressing ; initialize inputs, outputs to 0

;************************************************************************** ; FST/FSR and SCKT/SCKR are generated from the PLD ; and fed to the DSP, A/D and D/A converters ;************************************************************************** movep movep movep #$000000,x:M_PCRC #$000000,x:M_PRRC ;disable ESAI port

#$0c0200,x:M_TCCR ;init transmit clock control register ;FST is input (bit22=0) ;SCKT is driven externally (bit21=0) ;FST polarity is negative (bit19=1) ;clockout on rising, latch in on falling(bit18=1) ;2 words per frame (bit13:9=00001) ;all other bits are not relevant and are initialized to 0 #$0c0200,x:M_RCCR ;init receive clock control register ;FSR is input (bit22=0) ;SCKR is driven externally (bit21=0) ;FSR polarity is negative (bit19=1) ;clockout on falling, latch in on rising(bit18=0) ;2 words per frame (bit13:9=00001) ;all other bits are not relevant and are initialized to 0 #$000000,x:M_SAICR;init ESAI common control register ;data left aligned to bit 23 (bit8=0) ;asynchronous mode (bit6=0) ;bits 23:9 and 5:3 are reserved and are initialized to 0 ;all other bits are not relevant and are initialized to 0 #$d17d00,x:M_TCR ;init trasmit control register ;last slot interrupt enabled (bit23=1) ;transmit interrupt enabled (bit22=1) ;even slot interrupt disabled (bit21=0) ;exception interrupt enabled (bit20=1) ;transmitter normal operation (bit19=0) ;reserved (bit18=0) ;zero padding disabled (bit17=0) ;FS occurs 1 bit clock early (bit16=1) ;word length FS (bit15=0) ;32-bit slot length, 24-bit word length(bit14:10=11111)

movep

movep

movep

B-2

DSP5636XEVM Users Manual

MOTOROLA

Pass Through Code

;network mode ;data left aligned ;MSB shifted out first ;all transmitters disabled movep

(bit9:8=01) (bit7=0) (bit6=0) (bit5:0=000000)

#$d17D02,x:M_RCR ;init receive control register ;last slot interrupt enabled (bit23=1) ;receive interrupt enabled (bit22=1) ;even slot interrupt disabled (bit21=0) ;exception interrupt enabled (bit20=1) ;receiver normal operation (bit19=0) ;reserved (bit18:17=00) ;FS occurs 1 bit clock early (bit16=1) ;word length FS (bit15=0) ;32-bit slot length, 24-bit word length(bit14:10=11111) ;network mode (bit9:8=01) ;data left aligned (bit7=0) ;MSB shifted out first (bit6=0) ;reserved (bit5:4=00) ;receivers 3 and 2 disabled (bit3:2=00) ;receiver 1 enabled (bit1=1) ;receiver 0 disabled (bit0=0)

movep movep

#$000fdb,x:M_PCRC ;Enable ESAI port #$000fdb,x:M_PRRC ;reserved (bit23:12=000000000000) ;all pins enabled as ESAI except HCKT & HCKR(bit11:0=111111011011) movep #$000003,x:M_TSMA ;reserved ;enable slots 15:0 #$000003,x:M_TSMB ;reserved ;enable slots 15:0 #$00ffff,x:M_RSMA ;reserved ;enable slots 15:0 #$00ffff,x:M_RSMB ;reserved ;enable slots 15:0 #$000000,x:M_TX0 #$000000,x:M_TX1 #$000000,x:M_TX2 #$000000,x:M_TX3 #0,x:M_TCR #1,x:M_TCR #2,x:M_TCR #3,x:M_TCR #$FC,mr ;init transmit slot mask registers (bit23:16=00000000) (bit15:0=1111111111111111) (bit23:16=00000000) (bit15:0=1111111111111111) ;init receive slot mask registers (bit23:16=00000000) (bit15:0=1111111111111111) (bit23:16=00000000) (bit15:0=1111111111111111) ;zero ;zero ;zero ;zero out out out out transmitter transmitter transmitter transmitter ;enable TX0 ;enable TX1 ;enable TX2 ;enable TX3 ;enable all 0 1 2 3

movep

movep

movep

movep movep movep movep bset bset bset bset andi

interrupt levels

;**************************************************************************

MOTOROLA

DSP5636XEVM Users Manual

B-3

Pass Through Code

; Main loop ;************************************************************************** LOOP jclr bclr move move move move jmp #RightReceive,X:flags,* #RightReceive,X:flags x:RX_BUFF_BASE,a ;receive left x:RX_BUFF_BASE+1,b ;receive right a,x:TX_BUFF_BASE ;transmit left b,x:TX_BUFF_BASE+1;transmit right LOOP

;************************************************************************** ; Subroutines ;************************************************************************** STEREO_PROCESS nop nop rts include isr_dig.asm

B-4

DSP5636XEVM Users Manual

MOTOROLA

Schematics

APPENDIX C SCHEMATICS
The section contains the schematics for the DSP5636XEVM.

MOTOROLA

DSP5636XEVM Users Manual

C-1

+3.3V JP1
1 2 1 2 1 2

+3.3V JP2 JP4 JP5


1 2

+3.3V

+3.3V

+3.3V

CORE_SUPPLY

* Ground pin on the DSP56362


4

L1 1uH C9 0.1uF C16 0.1uF C17 0.027uF C10 0.1uF C11 0.1uF +3.3V C14 0.1uF C15 + 22uF

DSP_SDO5_1

C12 0.1uF C18 0.1uF

C13 0.1uF

C1 0.1uF

C2 C3 0.01uF 0.1uF

C4 C5 0.01uF 0.1uF

C6 C7 0.01uF 0.1uF

C8 0.01uF

R1 1K
Vccd0 103 GNDd0 104 Vccd1 111 GNDd1 112 Vccd2 119 GNDd2 120 Vccd3 129 Vccp 45 PCAP 46 GNDp 47 GNDc0 58 Vccc1 65 GNDc1 66 GNDp1 48 Vccc0 57 Vcca0 74 GNDa0 75 Vcca1 80 GNDa1 81 Vcca2 86 GNDa2 87 GNDa3 96 GNDs1 26 Vccs0 8 GNDs0 9 Vccs1 25 GNDh 39
SYSTEM_RESET D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 100 101 D0 102 D1 105 D2 106 D3 107 D4 108 D5 109 D6 110 D7 113 D8 114 D9 115 D10 116 D11 117 D12 118 D13 121 D14 122 D15 123 D16 124 D17 125 D18 128 D19 131 D20 132 D21 133 D22 D23 137 136 MODA/IRQA 135 MODB/IRQB 134 MODC/IRQC MODD/IRQD 44 70 RESET 69 AA0 51 AA1 50 AA2 AA3

CORE_SUPPLY

GNDd3 130 Vcch 38

S1 RESET
+

C20 4.7uF

Vccql0 GNDq0 Vccqh0 Vccql1 GNDq1

18 19 20 56 54

+3.3V U1 DSP56362
49 Vccqh1 Vccql2 GNDq2 Vccqh2 Vccql3 GNDq3 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 91 90 95 126 127 72 73 76 77 78 79 82 83 84 85 88 89 92 93 94 97 98 99

C21

+3.3V+3.3V+3.3V+3.3V R2 R3 R4 R5 10K 10K 10K 10K


2 4 6 8 ~RESET AA0 AA1 AA2 AA3 ~CAS ~RD ~WR ~TA ~BR ~BG ~BB

0.1uF

JP8 +3.3V +3.3V


1 3 5 7

143 144 MOSI 1 MISO 2 SCK 3 SS HREQ

DSP_SCK DSP_MISO

NC 55 59 EXTAL 61 CLKOUT PINIT/NMI

SDO0 SDO1 SDO2/SDI3 SDO3/SDI2 SDO4/SDI1 SDO5/SDI0 FST FSR SCKT SCKR HCKT HCKR

27 28 ADO ACI 29 TIO0 142 138 TMS 53 TRST 141 DE 139 TCK 140 TDO TDI

52 68 67 62 63 71 64

CAS RD WR TA BR BG BB

H0 H2 H4 H5 H7 HA0 HA2 HOREQ/HOREQ HRW HACK/HACK HDS/HDS HCS HA1 H6 H3 H1

R86 5.6K

R85 5.6K

DSP_CLK

+3.3V
DSP_SDO4_1 DSP_SDO5_1 DSP_SCKT_1 DSP_MISO DSP_SCK ~DSP_SS

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17

2
PLD_SDO4_1 PLD_SDO5_1 PLD_FST_1 PLD_FSR_1 PLD_SCKT_1 PLD_SCKR_1 1 2 3 4 5 6 7 8 9 10 11 12 13 14

2
TDI TDO TCK

JP13

DSP_SCKT_1

DSP_SDO4_1 1 3 5 7 9 11 13 2 4 6 8 10 12 14

TMS ~RESET

+3.3V

Second ESAI
MOSI MISO SCK SDO0 SDO1 SDO2 SDO3 SDI1 SDI0

+5V +3.3V JP12


1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50

+3.3V +5V

DSP_MOSI

JP11
PB14

19 17 15 13 11 9 7 5 3 1

20 18 16 14 12 10 8 6 4 2 PB13 ~RESET

R6 10K JP10

DSP56362 _____ TRST __ DE GNDp1 CLKOUT AA3 NC

DSP56366/7

DSP_SD04_1

DSP_SCKT_1 DSP_SD05_1 DSP_FSR_1 DSP_FST_1 DSP_SCKR_1

FS_CLK BIT_CLK

Schematics

ADO FS256_CLK

MOTOROLA IMAGING AND ENTERTAINMENT SOLUTIONS DIGITAL AUDIO APPLICATIONS


R7 620 D1
A

Size

Title

Rev

A
Date:
B C

DSP56367EVM DSP56367
Friday, September 21, 2001
D

1.33
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13

C-2

DSP5636XEVM Users Manual


4 5 6 7 10 11 12 13 14 15 16 17 43 41 37 36 34 33 31 24 22 23 21 30 32 35 40 42 60

C19 0.1uF

MOTOROLA

+3.3V
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17

+3.3V

C7 D7 E7 F7 G7 H7 K7 L7 M7 N7 P7 R7 M1 N1 P1 R1 C1 D1 E1 F1 G1 H1 K1 L1

H3 G6 G4 J6 K3 F4 F3 M5 M4 C5 D5 E2 H4 M3 D4 E6 D3 E4 P3 K4 P4 L4 L6 N4 P5 H5 K5 N6 N2 J4 J2 L2 F5 G2

GND12 GND11 GND10 GND17 GND18 GND7 GND6 GND26 GND25 GND33 GND2 GND3 GND13 GND24 GND1 GND5 GND0 GND4 GND30 GND19 GND31 GND22 GND23 GND28 GND32 GND14 GND20 GND29 GND27 GND16 GND15 GND21 GND8 GND9

MOTOROLA
D16 D17 D18 D19 D20 D21 D22 D23 D12 D13 D14 D15 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

+3.3V

C52 0.1uF

C53 0.1uF

C54 C55 0.1uF 0.1uF

C51 0.1uF

AT29LV020_VS
A2 A0 A15 A10 A9 A7 A4 A5 A13 A17 AA1 A12 A11 A3 A6 A8 A14 A16 VCC I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 NC 8

* bypass caps for the memory device

N5 N3 L5 L3 D6 D2 P2 J1 M2 H6 H2 K6 K2 J7 P6 M6 F6 F2 E5 J3 E3 J5 G3 G5 C3 VCC9 VCC8 VCC7 VCC6 VCCQ1 VCCQ0 VCCQ12 VCCQ6 VCCQ10 VCCQ5 VCCQ4 VCCQ9 VCCQ8 VCCQ7 VCCQ13 VCCQ11 VCCQ3 VCCQ2 VCC1 VCC4 VCC0 VCC5 VCC2 VCC3 VCC10 T5 T6 U6 B6 A6 B5 U5 U3 T3 U2 T2 A2 B2 B3 A3 A4 A5 C4 20 19 18 17 16 15 14 13 3 2 31 1 12 4 5 11 10 6

21 22 23 25 26 27 28 29 9

D0 D1 D2 D3 D4 D5 D6 D7

U11 GS76024B-10

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 30 32 CE 7 OE WE

U12
GND 24

CE1 AA2 ~WR ~RD WE OE U4 T4

U7 U1 T7 T1 R6 R5 R4 R3 R2 C6 C2 B7 B1 A7 A1 NC15 NC14 NC13 NC12 NC11 NC10 NC9 NC8 NC7 NC6 NC4 NC3 NC2 NC1 NC0 B4

JP15
D0 D2 D4 D6 D8 D10 D12 D14 D1 D3 D5 D7 D9 D11 D13 D15 D16 D18 D17 D19

DSP5636XEVM Users Manual


+3.3V +3.3V JP17 10K
~BB ~BG ~BR ~TA ~CAS 1 2 3 4 5 6 7 8 9 10 11 12 13 14

+3.3V R20

JP16

D20 D22

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36

D21 D23

AA0 AA1 AA2 AA3 ~RD ~WR

A0 A2 A4 A6 A8 A10 A12 A14 A16

1 3 5 7 9 11 13 15 17 19

2 4 6 8 10 12 14 16 18 20

A1 A3 A5 A7 A9 A11 A13 A15 A17

R21 10K

R22 10K

MOTOROLA IMAGING AND ENTERTAINMENT SOLUTIONS DIGITAL AUDIO APPLICATIONS Size Title Rev

A
Date:
B C

DSP56367EVM EXTERNAL MEMORY


Friday, September 21, 2001
D

1.33
Sheet 2
E

of

13

Schematics

C-3

JP30
2 4 6 8 1 3 5 7

HEADER2X4

HC08_PTA0

+3.3V 0.1uF C56


VSS 16 17 VDDA 40 41

+3.3V C57 0.1uF U14 LCD 20CHAR X 2LINE


VSSA
4 5 RS 6 R/W E Vo 30 VDDAD/VREFH 31 VSSAD/VREFL PTB0/AD0 PTB1/AD1 PTB2/AD2 PTB3/AD3 PTB4/AD4 PTB5/AD5 PTB6/AD6 PTB7/AD7 22 23 24 25 26 27 28 29 Vss 7 8 9 10 11 12 13 14 D0 D1 D2 D3 D4 D5 D6 D7 Vdd 3

* used for monitor mode


VDD

~HC08_RESET

R92 8.6K
1 11 RST IRQ 32 33 34 35 36 37 38 39 PTA0/KBD0 PTA1/KBD1 PTA2/KBD2 PTA3/KBD3 PTA4/KBD4 PTA5/KBD5 PTA6/KBD6 PTA7/KBD7 12 13 PTD0/SS 14 PTD1/MISO 15 PTD2/MOSI PTD3/SPSCK 18 19 PTD4/T1CH0 20 PTD5/T1CH1 21 PTD6/T2CH0 PTD7/T2CH1

MC68HC908GP32

+5V
1 2

R89
HC08_PTA7 MISO SCK

+3.3V

A 2 PTC0 3 U13 PTC1 4 PTC2 5 PTC3 6 PTC4 7 PTC5 8 PTC6 9 PTE0/TXD 10 PTE1/RXD PLD_IO0 PLD_IO2 PLD_SEL1 PLD_SEL3 K PLD_IO1 PLD_IO3 PLD_SEL2 HC08_TXD HC08_RXD

15 16

R28 56

+5V

S2 10K
MOSI

S3
1 1 1 1

S4

S5

44

43

GND

+5V
2 3 1

Vout

Vcc

42

CGMXFC

OSC1

OSC2

U15 GP1U28Y

R29 2.7K R30 3.9K *approx 3.1v

HC08_CLK

*1 IR receiver output connected to timer input

Schematics

MOTOROLA IMAGING AND ENTERTAINMENT SOLUTIONS DIGITAL AUDIO APPLICATIONS Size Title

Rev

A
Date:
A B C

DSP56367EVM MICROCONTROLLER AND LCD


Friday, September 21, 2001
D

1.33
Sheet 3

C-4

of

13

DSP5636XEVM Users Manual

MOTOROLA

MOTOROLA
4 3

+3.3V

+3.3V

DSP Software Boot Mode select

R87 10K

R88 10K

JP31
1 3 PB14 2 4 PB13

HEADER 2X2

DSP5636XEVM Users Manual


Size Title

MOTOROLA IMAGING AND ENTERTAINMENT SOLUTIONS DIGITAL AUDIO APPLICATIONS Rev

A
Date:
B C

DSP56367EVM S/PDIF I/O PLD


Friday, September 21, 2001
D

1.33
Sheet 4
E

of

13

Schematics

C-5

+5V +5V U18 CS8404A


23 22 M2 21 M1 M0 1 4 C7/C3 12 C6/C2 C9/C15 24 3 TRNPT/FC1 C1/FC0 2 4 6 8 FS128_CLK SYSTEM_RESET VD+ GND TXP 19 18 20

C64 0.1uF

SPDIF_ELECT

3
SDO0 SDO1 SDO2 SDO3

JP25
1 3 5 7

BIT_CLK FS_CLK

6 7 SCK 8 FSYNC SDATA 10 11 C/SBF 9 U V 5 16 MCK RST

TXN CBL/SBC

17 15

3
SPDIF_OPTICAL

+5V
2 PRO 14 EM0/C9 13 EM1/C8

Schematics

MOTOROLA IMAGING AND ENTERTAINMENT SOLUTIONS DIGITAL AUDIO APPLICATIONS Size Title

Rev

Date:
A B C

Friday, September 21, 2001


D

Sheet 5

of

13

C-6

DSP56367EVM SECONDARY S/PDIF OUTPUT

1.33

DSP5636XEVM Users Manual

MOTOROLA

C70 0.1uF
23 VCC AGND DGND 17 VDD 24 18

U19 PCM1800 C71 0.1uF +5VA


8 9 7

C72 4.7uF
+

2 VREF1 REFCOM VREF2 BYPAS 1 VINL DOUT 15 PLD_AD_IN FMT1 FMT0 3 4

3
+

MODE1

SYSCLK
11 10

100K

DSP5636XEVM Users Manual


+

MODE0

MOTOROLA
4

+5VA
+

+5VA C69 10uF

C68 10uF

AD_INL

C74 1uF

C73 4.7uF

R90 100K
+

C75 1uF
5 VINR CINNR CINPR CINNL CINPL 22 21 20 19 RSTB FSYNC LRCK BCK SYSTEM_RESET 12 FS_CLK BIT_CLK 14 16 13 6

+5VA

C76 470pF

AD_INR

C77 470pF

R91

FS256_CLK

MOTOROLA IMAGING AND ENTERTAINMENT SOLUTIONS DIGITAL AUDIO APPLICATIONS Size Title Rev

A
Date:
B C

DSP56367EVM ANALOG INPUT


Friday, September 21, 2001
D

1.33
Sheet 6
E

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13

Schematics

C-7

R40 15K
+

C80
4

C78 270pF R42


+

+5VA U20A MC33078


3
4
-

C79 1uF

R43 100 C81 1uF


+

J7 RCA_3X2
3 2 1

10uF +3.3V
43 VDD AGND
+

R41 8.2K C82 2700pF

1K

CENTER

SUBWOOFER OUT -5V


6 5

+5VA
8 7 16
+ +

LEFT SURROUND OUT C87 +5VA U20B


4

VCC

C84 0.1uF
44 DGND TEST ML MC MDO MDI LRCK BCK RST AGND2 VCC3 AGND3 VCC4 45 DATA1 DATA2 DATA3 ZEROA ZERO1 ZERO2 ZERO3 ZERO4 ZERO5 ZERO6 VOUT3 VOUT2 VOUT1
SCLKO

C83 10uF C88 10uF


VCOM2 15 30 29 28 27 26 25 24 21 22 23 20 19 18 17 9 10 11 12 13 14 NC0 NC1 31 32
+

C85 0.1uF C89 10uF R45 8.2K 10uF

C86

R44 15K R46 1K C90 2700pF

RIGHT SURROUND OUT 270pF


+

MC33078
5
-

VCOM1

42 ML_DA1 MC 33 MD 34 35 36

R47 100

9 8 7

LEFT OUT

RIGHT OUT -5V

U21
VCC0 AGND0 VCC1 AGND1 VCC2

PCM1600

FS_CLK_U21 BIT_CLK SYSTEM_RESET 37 38 SCLKI 40

41

3
FS256_CLK

SDO0 SDO1 SDO2 48 1 2 3 4 5 6 VOUT4 VOUT5 VOUT6 AGND6 VCC6 47 AGND5 46 VCC5

AGND4
+

C94 10uF

C95 0.1uF

10uF

1K C97 2700pF

-5V

R52 15K C99 10uF R53 8.2K R54 1K C100 2700pF

C98 270pF

+5VA U22B MC33078


5
-

2
39

-5V

C103 10uF

R56 15K R57 8.2K

C105 2700pF -5V

R60 15K
+

C106 270pF C107 10uF R61 8.2K R62 1K C108 2700pF

+5VA U23B MC33078


5
-

Schematics

-5V

Date:
A B C

Friday, September 21, 2001


D

Sheet 7

of

13

C-8

1K

C101 270pF R58

+5VA U23A MC33078


2
8

100pF

R49 8.2K

R94 150

C138

C93

R48 15K R50

C91 270pF

+5VA U22A MC33078


2
8

C92
1
+

1uF C96 1uF

R51 100

7
+

R55 100

C102 1uF

R59 100 C104 1uF


+

R63 100

MOTOROLA IMAGING AND ENTERTAINMENT SOLUTIONS DIGITAL AUDIO APPLICATIONS Size Title

Rev

DSP56367EVM ANALOG OUTPUTS

1.33

DSP5636XEVM Users Manual

MOTOROLA
8

J8 RCA_3X2
AD_INL AD_INR 1 2 3

LEFT IN RIGHT IN
4

44 DGND 9 TEST ML MC MDO MDI LRCK BCK RST AGND2 VCC3


+

VCOM1

16
+

SCLKI AGND3 VCC4 DATA1 DATA2 DATA3 ZEROA ZERO1 ZERO2 ZERO3 VOUT3
+

3
AGND4
+

23 20 19 18 17 10 9 12 5
+
+

SDO3 VCC5 AGND5 VCC6 AGND6 VOUT5 VOUT6 VOUT4 VOUT1 VOUT2 NC0 NC1 32 31 13 14
-

45

R65 8.2K 1K C120 2700pF -5V 1uF


4
+

R95 150
22 3

C139 100pF C117 10uF 100 10uF 0.1uF C118


-

21 1

C116
2

C114 270pF R66


8
+

2
+

39

SCLKO

C126
2 3

R72 15K
8

10uF C128 2700pF

1K

10uF

R77 8.2K

1K C131 2700pF

-5V

Schematics

C-9

DSP5636XEVM Users Manual


PCM1600
VCC1 AGND1 VCC2 25 24 26 27 28 AGND0 29

R73 8.2K

-5V

R76 15K C130 R78

C129 270pF

+5VA U26B MC33078


6 7

C124 270pF R74

+5VA U26A MC33078

MOTOROLA
+5VA
6 VDD 5 AGND
+

+3.3V
VCC 7 4 8

AUX2 LEFT OUT AUX2 RIGHT OUT

43

C109 C113 0.1uF 10uF 10uF


VCOM2 15 30 7 8

C110

C111

C112

0.1uF

10uF

42

AUX1 LEFT OUT AUX1 RIGHT OUT

ML_DA2

36

MC

35

33

U24
VCC0

MD

34

FS_CLK

41

BIT_CLK

40

SYSTEM_RESET

37

FS256_CLK

38

R64 15K R67

+5VA U25A MC33078 C119

C115 1uF
3

PLD_SDO4_OUT

46

47

48

+5VA U25B MC33078


7 6

3 ZERO4 11 ZERO5 ZERO6

R68 15K C122 R71 100 10uF C123 2700pF -5V R69 8.2K 1K R70

C121 270pF

C125 1uF
1
+

R75 100 C127 1uF

R79 100

MOTOROLA IMAGING AND ENTERTAINMENT SOLUTIONS DIGITAL AUDIO APPLICATIONS Size Title Rev

A
Date:

DSP56367EVM ANALOG OUTPUTS


Friday, September 21, 2001
D

1.33
Sheet 8
E

of

13

+3.3V +5V C60 +3.3V


VCC 8

R31 180

C58 0.1uF R32 130

T2
1 4 5 8 1

0.1uF K1
A 6 7 2 4 B 9 7 6 3 5 8 1 10

2 ~RE RO DE DI 1 3 ADO 4

U16 MAX3485
GND

+5V EB2-5NU D8 FM4001


2 1 3 Vcc Vin GND

J4 GP1F32T

J3 S/PDIF OUT

JP26
12

SPDIF_ELECT SPDIF_OPTICAL

jumper in -> ESAI out jumper out -> DAX out

Schematics

MOTOROLA IMAGING AND ENTERTAINMENT SOLUTIONS DIGITAL AUDIO APPLICATIONS Size Title

Rev

Date:
A B C

Friday, September 21, 2001


D

Sheet 9

of

13

C-10

DSP56367EVM SPIDF OUT

1.33

DSP5636XEVM Users Manual

MOTOROLA

17

Vdd 38

Vss

OSC1

37

C31 1uF

36

OSC2

VL 15 VCC 23

5 9 4 8 3 7 2 6 1

P1

22

GND

MOTOROLA
4

+3.3V C23 0.1uF

U3 MC68HC705C8A-QFP
35 TCAP 33 TCMP 43 Vpp 34 PD7 HC05_PC1

7 6 5 4 3 2 1 44 PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7

+3.3V +3.3V R9 10K


~HC05_RESET HC05_TDO 28 TDO RDI 27 41 42 RESET IRQ 32 SS 31 SCK 30 MOSI 29 MISO

+3.3V R11 10K

TCK TDO TDI ~RESET TMS

PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7

26 25 24 23 21 20 19 18

R10 10K

8 9 10 11 12 13 14 15 PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7

+3.3V R12 10K


HC05_RDI

+3.3V

R13 10M

CLK_3.686MHZ

+3.3V
1 C1+ C1C2+ ~INVALID RS232_R1OUT RS232_T1IN RS232_T2IN RS232_T3IN RS232_R2OUT RS232_R3OUT 9 V6 V+ 2

0.1uF C29 0.1uF C30


4

0.1uF C24 C27 22pF

Y1 3.6864MHZ C28 22pF

R14 10K
5 C218 21 R1IN T1OUT 17 20 R2IN T2OUT 16 19 R3IN T3OUT 14 R1OUT 7 T1IN 13 U4 R2OUT 8 T2IN 12 R3OUT 10 T3IN 24 11 ~FORCEOFF FORCEON

MAX3387E

0.1uF C25

2
*body ground

DSP5636XEVM Users Manual


+3.3V

MOTOROLA IMAGING AND ENTERTAINMENT SOLUTIONS DIGITAL AUDIO APPLICATIONS Size Title Rev

A
Date:
B C

DSP56367EVM RS-232/OnCE INTERFACE


Friday, September 21, 2001
D

1.33
Sheet 10
E

of

13

Schematics

C-11

P3 BLACK RED
2 1

+3.3V

+5VA

+5V

-5V

Power Terminal P2 Power Jack


1 2 3

D2 FM4001
3

U6 LT1085 L2
3

D5
+

VIN

VOUT

C32 1000uF

FM4001

C33 0.33uF

C34 0.33uF C37 0.33uF


GND 2
1 VIN VOUT 3
+

C35 47uF C38 47uF


+

C36 47uF C39 470uF L4 U7 MC7805 R15 1K


+

+1.8V C40 0.1uF L5

C140

GND 4 Vot 2 Vo

10uF +1.8V U9 NMF0505_SIP D6


CORE_SUPPLY 1 2 Vin GND
DC DC +VREG 6

+3.3V JP14
1 2 3

Vin

U8

0V

DSP Core Voltage Select


2

REG1117_1.8

PCB Mounting Holes M2 M1 M3


MNT MNT MNT

M4
MNT

.125

.125

.125

.125

Schematics

MOTOROLA IMAGING AND ENTERTAINMENT SOLUTIONS DIGITAL AUDIO APPLICATIONS Size Title

Rev

Date:
A B C

Friday, September 21, 2001


D

Sheet 11

of

13

C-12

DSP56367EVM POWER SUPPLY

1.33

DSP5636XEVM Users Manual


GND

MOTOROLA

18K C48
8 R TVDD 3

C47 10uF U10 AK4112AVF

DVSS 2 DVDD 1

AVDD

AVSS 10

R17

PDN

XTI

XTO

SYSTEM_RESET

16

P/SN

MOTOROLA
4

+3.3V +3.3V

T1
1 5

J1 S/PDIF IN C42
+ +

1 4 8

C43 0.1uF 0.1uF 10uF

C44

C45

R16 71.5 10uF

+3.3V

0.1uF

+3.3V

J2 GP1F32R C49 0.1uF R19


4 V/TX

+5V

AK4112_256FS AK4112_FS_CLK AK4112_AUTO AK4112_BIT_CLK SDI1 AK4112_FS96

Vcc

R18 620

Vout

23 MCK02 24 MCK01 21 BICK 19 LRCK 20 SDTO

GND

470 C50 0.01uF


SDI0 DAUX 11 12 RX1 13 RX2/DIF0 14 RX3/DIF1 RX4/DIF2 22

15 AUTO 17 FS96 18 ERF 25 CSN 26 CCLK 28 CDTO 27 CDTI

D7

AK4112_CSN AK4112_CCLK AK4112_CDTO AK4112_CDTI

AK4112_ERF

12..288MHZ
CLK_12M

DSP5636XEVM Users Manual


Y5 R81 10M C132 22pF C133 22pF

MOTOROLA IMAGING AND ENTERTAINMENT SOLUTIONS DIGITAL AUDIO APPLICATIONS Size Title Rev

A
Date:
B C

DSP56367EVM
Friday, September 21, 2001
D

1.33
Sheet 12
E

of

13

Schematics

C-13

+3.3V C134 0.1uF

+3.3V

0.1uF
~RESET

C135
PLD_SEL1 BIT_CLK

PLD_SEL2

+3.3V 0.1uF C136

SYSTEM_RESET FS_CLK_U21

for 362 pin is GNDp1

DSP_SDO5_1
pins 1 & 2 -> Ad clock source pins 3,4,5 &6 2nd ESAI

HC08_PTA7 PLD_SCKR_1 RS232_R3OUT SDI0

AK4112_AUTO AK4112_FS96 PLD_SEL3 MD ML_DA2 MC

ML_DA1

R93
NC14 100 99 I/O56 98 I/O55 I/O54 97 96 I/O53 95 I/O52 VCC1 36 94 NC13 VCC2 63 93 92 91 90

10K

HC05_RDI

VCC3 89 I/O47 85 84 I/O46 83 I/O45 82 I/O44 I/O43 80 79 I/O42 78 I/O41 77 I/O40 I/O39 76

AD clock source

1 3 5 FS128_CLK AK4112_ERF

2 4 6 4 NC15 1 2 I/O57 3 I/O58 5 I/O59 6 I/O60 7 I/O61 8 I/O62 I/O63 9 10 NC16 31 Y0 NC2 12 11 VCC4 ~RESET CLK_12M 17 18 I/O0 19 I/O1 20 I/O2 22 I/O3 23 I/O4 24 I/O5 I/O6 25 13 NC1 14 GOE1 GND4

JP29
PLD_AD_IN
3

+3.3V

U28 ISP2064VE

C137 0.1uF

38 39 NC3 GND1 40 41 I/O16 42 I/O17 43 I/O18 44 I/O19 NC4 45 46 I/O20 47 I/O21 48 I/O22 49 I/O23 I/O24 50 86 NC5 GND3 15 16 ~BSCAN 87 TDI 37 TDO 59 TMS TCK

AK4112_CSN AK4112_CCLK AK4112_CDTI AK4112_CDTO PLD_IO3 PLD_SDO4_1 AK4112_256FS AK4112_FS_CLK DSP_CLK


2

I/O7 I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15

88 NC12 81 NC11 75 NC10 74 I/O38 73 I/O37 72 I/O36 70 I/O35 69 I/O34 68 I/O33 67 I/O32 71 NC9 66 NC8 65 Y1 64 NC7 58 I/O31 57 I/O30 56 I/O29 55 I/O28 62 GOE0 60 Y2 61 GND2 54 NC6 53 I/O27 52 I/O26 51 I/O25

FS_CLK FS256_CLK ~HC08_RESET PLD_IO2 PLD_IO0 PLD_SDO4_OUT PLD_IO1

HC08_IRQ HC08_PTA0 CLK_3.686MHZ PLD_FSR_1

HC08_CLK PLD_SCKT_1

26 27 28 29 30 32 33 34 35

+5V

+5V
GND VCC 4

1 AK4112_BIT_CLK PLD_SDO5_1 HC08_RXD HC08_TXD RS232_R2OUT RS232_T2IN RS232_R1OUT RS232_T1IN RS232_T3IN 3

OE OUT

Y6 9.8304MHZ
2

HC08/HC05/RS232 Mode select

1 3 5

2 4 6

JP27

HC05_PC1 ~HC05_RESET PLD_FST_1 HC05_TDO

+3.3V
1

Schematics

JP22
1 2 3 4 5 6 7 8

MOTOROLA IMAGING AND ENTERTAINMENT SOLUTIONS DIGITAL AUDIO APPLICATIONS Size


C63 0.01uF
A B C

Title

Rev

Date:

Friday, September 21, 2001


D

Sheet 13

of

13

C-14

DSP56367EVM PLD

1.33

DSP5636XEVM Users Manual


I/O51 I/O50 I/O49 I/O48

2 nd ESAI modes

MOTOROLA

Index INDEX
A
analog I/O clocking, 3-5 connectors, 3-4, 3-5

J
jumpers core voltage, 2-3 default locations, 2-4 default settings, 2-2

B
basic features, 1-1 BOM, 5-1

M
MC68HC711E20, 3-6 microcontroller interface, 3-6

C
connections cable, 2-2 connectors analog I/O, 3-4, 3-5 core voltage, setting, 2-2

O
OnCE port RS-232 interface, 3-1

P
parallel port interface cable, A-1 passthrough code, B-1 PINIT signal, 3-6 post processing phase, A-6 power supply cautions, 3-7 voltages, 3-7 PPI cable installation, A-1 communication issues, A-7 connections, A-2 debugger, A-6 demo software, A-6 driver libraries, A-5 I2C mode, A-3 installation disk, A-1 overview, A-1 software, A-5 SPI mode, A-2 PPP, A-6

D
datasheets where to find, 4-1 debug interface, 3-1 digital I/O description, 3-4 documentation general information, 4-1 URL, 4-1 domain technologies, 2-1 DSP clock, 3-6 operating mode select, 3-6

E
EVM block diagram, 1-2 evaluation platform, 1-2 features, 1-1 overview, 1-1 system description, 3-1 extarnal memory, 3-2

R
ROM, flash, 1-1

F
features basic, 1-1

S
S/PDIF transmitter serial data output, 3-5 schematics, C-1 setup hardware, 2-2 hardware and software, 2-1 software installation, 2-1 SRAM, external, 1-1 suggested reading, 1-i

I
installation software, 2-1

MOTOROLA

Index-i

Index
U
user manual conventions, 1-ii organization, 1-i

Index-ii

MOTOROLA

How to reach us: USA/Europe/Locations Not Listed: Motorola Literature Distribution P.O. Box 5405 Denver, Colorado 80217 (303) 675-2140 (800) 441-2447 Asia/Pacific: Motorola Semiconductors H.K. Ltd. 8B Tai Ping Industrial Park 51 Ting Kok Road Tai Po, N.T., Hong Kong 852-26629298

Technical Resource Center: 1 (800) 521-6274 Japan: Nippon Motorola Ltd. SPD, Strategic Planning Office 4-32-1, Nishi-Gotanda Shinagawa-ku, Tokyo, Japan 81-3-5487-8488 Internet: http://www.motorola.com/ semiconductors

DSP helpline email: dsphelp@dsp.sps.mot.com

DSP5636XEVMUM/AD Revision 1.3 10/01