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Faculty of Engineering and Applied science Memorial University of Newfoundland St. Johns, NL A1B3X5, Canada Email :{ ruihe, lihong}@engr.mun.ca

Abstractwith the breathtaking advance of technology, the modern analog/mixed-signal design needs to consider the requirements of low voltage/power and the effects of the MOSFET channel length shrinking. Although a few different schemes have been proposed, the bulk-driven technique, which uses bulk terminal (the fourth terminal of a MOSFET) for signal input, is a promising solution to the low-voltage and low-power applications. However, the conventional MOSFET models are normally set up for the typical gate-driven applications (i.e., using gate terminal for signal input). Besides, due to shrinking MOSFET channels, those MOSFET models may not perform correctly and accurately for the bulk-driven applications, especially in the moderate inversion region. In this paper, we evaluate two MOSFET models including BSIM3V3 and EKV for the bulk-driven applications in a sub-micron CMOS technology. BSIM3V3 is a widely used model in the semiconductor industry, while the EKV model is suitable for the small-channel-length simulation. We focus on several critical MOSFET parameters for bulk-driven application and conduct thorough experiments using the two aforementioned models. The simulation results are analyzed to demonstrate the advantages of the bulk-driven technique compared to the gatedriven scheme in the low-voltage/low-power applications. Finally the performance of the two MOSFET models in the bulk-driven applications is summarized.

micrometer, the gate-driven applications will cause operational problems. The fact is that the supply voltage reduces at a faster pace than the threshold voltage. One possible solution is to use the bulk-driven technique, which treats the bulk terminal as a second gate [2]. The input voltage is set up between the bulk terminal and the source terminal. The basic concept of the bulk-driven technique is based on Eq. 1 below, which shows the body effect:

(1)

I.

INTRODUCTION

Nowadays the low voltage and low power analog and mixed-signal design is of great importance. The reduction of the minimum dimensions in MOSFET requires a low supply voltage that can reduce the power supply and the heat effect. Thus, quite a few different techniques have been developed for the low voltage applications, such as bulk-driven, subthreshold, self-cascade and floating-gate techniques. The bulk-driven is an important design technique as it achieves enhanced performance and does not need to modify the existing structure of MOSFET [1]. In a traditional CMOS design, MOSFETs normally employ gate terminal as input of signals. The input voltage is set up between the gate terminal and the source terminal. However, when the channel lengths are much smaller than a

When the input voltage is under 1V [2], the bulk-driven MOSFET configuration can not only remove the requirement of VGS > VT, but also reduce the threshold voltage. And this technique allows small voltage less than 1V to be set at the input to generate the saturation voltage at the output [3]. When applying the bulk-driven technique in the circuit design, we can achieve satisfactory performance especially in the low-voltage and low-power applications. The traditional MOSFET models are not able to provide accurate analysis for the moderate inversion region, which leads to many problems. The problems such as increased junction leakage are first involved in the design for the MOSFET [4]. The modeling of MOSFETs becomes very difficult. In this paper, we compare two popular MOSFE models including BSIM3V3 and EKV. The BSIM3V3 model came out in 1995 and it was the first standard model publicized by the CMC (Compact Model Council) for analog circuit simulation. It is widely used in the industry and it achieved excellent performance by using a large number of parameters. Even the DC model involves more than 100 parameters [5]. Even though this model achieved high performance before, it is not able to establish accurate model for the devices in or less than 90nm because it takes into account many factors from experience instead of from physics. And there is an important problem that the BSIM3V3 model only considers the vertical and lateral nonuniform doping, short channel effect and narrow channel effect for the threshold voltage. And the other Model is the EKV (Enz-Krummenacher-Vittoz) model which is a

This work was supported in part by the Natural Sciences and Engineering Research Council of Canada (NSERC) and Memorial University of Newfoundland. The authors acknowledge CMC for providing Cadence design platform.

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continual and concise model based on physical characteristics. The predominance of the EKV model is its concision of employing fewer parameters to reduce the complexity of the formulas [6]. It provides a clear understanding of the device properties using only 18 intrinsic core parameters. Moreover, this model is especially precise for the design of low voltage and low current circuit design. Most recently, another physical based model, PSP model, which provides a more accurate solution to the MOSFETs under 90nm, has been developed. However, due to the limited support of its model parameter extraction, we do not include this model in our evaluation work for a 0.18m CMOS technology. The rest of the paper describes the evaluation of the MOSFET models in detail. Section II describes the bulkdriven applications and the simulation circuit, followed by the simulation results and analysis of the evaluation in Section III. In the third section, the simulation results of different parameters of the two models are shown in graphs and compared between bulk-driven and gate-driven applications. Finally, the conclusions are drawn in Section IV. II.

BULK-DRIVEN TECHNIQUE

The circuit configuration for simulation is shown in Fig. 1, where V0 is the input of the gate terminal and the V2 is the input of the bulk terminal. For the gate-driven simulation, we sweep the gate-source input voltage and fix the voltages of the other three terminals. For the bulk-driven simulation, we sweep the bulk-source input voltage and fix the voltages of the other three terminals. We chose several important parameters for simulation to evaluate the performance of MOSFET using different models. The chosen parameters include the bulk-terminal current, body transconductance(gmb), threshold voltage, and capacitances between the terminals of MOSFET. III.

SIMULATION AND ANALYSIS

The theoretical scheme of the bulk-driven design technique is that when the input voltage Vbs is greater than zero, the body effect can be rewritten as in Eq. 2. Compared the Eq. 1 with Eq. 2, we are capable to see that the threshold voltage can be theoretically reduced by the bulk-source signal. Also, the bulk-driven technique is able to provide the same level current by using lower voltage for the bulkterminal voltage compared to the gate-driven scheme. For the comparison of the bulk-driven and gate driven applications, we need to choose several parameters to evaluate the performance.

3 2F Vth ' = Vth 0 + 2F (for Vbs > 0 ) (2) 2F + Vbs / 2

A. Sweeping input in bulk-driven applications To evaluate the performance of MOSFET in bulk-driven applications, we first need to analyze the relationship between input voltages and drain current Vbs -Id. According to [3], we sweep the input of the bulk terminal and set small fixed bias voltage at the gate-terminal and drain terminal. The bulkdriven results of Vbs Id are shown in Figs. 2 and 3. For nmos, the current of the drain terminal of BSIM3V3 model is lower than the EKV model for the input voltage of 0.2V to 0.5V, which shows a more reliable curve compared to the real measurement. Our simulation result is in line with the claim above for the bulk-driven applications. From our simulation, we can easily see the difference in the amount of drain currents between the gate-driven and bulk-driven applications. In the gate-driven simulation, for Vgs = 2V, the EKV and BSIM3V3 achieve the drain currents of 2.5A and 2A, respectively; and in the bulk-driven simulation, for Vbs = 0.5 V, the EKV and BSIM3V3 achieve the drain currents of 6.8A and 4.2A. Obviously, the bulkdriven application is able to obtain the higher drain current than the gate-driven application with lower input voltage.

The second purpose of this paper is to compare the BSIM3V3 and EKV models used for a 0.18m technology. We first install the two models in our simulation environment, and then conduct thorough experiments. Finally we evaluate the simulation results and compare the performance differences between the models.

Figure 2: Vbs Id of nmos Figure 3: Vbs - Id of pmos

So if we use the bulk-driven applications, it is possible for low input voltage to achieve higher current compared to the high input voltage used for the gate-driven applications. And from the result of the pmos, we can see that the EKV and BSIM3V3 model show the same trends. The 2 curves show the difference at Vbs = -0.5 V. When Vbs = -0.5 V, the current of the EKV and BSIM3V3 are 4.1A and 1.1A, respectively; when Vgs = -2 V, the currents of the EKV and BSIM3V3 are 2.5A and 0.5A. This result exhibits that the bulk-driven applications can produce enough current by

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inputting lower voltage. And for the pmos, we can see that the curve of the BSIM3V3 model does not show exponential relationship compared to the EKV model. It is because the BSIM3V3 model uses a single formula to describe the drain current performance for the sub-threshold region, linear Region and saturation region as is shown in Eq. 3. V dseff V gsteff 1 A bulk 2 (V gsteff + 2 V tm ) (3) W I d = eff C ox V dseff L 1+ E sat L And for the EKV model, the formula of drain current is shown in Eq. 4. So its curve shows exponential trends. And it adds parameters to consider the different regions of the device worked. For the small channel length, the formula of the BSIM3V3 is too simple; it needs to consider more about the different regions.

IBA 2 I d = 2 n V t i f i 'r 1 + V ib exp IBB

shrinks, many factors become variable and involve some uncertainties. Compared the result of the bulk-driven with the gate-driven applications, we can see a disadvantage of the bulk-driven application. The gmb in bulk driven has a smaller region than that in the gate-driven. This property makes the bulk-driven applications have lower transition frequency [7]. And for the bulk-driven, we should consider the transconductance in the bulk terminal (gmb). The result is shown in Figs. 6 and 7. The bulk-driven input voltage is swept from -0.5V to 0.5V.

IBB L C V ib

(4)

Figure 6: gmb of nmos Figure7: gmb of pmos

B. Threshold voltage Another important parameter for MOSFETs is the threshold voltage. A problem in traditional low power analog design is that the threshold voltage does not decrease as fast as the power supply [4]. Theoretically, we expect the reduction of the threshold voltage in the bulk-driven applications. The results of the threshold voltage are shown in Figs. 4 and 5. In the gate-driven, the threshold voltage does not change much with the change of input voltage. For both models, the threshold voltage remains constant at about 0.5V. In the bulkdriven applications, we can see that the threshold voltage Vth is reduced by the body effect. For the EKV model, it decreased to 0.3V when input voltage increases to 0.5V. Meanwhile the BSIM3V3 model is above the EKV model and shows a smaller reduction. The two curves for pmos depicted in Fig. 5 almost show the same trends.

As shown in Fig. 6, the gmb increases in the bulk-driven applications. But for the BSIM3V3 model, when the Vbs is greater than 0.1 V, the increasing speed slows down, and the curve becomes more flat. However, the EKV model reports a fast increasing curve. When Vbs=0.5, gmb is even greater than 2.5. The EKV model reports higher values than the BSIM3V3 model. Both models show that for the bulk-driven the gmb is decreased compared to the gate-driven scheme. D. Current of the bulk terminal Our next focus is the current of the bulk terminal. The simulation results of Ib-Vbs are depicted in Figs. 8 and 9. With the increase of the input voltage, the current rises quickly when Vbs is greater than 0.8V. So it shows that we had better to control the input voltage below the 0.8V. And the EKV increases slower than the BSIM3V3 model.

The difference between the two curves enlarges at -0.1V to 0.1V. However, both of the figures show that the threshold voltage will be reduced with the bulk-driven applications. From the technique default value provided by the foundry, we can see that the result of the EKV model is closer to the default value than the BSIM3V3 model. C. Transconductance The transconductance (gm) is defined as the delta current of drain terminal / delta input voltage. When the channel length

Figure 8: Ib of nmos

Figure 9: Ib of pmos

In addition, we can see that when the input voltage of the bulk terminal rises, the difference between the EKV model and BSIM3V3 model becomes larger. From the simulation curves, we can see that the BSIM3V3 result is actually divided into three regions. This is due to three formulas used to calculate Ib. In contrast, the EKV model reports sleeker curves, which represent the smoothness, feature of any real measurement results.

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E. Capacitances The simulation results of Cgs (the capacitance between gate and source terminals), Cbs (the capacitance between bulk and source terminals) and Cds (the capacitance between drain and source terminals) are shown in Figs. 10 and 11. The BSIM3V3 and the EKV models show the same trends but the values are different. And we can see the Cbs of the BSIM3V3 model shows a wrong curve where the capacitance rises below 0.02V and falls down above 0.02V. Most of the capacitances remain the same amount when simulated with the BSIM3V3 model, while the EKV model reports the simulation result of increasing capacitances.

decreases. So the bulk-driven is suitable for small device length between 1um and 0.18um. The current changes very slightly and we can hardly see the difference of the curves. And for the EKV model, the current of the bulk-terminal increases much lower than the BSIM3V3 model. The EKV model reports more reasonable results than the BSIM3V3 model for the bulk-driven applications. Based on the results above, we can see that the bulk-driven technique shows significant advantages over the gate-driven scheme. And EKV model is more suitable and provides more reasonable result for the bulk-driven application simulation when compared to the BSIM3V3 model. IV. CONLUSION

F. Device size The MOSFET length and width affect the simulation result. In the following simulation, we fix the width as 1m and compare gmb and the bulk-terminal current when the device lengths are 0.18m and 1m. As shown below, the gmb increases when the device lengths shrink. Both the EKV model and BSIM3V3 model increase about 5 times. Also we can see the EKV model performs better compared to the BSIM3V3 model.

Based on the experimental results obtained in this paper, we can first conclude that the bulk-driven technique shows obvious advantages over the traditional gate-driven scheme in certain applications. If inputting a much lower voltage (e.g., sub-1V) following the bulk-driven technique, one can obtain the same current derived by a high input voltage using the gate-driven scheme. The bulk-driven technique is capable of overcoming the bottleneck caused by the threshold voltage that fails to decrease at the same pace as the supply voltage of MOSFETs in the advanced technology. Furthermore, it does not require any modification of the existing MOSFET structure. In addition, we make some comparisons between the simulation performance when using the BSIM3V3 and EKV models. We can see that the simulation of the BSIM3V3 is less accurate for the lower voltage. In contrast, the EKV model performs well in the region of less than 1V but it may cause distortion when the input voltage is high. In all, the bulk-driven applications achieve promising performance, although this design technique still has some limitation, such as low transition frequency and high input referred noise. REFERENCES

[1] Y. Tsividis, Mixed analog-digital VLSI devices and technology, World Scientific Publishing, 2002 [2] L. Zhang, X. Zhang and E. El-Masry, "A highly linear bulk-driven CMOS OTA for continuous-time, " International Journal of Analog Integrated Circuits and Signal Processing, vol. 54, no. 3, pp. 229-236, Mar, 2008. [3] C. Duan and M. Liu MOSFET Modeling for Analog IC Simulation under Ultra-Deep Submicron Technologies, Micro-electronics Technology. pp 205, April 2006. [4] K-S Yeo, S. Rofail and W. Goh, CMOS/BiCMOS VLSI: low voltage, low power, Prentice Hall, 2002 [5] S. C. Terry, J. M. Rochelle, D. Binkley, B. J. Blalock, D. P. Foty, and M. Bucher, Comparison of a BSIM3V3 and EKV MOSFET Model for a 0.5um CMOS Process and Implications for Analog Circuit Design, IEEE Trans. Nuclear Science, Vol. 50, No. 4, pp. 915-920, Aug. 2003. [6] J. Ngarmnil and W. Sangnak BSIM3v3 key parameter extractions for efficient circuit designs, Semiconductor Electronics, 2000. Proceedings. ICSE 2000. IEEE International Conference, pp99 103, Nov. 2000 [7] B. J. Blalock, P. E. Allen, and G. A. Rincon-Mora, Designing 1-V Op Amps Using Standard Digital CMOS Technology, IEEE Trans. Circuits and Systems II: Analog and Digital Signal Processing, Vol. 45, No. 7, pp769-780, 1998.

And we consider the current of the bulk-terminal and shrink the length of the device. We can see from the result that for both models, the Ib remains all the same when length

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