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CHAPTER - 1 1.

Automated teller machines (ATMs) are well known devices typically used by individuals to carry out a variety of personal and business financial transactions and/or banking functions. ATMs have become very popular with the general public for their availability and general user friendliness. ATMs are now found in many locations having a regular or high volume of consumer traffic. For example, ATMs are typically found in restaurants, supermarkets, Convenience stores, malls, schools, gas stations, hotels, work locations, banking centers, airports, entertainment establishments, transportation facilities and many other locations as well. ATMs are typically available to consumers on a continuous basis such that consumers have the ability to carryout their ATM financial transactions and/or banking functions at any time of the day and on any day of the week. On most modern ATMs, the customer is identified by inserting a plastic ATM card with a magnetic stripe or a plastic smart card with a chip that contains a unique card number and some security information such as an expiration date or CVVC (CVV). Authentication is provided by the customer entering a personal identification number (PIN). When these ATM cards are lost or stolen, an unauthorized user can often come up with the correct personal codes and access the account. There is also another drawback in the existing system which is nothing but , the user should carry their ATM card without fail. But in many cases we forget it. So only we designed a system which helps us to use the ATM machine without the ATM card.


The aim of this project is to develop an embedded finger-vein recognition system for authentication on ATM machine. Biometrics , which uses human physiological or behavioral features for personal identification, has attracted more and more attention and is becoming one of the most popular and promising alternatives to the traditional password or personal identification number based authentication techniques. Compared with other biometric traits finger-vein is a promising biometric pattern for personal identification in terms of security and convenience.


A long list of biometric patterns like face, iris, fingerprint, palmprint, hand shape, signature and gait have been developed and implemented for personal identification in terms of security and conveience . But, no biometric has yet been developed that is perfectly reliable or secure. The finger- vein pattern is hidden inside the body and is mostly invisible to human eyes, hence difficult to forge or steal. There is also a fact that the vein pattern can be taken only from a live body. So we consider this as a natural and convincing proof for personal identification.


In this paper [1] , we propose an algorithm for finger vein recognition with less complexity in the image preprocessing phase, where finger vein pattern extraction is not included at all. The algorithm includes phase-only correlation (POC) at the matching stage with a very simple preprocessing technique. In image processing, phase correlation is a method of image registration, and uses a fast frequency- domain approach to estimate the relative translative offset between two similar images. The most significant property of POC function is its accuracy in image matching. Experimental evaluation of the proposed algorithm using a set of finger vein images captured from a low cost device have resulting an efficient recognition performance where the equal error rate (EER) was 0.9803% with a total processing time of 0.6362s. In the future , we would like to demonstrate the 2

proposed algorithm with a better quality finger vein image with minimize preprocessing steps and only emphasize on the advantage of band-limited phaseonly correlation function. In this paper [2] , a novel algorithm is proposed to merit the accuracy of finger vein recognition. The algorithm has five steps: first step is extracting the region of interest (ROI). The second step is enhancing the images by using contrast limited adaptive histogram equalization. Feature normalization of images is implemented in step three. Step four is employing the Principal Component Analysis (PCA) , Kernel Principal Component Analysis (KPCA) and Kernal Entropy Component Analysis (KECA) to extract features, and reducing the dimension of the images. The last step is comparing test and train data using euclidian distance. PCA is a linear method which extract the features and reduces the dimension. In case of KPCA , the input data is first nonlinearly mapped to another feature space called F, and then a PCA will be performed on the mapped dataset. This nonlinearly mapping of the input data is done by a function called . KECA is exactly the same as KPCA except for one point that when it comes to choosing the eigen vectors to project onto the data, unlike KPCA, in KECA the chosen eigen vectors have to contribute to the entropy estimate of the input data. The comparison results says that the KPCA matches the proposed algorithm best. KPCA is not only the most appropriate in comparison to the other methods, but it is also efficient enough to be used in finger vein recognition. In this paper [3] , a real-time embedded finger-vein recognition system for authentication on mobile devices is proposed. The system is implemented on a DSP platform and equipped with a novel finger-vein recognition algorithm. The system includes a device for capturing finger-vein images, a method for ROI segmentation, and a novel method combining blanket dimension features and lacunarity features for recognition. The proposed system takes only about 0.8 seconds to verify one input finger vein sample and achieves an equal error rate (EER) of 0.07% on a database of 100 subjects. It is suitable for application in mobile devices because of its relatively low computational complexity and low power consumption. In this system, the finger-vein images are captured with the help of an IR camera . The Infrared rays contains residual information, such as shade produced by various thicknesses of the finger muscles, bones, and tissue networks surrounding the vein. The feature extraction in our system is a little bit complicated . 3

In this paper [4] , we propose a finger vein recognition method based on a personalized best bit map (PBBM). Our method is rooted in a local binary pattern based method and then inclined to use the best bits only for matching. We first present the concept of PBBM and the generating algorithm. Then we propose the finger vein recognition framework, which consists of preprocessing, feature extraction, and matching. Finally, we design extensive experiments to evaluate the effectiveness of our proposal. Experimental results show that PBBM achieves not only better performance, but also high robustness and reliability. In addition, PBBM can be used as a general framework for binary pattern based recognition. The advantages of PBBM can be summarized as follows: (a) PBBM effectively removes noisy bits. (b) PBBMs are different from individual to individual, thus PBBMs can be regarded as a kind of personalized feature that reflects the differences between each individuals remarkably. (c) The PBBM is highly robust and reliable. Besides LBP(Local Binary Pattern), we can use LDP(Local Derivative Pattern), LLBP(Local Line Binary Pattern) and other binary code to generate the corresponding PBBM, and this will be the subject of our future work. In addition, our database has a limited number of individuals, so we plan to apply PBBM to large-scale real-world databases. This paper [5] , proposes new algorithms for finger vein recognition. The research presents the following three advantages and contributions compared to previous works. First, we extracted local information of the finger veins based on a LBP (Local Binary Pattern) without segmenting accurate finger vein regions. Second, the global information of the finger veins based on Wavelet transform was extracted. Third, two score values by the LBP and Wavelet transform were combined by the SVM (Support Vector Machine). As experimental results, the EER (Equal Error Rate) was 0.011% and the total processing time was 98.2ms. In future work, we plan to pre-align the finger vein image based on the detected finger vein region and minutia points such as bifurcation and ending points of finger vein lines. We also plan to increase the dataset including more various ages, genders and occupations. In this paper [6] , we propose a novel method for finger-vein recognition. We extract the features of the vein patterns for recognition. Then, the minutiae features included bifurcation points and ending points are extracted from these vein patterns. These feature points are used as a geometric representation of the vein patterns shape. Finally, the modified Hausdorff distance algorithm is provided to 4

evaluate the identification ability among all possible relative positions of the vein patterns shape. This algorithm has been widely used for comparing point sets or edge maps since it does not require point correspondence. Experimental results show these minutiae feature points can be used to perform personal verification tasks as a geometric representation of the vein patterns shape. Furthermore, in this developed method. we can achieve robust image matching under different lighting conditions. The equal error rate (EER) reaches 0.761% where the threshold value for the distance measure HD is observed to be 0.43. Though the current database is relatively small and it is not adequate to draw any firm conclusion on the discriminating power of vein patterns for a large population (in terms of millions of users) group, the experiments do show the potential of the minutiae of the vein patterns as a biometric feature for personal verification applications in a reasonable sized user group. The results presented here indicate, as a new identity authentication technology, the vein recognition has a better long term potential, need to be studied further, and can be applied to the lives of people better.


3.1. BLOCK DIAGRAM 3.1.1. Transmitter Section

Fig:3.1 : Block Diagram of the Transmitter section 3.1.2. Receiver Section

Fig:3.2 : Block Diagram of the Receiver section 6

3.1.2. Block Diagram Explanation RFID(Radio Frequency Identification) is a technology to electronically record the presence of an object using radio signals. Each person should carry RF transmitter instead of ATM card and a RF receiver is present in the ATM machine. The Particular persons RFTX(Radio Frequency Tansmitter) will be having information about the person details such as mobile number, address for identification and authentication. If RFID and Finger Vein recognize for a person then a random one time password (OTP) will be generated and with help of the GSM the particular person will be receiving a message of the password in his mobile. With help of the voice chip further transaction is done. The RF(Radio Frequency) Transmitter (433.92 MHz) is used to transmit the digital data. RF Receiver in the receiver section will receive the digital data and then it will pass the digital data to the microcontroller for processing, using finger vein recognition algorithm finger vein images are compared with the database stored in the PC. PC will display the persons vein is authenticated or not. GSM Modem is used to send the alert message to the crime department incase of mismatching of finger vein. Alarm unit is used to alert & voice chip is used to inform us whether the finger vein is authenticated or not. Mobile scanning device scans SIM number through GSM Modem. At the same time, web camera captures the images and compares it using digital signal processing. If the images and PIN number are same then further processing is continued. Otherwise it gives alarm through Alert module. Each processing information is produced by voice annunciation module. By using this system malfunctions can be avoided. Our transaction will be much secured. This system can also be used for helping the blind people. In the existing ATM system all the transactions are done through keyboard only. It may be difficult for blind people so we can also add voice enunciator to indicate each and every process to the blind people that enables a visually and/or hearing impaired individual to conveniently and easily carry out financial transactions or banking functions.

3.2. POWER SUPPLY The AC voltage, typically 220V rms, is connected to a transformer, which steps that ac voltage down to the level of the desired DC output. A diode rectifier then provides a full-wave rectified voltage that is initially filtered by a simple capacitor filter to produce a dc voltage. This resulting dc voltage usually has some ripple or ac voltage variation. A regulator circuit removes the ripples and also remains the same dc value even if the input dc voltage varies, or the load connected to the output dc voltage changes.

D J P 2 1 2 2 0 V A C 2 2 -

V + 4 1 V I VN GND O 2 U T 5 C 6 1 0 0


U 2 7 8 0 F

C 4

0 3

C 0

. 1 D

u 2

R 4 2 2 0

Fig:3.3 : Circuit Diagram for Power Supply






Fig:3.4 : Block Diagram of Power Supply

3.2.1. Transformer The potential transformer will step down the power supply voltage (0-230V) to (0-6V) level. Then the secondary of the potential transformer will be connected to the precision rectifier, which is constructed with the help of opamp. The advantages of using precision rectifier are it will give peak voltage output as DC, rest of the circuits will give only RMS output. 3.2.2. Bridge Rectifier When four diodes are connected as shown in figure, the circuit is called as bridge rectifier. The input to the circuit is applied to the diagonally opposite corners of the network, and the ou11tput is taken from the remaining two corners. Let us assume that the transformer is working properly and there is a positive potential, at point A and a negative potential at point B. the positive potential at point A will forward bias D3 and reverse bias D4. The negative potential at point B will forward bias D1 and reverse D2. At this time D3 and D1 are forward biased and will allow current flow to pass through them; D4 and D2 are reverse biased and will block current flow. The path for current flow is from point B through D1, up through RL, through D3, through the secondary of the transformer back to point B. this path is indicated by the solid arrows. Waveforms (1) and (2) can be observed across D1 and D3. One-half cycle later the polarity across the secondary of the transformer reverse, forward biasing D2 and D4 and reverse biasing D1 and D3. Current flow will now be from point A through D4, up through RL, through D2, through the secondary of T1, and back to point A. This path is indicated by the broken arrows. Waveforms (3) and (4) can be observed across D2 and D4. The current flow through RL is always in the same direction. In flowing through RL this current develops a voltage corresponding to that shown waveform (5). Since current flows through the load (RL) during both half cycles of the applied voltage, this bridge rectifier is a full-wave rectifier. One advantage of a bridge rectifier over a conventional full-wave rectifier is that with a given transformer the bridge rectifier produces a voltage output that is nearly twice that of the conventional full-wave circuit. This may be shown by assigning values to some of the components shown in views A and B. assume that the same transformer is used in both circuits. The peak voltage developed between points X and y is 1000 volts in both circuits. In the 9

conventional full-wave circuit shownin view A, the peak voltage from the center tap to either X or Y is 500 volts. Since only one diode can conduct at any instant, the maximum voltage that can be rectified at any instant is 500 volts. The maximum voltage that appears across the load resistor is nearly-but never exceeds-500 v0lts, as result of the small voltage drop across the diode. In the bridge rectifier shown in view B, the maximum voltage that can be rectified is the full secondary voltage, which is 1000 volts. Therefore, the peak output voltage across the load resistor is nearly 1000 volts. With both circuits using the same transformer, the bridge rectifier circuit produces a higher output voltage than the conventional fullwave rectifier circuit.

3.2.3. Voltage Regulator Voltage Regulators comprise a class of widely used ICs. Regulator IC units contain the circuitry for reference source, comparator amplifier, control device, and overload protection all in a single IC. IC units provide regulation of either a fixed positive voltage, a fixed negative voltage, or an adjustably set voltage. The regulators can be selected for operation with load currents from hundreds of milli amperes to tens of amperes, corresponding to power ratings from milli watts to tens of watts. A fixed three-terminal voltage regulator has an unregulated dc input voltage, Vi, applied to one input terminal, a regulated dc output voltage, Vo, from a second terminal, with the third terminal connected to ground. The series 78 regulators provide fixed positive regulated voltages from 5 to 24 volts. Similarly, the series 79 regulators provide fixed negative regulated voltages from 5 to 24 volts.

3.3. MICROCONTROLLER A microcontroller is heart of the embedded system. It contains a processor core, memory, and programmable input/output peripherals. It contain four ports, port0 port1 port2 port3.where port 0 is an external port and other three ports are internal ports. heavy devices like motor, alarm devices etc.. are connected to the port0. Port 0 does not have internal pull up resistors. Ports 1 2 3 have internal pull up resistors. Port 3 provides serial communication signals. 10

Features of Microcontroller 8 bit controller 16 bit Program Counter(PC) and Data Pointer(DPTR) 128 byte of RAM 4KB on chip of ROM Two 16 bit timers/ counter( T0,T1) 40 pin 32 I/O pins for four 8 bit ports 6 Interrupt sources 64K Program/ Data memory address space Each 8031 device has some amount of data RAM built in the device for internal processing. This area is used for stack operations and temporary storage of data.This base architecture is supported with on chip peripheral functions like I/O ports, timers/counters, versatile serial communication port. So it is clear that this 8031 architecture was designed to cater many real time embedded needs. The generic 8051 architecture supports Harvard architecture, which contains two separate buses for both program and data. So, it has two distinctive memory spaces of 64K X 8 size for both program and data. It is based on an 8 bit central processing unit with an 8 bit Accumulator and another 8 bit B register as main processing blocks. Other portions of the architecture include few 8 bit and 16 bit registers and 8 bit memory locations. Now you may be wondering about the non mentioning of memory space meant for the program storage, the most important part of any embedded controller. Originally this 8031 architecture was introduced with on chip, one time programmable version of Program Memory of size 4K X 8. Intel delivered all these microcontrollers (8051) with users program fused inside the device. The memory portion was mapped at the lower end of the Program Memory area. But, after getting devices, customers couldnt change any thing in their program code, which was already made available inside during device fabrication. So, very soon Intel introduced the 8031 devices (8751) with re-programmable type of Program Memory using built-in EPROM of size 4K X 8. Like a regular EPROM, this memory can be re-programmed many times. Later on Intel started manufacturing these 8031 devices without any on chip Program Memory. 11

The AT89S51 is a low-power, high-performance CMOS 8-bit microcontroller with 4K bytes of In-System Programmable Flash memory. The device is manufactured using Atmels high-density nonvolatile memory technology and is compatible with the Indus-try-standard 80C51 instruction set and pin out. The on-chip Flash allows the program memory to be reprogrammed insystem or by a conventional nonvolatile memory pro-grammar. By combining a versatile 8-bit CPU with In-System Programmable Flash on a monolithic chip, the Atmel AT89S51 is a powerful microcontroller which provides a highly-flexible and cost-effective solution to many embedded control applications. The AT89S51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, two 16-bit timer/counters, a five-vector twolevel interrupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89S51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The Power-down mode saves the RAM con-tents but freezes the oscillator, disabling all other chip functions until the next external interrupt or hardware reset. The memory portion was mapped at the lower end of the Program Memory area. But, after getting devices, customers couldnt change any thing in their program code, which was already made available inside during device fabrication. So, very soon Intel introduced the 8031 devices (8751) with re-programmable type of Program Memory using built-in EPROM of size 4K X 8. Like a regular EPROM, this memory can be re-programmed many times. Later on Intel started manufacturing these 8031 devices without any on chip Program Memory.


3.3.1. Pin Diagram

Fig:3.5 : Pin Diagram for 8051 Microcontroller

3.3.2. 8051 Pin Functions I/O Ports (P0, P1, P2, P3) It has 40 pins of the typical 8052, 32 of them are dedicated to I/O lines that have a one-to-one relation with SFRs P0, P1, P2, and P3. The developer may raise and lower these lines by writing 1s or 0s to the corresponding bits in the SFRs. Likewise; the current state of these lines may be read by reading the corresponding bits of the SFRs. All of the ports have internal pull-up resistors except for port 0.

13 Port 0 Port 0 is dual-function in that it in some designs port 0s I/O lines are available to the developer to access external devices while in other designs it is used to access external memory. If the circuit requires external RAM or ROM, the microcontroller will automatically use port 0 to clock in/out the 8-bit data word as well as the low 8 bits of the address in response to a MOVX instruction and port 0 I/O lines may be used for other functions as long as external RAM isnt being accessed at the same time. If the circuit requires external code memory, the microcontroller will automatically use the port 0 I/O lines to access each instruction that is to be executed. In this case, port 0 cannot be utilized for other purposes since the state of the I/O lines are constantly being modified to access external code memory. Note that there are no pull-up resistors on port 0, so it may be necessary to include your own pull-up resistors depending on the characteristics of the parts you will be driving via port small decoupling capacitor is connected in this port 0. Port 1 Port 1 consists of 8 I/O lines that you may use exclusively to interface to external parts. Unlike port 0, typical derivatives do not use port 1 for any functions themselves. Port 1 is commonly used to interface to external hardware such as LCDs, keypads, and other devices. With 8052 derivatives, two bits of port 1 are optionally used as described for extended timer 2 functions. These two lines are not assigned these special functions on 8051s since 8051s dont have a timer 2. Further, these lines can still be used for your own purposes if you dont need these features of timer 2. P1.0 (T2): If T2CON.1 is set (C/T2), then timer 2 will be incremented whenever there is a 1-0 transition on this line. With C/T2 set, P1.0 is the clock source for timer 2. P1.1 (T2EX): If timer 2 is in auto-reload mode and T2CON.3 (EXEN2) is set, a 1-0 transition on this line will cause timer 2 to be reloaded with the auto-reload value. This will also cause the T2CON.6 (EXF2) external flag to be set, which may cause an interrupt if so enabled. Port 2 Like port 0, port 2 is dual-function. In some circuit designs it is available for accessing devices while in others it is used to address external RAM or external code memory. When the MOVX @DPTR instruction is used, port 2 is used to output the 14

high byte of the memory address that is to be accessed. In these cases, port 2 may be used to access other devices as long as the devices are not being accessed at the same time a MOVX instruction is using port 2 to address external RAM. If the circuit requires external code memory, the microcontroller will automatically use the port 2 I/O lines to access each instruction that is to be executed. In this case, port 2 cannot be utilized for other purposes since the state of the I/O lines are constantly being modified to access external code memory. Port 3 Port 3 consists entirely of dual-function I/O lines. While the developer may access all these lines from their software by reading/writing to the P3 SFR, each pin has a pre-defined function that the microcontroller handles automatically when configured to do so and/or when necessary. P3.0 (RXD): The UART/serial port uses P3.0 as the receive line. In circuit designs that will be using the microcontrollers internal serial port, this is the line into which serial data will be clocked. Note that when interfacing an 8052 to an RS-232 port that you may not connect this line directly to the RS-232 pin; rather, you must pass it through a part such as the MAX232 to obtain the correct voltage levels. This pin is available for any use the developer may assign it if the circuit has no need to receive data via the integrated serial port. P3.1 (TXD): The UART/serial port uses P3.1 as the transmit line. In circuit designs that will be using the microcontrollers internal serial port, this is the line that the microcontroller will clock out all data which is written to the SBUF SFR. Note that when interfacing an 8052 to an RS-232 port that you may not connect this line directly to the RS-232 pin; rather, you must pass it through a part such as the MAX232 to obtain the correct voltage levels. This pin is available for any use the developer may assign it if the circuit has no need to transmit data via the integrated serial port.P3.2 (-INT0): When so configured, this line is used to trigger an External 0 Interrupt. This may either be low-level triggered or may be triggered on a 1-0 transition. Please see the chapter on interrupts for details. This pin is available for any use the developer may assign it if the circuit does not need to trigger an external 0 interrupt. P3.3 (-INT1): When so configured, this line is used to trigger an External 1 Interrupt. This may either be low-level triggered or may be triggered on a 1-0 transition. Please see the chapter on interrupts for details. This pin is available for 15

any use the developer may assign it if the circuit does not need to trigger an external 1 interrupt. P3.4 (T0): When so configured, this line is used as the clock source for timer 0. Timer 0 will be incremented either every instruction cycle that T0 is high or every time there is a 1-0 transition on this line, depending on how the timer is configured. Please see the chapter on timers for details. This pin is available for any use the developer may assign it if the circuit does not to control timer 0 externally. P3.5 (T1): When so configured, this line is used as the clock source for timer 1. Timer 1 will be incremented either every instruction cycle that T1 is high or every time there is a 1-0 transition on this line, depending on how the timer is configured. Please see the chapter on timers for details. This pin is available for any use the developer may assign it if the circuit does not to control timer 1 externally. P3.6 (-WR): This is external memory write strobe line. This line will be asserted low by the microcontroller whenever a MOVX instruction writes to external RAM. This line should be connected to the RAMs write (-W) line. This pin is available for any use the developer may assign it if the circuit does not write to external RAM using MOVX. P3.7 (-RD): This is external memory write strobe line. This line will be asserted low by the microcontroller whenever a MOVX instruction writes to external RAM. This line should be connected to the RAMs write (-W) line. This pin is available for any use the developer may assign it if the circuit does not read from external RAM using MOVX. Oscillator Inputs (Xtal1, Xtal2) The 8052 is typically driven by a crystal connected to pins 18 (XTAL2) and 19 (XTAL1). Common crystal frequencies are 11.0592Mhz as well as 12Mhz, although many newer derivatives are capable of accepting frequencies as high as 40Mhz. While a crystal is the normal clock source, this isnt necessarily the case. A TTL clock source may also be attached to XTAL1 and XTAL2 to provide the microcontrollers clock. Reset Line (Rst) Pin 9 is the master reset line for the microcontroller. When this pin is brought high for two instruction cycles, the microcontroller is effectively reset. SFRs, 16

including the I/O ports, are restored to their default conditions and the program counter will be reset to 0000h. Keep in mind that Internal RAM is not affected by a reset. The microcontroller will begin executing code at 0000h when pin 9 returns to a low state. The reset line is often connected to a reset button/switch that the user may press to reset the circuit. It is also common to connect the reset line to a watchdog IC or a supervisor IC (such as MAX707). Address Latch Enable (Ale) The ALE at pin 30 is an output-only pin that is controlled entirely by the microcontroller and allows the microcontroller to multiplex the low-byte of a memory address and the 8-bit data itself on port 0. This is because, while the high-byte of the memory address is sent on port 2, port 0 is used both to send the low byte of the memory address and the data itself. This is accomplished by placing the low-byte of the address on port 0, exerting ALE high to latch the low-byte of the address into a latch IC (such as the 74HC573), and then placing the 8 data-bits on port 0. In this way the 8052 is able to output a 16-bit address and an 8-bit data word with 16 I/O lines instead of 24. The ALE line is used in this fashion both for accessing external RAM with MOVX @DPTR as well as for accessing instructions in external code memory. When your program is executed from external code memory, ALE will pulse at a rate of 1/6th that of the oscillator frequency. Thus if the oscillator is operating at 11.0592 MHz, ALE will pulse at a rate of 1,843,200 times per second. The only exception is when the MOVX instruction is executed one ALE pulse is missed in lieu of a pulse on WR or RD. Program Store Enable (Psen) The Program Store Enable (PSEN) line at pin 29 is exerted low automatically by the microcontroller whenever it accesses external code memory. This line should be attached to the Output Enable (-OE) pin of the EPROM that contains your code memory. PSEN will not be exerted by the microcontroller and will remain in a high state if your program is being executed from internal code memory.

17 External Access (Ea) The External Access (EA) line at pin 31 is used to determine whether the 8052 will execute your program from external code memory or from internal code memory. If EA is tied high (connected to +5V) then the microcontroller will execute the program it finds in internal/on-chip code memory. If EA is tied low (to ground) then it will attempt to execute the program it finds in the attached external code memory EPROM. Of course, your EPROM must be properly connected for the microcontroller to be able to access your program in external code memory. Memory Organization The 8051 architecture provides both on chip memory as well as off chip memory expansion capabilities. It supports several distinctive physical address spaces, functionally separated at the hardware level by different addressing mechanisms, read and write controls signals or both: On chip Program Memory On chip Data Memory Off chip Program Memory Off chip Data Memory On chip Special Function Registers The Program Memory area (EPROM incase of external memory or Flash/EPROM incase of internal one) is extremely large and never lose information when the power is removed. Program Memory is used for information needed each time power is applied: Initialization values, Calibration data, Keyboard lookup tables etc along with the program itself. The Program Memory has a 16 bit address and any particular memory location is addressed using the 16 bit Program Counter and instructions which generate a 16 bit address. On chip Data memory is smaller and therefore quicker than Program Memory and it goes into a random state when power is removed. On chip RAM is used for variables which are calculated when the program is executed. In contrast to the Program Memory, on chip Data Memory accesses need a single 8 bit value (may be a constant or another variable) to specify a unique location. Since 8 bits are more than sufficient to address 128 RAM locations, the on chip RAM 18

address generating register is single byte wide. Different addressing mechanisms are used to access these different memory spaces and this greatly contributes to microcomputers operating efficiency. The 64K byte Program Memory space consists of an internal and an external memory portion. If the EA pin is held high, the 8051 executes out of internal Program Memory unless the address exceeds 0FFFH and locations 1000H through FFFFH are then fetched from external Program Memory. If the EA pin is held low, the 8031 fetches all instructions from the external Program Memory. In either case, the 16 bit Program Counter is the addressing mechanism.

Fig:3.6 : Program Memory The Data Memory address space consists of an internal and an external memory space. External Data Memory is accessed when a MOVX instruction is executed. Apart from on chip Data Memory of size 128/256 bytes, total size of Data Memory can be expanded up to 64K using external RAM devices. Total internal Data Memory is divided into three blocks: Lower 128 bytes. Higher 128 bytes Special Function Register space. Higher 128 bytes are available only in 8032/8052 devices.


Fig:3.7 : Main Memory Even though the upper RAM area and SFR area share same address locations, they are accessed through different addressing modes. Direct addresses higher than 7FH access SFR memory space and indirect addressing above 7FH access higher 128 bytes (in 8032/8052).

Fig:3.8 : Internal Data Memory The next figure indicates the layout of lower 128 bytes. The lowest 32 bytes (from address 00H to 1FH) are grouped into 4 banks of 8 registers. Program instructions refer these registers as R0 through R7. Program Status Word indicates which register bank is being used at any point of time.


Fig:3.9 : Register Bank The next 16 bytes above these register banks form a block of bit addressable memory space. The instruction set of 8031 contains a wide range of single bit processing instructions and these instructions can directly access the 128 bits of this area. The SFR space includes port latches, timer and peripheral control registers. All the members of 8031 family have same SFR at the same SFR locations. There are some 16 unique locations which can be accessed as bytes and as bits. Common Memory Space The 8031s Data Memory may not be used for program storage. So it means you cant execute instructions out of this Data Memory. But, there is a way to have a single block of off chip memory acting as both Program and Data Memory. By gating together both memory read controls (RD and PSEN) using an AND gate, a common memory read control signal can be generated. In this arrangement, both memory spaces are tied together and total accessible memory is reduced from 128 Kbytes to 64 Kbytes.The 8031 can read and write into this common memory block and it can be used as Program and Data Memory you can use this arrangement during program development and debugging phase. Without taking Microcontroller off the socket to program its internal ROM (EPROM/Flash ROM), you can use this common memory for frequent program storage and code modifications. 21

Basically, 8031s assembly language instruction set consists of an operation mnemonic and zero to three operands separated by commas. In two byte instructions the destination is specified first, and then the source. Byte wide mnemonics like ADD or MOV use the Accumulator as a source operand and also to receive the result.

Fig:3.10 : Block Diagram of the 8051 Core 3.3.4. Oscillator Characteristics XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on chip oscillator, as shown in Figure 1. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2.


There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by two flip-flop, but minimum and maximum voltage high and low time specifications must be observed. 3.3.5. 8051 Clock 8051 has an on-chip oscillator It needs an external crystal Crystal decides the operating frequency of the 8051

Fig:3.11 : 8051 Clock Idle Mode In idle mode, the CPU puts itself to sleep while all the on-chip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset. It should be noted that when idle is terminated by a hardware reset, the device normally resumes program execution, from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory. Power Down Mode In the power down mode the oscillator is stopped, and the instruction that invokes power down is the last instruction executed. The on-chip RAM and Special 23

Function Registers retain their values until the power down mode is terminated. The only exit from power down is a hardware reset. Reset redefines the SFRs but does not change the on-chip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize. 8051 Reset RESET is an active High input When RESET is set to High, 8051 goes back to the power on state Power-On Reset Push PB and active High on RST Release PB, Capacitor discharges and RST goes low RST must stay high for a min of 2 machine cycles

Fig:3.12 : 8051 Reset 3.3.6. Central Processing Unit The CPU is the brain of the microcontrollers reading users programs and executing the expected task as per instructions stored there in. Its primary elements are an 8 bit Arithmetic Logic Unit (ALU), Accumulator (Acc), few more 8 bit registers, B register, Stack Pointer (SP), Program Status Word (PSW) and 16 bit registers, Program Counter (PC) and Data Pointer Register (DPTR). 3.3.7. The Accumulator If worked with any other assembly language you will be familiar with the concept of an accumulator register. The Accumulator, as its name suggests, is used as a general register to accumulate the results of a large number of instructions. It 24

can hold an 8-bit (1-byte) value and is the most versatile register the 8052 has due to the sheer number of instructions that make use of the accumulator. More than half of the 8052s 255 instructions manipulate or use the Accumulator in some way. For example, if you want to add the number 10 and 20, the resulting 30 will be stored in the Accumulator. Once you have a value in the Accumulator you may continue processing the value or you may store it in another register or in memory. 3.3.8. THE "R" Registers The "R" registers are sets of eight registers that are named R0, R1, through R7. These registers are used as auxiliary registers in many operations. To continue with the above example, perhaps you are adding 10 and 20. The original number 10 may be stored in the Accumulator whereas the value 20 may be stored in, say, register R4. To process the addition you would execute the command: As mentioned earlier, there are four sets of R registers, register bank 0, 1, 2, and 3. When the 8052 is first powered up, register bank 0 (addresses 00h through 07h) is used by default. In this case, for example, R4 is the same as Internal RAM address 04h. However, your program may instruct the 8052 to use one of the alternate register banks; i.e., register banks 1, 2, or 3. In this case, R4 will no longer be the same as Internal RAM address 04h. For example, if your program instructs the 8052 to use register bank 1, register R4 will now be synonymous with Internal RAM address 0Ch. If you select register bank 2, R4 is synonymous with 14h, and if you select register bank 3 it is synonymous with address 1Ch. The concept of register banks adds a great level of flexibility to the 8052, especially when dealing with interrupts (we'll talk about interrupts later). However, always remember that the register banks really reside in the first 32 bytes of Internal RAM. 3.3.9. THE "B" Register The "B" register is very similar to the Accumulator in the sense that it may hold an 8-bit (1-byte) value. The "B" register is only used implicitly by two 8052 instructions: MUL AB and DIV AB. Thus, if you want to quickly and easily multiply or divide A by another number, you may store the other number in "B" and make use of 25

these two instructions. Aside from the MUL and DIV an instruction, the B register is often used as yet another temporary storage register much like a ninth "R" register. 3.3.10. The Program Counter (PC) The Program Counter (PC) is a 2-byte address that tells the 8052 where the next instruction to execute is found in memory. When the 8052 is initialized PC always starts at 0000h and is incremented each time an instruction is executed. It is important to note that PC isnt always incremented by one. Since some instructions are 2 or 3 bytes in length the PC will be incremented by 2 or 3 in these cases. The Program Counter is special in that there is no way to directly modify its value. That is to say, you cant do something like PC=2430h. On the other hand, if you execute LJMP 2430h youve effectively accomplished the same thing. It is also interesting to note that while you may change the value of PC (by executing a jump instruction, etc.) there is no way to read the value of PC. That is to say, there is no way to ask the 8052 "What address are you about to execute?" As it turns out, this is not completely true: There is one trick that may be used to determine the current value of PC. 3.3.11. The Data Pointer (DPTR) The Data Pointer (DPTR) is the 8052s only user-accessible 16-bit (2-byte) register. The Accumulator, "R" registers, and "B" register are all 1-byte values. The PC just described is a 16-bit value but isnt directly user-accessible as a working register. DPTR, as the name suggests, is used to point to data. It is used by a number of commands that allow the 8052 to access external memory. When the 8052 accesses external memory it accesses the memory at the address indicated by DPTR. While DPTR is most often used to point to data in external memory or code memory, many developers take advantage of the fact that its the only true 16-bit register available. It is often used to store 2-byte values that have nothing to do with memory locations. 3.3.12. The Stack Pointer (SP) The Stack Pointer, like all registers except DPTR and PC, may hold an 8-bit (1-byte) value. The Stack Pointer is used to indicate where the next value to be removed from the stack should be taken from. When you push a value onto the stack, 26

the 8052 first increments the value of SP and then stores the value at the resulting memory location. When you pop a value off the stack, the 8052 returns the value from the memory location indicated by SP, and then decrements the value of SP. This order of operation is important. When the 8052 is initialized SP will be initialized to 07h. If you immediately push a value onto the stack, the value will be stored in Internal RAM address 08h. This makes sense taking into account what was mentioned two paragraphs above: First the 8051 will increment the value of SP (from 07h to 08h) and then will store the pushed value at that memory address (08h). SP is modified directly by the 8052 by six instructions: PUSH, POP, ACALL, LCALL, RET, and RETI. It is also used intrinsically whenever an interrupt is triggered (more on interrupts later. Dont worry about them for now!). 3.3.13. Input / Output Ports The 8031s I/O port structure is extremely versatile and flexible. The device has 32 I/O pins configured as four eight bit parallel ports (P0, P1, P2 and P3). Each pin can be used as an input or as an output under the software control. These I/O pins can be accessed directly by memory instructions during program execution to get required flexibility. These port lines can be operated in different modes and all the pins can be made to do many different tasks apart from their regular I/O function executions. Instructions, which access external memory, use port P0 as a multiplexed address/data bus. At the beginning of an external memory cycle, low order 8 bits of the address bus are output on P0. The same pins transfer data byte at the later stage of the instruction execution. Also, any instruction that accesses external Program Memory will output the higher order byte on P2 during read cycle. Remaining ports, P1 and P3 are available for standard I/O functions. But all the 8 lines of P3 support special functions: Two external interrupt lines, two counter inputs, serial ports two data lines and two timing control strobe lines are designed to use P3 port lines. When you dont use these special functions, you can use corresponding port lines as a standard I/O. Even within a single port, I/O operations may be combined in many ways. Different pins can be configured as input or outputs independent of each other or the same pin can be used as an input or as output at different times. You can comfortably combine I/O operations and special operations for Port 3 lines. 27

3.3.14. Timers / Counters 8031 has two 16 bit Timers/Counters capable of working in different modes. Each consists of a High byte and a Low byte which can be accessed under software. There is a mode control register and a control register to configure these timers/counters in number of ways. These timers can be used to measure time intervals, determine pulse widths or initiate events with one microsecond resolution up to a maximum of 65 millisecond (corresponding to 65, 536 counts). Use software to get longer delays. Working as counter, they can accumulate occurrences of external events (from DC to 500 KHz) with 16 bit precision.

Fig:3.13 : Block Diagram of Timers/Counters 3.3.15. Interrupts The 8031 has five interrupt sources: one from the serial port when a transmission or reception operation is executed; two from the timers when overflow occurs and two come from the two input pins INT0, INT1. Each interrupt may be independently enabled or disabled to allow polling on same sources and each may be classified as high or low priority. A high priority source can override a low priority service routine. These options are selected by interrupt enable and priority control registers, IE and IP. 28

When an interrupt is activated, then the program flow completes the execution of the current instruction and jumps to a particular program location where it finds the interrupt service routine. After finishing the interrupt service routine, the program flows return to back to the original place. The Program Memory address, 0003H is allotted to the first interrupt and next seven bytes can be used to do any task associated with that interrupt. Interrupt Source Service routine starting address External 0 0003H Timer/Counter 0 000BH External 1 0013H Timer/counter 1 001BH Serial port 0023H

3.3.16. Serial Port Each 8031 microcomputer contains a high speed full duplex (means you can simultaneously use the same port for both transmitting and receiving purposes) serial port which is software configurable in 4 basic modes: 8 bit UART; 9 bit UART; Interprocessor Communications link or as shift register I/O expander. For the standard serial communication facility, 8031 can be programmed for UART operations and can be connected with regular personal computers, teletype writers, modem at data rates between 122 bauds and 31 kilo bauds. Getting this facility is made very simple using simple routines with option to select even or odd parity. You can also establish a kind of Interprocessor communication facility among many microcomputers in a distributed environment with automatic recognition of address/data. Apart from all above, you can also get super fast I/O lines using low cost simple TTL or CMOS shift registers. 3.3.17. Applications Security applications Image processing applications 29

Banking applications


Serial communication is basically the transmission or reception of data one bit at a time. Today's computers generally address data in bytes or some multiple thereof. A byte contains 8 bits. A bit is basically either a logical 1 or zero. Every character on this page is actually expressed internally as one byte. The serial port is used to convert each byte to a stream of ones and zeroes as well as to convert a stream of ones and zeroes to bytes. The serial port contains a electronic chip called a Universal Asynchronous Receiver/Transmitter (UART) that actually does the conversion. The serial port has many pins. We will discuss the transmit and receive pin first. Electrically speaking, whenever the serial port sends a logical one (1) a negative voltage is effected on the transmit pin. Whenever the serial port sends a logical zero (0) a positive voltage is affected. When no data is being sent, the serial port's transmit pin's voltage is negative (1) and is said to be in a MARK state. Note that the serial port can also be forced to keep the transmit pin at a positive voltage (0) and is said to be the SPACE or BREAK state. (The terms MARK and SPACE are also used to simply denote a negative voltage (1) or a positive voltage (0) at the transmit pin respectively). When transmitting a byte, the UART (serial port) first sends a START BIT which is a positive voltage (0), followed by the data (general 8 bits, but could be 5, 6, 7, or 8 bits) followed by one or two STOP Bits which is a negative(1) voltage. The sequence is repeated for each byte sent. Figure 1 shows a diagram of what a byte transmission would look like. At this point you may want to know what the duration of a bit is. In other words, how long does the signal stay in a particular state to define a bit. The answer is simple. It is dependent on the baud rate. The baud rate is the number of times the signal can switch states in one second. Therefore, if the line is operating at 9600 baud, the line can switch states 9,600 times per second.this means each bit has the small duration of the 1/9600 of a second or about or it is also said to be 100sec. When transmitting a character there are other characteristics other than the baud rate that must be known or that must be setup. These characteristics define the 30

entire interpretation of the data stream.

The first characteristic is the length of the

byte that will be transmitted. This length in general can be anywhere from 5 to 8 bits. The second characteristic is parity. The parity characteristic can be even, odd, mark, space, or none. If even parity, then the last data bit transmitted will be a logical 1 if the data transmitted had an even amount of 0 bits. If odd parity, then the last data bit transmitted will be a logical 1 if the data transmitted had an odd amount of 0 bits. If MARK parity, then the last transmitted data bit will always be a logical 1. If SPACE parity, then the last transmitted data bit will always be a logical 0. If no parity then there is no parity bit transmitted. The third characteristic is the amount of stop bits. This value in general is 1 or 2. Assume we want to send the letter 'A' over the serial port. The binary representation of the letter 'A' is 01000001. Remembering that bits are transmitted from least significant bit (LSB) to most significant bit (MSB), the bit stream transmitted would be as follows for the line characteristics 8 bits, no parity, 1 stop bit and 9600 baud. LSB (0 1 0 0 0 0 0 1 0 1) MSB The above represents (Start Bit) (Data Bits) (Stop Bit). To calculate the actual byte transfer rate simply divide the baud rate by the number of bits that must be transferred for each byte of data. In the case of the above example, each character requires 10 bits to be transmitted for each character. As such, at 9600 baud, up to 960 bytes can be transferred in one second. The above discussion was concerned with the "electrical/logical" characteristics of the data stream. We will expand the discussion to line protocol. Serial communication can be half duplex or full duplex. Full duplex communication means that a device can receive and transmit data at the same time. Half duplex means that the device cannot send and receive at the same time. It can do them both, but not at the same time. Half duplex communication is all but outdated except for a very small focused set of applications. Half duplex serial communication needs at a minimum two wires, signal ground and the data line. Full duplex serial communication needs at a minimum three wires, signal ground, transmit data line, and receive data line. The RS232 specification governs the physical and electrical characteristics of serial communications. This specification defines several additional signals that are 31

asserted (set to logical 1) for information and control beyond the data signal These signals are the Carrier Detect Signal (CD), asserted by modems to signal a successful connection to another modem, Ring Indicator (RI), asserted by modems to signal the phone ringing, Data Set Ready (DSR), asserted by modems to show their presence, Clear To Send (CTS), asserted by modems if they can receive data, Data Terminal Ready (DTR), asserted by terminals to show their presence, Request To Send (RTS), asserted by terminals if they can receive data. The section RS232 Cabling describes these signals and how they are connected. The above paragraph alluded to hardware flow control. Hardware flow control is a method that two connected devices use to tell each other electronically when to send or when not to send data. A modem in general drops (logical 0) its CTS line when it can no longer receive characters. It re-asserts it when it can receive again. A terminal does the same thing instead with the RTS signal. Another method of hardware flow control in practice is to perform the same procedure in the previous paragraph except that the DSR and DTR signals. Note that hardware flow control requires the use of additional wires. The benefit to this however is crisp and reliable flow control. Another method of flow control used is known as software flow control. This method requires a simple 3 wire serial communication link, transmit data, receive data, and signal ground. If using this method, when a device can no longer receive, it will transmit a character that the two devices agreed on. This character is known as the XOFF character. This character is generally a hexadecimal 13. When a device can receive again it transmits an XON character that both devices agreed to. This character is generally a hexadecimal 11. 3.4.1. Null Modem Serial communications with RS232. One of the oldest and most widely spread communication methods in computer world. The way this type of communication can be performed is pretty well defined in standards. I.e. with one exception. The standards show the use of DTE/DCE communication, the way a computer should communicate with a peripheral device like a modem. For your information, DTE means Data Terminal Equipment (computers etc.) where DCE is the abbreviation of Data Communication Equipment (modems). One of the main uses of serial communication today where no modem is involveda serial null modem configuration with DTE/DTE communicationis not so 32

well defined, especially when it comes to flow control. The terminology null modem for the situation where two computers communicate directly is so often used nowadays, that most people don't realize anymore the origin of the phrase and that a null modem connection is an exception, not the rule. In history, practical solutions were developed to let two computers talk with each other using a null modem serial communication line. In most situations, the original modem signal lines are reused to perform some sort of handshaking. Handshaking can increase the maximum allowed communication speed because it gives the computers the ability to control the flow of information. A high amount of incoming data is allowed if the computer is capable to handle it, but not if it is busy performing other tasks. If no flow control is implemented in the null modem connection, communication is only possible at speeds at which it is sure the receiving side can handle the amount information even under worst case conditions. 3.4.2. RS232 When we look at the connector pin out of the RS232 port, we see two pins which are certainly used for flow control. These two pins are RTS, request to send and CTS, clear to send. With DTE/DCE communication (i.e. a computer communicating with a modem device) RTS is an output on the DTE and input on the DCE. CTS are the answering signal coming from the DCE. Before sending a character, the DTE asks permission by setting its RTS output. No information will be sent until the DCE grants permission by using the CTS line. If the DCE cannot handle new requests, the CTS signal will go low. A simple but useful mechanism allowing flow control in one direction. The assumption is that the DTE can always handle incoming information faster than the DCE can send it. In the past, this was true. Modem speeds of 300 baud were common and 1200 baud was seen as a high speed connection. For further control of the information flow, both devices have the ability to signal their status to the other side. For this purpose, the DTR data terminal ready and DSR data set ready signals are present. The DTE uses the DTR signal to signal that it is ready to accept information, whereas the DCE uses the DSR signal for the same purpose. Using these signals involves not a small protocol of requesting and answering as with the RTS/CTS handshaking. These signals are in one direction only. 33

The last flow control signal present in DTE/DCE communication is the CD carrier detect. It is not used directly for flow control, but mainly an indication of the ability of the modem device to communicate with its counter part. This signal indicates the existence of a communication link between two modem devices. Null Modem without Handshaking How to use the handshaking lines in a null modem configuration? The simplest way is to don't use them at all. In that situation, only the data lines and signal ground are cross connected in the null modem communication cable. All other pins have no connection. An example of such a null modem cable without handshaking can be seen in the figure below.

Fig:3.14 : Simple Null Modem without Handshaking Table:3.1 : Output for the Null Modem Connector 1 2 3 5 3 2 5 Connector 2 TX Rx Signal ground Function

x X Compatibility Issues If you read about null modems, this three wire null modem cable is often talked about. Yes, it is simple but can we use it in all circumstances? There is a 34

problem, if either of the two devices checks the DSR or CD inputs. These signals normally define the ability of the other side to communicate. As they are not connected, their signal level will never go high. This might cause a problem. The same holds for the RTS/CTS handshaking sequence. If the software on both sides is well structured, the RTS output is set high and then a waiting cycle is started until a ready signal is received on the CTS line. This causes the software to hang because no physical connection is present to either CTS line to make this possible. The only type of communication which is allowed on such a null modem line is data-only traffic on the cross connected Rx/TX lines. This does however not mean that this null modem cable is useless. Communication links like present in the Norton Commander program can use this null modem cable. This null modem cable can also be used when communicating with devices which do not have modem control signals like electronic measuring equipment etc. As you can imagine, with this simple null modem cable no hardware flow control can be implemented. The only way to perform flow control is with software flow control using the XOFF and XON characters.


GSM Modem RS232 cable Voice chip Microcontroller Web camera

3.5.1. GSM Modem Definition Global system for mobile communication (GSM) is a globally accepted standard for digital cellular communication. GSM is the name of a standardization group established in 1982 to create a common European mobile telephone standard that would formulate specifications for a pan-European mobile cellular radio system operating at 900 MHz. 35








specifications define the functions and interface requirements in detail but do not address the hardware. The reason for this is to limit the designers as little as possible but still to make it possible for the operators to buy equipment from different suppliers. The GSM network is divided into three major systems: the switching system (SS), the base station system (BSS), and the operation and support system (OSS). The basic GSM network elements are shown in below figure.

Fig:3.15 : GSM Network Elements A GSM modem is a wireless modem that works with a GSM wireless network. A wireless modem behaves like a dial-up modem. The main difference between them is that a dial-up modem sends and receives data through a fixed telephone line while a wireless modem sends and receives data through radio waves. A GSM modem can be an external device or a PC Card / PCMCIA Card. Typically, an external GSM modem is connected to a computer through a serial cable or a USB cable. A GSM modem in the form of a PC Card / PCMCIA Card is designed for use with a laptop computer. It should be inserted into one of the PC Card / PCMCIA Card slots of a laptop computer. Like a GSM mobile phone, a GSM modem requires a SIM card from a wireless carrier in order to operate. As mentioned in earlier sections of this SMS tutorial, computers use AT commands to control modems. Both GSM modems and dial-up modems support a


common set of standard AT commands. You can use a GSM modem just like a dialup modem. In addition to the standard AT commands, GSM modems support an extended set of AT commands. These extended AT commands are defined in the GSM standards. With the extended AT commands, you can do things like: Reading, writing and deleting SMS messages. Sending SMS messages. Monitoring the signal strength. Monitoring the charging status and charge level of the battery. Reading, writing and searching phone book entries. The number of SMS messages that can be processed by a GSM modem per minute is very low -- only about six to ten SMS messages per minute. Facts And Applications Of GSM/GPRS Modem The GSM/GPRS Modem comes with a serial interface through which the modem can be controlled using AT command interface. An antenna and a power adapter are provided. The basic segregation of working of the modem is as under Voice calls SMS GSM Data calls GPRS Voice Calls Voice calls are not an application area to be targeted. In future if interfaces like a microphone and speaker are provided for some applications then this can be considered. SMS SMS is an area where the modem can be used to provide features like: Pre-stored SMS transmission.These SMS can be transmitted on certain trigger events in an automation system 37

SMS can also be used in areas where small text information has to be sent. The transmitter can be an automation system or machines like vending machines, collection machines or applications like positioning systems where The navigator keeps on sending SMS at particular time intervals. SMS can be a solution where GSM data call or GPRS services are not available. Access Control Device Now access control devices can communicate with servers and security staff through SMS messaging. Complete log of transaction is available at the headoffice Server instantly without any wiring involved and device can instantly alert security personnel on their mobile phone in case of any problem. RaviRaj Technologies is introducing this technology in all Fingerprint Access control and time attendance products. Supply Chain Management Today SCM require huge IT infrastructure with leased lines, networking devices, data centre, workstations and still you have large downtimes and high costs. You can do all this at a fraction of the cost with GSM M2M technology. A central server in your head office with GSM capability is the answer; you can receive instant transaction data from all your branch officers, warehouses and business associates with nil downtime, Low cost Short Data Size You data size per transaction should be small like 1-3 lines. e.g. banking transaction data, sales/purchase data, consignment tracking data, updates. These small but important transaction data can be sent through SMS messaging which cost even less then a local telephone call or sometimes free of cost worldwide. Hence with negligible cost you are able to send critical information to your head office located anywhere in the world from multiple points. You can also transfer faxes, large data through GSM but this will be as or more costly compared to landline networks. Multiple remote data collection points If you have multiple data collections points situated all over your city, state, country or worldwide you will benefit the most. The data can be sent from multiple 38

points like your branch offices, business associates, warehouses, and agents with devices like GSM modems connected to PCs, GSM electronic terminals and Mobile phones. Many a times some places like warehouses may be situated at remote location may not have landline or internet but you will have GSM network still available easily. Large transaction volumes GSM SMS messaging can handle large number of transaction in a very short time. You can receive large number SMS messages on your server like e-mails without internet connectivity. E-mails normally get delayed a lot but SMS messages are almost instantaneous for instant transactions. Consider situation like shop owners doing credit card transaction with GSM technology instead of conventional landlines. time you find local transaction servers busy as these servers use multiple telephone lines to take care of multiple transactions, whereas one GSM connection is enough to handle hundreds of transaction. Mobility, Quick installation GSM technology allows mobility, GSM terminals, modems can be just picked and installed at other location unlike telephone lines. Also you can be mobile with GSM terminals and can also communicate with server using your mobile phone. You can just purchase the GSM hardware like modems, terminals and mobile handsets, insert SIM cards, configure software and your are ready for GSM communication. Transaction terminals EDC machines, POS terminals can use SMS messaging to confirm transactions from central servers. The main benefit is that central server can be anywhere in the world. Today you need local servers in every city with multiple telephone lines. You save huge infrastructure costs as well as per transaction cost.


3.5.2. RS 232 When we look at the connector pin out of the RS232 port, we see two pins which are certainly used for flow control. These two pins are RTS, request to send and CTS, clear to send. With DTE/DCE communication (i.e. a computer communicating with a modem device) RTS is an output on the DTE and input on the DCE. CTS are the answering signal coming from the DCE. Before sending a character, the DTE asks permission by setting its RTS output. No information will be sent until the DCE grants permission by using the CTS line. If the DCE cannot handle new requests, the CTS signal will go low. A simple but useful mechanism allowing flow control in one direction. The assumption is that the DTE can always handle incoming information faster than the DCE can send it. In the past, this was true. Modem speeds of 300 baud were common and 1200 baud was seen as a high speed connection. For further control of the information flow, both devices have the ability to signal their status to the other side. For this purpose, the DTR data terminal ready and DSR data set ready signals are present. The DTE uses the DTR signal to signal that it is ready to accept information, whereas the DCE uses the DSR signal for the same purpose. Using these signals involves not a small protocol of requesting and answering as with the RTS/CTS handshaking. These signals are in one direction only. The last flow control signal present in DTE/DCE communication is the CD carrier detect. It is not used directly for flow control, but mainly an indication of the ability of the modem device to communicate with its counter part. This signal indicates the existence of a communication link between two modem devices. 3.5.3. MAX 232 MAX-232 is primary used for people building electronics with an RS-232 interface. Serial RS-232 communication works with voltages (-15V ... -3V for high) and +3V ... +15V for low) which are not compatible with normal computer logic voltages. To receive serial data from an RS-232 interface the voltage has to be reduced, and the low and high voltage level inverted. In the other direction (sending data from some logic over RS-232) the low logic voltage has to be "bumped up", and a negative voltage has to be generated, too. 40

Fig:3.16 : Pin Diagram Of Max 232 3.5.4. RS232 Communication In telecommunications, RS-232 is a standard for serial binary data interconnection between a DTE (Data terminal equipment) and a DCE (Data Circuitterminating Equipment). It is commonly used in computer serial ports.

Fig:3.17 : Circuit Diagram Of Serial Communication

41 Scope of the Standard The Electronic Industries Alliance (EIA) standard RS-232-C [3] as of 1969 defines: Electrical signal characteristics such as voltage levels, signaling rate, timing and slew-rate of signals, voltage withstand level, short-circuit behavior, maximum stray capacitance and cable length Interface mechanical characteristics, pluggable connectors and pin identification Functions of each circuit in the interface connector Standard subsets of interface circuits for selected telecom applications The standard does not define such elements as character encoding (for example, ASCII, Baudot or EBCDIC), or the framing of characters in the data stream (bits per character, start/stop bits, parity). The standard does not define protocols for error detection or algorithms for data compression. The standard does not define bit rates for transmission, although the standard says it is intended for bit rates lower than 20,000 bits per second. Many modern devices can exceed this speed (38,400 and 57,600 bit/s being common, and 115,200 and 230,400 bit/s making occasional appearances) while still using RS-232 compatible signal levels. Details of character format and transmission bit rate are controlled by the serial port hardware, often a single integrated circuit called a UART that converts data from parallel to serial form. A typical serial port includes specialized driver and receiver integrated circuits to convert between internal logic levels and RS-232 compatible signal levels. Circuit Working Description In this circuit the MAX 232 IC used as level logic converter. The MAX232 is a dual driver/receiver that includes a capacive voltage generator to supply EIA 232 voltage levels from a single 5v supply. Each receiver converts EIA-232 to 5v TTL/CMOS levels. Each driver converts TLL/CMOS input levels into EIA-232 levels.


Fig:3.18 : Logic Diagram In this circuit the microcontroller transmitter pin is connected in the MAX232 T2IN pin which converts input 5v TTL/CMOS level to RS232 level. Then T2OUT pin is connected to reviver pin of 9 pin D type serial connector which is directly connected to PC. In PC the transmitting data is given to R2IN of MAX232 through transmitting pin of 9 pin D type connector which converts the RS232 level to 5v TTL/CMOS level. The R2OUT pin is connected to receiver pin of the microcontroller. Likewise the data is transmitted and received between the microcontroller and PC or other device vice versa.



4.1. KEIL C Keil software is the leading vendor for 8/16-bit development tools (ranked at first position in the 2004 embedded market study of the embedded system and EE times magazine). Keil software is represented world wide in more than 40 countries, since the market introduction in 1988; the keil C51 compiler is the de facto industry standard and supports more than 500 current 8051 device variants. Now, keil software offers development tools for ARM. Keil software makes C compilers, macro assemblers, real-time kernels, debuggers, simulators, integrated environments, and evaluation boards for 8051, 251, ARM and XC16x/C16x/ST10 microcontroller families. The Keil C51 C Compiler for the 8051 microcontroller is the most popular 8051 C compiler in the world. It provides more features than any other 8051 C compiler available today. The C51 Compiler allows you to write 8051 microcontroller applications in C that, once compiled, have the efficiency and speed of assembly language. Language extensions in the C51 Compiler give you full access to all resources of the 8051. The C51 Compiler translates C source files into relocatable object modules which contain full symbolic information for debugging with the Vision Debugger or an in-circuit emulator. In addition to the object file, the compiler generates a listing file which may optionally include symbol table and cross reference Nine basic data types, including 32-bit IEEE floating-point, Flexible variable allocation with bit, data, bdata, idata, xdata, and Interrupt functions may be written in C, Full use of the 8051 register banks, Complete symbol and type information for source-level debugging, Use of AJMP and ACALL instructions, Bit-addressable data objects, Built-in interface for the RTX51 real time kernels, 44 pdata memory types,


Support for the Philips 8xC750, 8xC751, and 8xC752 limited instruction Support for the Infineon 80C517 arithmetic unit.

4.1.1. Flash Magic Flash magic can control the entry into ISP mode of some microcontroller devices by using the COM port handshaking signals to control the device. Typically the handshaking signals are used to control such pins as Reset, PSEN and VCC. The exact pins used depend on the specific device. When this feature is supported, Flash Magic will automatically place the device into ISP mode at the beginning of an ISP operation. Flash Magic will then automatically cause the device to execute code at the end of the ISP operation. 4.1.2. Orcad ORCAD really consists of tools. Capture is used for design entry in schematic form. You will probably be already familiar with looking at circuits in this form from working with other tools in your university courses. Layout is a tool for designing the physical layout of components and circuits on a PCB. During the design process, you will move back and forth between these two tools. The design flow diagram is given below:

45 Design Flow Of Orcad

Fig:4.1 : ORCAD Flowchart


4.1.3. Algorithm for Keil Initialize the input/output ports Wait for the signal which is coming from card If it is a valid signal, then the finger-vein is scanned Matching is done One time password is generated and sent through SMS Proceed with further transaction

4.1.4. STEP 1: Copy the program in Keil software

Fig:4.2 : Keil software with the program


4.1.5. STEP 2: Adjust the values of Timers according to the requirement

Fig:4.3 : Values of Timers and Registers are changed 4.1.6. STEP 3: Run the program

Fig:4.4 : Ports 0 and 1 are assigned value 1 and Port 2 is assigned value 0 48

4.1.7. STEP 3: The values are changing according to the voice

Fig:4.5 : Values are changing according to voice 4.2. MATLAB MATLAB (matrix laboratory) is a numerical computing environment and fourth-generation programming language. Developed by MathWorks, MATLAB allows matrix manipulations, plotting of functions and data, implementation of algorithms, creation of user interfaces, and interfacing with programs written in other languages, including C, C++, Java and Fortran. Although MATLAB is intended for numerical computing, an optical toolbox uses the MuPAD symbolic engine, allowing access to symbolic computing capabilities. An additional package Simulink, adds graphical multi-domain simulation and Model-Based Design for dynamic and embedded systems. MATLAB was adopted by researchers and practitioners in control engineering. Littles specialty, but quickly spread to many other domains. It is now also used in education, in particular the teaching of linear algebra and numerical analysis and is popular amongst scientists involved in image processing. In 2004, MATLAB had around one million users across academia and industry.


4.2.1. Algorithm for Matlab Create the gui format which include the tabs like browse, resize, histogram equalisation ,feature, data base and matching for image processing. Read the input image from the data base using browse button. The input image is resized to 1/3 followed by 1/4 of its original size . It is again converted back to normal. Histogram equalisation and extracting the features of an image. Comparing the input image and the images in data base. feature = feature1 - feature2; Result is displayed. 4.2.2. STEP 1: Create a GUI format

Fig:4.6 : The GUI format for the simulation


4.2.3. STEP 2: Browse for the finger-vein sample for simulation

Fig:4.7 : Browsing for a finger-vein sample for matching 4.2.4. STEP 2: Simulated output for the Matlab


Fig:4.8 : Output for matching finger-vein sample 4.3. VISUAL BASIC Visual Basic is a third-generation event-driven programming language and integrated development environment (IDE) from Microsoft for its COM programming model first released in 1991. It is designed to be relatively easy to learn and use. Visual Basic was derived from BASIC and enables the rapid application development (RAD) of graphical user interface (GUI) applications, access to databases using Data Access Objects, Remote Data Objects, or ActiveX Data Objects, and creation of ActiveX controls and objects. The scripting language VBScript is a subset of Visual Basic.A programmer can create an application using the components provided by the Visual Basic program itself. Programs written in Visual Basic can also use the Windows API, but doing so requires external function declarations. Though the program has received criticism for its perceived faults, version 3 of Visual Basic was a runaway commercial success, and many companies offered third party controls greatly extending its functionality. The final release was version 6 in 1998. Microsoft's extended support ended in March 2008 and the designated successor was Visual Basic .NET (now known simply as Visual Basic). 4.3.1. Transaction Window


Fig:4.9 : Procedure for money transfer 4.3.2. Flow Chart

Fig:4.10 : Flow chart 53


The proposed system consists of three hardware modules: image acquisition module, DSP main board, and human machine communication module. The image acquisition module is used to collect finger-vein images. The DSP mainboard including the DSP chip, memory (flash), and communication port is used to execute the finger-vein recognition algorithm and communicate with the peripheral device. The human machine communication module (LED or keyboard) is used to display recognition results and receive inputs from users. We use haar transform for the finger vein recognition. Haar transform is also called as discrete wavelet transform. This transform is used for splitting the frequencies where the low frequency signals, which posses the clear information about the image is extracted using low pass filter and the high frequency signals which contain the noise is extracted using high pass filter. Now we calculate the mean value (i.e features of an input image) of the information obtained from low pass filter and compare that with the various images in the data base. We get few values from which we obtain the minimum value. This minimum value should be equal to zero , which means that the vein is authorised, else it is declared that the vein is un authorised. There are four sub bands namely low low(LL), low high(LH), high low(HL) and high high(HH) bands. The result will be displayed only in the low low band.

This paper presents a novel architecture that can be used as a means of interaction between mobile phone, ATM machine and a Banking application for the purpose of withdrawing cash. The proposed design; the secure M-cash withdrawal allows the use of mobile phones as a tool of interaction and provide flexibility through a robust identity management architecture. The first part of the architecture is the process of being implemented and all the process involved has been analyzed and justified where possible. The Secure Mcash has examined the possibility of making use of similar approaches/techniques (RFID and NFC) for other applications and already there are some applications that have adapted this strategy. The Secure M-Cash Withdrawal architecture has been defined, it will form as a foundation for future work within this area, which includes implementing a PC 54

based simulation of the architecture and implementing the system. Although the intention recognition is not completed and cannot satisfy the specification described in section 2, the other image-recognition techniques can in the scope of the experimental data. Accordingly, to provide all the functions of the AI-ATM, the authors are now concentrating on developing the intention recognition.

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