Boolean Algebra

2.
2.1 INTRODUCTION
BOOLEAN ALGEBRA
In the previous chapter, we introduced binary numbers and binary arithmetic. As you saw in binary arithmetic and in the handling of floating-point numbers, there is a need for accurate specification of procedures and schemes for manipulating and interpreting binary numbers! This chapter will begin to address how binary numbers are manipulated in a systematic manner by a computer. The principles of such manipulation are called Boolean Algebra, which is the foundation of digital logic circuit design and analysis. This algebra is conceived to handle variables, known as statements, each of which can take on one of two values, and on which operations are performed according to prescribed rules. For example, let us model our thinking processes in the adding of two binary digits. A brief examination of this simple problem leads us to consider all possible cases, since there are not too many of them. The two binary (input) digits will be called A0 and B0. The result (output) of the addition is represented by a sum-bit and a carry-bit, which we shall call S0 and C1, respectively. There are four possibilities of combinations of the two binary inputs. For each of these possibilities, we will specify the outputs: Inputs Outputs A0 B0 C1 S0 0 0 0 0 0 1 0 1 1 0 0 1 1 1 1 0 This table represents all that one needs to know about the specific task of adding exactly two (not more!) single-digit binary numbers. We can now examine and attempt to describe the functional (see a later chapter for a formal definition of a
COEN 231 Class Notes J.C.Gigure & L.M.Landsberger p 2.1 Boolean Algebra Autumn 2001-2002
function), relationship between the inputs and outputs. A little thought will lead to the following conclusions: C1 is 1 only if both A0 and B0 are 1, otherwise it is 0 S0 is 1 only if either A0 or B0 are 1, but not both In this chapter, we will introduce algebraic operators, such as and, or, not and exclusive-or, which allow us to systematically build such sets of functional specifications. For the simple case of two single-digit binary numbers, this may not seem necessary, but becomes very useful even for slightly more complex situations. The example below (called the fulladder, briefly explained in the previous chapter), brings only one more variable, the carry digit from the next-less-significant binary addition operation, so that now we are adding exactly three single-digit binary numbers, represented by Ai, Bi , and Ci. Now we need to consider 8 possible cases of input, because 23 = 8. We still need only 2 output bits, because the sum of three single-digit binary numbers can be no more than 3, which is represented by Ci+1=1 and Si=1. How shall we organize the eight cases? The simplest and most convenient way is to count from 0 to 7, arranging the input digits to represent the casenumber, as shown in the table below: Inputs Outputs Case # Ai Bi Ci Ci+1 Si 0 0 0 0 0 0 1 0 0 1 0 1 2 0 1 0 0 1 3 0 1 1 1 0 4 1 0 0 0 1 5 1 0 1 1 0 6 1 1 0 1 0 7 1 1 1 1 1 In this full-adder example, the specification of the output is much more laborious and complicated than in the previous two-digit example:
COEN 231 Class Notes J.C.Gigure & L.M.Landsberger
p 2.2
Boolean Algebra Autumn 2001-2002
Si := 1 if or or or
[(Ai is 0) and (Bi is 0) and (Ci is 1)] [(Ai is 0) and (Bi is 1) and (Ci is 0)] [(Ai is 1) and (Bi is 0) and (Ci is 0)] [(Ai is 1) and (Bi is 1) and (Ci is 1)]
Note the two levels of brackets
Ci+1 := 1 if or or or
[(Ai is 0) and (Bi is 1) and (Ci is 1)] [(Ai is 1) and (Bi is 0) and (Ci is 1)] [(Ai is 1) and (Bi is 1) and (Ci is 0)] [(Ai is 1) and (Bi is 1) and (Ci is 1)]
Of course, one can also look for logical patterns in such a set of specifications, such as: Ci+1 := 1 if [(Ai is 0) and (Bi is 1) and (Ci is 1)] or [(Ai is 1) and [(Bi is 1) or (Ci is 1)]] Note the three levels of brackets. There are several possible representations of each of Si and Ci+1. Efficient representation, simplification and manipulation of logical expressions such as these is the main subject of this chapter on Boolean Algebra. 2.2 NOTATION, SYMBOLS AND OPERATIONS PRIMITIVE STATEMENT: Typically, capital letters (such as A,B,C) denote statements (also called variables). In a logic circuit, a statement could mean that a voltage at a designated point is above a certain threshold level. We assign to A, the value of 1 when A is true, namely when the voltage is above the threshold level, and the value of 0 when A is false, namely when the voltage is below the threshold level. Symbolically, we write A = 1 or A = 0. Some texts use the symbols T and F instead of 1 and 0.
p 2.3
There are three basic operations known as NOT, AND and OR. As well, there is an additional commonly-used operation known as the exclusive-OR (also called the half-adder), which can be expressed in terms of the three basic operations. We will define these operations, introduce the notation used in Boolean algebra and give the graphical symbols used in logic circuits. NOT: (for example NOT A; written as A orA) This operation on A simply inverts the assignments of 1 and 0. AND: (for example A AND B; written as AB): This operation compares the values of A and B and assigns 1 as a result if both A and B are true or 0 if A or B or both A and B are false. OR: (for example A OR B; written as A+B, meaning A or B or both): This operation compares the values of A and B and assigns 1 as a result if A is true or B is true or both are true, and assigns 0 if both A and B are false. These definitions are summarized below in a special kind of table known as a Truth Table. Each line (row) of a truth table specifies the output truth value for a particular combination of truth values of the input Boolean statements (variables).
A 0 1 A' 1 0 A 0 0 1 1 B 0 1 0 1 AB A+B 0 0 0 1 0 1 1 1
Note the similarities to familiar arithmetic operations. It is also crucial to note the difference: 1+1 = 1 and not 10, (or 0 if one drops the leading 1 as one would in modulo 2 (binary arithmetic). There are related differences in the associated algebra: A + A = A; 1 + A = 1; AA = A.
p 2.4
A commonly-used derived operation, Exclusive OR, is defined as follows. EXCLUSIVE OR, or XOR, also known as the Half-adder: (for example A EXCLUSIVE-OR B; written as AB, meaning A or B but not both). This operation compares the values of A and B and assigns 1 as a result if A or B (but not both), is true and assigns 0 if both A and B are true or both A and B are false. The truth table equivalent of the definition is: A 0 0 1 1 B 0 1 0 1 AB 0 1 1 0
We call this a derived operation because, as is demonstrated in the truth table below, it can be written as a combination of basic operations, namely, AB = AB + AB. A 0 0 1 1 B 0 1 0 1 A 1 1 0 0 B 1 0 1 0 AB 0 1 0 0 AB 0 0 1 0 AB+AB 0 1 1 0
COMPOUND STATEMENT: A compound statement is one that can be written as a combination of primitive statements. The XOR operation is an example of a compound statement.
p 2.5
LOGIC GATE SYMBOLS: These are symbols for integrated circuits, known as gates, which carry out the electrical equivalents of Boolean operations. Inputs and outputs consist of voltages. When voltages are above or below a preset threshold level, then these are equivalent to the Boolean values of 1 or 0. DERIVED BASIC OPERATIONS OPERATION NOT AND OR XOR
A A' A B AB A B A+B A B
A
A'B + AB'
Also known as an inverter
NAND
A B (AB)'
B'
AB
AB
A' AB B
made from an AND gate and an inverter
XOR circuit made up of NOT, AND and OR gates
p 2.6
One way of looking at the two basic connectives, AND and OR, is to use the switch analogy. We have two switches, p and q, which control a light bulb. If these two switches are in series, then they must both be closed if the bulb is to light. This is p and q (pq). If the two switches are in parallel, then if either one or both are on, the bulb will light. This is p or q (p+q).
and:
p q
or:
p
In a bi-stable switch, an input p can be stably connected to either of two output lines, one called p and the other called not-p. (Note that the symbolism p means the same as p.)
input line
two output p lines
p 2.7
2.3
LAWS OF BOOLEAN ALGEBRA Each of the laws stated below can be proven through the use of truth tables. These should be examined carefully. While some of them are the same as the laws of ordinary algebra, some of them are not. In particular, one should note De Morgans laws, the first distribution law, the idempotency laws, the first domination law and the absorption laws. 1. A'' = A 2. (A+B)' = A'B' (AB) ' = A'+B' 3. A+B = B+A AB = BA 4. (A+B) +C = A+(B+C) (AB) C = A(BC) 5. A+(BC) = (A+B)(A+C) A(B+C ) = (AB) + (AC) 6. A+A = A AA = A 7. A+0 = A A1 = A 8. A+A' = 1 AA' = 0 9. A+1= 1 A0= 0 10. A+ (AB) = A A(A+B) = A Double Complement De Morgan Commutation Association Distribution Idempotency Identity Inverse Domination Absorption
For example, in Boolean Algebra, the first distribution law indicates that 1 + (1)(1) is equivalent to (1 + 1)(1 + 1) = (1)(1) = 1, while in ordinary algebra, 1+(2)(3) = 7 is not equivalent to (1+2)(1+3) = (3)(4) = 12.
p 2.8
As an example, we prove De Morgans laws. A 0 0 1 1 B 0 1 0 1 A 1 1 0 0 B 1 0 1 0 A+B 0 1 1 1 (A+B) 1 0 0 0 AB 1 0 0 0 AB (AB) 0 1 0 1 0 1 1 0 A+B 1 1 1 0
THE PRINCIPLE OF DUALITY Except for the law of double complement, all of the above laws appear in pairs. The pairs are called duals of each other. In general, given any compound statement S, one can obtain its dual Sd as follows: Replace each AND by an OR and each OR by an AND. Replace each 0 by a 1 and each 1 by a 0. Example: If S = ABC + ABC, then Sd = (A + B + C)(A + B + C). Note: There is no reason in general to expect S to equal Sd. There is also no reason in general to expect S to be the negation of Sd. USE OF BRACKETS Without brackets, the order of operations is negation (), conjunction (and) and finally, disjunction (+). Brackets should be used whenever we wish to change the order or where there could be any ambiguity of interpretation. Where there are sets of nested brackets, operations on pairs of inner brackets are executed ahead of those on pairs of outer brackets. For example, the meaning of P+Q is "P or (not Q)" while (P+Q) means "not (P or Q)". Note that the variables A,B,C, P,Q can each represent any Boolean expression (single variable or compound statement).
It can be shown, by using the Laws of Boolean Algebra, that the XOR operation is commutative and associative, namely that: AB = BA and that A(BC) = (AB)C. We can therefore without loss of clarity omit the brackets and write ABC. A(BC) = A(BC + BC) + A(BC + BC) definitions = A(BC + BC) + A[(BC) (BC)] deMorgan = A(BC + BC) + A[(B+C) (B+C)] deMorgan = A(BC + BC) + A[BB+BC+CB+CC] distributive = A(BC + BC) + A[0+BC+CB+0]inverse = A(BC + BC) + A[BC+CB] identity = ABC + ABC + ABC+ABC distributive = ABC + ABC + ABC + ABC commutative = (AB + AB)C + (AB + AB)C distributive = (AB)C + (AB)C definitions Note: it can be easily shown that*: (AB) = (AB+AB) = AB + AB.
In our treatment on logic we will define the derived operation if and only if with a special symbol , so that (AB) = AB
NAND GATES It should be noted that the most common integrated circuit implementation of logic gates is through the interconnection of what are known as NAND gates since these have the best operational performance characteristics. A NAND gate has the same symbol as the AND gate with the addition of a small circle at the front end. It implements (AB). We now show how each of the four Boolean operations can be realized using NAND gates alone. Note that a NAND gate with both inputs connected together (left-most column) behaves as an inverter.
NOT
A A'
AND
A
A B (AB)'
OR
A
XOR
B' (AB)' AB
which is the same as

A A'
A' B'
(AB)'' = AB
A'
(A'B')' = A+B
(AB)' B
AB = ((AB)) (by doublenegation)
A+B = (AB) (AB+AB) = (by deMorgan) (AB+AB) = [(AB)(AB)]
p 2.11
2.4
READING A COMPOUND STATEMENT GIVEN ITS TRUTH TABLE Often, we are given specifications for a logic circuit in the form of a truth table. To convert this to a compound statement, we note the combinations of input values for which the statement is true, (has a value of 1), and write the statement as the Boolean sum of products of the primitives which make it true. Ex. 1: We are given the following truth table, which specifies the output, F, in terms of three input variables A,B,C. Since there are three input variables, a complete specification requires 23 = 8 rows. Inputs B 0 0 1 1 0 0 1 1 Output F 0 1 1 0 1 0 0 1
A 0 0 0 0 1 1 1 1
C 0 1 0 1 0 1 0 1
The second row is the first instance where F = 1. Here, A=0 (A=1), B=0 (B=1), and C=1. The contribution of this row is thus ABC. Continuing in this fashion for the other three 1s in the F column, we get the complete statement: F = ABC + ABC + ABC + ABC. In words, this means: The Boolean function F gives an output of 1 (True), when the input is ABC or when the input is ABC, or when the input is ABC, or when the input it ABC. Otherwise, F gives an output of 0 (False).
Sometimes when F contains fewer 0s than 1s it is easier work with the 0s. In this case, one would take the Boolean sum of the input terms which yield 0s. This would give us all the cases where F is false, namely, we would obtain F. To get F we would then negate both sides of the equation and use the De Morgans and distribution laws to convert the result to the same format as in Ex.1 above. Ex. 2 We are given the following truth table. A 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 C 0 1 0 1 0 1 0 1 G 0 1 1 1 1 1 0 1
G = ABC + ABC and G = [ABC + ABC]. This statement can be simplified in terms of the number of primitives used, by the insertion of brackets, using the distribution law, namely G = [(AB + AB)C].
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2.5
MANIPULATION OF COMPOUND BOOLEAN STATEMENTS Manipulation of compound Boolean statements using the laws of Boolean algebra is a critical skill in computer engineering. Function specifications, such as in the examples above, need to be converted into specific formats for implementation in digital logic, and in general need to be simplified for efficiency. The Boolean AND-then-OR format consists of a Boolean sum of terms, each of which is a Boolean product of (possibly-negated) primitive statements. The result of Example 1 above is in AND-then-OR1 format: F = ABC + ABC + ABC + ABC. This is a form suitable for representation in a circuit of AND gates followed by OR gates (AND gates whose outputs are then connected by OR gates.)
A A' A'B'C
B'
A'BC'
C'
ABC' ABC
ABC
When each Boolean product term contains all of the available variables, in this case A,B and C, then it is called a Boolean sum of products.
The initial result of Example 2, G = ABC + ABC, is also a AND-then-OR result for the function G (not for G). We could obtain the AND-then-OR result for G by using the laws of logic: G = [(AB + AB)C] G = (AB)(AB) + C (deMorgan) G = (A+B)(A+B)+C (deMorgan) G = AA + AB + AB + BB + C (Distributive) G = 0 + AB +AB + 0 + C (Inverse) G = AB + AB + C (Identity) This is in AND-then-OR format.
There are at least two other important formats for digital logic design, the Boolean OR-then-AND and NAND formats. Boolean functions can be converted between these various formats using the laws of logic. Note that, although these are different representations of the same function, the three formats are logically equivalent (the truth table for the function remains the same).
p 2.15
In the Boolean OR-then-AND format, the function is represented as a simple Boolean product of parenthesized expressions, each of which is a Boolean sum of (possiblynegated) primitive statements. For example, one can convert the above AND-then-OR result for G in Example 2, into OR-then-AND format for G (not G) as follows: G = ABC + ABC G = (ABC + ABC) (negation of both sides) G = (ABC + ABC) (double negation) G = (ABC)(ABC) (deMorgan) G = (A+B+C)(A+B+C) (deMorgan) This is the result for G in OR-then-AND format. One could also have converted the result of Example 1 into ORthen-AND format, by working from the 0s, as follows: F = ABC + ABC + ABC + ABC F = (ABC + ABC + ABC + ABC) (negation) F = (ABC + ABC + ABC + ABC) (double-negation) F = (ABC)(ABC)(ABC)(ABC) (deMorgan) F = (A+B+C)(A+B+C)(A+B+C)(A+B+C) (deMorgan) This is the result for F in OR-then-AND format. One can of course, reverse the process to convert a OR-thenAND to a AND-then-OR. F = (A+B+C)(A+B+C)(A+B+C)(A+B+C) F = ((ABC)(ABC)(ABC)(ABC)) (deMorgan) F = (ABC + ABC + ABC + ABC) (deMorgan) At this point, one notes that the negation of this AND-then-OR expression consists of the other four terms that appear in an eight-row truth table. We thus have: F = ABC + ABC + ABC + ABC.
p 2.16
As mentioned above, it is often useful to convert Boolean functions into a form where they can be implemented using only NAND operations (gates). Note that this format involves only AND and NOT operations. If we inspect the two examples of derivations toward OR-then-AND above, we will see that in each case the next-to-last line is in a format convenient for conversion and implementation by 3-input NAND gates. To complete the conversion: G = (ABC)(ABC) G = [[(ABC)(ABC)]]
A A'
[(ABC)(ABC)]
(double-negation)
(A'B'C')' B B'
[(A'B'C')'(ABC')']' G
(ABC')' C C'
Note that we have used 7 gates. It is possible to realize G using only six gates. G = (ABC)(ABC) G = ABC + ABC = (AB + AB)C G = (AB + AB) + C G = AB + AB +C G = [AB + AB +C] G = [(AB)(AB)C]
(DeMorgan,distribve) (negation, De Morgan) (See page 2.10) (double-negation) (DeMorgan)
The drawing of the circuit is left as an exercise.
p 2.17
Interrelationship among the different formats: Consider the example of a Boolean function F = ABC + ABC. F and its negation F can be expressed in various formats. The relationships between several of them is mapped out below. Notice the simple Boolean operations which interrelate them.
Sum of Products Format

F = [(ABC) + (ABC)]
DeMorgan (inner brackets) F = [(A+B+C')' + (A+B+C')'] deMorgan F = [(A+B+C')(A+B+C')]'
double negation F = F = [(ABC) + (ABC)] deMorgan
deMorgan (inner brackets) negation
NAND Format F = [(ABC)'(ABC)']'
Product of Sums Format F = [(A+B+C')(A+B+C')]
p 2.18
The same type of analysis can be done for F. For example, when F = ABC + ABC as above, F simply consists of the minterms not included in F: F = ABC + ABC + ABC + ABC + ABC + ABC In this case, the interrelationships for F are:
Sum of Products Format F = [(ABC) + (ABC) + (ABC) + (ABC) + (ABC) + (ABC)]
DeMorgan (inner brackets)
double negation
F = [(A+B+C) + (A+B+C) + (A+B+C) + (A+B+C) + (A+B+C) + (A+B+C)]

deMorgan
F = [F] = [(ABC) + (ABC) + (ABC) + (ABC) + (ABC) + (ABC)]

deMorgan
F = [(A+B+C) (A+B+C) (A+B+C) (A+B+C) (A+B+C) (A+B+C)]

negation
deMorgan (inner brackets)
NAND Format F = [(ABC)(ABC)(ABC) + (ABC)(ABC)(ABC)]
Product of Sums Format F = [(A+B+C) (A+B+C) (A+B+C) (A+B+C) (A+B+C) (A+B+C)]
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2.6
SIMPLIFICATION OF COMPOUND BOOLEAN STATEMENTS In most cases, one should attempt to simplify compound statements, if for no other reason than to ensure that a minimum amount of digital logic can be used to implement these statements. For the purposes of this course, we will define simplification to mean that after the manipulation fewer primitives appear in the expression. Any skills gained in doing this are transferable to the simplification of compound logic statements or of compound set operations, since the rules governing these are identical to those of Boolean algebra. Simple examples are: i. F = AB + AB = A(B + B) = A(1) =A
(Distributive) (Inverse) (Identity)
ii.
F = ABC + ABC can be simplified a bit since F = (AB + AB)C (Distributive) reducing the number of primitives from six to five. F = A + AB doesnt look as if it can be simplified but it can. An easy way of doing this is use the distribution law with respect to + and write F = (A + A)(A + B) = (1)(A + B) (Inverse) = (A + B) (Identity) Another way is to write F = A + AB + AB (since A = A + AB by Absorption) = A + (A + A)B (Distributive) = A + (1)B (Inverse) =A+B (Identity) F = AB + AB cannot be simplified.
iii.
iv.
p 2.20
One problem is to know when the statement has been minimized, namely it can be simplified no more. This is not always obvious, particularly when the number of variables (or primitive statements) is large. Further, the solution is not always unique. The approach we will follow here is useful where Boolean statements contain up to four variables. It leads into techniques, such as Karnaugh maps, which will be presented in courses on logic circuits, and which are useful for statements containing up to five or six variables. This technique is based on the Boolean AND-then-OR form discussed above. What we do is rewrite the statement as a Boolean sum of what are called minterms. A minterm for a compound statement containing n variables or primitives consists of a Boolean product of n variables. For example, if there are four variables, then ABCD is a minterm while ABC is not. In the industry, this is called a sum-of-products expansion. There are two ways of rewriting a given expression as a sum of minterms. The first way involves the use of the inverse law and of distribution with respect to the AND (Boolean product) operation. For example, F=A+B = A(B+B) + (A+A)B (Identity, Inverse) = AB + AB + AB + AB (Distributive) = AB + AB + AB (Idempotent) The second way is to write the truth table for the given statement F, and then read off the values of the variables that make F true, namely, a truth-value of 1.
p 2.21
For our simple example: A 0 0 1 1 B 0 1 0 1 F=A+B 0 1 1 1
F = AB + AB + AB. Note that the technique for reading specification tables, presented in Section 2.4, generates minterms.
p 2.22
Once an expression has been converted into its minterms, simplification (and determination whether any simplification is available) is relatively straightforward. 2.6.1 Test for determining whether or not a sum of minterms can be simplified It is sometimes possible to simplify sums of minterms through the use of brackets, e.g., ABC + ABC = (AB +AB)C. It is sometimes possible to simplify sums of minterms through the use of the laws of Boolean algebra, for example, AC + ABC = A(B + B)C + ABC = ABC + ABC + ABC (sum of minterms) Now one can recognize that minterms may be repeated, using the idempotent law. This is done in order to group the repeated minterm with other minterms, in order to remove literals. = ABC + ABC + ABC +ABC = (ABC + ABC) + (ABC +ABC) = A(B +B)C + (A + A)BC = AC + BC = (A + B)C. ABC + ABC cannot be simplified at all. In order to determine if any simplification can take place, we convert the minterms to ordered strings of 0s and 1s. The three examples given above become:
p 2.23
First example ABC 001 ABC 111 The third 1 is in common. This means that a bracket can be used.
Second example 101 ABC 111 ABC 011 ABC The third 1 is in common (Bracket). First and second minterms differ by one digit. Second and third minterms differ by one digit. Simplification is possible as shown above.
Third example ABC 000 ABC 111 There is nothing in common. Nothing can be done.
Simplification test for minterms: An expression whose minterms have nothing in common cannot be simplified.
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2.6.2 Examples of the simplification of Boolean statements The laws of Boolean algebra are available for the simplification of Boolean statements. Example 1: Simplify F = A + AB + ABC. Rewriting as minterms, directly from the functional expression above, we have: F= A(B + B)(C + C) + AB(C + C) + ABC = ABC + ABC + ABC + ABC + ABC + ABC + ABC This can be simplified substantially. We have already shown a few pages ago that A + AB = A + B. We can reuse this result here as follows: F = A + AB + ABC = A + A(B + BC) = A + A(B + C) =A+B+C Alternatively, we could have constructed the truth table from the original expression, F = A + AB + ABC: A 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 C 0 1 0 1 0 1 0 1 F 0 1 1 1 1 1 1 1
ABC AB
then examined the truth table and noticed that F = ABC, so that F = (ABC) = A + B + C (by De Morgan).
Example 2: Simplify F = AB+AC+BC One could construct the minterms in the usual ways: by truth table and/or by expansion of the three terms AB, AC, BC. Writing the truth table we have: A B C A AB AC BC F Here we note that the final 0 0 0 1 0 0 0 0 result consists of: 0 0 1 1 0 1 0 1 F =ABC+ABC+ABC+ABC 0 1 0 1 0 0 0 0 which can be simplified as 0 1 1 1 0 1 1 1 follows: 1 0 0 0 0 0 0 0 =A(B+B)C+AB(C+C) 1 0 1 0 0 0 0 0 = AC+AB 1 1 0 0 1 0 0 1 1 1 1 0 1 0 1 1 Here, since column F contains as many 0s as 1s, there would be no advantage in proceeding to find F and converting it to F. Example 3: Given the following truth table, find and simplify the Boolean expression. A 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 B 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 C 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 D 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 F 0 0 0 1 0 0 1 1 0 0 0 1 0 0 1 Reading off the minterms, we get: F = ABCD + ABCD + ABCD + ABCD + ABCD + ABCD. This can be simplified. F = (A + A)(BCD + BCD + BCD) = BCD + BCD + BCD = BCD + BCD + BCD + BCD = (B + B)CD + BC(D + D) = CD + BC = C(B + D)
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1 1 1 1 1 FROM WORDS TO GATES:

Word descriptions of the task or operation
Word descriptions using AND, OR, NOT, brackets
Other formats
Truth table
Boolean AND-then-OR
Boolean OR-then-AND
minterms
NAND format
Manipulation, simplification, using laws of Boolean Algebra Dont cares
Implementation of logic circuit using logic gates
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2.7 APPLICATIONS TO THE DESIGN OF LOGIC CIRCUITS 2.7.1 The Full Adder Recall that in Chapter 1, and again at the beginning of this Chapter, we examined the addition of binary numbers. We repeat here the example of the addition of 1003 and 501. The techniques introduced in this chapter are well-suited to completing the task that we started.
Addition
11 10 9 8 7 6 5 4 3 2 1 0 Column number
0 0 0 0
1 0 0 1
1 1 0 0
1 1 1 1
1 1 1 1
1 1 1 1
1 1 1 1
1 0 1 0
1 1 0 0
1 0 1 0
1 1 0 0
0 1 1 0
Carry digit - C First number - A Second number - B Sum - S
1003 501 1504
We indicated that the ith digit Si , (represented by the column number), of the sum of two binary numbers, A and B, was: Si = 1 whenever the values of one member of the triplet (Ci, Ai, Bi) is a 1, with the other two members being 0s, or whenever all three members of the triplet (Ci, Ai, Bi) are 1s. Otherwise Si = 0. The value Ci is the result of the carry operation determined from the full add operation of the previous (next-less-significant) column. The carry value for the next column, Ci+1 = 1 whenever at least two of the triplet (Ai, Bi, Ci) are 1s. In other words, either two of the triplet are 1s with the third being 0, or all three of the triplet are 1s. Otherwise Ci+1 = 0. These specifications repeated here: Case # 0 1 2 3 4 5 6
were summarized in Section 2.1, and are Inputs Outputs Ai Bi Ci Ci+1 Si 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0

p 2.28 Boolean Algebra Autumn 2001-2002
p 2.29
We will now express these specifications as a sum of minterms (method 3), beginning with the word statements given in Section 2.1. The variables Ai, Bi, Ci are considered to be inputs; the variables Si and Ci+1 are considered to be outputs. Si := 1 if or or or Ci+1 := 1 if or or or [(Ai is 0) and (Bi is 0) and (Ci is 1)] [(Ai is 0) and (Bi is 1) and (Ci is 0)] [(Ai is 1) and (Bi is 0) and (Ci is 0)] [(Ai is 1) and (Bi is 1) and (Ci is 1)] [(Ai is 0) and (Bi is 1) and (Ci is 1)] [(Ai is 1) and (Bi is 0) and (Ci is 1)] [(Ai is 1) and (Bi is 1) and (Ci is 0)] [(Ai is 1) and (Bi is 1) and (Ci is 1)]
Now, with the techniques and notations introduced in this chapter, we are ready to translate these word specifications into the language of Boolean logic, so that they can be implemented in logic gates. In Boolean notation, these conditions become: Si = Ai Bi Ci + Ai Bi Ci + Ai Bi Ci + Ai Bi Ci Ci+1 = Ai Bi Ci + Ai Bi Ci + Ai Bi Ci + Ai Bi Ci The first expression as stated, requires 11 2-input AND and OR operations, (eight 2-input AND gates and three 2-input OR gates), in addition to 3 inverters, and as a result, 14 logic gates to realize it. One of several possibilities for simplification is to reorder the terms and rewrite it as: Si = Ai Bi Ci + Ai Bi Ci + Ai Bi Ci + Ai Bi Ci = (Ai Bi Ci + Ai Bi Ci) + (Ai Bi Ci + Ai Bi Ci) Si = (Ai Bi + Ai Bi )Ci + (Ai Bi + Ai Bi ) Ci We now let Di = (Ai Bi + Ai Bi ), and recognize it as the exclusive OR, namely Di = Ai Bi. We have shown earlier that
Di = (Ai Bi + Ai Bi ), which also appears in the expression (ahead of Ci). The realization of this using AND and OR gates is shown below.
A
D = A'B + AB'
B S C
We have used six gates to realize this. If, in addition, we have available the XOR gate, we can rewrite it as: Si = (Ai Bi ) Ci + (Ai Bi ) Ci = (Ai Bi ) Ci = Ai Bi Ci. We now consider the second expression: Ci+1 = Ai Bi Ci + Ai Bi Ci + Ai Bi Ci + Ai Bi Ci . The ABC term can be grouped with each of the 3 previous terms, so that: Ci+1=(Ai Bi Ci+Ai Bi Ci)+(Ai Bi Ci+Ai Bi Ci)+(Ai Bi Ci+Ai Bi Ci) = Ai Bi (Ci + Ci ) + Ai (Bi + Bi ) Ci + (Ai + Ai )Bi Ci = Ai Bi + Ai Ci + Bi Ci = Ai Bi +(Ai + Bi )Ci a reduction from 14 to 4 operations. Alternately, if XOR gates are used, we can rewrite it as: Ci+1 = (Ai Bi Ci + Ai Bi Ci) + (Ai Bi Ci + Ai Bi Ci) = (AiBi+AiBi)Ci+AiBi(Ci+Ci) = (Ai Bi) Ci + Ai Bi This would allow us to use the results of one of the half-adders used in representing Si.
The circuit to implement the full adder is shown below. What is not shown are the timing circuits that move the register connections from one digit to the next.
(AB)C+AB (AB)C
ith digit
C
(i+1)th digit
S
ABC AB
B
AB
The Full Adder Circuit
p 2.32
2.7.2 The Use of Dont Care Conditions There are occasions when a number of minterms are not relevant to the production of outputs. These are called dont care conditions and can be used as necessary, to simplify the number of Boolean operations needed. The following example illustrates this technique. Imagine a stereo system, where the sound volume is often also represented visually by an arrangement of lights on the front panel. Often, this visual arrangement consists of 5 lights, in a stack, where the number of lights lit represents the instantaneous (moment-by-moment) loudness of the sound. Thus, when there is no sound, no lights will be on. When there is soft sound, perhaps the bottom one or two lights will flicker. And when the music is very loud, the bottom four, or all five lights, will be lit. Note: the choice of 5 lights (6 levels, since nolights-on represents no sound), is usually decided by some aesthetic (appearance) considerations.
5 status lights indicating sound volume
So, given that there are 5 lights, and 6 levels, we will need more than 2 bits to represent the 6 different input sound levels. Therefore, we will need 3 bits, but we wont need to use all 8 possible patterns that can be represented in 3 bits.
p 2.33
Therefore, we devise a series of five status conditions, S1 through S5, which are coded in binary as shown in the table below. As such the values A, B, and C are to be considered as inputs to the logic circuit. We wish to design a logic circuit that allows a series of five lights L1 through L5, to be turned on according to the following specifications. Status S1 will result in L1 being turned on; status S2 will result in both L1 and L2 being turned on, etc., and finally, status S5 will result in all five lights being turned on. There is an assumed sixth specification in that if none of the status conditions occur, we do not want any of the lights turned on. You will note that the table contains all possible three-digit binary numbers, of which there are eight. We only need the six that correspond to the six status conditions. The remaining two correspond to dont care conditions. There will not be an input signal corresponding to these two conditions. We have inserted X into the appropriate rows. The specifications S1 through S5 are in bold type while the dont care conditions D6 and D7 and the off condition, S0, are in plain type. Truth Table for Example 4 Inputs Outputs A B C L1 L2 L3 L4 L5 S0 0 0 0 0 0 0 0 0 Status S1 0 0 1 1 0 0 0 0 Conditions S2 0 1 0 1 1 0 0 0 S3 0 1 1 1 1 1 0 0 S4 1 0 0 1 1 1 1 0 S5 1 0 1 1 1 1 1 1 Dont care D6 1 1 0 X X X X X conditions D7 1 1 1 X X X X X
p 2.34
In what follows we will demonstrate the use of the dont care conditions to simplify the logical implementation of the specifications. In order to develop an approach as to how to use the dont care conditions, let us concentrate on how to make the lights go on. An examination of the truth table will provide insight. For each light, ask the question what is it about the associated rows that distinguishes them from the rest of the rows? For example, for L3, what is it about the input conditions S3, S4, and S5 that distinguishes them from the other input conditions, S0, S1, and S2? Note that we dont need to distinguish them from the dont care conditions D6, D7. L5 = S5 is on only when inputs A and C are true and input B is false. However, since we dont care what happens with the D6 and D7 combinations of inputs, we need not distinguish S5 from D6 and D7. We only need to distinguish S5 from S0S4. Therefore, we can try to use the dont care conditions to eliminate B from L5 = S5 = ABC and to achieve L5 = AC. In this way, it will turn out that the specification A and C are true is enough to distinguish S5 from S0-S4. Similarly, L4 = S4 + S5 is on only when A is true. As such, we would like to make L4 =A. L3 = S3 + S4 + S5 is on only when A is true or BC is true. Our objective is thus L3 = A + BC. L2 = S2 + S3 + S4 + S5 is on only when A or B are true. Our objective is thus L2 = A + B. L1 comes on when any of the statuses are true. As such we want L1 = A+B+C. You may (or may not) be able to see the above answers by inspection. Either way, the following analytical methods are useful, and can be applied when analyzing more complicated problems.
We now use the dont care conditions to show in detail how we can do this. L5: We have the requirement that L5 = S5 = ABC. We have below it the minterm D7 = ABC. Since D7 will never be implemented as a separate specification, we dont care about it and are free to integrate it into the specifications in order to simplify them. As such, we redefine L5 by integrating D7 into it, so that now, L5 = ABC+ABC = A(B+B)C = AC. Our goal is to implement logic gates to turn on the lights in accordance with the specifications, so we can begin by placing the appropriate gate in a box which will contain our circuitry. Outputs
L1 L2 L3 L4 L5
Inputs
AC
p 2.36
L4: Initially we have that L4 = S4 + S5 = ABC+ABC. = AB. We now note that D6 + D7 = ABC + ABC = AB and that AB + AB = A. We now proceed to add these dont care conditions into the original specification for L4 and obtain L4 = (ABC+ABC)+(ABC+ABC) = AB+AB = A .
L1 L2 L3 L4 L5
AC
L3: Proceeding as before, L3 = S3 + S4 + S5 = ABC+ABC+ABC. Adding in the dont care conditions, we get L3 = S3 + S4 + S5 + D6 + D7 = ABC+ABC+ABC + ABC + ABC = ABC+(ABC+ABC + ABC + ABC). Using the results of L4, this can be rewritten as ABC + A. This can be further simplified since we had shown in Example 1 that AQ + A = Q + A. Letting Q = BC, we have: L3 = BC + A. Another way of arriving at the result, is to write conditions, L3 = (S0 + S1 + S2) = (ABC + ABC + ABC) = [A(BC + BC + BC)] = [A(BC)] (Note that (BC + BC + BC) = (BC) by the same reasoning as in Example 2, a few pages ago.) = A + (BC) = A + BC. L2: In the same manner, we let L2 = S2 + S3 + S4 + S5 + D6 + D7 = (S0 + S1) = (ABC + ABC) = [AB(C + C)] = [AB] = A+B.
p 2.37
L1: Based on what we have done before, we can immediately write L1 = S0 = [ABC] = A + B + C. As we can see, the dont care conditions have allowed us to prove what was intuitively obvious from looking at the truth table. Given a restriction that we must use two-input gates, the complete circuit is designed with five two-input AND and OR gates. L5 = AC; L4 = A; L3 = A+BC; L2 = A+B; L1 = A+B+C = (A+B)+C. Outputs
L1 L2 L3 L4 L5
A+BC A
A+B
Inputs
BC A+B+C AC
Complete Implementation of Example 4
p 2.38
2.8 BOOLEAN ALGEBRA: SUMMARY OF IMPORTANT SKILLS Specifications in words and their translation into Boolean logic AND, OR, NOT, XOR operations Logic gate symbols and interconnection NAND gates The Laws of Boolean Algebra (in dual pairs) Reading specification (truth) tables Manipulation of Boolean statements using the Laws 3 formats: sum-of-products, product-of-sums, NAND Simplification of Boolean statements The Full Adder: algebraic description and implementation in gates The use of the dont-care condition
p 2.39
Boolean Algebra Problems 1. Using truth tables, prove the laws of distribution and absorption. 2. Show that the exclusive OR obeys the laws of commutation and association, namely AB = BA and that (AB)C = A(BC) = ABC. 3. Show that ABC + AC + C = A + B + C a) Using truth tables b) Using the laws of Boolean algebra and the result p +pq = p+q in the notes. c) Using minterms. You will note that the sum will include all minterms other than ABC. Make use of this. 4. (a) Show that the dual of the exclusive OR, S = AB =AB + AB, is Sd = AB + AB. (In logic, this called the if and only if statement and is represented using AB.) (b) Show that the negation of S = AB = Sd . (c) The negation of a Boolean statement is not usually equivalent to its dual. Verify this for the following pairs of dual Boolean expressions: (A+B) vs. (AB); (A+B) vs. (AB); (A+B+C) vs. (ABC); (A+0) vs. (A1). 5. Realize the A if and only if B, which is equivalent to (AB), as an interconnection of (only) NAND gates. Suggestion: start with ((AB)). 6. A small design problem. A common feature (a great convenience) in buildings is to have a light controlled by a pair of switches located at different places. This means that there are two switches, one in each location. Let us label these switches p and q. Each switch has two possible positions, up and down, to which we will assign the truth values of 1 and 0 respectively. We want to use switch p to turn the light on or off regardless of the position of switch q and to use switch q to turn the light on or off regardless of the position of switch p. (a) Design a truth table which makes this possible. (b) Design a circuit which implements this truth table, using these two switches and wires. Hints: There are two possible designs. a particular switchs position (up/down) does not always mean the same thing (e.g. does not always mean the light is on). The effect of up and down of one switch changes depending on the position of the other switch. (c) Once you have managed to do this, design a logic circuit that enables one to do the same thing from any one of three switches.
7. Using truth tables, verify the each of the two results below, Si and Ci+1, for the full-adder example: Si = (Ai Bi + Ai Bi )Ci + (Ai Bi + Ai Bi ) Ci Ci+1 = (Ai Bi) Ci + Ai Bi 8. The following are several Boolean expressions related to the full adder. Implement each of them in logic gates corresponding to the particular Boolean operations represented in the expressions. Si = Ai Bi Ci + Ai Bi Ci + Ai Bi Ci + Ai Bi Ci Si = (Ai Bi + Ai Bi )Ci + (Ai Bi + Ai Bi ) Ci Si = Ai Bi Ci (using XOR gates) Ci+1 = Ai Bi Ci + Ai Bi Ci + Ai Bi Ci + Ai Bi Ci Ci+1 = (Ai Bi) Ci + Ai Bi (using an XOR gate)
9. The table below defines two Boolean functions, b1(a1,a2,a3,a4) and b2(a1,a2,a3,a4). Each
row (line) gives the output for a specific combination of inputs (a1,a2,a3,a4). For each of the two functions, write the equivalent Boolean expression, simplify it as much as possible, and implement it by drawing logic gates. a1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 a2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 a3 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 a4 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 b1 b2 1 0 1 0 0 0 0 1 1 0 1 0 0 1 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 1
(10) Simplify as much as possible the following Boolean expression, using the laws of Boolean Algebra: MQ + MR + QR Show clearly which laws you are using in your simplification.
(11)
(a) (b)
Prove this Boolean equivalence by truth tables: A + AB = A Prove this Boolean equivalence by the laws of Boolean algebra: AB + B = A + B
The table below defines two Boolean functions, f1(A,B,C) and f2(A,B,C). Each row (line) gives the output for a specific combination of inputs (A,B,C). (a) For each of the two functions, write the equivalent Boolean expression, and then simplify your Boolean expression as much as possible. (b) Then implement f2 by drawing logic gates. A 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 C 0 1 0 1 0 1 0 1 f1 1 1 1 1 1 0 1 1 f2 0 1 0 1 0 0 0 0
(12)
(13) Draw the Boolean circuit for G = [(AB)(AB)C], using only NAND gates (each gate having up to 3 inputs).
p 2.42
(14) Consider the conversion of an 8-bit binary number into its 2s complement, particularly the shortcut method described in Chapter 1. One method for doing the conversion in a computer would be as follows: let Ai represent the bits (A7 A0) of the binary number being converted. let Bi represent the bits (B7 B0) of the binary number after conversion. let Fi represent flag bits (F7 F0) which will be used to flag whether we have reached the first 1, as prescribed in Chapter 1. This bit responds to the question (starting from the right, have I reached the first 1 yet?) before the conversion begins, all the flag bits are 0, to be changed as needed by the Boolean function you will design. the conversion begins at the rightmost bit (A0), and proceeds, bit-by-bit, toward the left, until all bits are converted into 2s complement. after the conversion is complete, Fi should be 0 up to and including the first 1 encountered from the right, and then Fi should be 1 for all subsequent bits. The problem: (a) Specify the truth table for the Boolean function which takes as input Ai and Fi, and gives as output Bi and Fi+1. (b) Translate the truth table into symbolic Boolean functions for Bi and Fi+1. Suggestion: draw a diagram showing how you will be changing the bits. Fi+1 = Fi = Ai = Bi = You decide based on these two, what to put into these two
p 2.43

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COEN 231 Class Notes J.C.Gigure & L.M.Landsberger

Boolean Algebra Autumn 2001-2002

Note the two levels of brackets

COEN 231 Class Notes J.C.Gigure & L.M.Landsberger

Boolean Algebra Autumn 2001-2002

COEN 231 Class Notes J.C.Gigure & L.M.Landsberger

Boolean Algebra Autumn 2001-2002

COEN 231 Class Notes J.C.Gigure & L.M.Landsberger

Boolean Algebra Autumn 2001-2002

Also known as an inverter

made from an AND gate and an inverter

XOR circuit made up of NOT, AND and OR gates

COEN 231 Class Notes J.C.Gigure & L.M.Landsberger

Boolean Algebra Autumn 2001-2002

two output p lines

COEN 231 Class Notes J.C.Gigure & L.M.Landsberger

Boolean Algebra Autumn 2001-2002

COEN 231 Class Notes J.C.Gigure & L.M.Landsberger

Boolean Algebra Autumn 2001-2002

As an example, we prove De Morgans laws. A 0 0 1 1 B 0 1 0 1 A 1 1 0 0 B 1 0 1 0 A+B 0 1 1 1 (A+B) 1 0 0 0 AB 1 0 0 0 AB (AB) 0 1 0 1 0 1 1 0 A+B 1 1 1 0

which is the same as

AB = ((AB)) (by doublenegation)

A+B = (AB) (AB+AB) = (by deMorgan) (AB+AB) = [(AB)(AB)]

COEN 231 Class Notes J.C.Gigure & L.M.Landsberger

Boolean Algebra Autumn 2001-2002

COEN 231 Class Notes J.C.Gigure & L.M.Landsberger

Boolean Algebra Autumn 2001-2002

COEN 231 Class Notes J.C.Gigure & L.M.Landsberger

Boolean Algebra Autumn 2001-2002

COEN 231 Class Notes J.C.Gigure & L.M.Landsberger

Boolean Algebra Autumn 2001-2002

(DeMorgan,distribve) (negation, De Morgan) (See page 2.10) (double-negation) (DeMorgan)

The drawing of the circuit is left as an exercise.

COEN 231 Class Notes J.C.Gigure & L.M.Landsberger

Boolean Algebra Autumn 2001-2002

Sum of Products Format

DeMorgan (inner brackets) F = [(A+B+C')' + (A+B+C')'] deMorgan F = [(A+B+C')(A+B+C')]'

double negation F = F = [(ABC) + (ABC)] deMorgan

deMorgan (inner brackets) negation

NAND Format F = [(ABC)'(ABC)']'

Product of Sums Format F = [(A+B+C')(A+B+C')]

COEN 231 Class Notes J.C.Gigure & L.M.Landsberger

Boolean Algebra Autumn 2001-2002

F = [(A+B+C) + (A+B+C) + (A+B+C) + (A+B+C) + (A+B+C) + (A+B+C)]

F = [F] = [(ABC) + (ABC) + (ABC) + (ABC) + (ABC) + (ABC)]

F = [(A+B+C) (A+B+C) (A+B+C) (A+B+C) (A+B+C) (A+B+C)]

deMorgan (inner brackets)

NAND Format F = [(ABC)(ABC)(ABC) + (ABC)(ABC)(ABC)]

Product of Sums Format F = [(A+B+C) (A+B+C) (A+B+C) (A+B+C) (A+B+C) (A+B+C)]

COEN 231 Class Notes J.C.Gigure & L.M.Landsberger

Boolean Algebra Autumn 2001-2002

(Distributive) (Inverse) (Identity)

COEN 231 Class Notes J.C.Gigure & L.M.Landsberger

Boolean Algebra Autumn 2001-2002

COEN 231 Class Notes J.C.Gigure & L.M.Landsberger

Boolean Algebra Autumn 2001-2002

For our simple example: A 0 0 1 1 B 0 1 0 1 F=A+B 0 1 1 1

COEN 231 Class Notes J.C.Gigure & L.M.Landsberger

Boolean Algebra Autumn 2001-2002

COEN 231 Class Notes J.C.Gigure & L.M.Landsberger

Boolean Algebra Autumn 2001-2002

COEN 231 Class Notes J.C.Gigure & L.M.Landsberger