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TUT 6

Q.1- A program consists of two nested loops – a small inner loop and a much larger outer loop. The general structure of the program is given in Figure P5.1. The decimal memory addresses shown delineate the location of the two loops and the beginning and end of the total program. All memory locations in the various sections, 17 – 22, 23 – 164, 165 – 239, and so on, contain instructions to be executed in straight-line sequencing. The program is to be run on a computer that has an instruction cache organized in the direct-mapped manner (see Figure 5.15) and that has the following parameters Main memory size 64 K words Cache size 1 K words Block size 128 words The cycle time of the main memory is 10τ s, and the cycle time of the cache is 1τ s. Start 17

23

165 Inner Loop 20 times 239 Outer Loop 10 times

1200

End

1500

Figure P5.1 a) Specify the number of bits in the TAG, BLOCK and WORD fields in the main memory addresses. b) Compute the total time needed for instruction fetching during execution of the program in Figure P5.1 Solution TAG a) A block contains 128 = 27 words Cache can contain 1K/128 = 8 = 23 blocks Main memory can contain 64K/128 = 512 blocks A block of cache can replace 512 / 8 = 64 = 26 blocks => => => 7 3 6 bits bits bits BLOCK WORD

6 So the main memory 3 7 address is .

024 – 1.407 1.280 – 1.024 FULL 1.152 – 1.408 – 1.200 1.152 FULL 1.b) Block 0 1 2 3 4 5 6 7 8 9 10 11 Word 0 – 127 > 128 – 255 > 256 – 383 384 – 511 512 – 639 640 – 767 768 – 895 896 – 1.200 9 times Outer Loop: 23 FULL 24 – 127 128 FULL 129 – 164 ACTION add Block 0 add Block 1 add Block 2 add Block 3 add Block 4 add Block 5 add Block 6 add Block 7 add Block 8 remove Block 0 add Block 9 remove Block 1 cache miss cache hit cache miss cache hit add Block 0 remove Block 8 add Block 1 remove Block 9 . 239 > > 1.151 1.153 – 1.023 1.500 EVENT WORD CACHE Start: 17 count 1 18 – 22 23 – 127 128 count 2 129 – 164 20 times 165 – 239 240 – 255 256 count 3 384 count 4 512 count 5 640 count 6 768 count 7 896 FULL 1.279 1.535 HIT/MISS cache miss cache hit cache hit cache miss cache hit cache hit cache hit cache miss cache miss cache miss cache miss cache miss cache miss cache miss cache miss cache hit 17. 23 165.

((127 – 17) + (164 – 128) + 20(239 – 164) + (255 – + (511 – 384) + (639 – 512) + (767 – 640) + (895 – cache miss add Block 11 remove Block 3 add Block 10 remove Block 2 . Cache miss occurs Use Cache hit occurs 239) + (383 – 256) 768) + (1.151 – 1.279 – 1.768τ s.288τ s Total 480τ + 26.024) + (1. 10 + (9 x 4) + 2 = 48 times 48 x 10τ = 480τ s.152) + 9((127 – 23) + (164 .408 FULL So.024 1. to execute the program.023 1.280) + (1.023 – 896) + (1.279 cache hit 1.152)) + (1.407 – 1.200 – 1.024) + (1.152 cache hit cache hit cache miss cache miss add Block 8 remove Block 0 add Block 9 remove Block 1 FULL FULL 1.200 cache hit 1.023 239) + (1.128) + 20(239 – 164) + (1.280 cache miss FULL 1.151 – 1.153 – 1.20 times 165 – 239 240 – 1.201 – 1.408)) x 1τ = 26.200) + (1.288τ = 26.200 – 1.500 – 1.