Philips Semiconductors Linear Products

Product specification

Addressable relay driver


The NE/SA5090 addressable relay driver is a high-current latched driver, similar in function to the 9934 address decoder. The device has 8 open-collector Darlington power outputs, each capable of 150mA load current. The outputs are turned on or off by respectively loading a logic “1” or logic “0” into the device data input. The required output is defined by a 3-bit address. The device must be enabled by a CE input line which also serves the function of further address decoding. A common clear input, CLR, turns all outputs off when a logic “0” is applied. The device is packaged in a 16-pin plastic or Cerdip package.

D1, N Packages
A0 1 A1 2 A2 3 Q0 4 Q1 5 16 15 14 13 12 11 10 9 VCC CLR CE D Q7 Q6 Q5 Q4

Q2 6 Q3 7



• 8 high-current outputs • Low-loading bus-compatible inputs • Power-on clear ensures safe operation • Will operate in addressable or demultiplex mode • Allows random (addressed) data entry • Easily expandable • Pin-compatible with 9334 (Siliconix or Fairchild)

NOTE: 1. SOL - Released in Large SO package only.


• Relay driver • Indicator lamp driver • Triac trigger • LED display digit driver • Stepper motor driver



A2 D



August 31, 1994


853-0892 13721

1-3 4-7. all outputs will retain their existing state. The clear input. The 8 device outputs. When the chip is enabled. the output latches will accept data. regardless of address of data input condition. ORDERING INFORMATION DESCRIPTION 16-Pin Plastic Small Outline Large (SOL) Package 16-Pin Plastic Dual In-Line Package (DIP) 16-Pin Plastic Dual In-Line Package (DIP) 16-Pin Plastic Small Outline Large (SOL) Package TEMPERATURE RANGE 0 to +70°C 0 to +70°C -40 to +85°C –40 to +85°C ORDER CODE NE5090D NE5090N SA5090N SA5090D DWG # 0171B 0406C 0406C 0171B TRUTH TABLE INPUTS CL R L L L L L L L H H H H H H H C E H L L L L L L H L L L L L L D X L H L H L H X L H L H L H A 0 OUTPUTS A 1 MODE Q 5 A 2 Q 0 Q 1 Q 2 Q 3 Q 4 Q 6 Q 7 X L L H H H H X L L H H H H X L L L L H H X L L L L H H X L L L L H H X L L L L H H H H L H H H H QN-1 H L H H H H L H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H L Clear Demultiplex Memory QN-1 QN-1 QN-1 QN-1 H L Addressable Latch QN-1 H QN-1 L QN-1 QN-1 NOTES: X=Don’t care condition QN-1=Previous output state L=Low voltage level/“ON” output state H=High voltage level/“OFF” output state August 31. 9-12 13 SYMBOL A0-A2 Q0-Q7 D NAME AND FUNCTION A 3-bit binary address on these pins defines which of the 8 output latches is to receive the data. this data bit is transferred to the defined output such that: “1” turns output switch “ON” “0” turns output switch “OFF” 14 15 CE CLR The chip enable. 1994 513 . When CE goes high. When this input is low. The data input. The high data input will override the clear function on the addressed latch.Philips Semiconductors Linear Products Product specification Addressable relay driver NE/SA5090 PIN DESIGNATION PIN NO. When CLR goes low all output switches are turned “OFF”.

25V.0 0.05 1. <1.7mW/°C D package at 10. All typical values are at VCC=5V and TA=25°C August 31. Derate above 25°C at the following rates: F package at 11. unless otherwise specified.5 to +15 0 to +30 500 200 UNIT V V V mA mA NOTES: 1.30 1.Philips Semiconductors Linear Products Product specification Addressable relay driver NE/SA5090 ABSOLUTE MAXIMUM RATINGS TA=25°C.1 SYMBOL PARAMETER Input voltage VIH VIL VOL High Low Output voltage Low Input current IIH IIL IOH ICCL ICCH PD High Low Leakage current Supply current All outputs low All outputs high Power dissipation No output load VCC=5. 0°C ≤TA ≤ +70°C.75V to 5. max) 1712 1315 0 to +70 150 -65 to +150 300 mW mW °C °C °C °C PARAMETER RATING -0.0 5 10 -250 250 µA µA IOL=150mA. unless otherwise specified.25V 35 22 60 50 315 mW mA VIN=VCC VIN=0V VOUT=28V.5 to +7 -0.50 V 2. 1994 514 . TA=25°C Over temperature 1.8 V TEST CONDITIONS LIMITS Min Typ Max UNIT NOTES: 1. TA=25°C (still-air)1 N package D package TA TJ TSTG TSOLD Ambient temperature range Junction temperature Storage temperature range Lead soldering temperature (10sec. SYMBOL VCC VIN VOUT IGND IOUT PD Supply voltage Input voltage Output voltage Ground current Output current Each output Maximum power dissipation.1mW/°C N package at 13.5mW/°C DC ELECTRICAL CHARACTERISTICS VCC = 4.0 -3.

VOUT=5V. respectively. The thermal resistances are 83°C.92. 1994 515 . The NE5090 has active-Low. The maximum die junction temperature must be limited to 165°C. August 31. 6. all of which are cleared when power is first applied. and 10mA. High Current Outputs The obvious advantage of this device over other drivers such as the 9334 and N74LS259 is the fact that the outputs of the NE5090 are each capable of 200mA and 28V. Enable-to-Output and Enable Pulse Width timing diagram. The graphs of total load power vs ambient temperature would also give us this same information. Demultiplexer Operation By holding the CLR and CE inputs Low and the ”D“ input High.4°C Cerdip TJ =50+72. and 0.25W. Data-to-Output timing diagram. holding the CLR input High. See Setup and Hold Time.9.4°C Thus we find that TJ for either package is below the 165°C maximum and either package could be used in this application. are 100. IOUT=100MA. Address-to-Output timing diagram.7. TA=25°C. 50.5mW. we find from the graph of output voltage vs load current that the output voltages are expected to be about 0. See Turn-Off Delay. the addressed output will remain on and all other outputs will be off. 40. 0. Total device power due to these loads is found to be 473.7235=72. VIH=2. See Turn-On and Turn-Off Delays. Address-to-Enable timing diagram. when on. 1. however. Using the equations above we find: Plastic TR=83×0. 30.5. Since the total power dissipation is limited by the package to 1W. SYMBOL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL PARAMETER Propagation delay time Low-to-high1 High-to-low1 Low-to-high2 Output High-to-low2 Low-to-high3 Output High-to-low3 Low-to-high4 Output High-to-low4 Setup time high Setup time low Address setup time Hold time high Hold time low Chip enable pulse width1 Chip enable Chip enable Chip enable Chip enable Chip enable High data Low data Address High data Low data 40 50 40 10 10 40 CLR Address 130 920 260 1850 ns Data 130 900 260 1800 ns Output CE 900 130 920 1800 260 1850 ns ns TO FROM MIN TYP MAX UNIT Switching setup requirements tS(H) tS(A) tH(H) tPW(E) ns ns ns ns NOTES: 1. it will remain so until addressed again.04. by holding the “D” input High to turn on the selected output. 0. 5. that the total power dissipation would be over 2. Once an output is turned on or off. if we are using the NE5090 in a plastic package in an application where the ambient temperature is never expected to rise above 50°C. and decreases as ambient temperature rises.4V.75W at room temperature. and bringing the CE input Low. Adding the 200mW due to the power supply brings total device power dissipation to 723. Clear-to-Output timing diagram. except the outputs can withstand 28V. and the output current at the 8 outputs. This device is identical to the NE590.5mW. and the temperature rise above ambient and the junction temperature are defined as: TR=θJA×PD TJ =TA+tR where For example. or until all outputs are cleared by bringing the CLR input Low while holding the CE input High. 15. VIL=0. although interpreting the graphs would not yield the same accuracy. 0.per W for plastic packages and 100°C per W for Cerdips. It must be noted.0V.7235=60°C Plastic TJ =50+60=100°C Cerdip TR=100×0.8V. 3. the total load power dissipation by the device is limited to 0. 0. 2.4=122. or by holding it Low to turn off. FUNCTIONAL DESCRIPTION This peripheral driver has latched outputs which hold the input date until cleared. See Setup Time. See Turn-On and Turn-Off Delays. open-collector outputs. 80.Philips Semiconductors Linear Products Product specification Addressable relay driver NE/SA5090 SWITCHING CHARACTERISTICS VCC=5V. 4. 200.78. 0. See Turn-On and Turn-Off Delays.75.5W if all 8 outputs were on together and carrying 200mA each. Addressable Latch Function Any given output can be turned on or off by presenting the address of the output to be set or cleared to the three address pins. Data-to-Enable timing diagram. and since power dissipation due to supply current is 0.

Data-to-Output A CLR tPLH tPHL Q tPLH Q A NOTE: Other Inputs: CE = L. D = H D CE Q NOTE: Other Inputs: CLR = H. CLR = H. A = Stable NOTE: Other Inputs: CE = I. Address-to-Enable August 31. A = Stable Turn-On and Turn-Off Delays. Address-to-Output tHH tHL tSH tSL Turn-Off Delays. CLR = L. Data-to-Enable Setup Time.Philips Semiconductors Linear Products Product specification Addressable relay driver NE/SA5090 TIMING DIAGRAMS D tPW CE tPW D tPLH tPLH Q tPHL Q tPHL NOTE: Other Inputs: CLR = H. Enable-to-Output and Enable Pulse Width Turn-On and Turn-Off Delays. Clear-to-Output A CE ÉÉÉÉÉÉ ÉÉÉÉÉÉ ÉÉÉÉÉÉ ÉÉÉÉÉÉ tS NOTE: Other Inputs: CLR = H Setup and Hold Time. 1994 516 . A = Stable ÉÉÉ ÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ Turn-On and Turn-Off Delays.

2 1.4 0 50 100 150 200 0 25 50 75 100 125 TEMPERATURE (oC) OUTPUT LOAD CURRENT (mA) August 31. A2 may be connected to the address bus if permitted by system design. 1994 517 .Philips Semiconductors Linear Products Product specification Addressable relay driver NE/SA5090 TYPICAL APPLICATIONS + 5V +5V TO 28V DATA BUS 4 + 5V D A2 A1 A0 5090 CE CLR Q0 Q1 Q2 Q3 Q0 Q5 Q6 Q7 D A2 A1 A0 5090 CE CLR Q0 Q1 Q2 Q3 Q0 Q5 Q6 Q7 + 5V RL Q0 Q1 Q2 Q 5090 Q3 0 Q5 CE Q6 Q7 +28V µP RELAY LOAD Driving Simple Loads IQ CONTROL CLEAR +5V +5V +5V D NOTE: A0.0 TOTAL LOAD POWER (W) OUTPUT VOLTAGE (V) N PACKAGE 0. A1.0 Total Load Power vs Temperature 1.50 F PACKAGE 0.6 70 C 0.25 0.75 0.8 0C 25 C 0. 555 3–BIT COUNTER A0 A1 A2 5090 CE CLR Interfacing With a Microprocessor System Q0 Q1 Q2 Q3 Q0 Q5 Q6 Q7 Operating in Demultiplex Mode TYPICAL PERFORMANCE CHARACTERISTICS Output Voltage vs Load Current 1.

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