You are on page 1of 115

[Type sidebar content. A sidebar is a standalone supplement to the main document. It is often aligned www.chetanasprojects.

com on the left or right of the page, or located at the top or bottom. Use the Text Box Tools tab to change the formatting of the sidebar text box. Type sidebar content. A sidebar is a standalone supplement to the main document. It is often aligned on the left or right of the page, or located at the top or bottom. Use the Text Box Tools tab to change the formatting of the sidebar text box.]

PROJECT REPORT ON Security integrated system based on wireless access protocol for industrial applications with SMS Alert System using GSM Modem



CHAPTER I 1.1) INTRODUCTION. 1.2) BLOCK DIAGRAM 1.3) BLOCK DIAGRAM OF POWER SUPPLY (POWER SUPPLY) 1.4) DESCRIPTION 1.4.1 ) Introduction to Embedded systems 1.4.2) Overview of Embedded System Architecture CHAPTER - II 2.1) WHAT IS GSM? 2.2) GSM-INTRODUCTION 2.2.1) GSM History 2.2.2) GSM System Architecture 2.2.3) Operation of GSM 2.2.4) Future of GSM CHAPTER- III 3.1) MICROCONTROLLERS 3.1.1) Futures of AT89C51 3.1.2) Description 3.1.3) FEATURES OF AT89C51 3.2) 8051 PIN DISCRIPTION 3.3) INPUT/OUTPUT PORTS (I/O PORTS) 3.4) PROGRAMMING THE FLASH CHAPTER - IV 4.1) SWITCH AND LED INTERFACING WITH THE MICRO CONTROLLER DEPARTMENT OF ECE, VBIT, I. 2 34 24 27 28 19 7 8 1 2 3 4 4.2) SERIAL COMMUNICATION 4.3) RS 232 CABLE 4.4) MAX 232 INTERFACING WITH MICRO CONTROLLER 39 42 43


4.5) LIQUID CRYSTAL DISPLAY 4.5.1) LCD Screen 4.5.2) LCD Initialization 4.4.3) Contrast control 4.4.4) LCD Inter facing with Microcontroller CHAPTER - V 5.1) EEPROM 5.1.1) Features of EEPROM 5.1.2) Description 5.1.3) I2C Bus background 5.2) KEY PAD 5.3) SENSORS CHAPTER - VI 6.1) WORKING PROCEDURE 6.2) ADVANTAGES 6.3) APPLICATIONS 6.4) SCHEMATIC DIAGRAM. 6.5) SCOPE FOR FURTHER ADV ANCEMENTS 6.6) CONCLUSION. 6.7) BIBILOGRAPHY. 6.8) APPENDIX



68 70 77 78 78 79 80 81 82 83


PAGE NO: 1.1 : Block Diagram 1.2 : Power supply 1.4 : Layered Architecture of a Embedded System 1.5 : Hardware of Embedded System 2.1 : Operation of GSM 2.2 : Outgoing call 2.3 : Incoming call 2.4 : Handovers 3.1 : Pin diagram 3.2 : Block diagram 3.3 : Oscillator Connections 3.4 : External Clock Drive Configuration 3.5 : Programming the Flash 3.6 : Verifying the Flash 4.1: Interfacing switch with the microcontroller 4.2: LED Interfacing with the microcontroller 4.3 : Switches and Pushbuttons 4.4: Pin diagram of MAX 232 IC

4.5 : MAX 232 Interfacing with the Microcontroller 4.6 : LCD Screen 4.7 : Procedure on 8-bit initialization 4.8 : Variable resistor 4.9 : LCD Interfacing with the Microcontroller 5.1 : Dip pin & SO Pin PAGE NO: 5.2: Logic Diagram 5.3: Memory Protection 5.4: I2C Protocol 5.5: AC Waveforms 5.6: Write Cycle Polling using ACK 5.7: Write Modes Sequence 5.8: Read Modes Sequence 5.8: calculator and telephone keypod 5.9: 4*3 Matrix Keypad Connections to Ports 5.10: Reed Switch 5.11: vibration detector 5.12: IR TX 5.13:IR RX 5.14: Application circuit 5.14: Arrangement sensor




PAGE NO: 3.1 : Port 3 Alternate Functions 3.2 : Topside mark and signature codes 3.3 : Flash Programming Modes 4.1 : TMOD Register 4.2 : Pins Functions 4.3 : LCD Basic Commands 5.1: Signal Names 5.2: Device Select Mode 5.3: Operating Modes


EEPROM- Electrically Erasable Programmable Read only memory. GSM-Global System For Mobile Communication. ISDN -Integrated Services Digital Networks. ATM-Asynchronous Transfer Mode. PAD-Packet Assemblers Dissemblers. CEPT-Conference of European Post and Telecommunication. ETSI-European telecommunication Standards Institute. SMS-Short Message Service. UMS-Unified Messaging Services. CLIP-Caller line identification presentation. CLIR-Caller line identification restriction. CUG-Closed user group. ME-Mobile Equipment. SIM-Subscriber Identity Module. BTS-Base Transceiver Station. BSC-Base Station Controller. MSC-Mobile Switching Center. HLR-Home Location Register. VLR-Visitor Location Register. AUC-Authentication Center. EIR-Equipment Identity Register. IMEI-International Mobile Equipment Identity. IMSI-International Mobile Subscriber Identity. BSS-Base Station Subsystem.

TMOD-Timer mode.


Security integrated system based on wireless access protocol for industrial applications with SMS Alert System using GSM Modem.




Security is primary concern for every one. This Project describes a design of effective security alarm system that can monitor an industry with eight different sensors. Unauthorized access, Fire accident, wall braking, IR detection, and fire detection can be monitored by the status of each individual sensor and is indicated with an LED. This LED shows whether the sensor has been activated and whether the wiring to the sensor is in order. Obviously, this burglar alarm also has an input to 'arm' the alarm, a tamper input and a couple of outputs to control a siren and Auto dialing system. The alarm is also fitted with a so-called 'panic button'.

The burglar alarm is built around the AT89C51 micro controller from Atmel. This micro controller provides all the functionality of the burglar alarm. It also takes care of filtering of the signals at the inputs. Only after an input has remained unchanged for 30 milliseconds, is this new signal level passed on for processing by the micro controller program. This time can be varied by adopting small changes in the source code.

A maximum of 8 sensors can be connected to the burglar alarm. A power supply voltage of +5 VDC is available for each sensor at the corresponding wiring terminals. Eight LEDs indicate the status of the corresponding sensors. When the alarm has been activated, the LED of the sensor that caused the alarm will light up, or flash in the event of a cable failure.



An embedded system is a combination of software and hardware to perform a dedicated task. Some of the main devices used in embedded products are Microprocessors and Microcontrollers. Microprocessors are commonly referred to as general purpose processors as they simply accept the inputs, process it and give the output. In contrast, a microcontroller not only accepts the data as inputs but also manipulates it, interfaces the data with various devices, controls the data and thus finally gives the result.

Security is the condition of being protected against danger or loss. In the general sense, security is a concept similar to safety. The word "security" in general usage is synonymous with "safety," but as a technical term "security" means that, something not only is secure but that it has been secured. One of the best options for providing good Created on 4/30/2013 13:22:00 a4/p4




16X2 LCD MAX232 8 9 C 5 1


I2C Protocol EEPROM

GSM Modem

Key Pad

Switches array Power Supply

Step Bridge Filter down Regulator Rectifier Circuit T/F Power supply to all sections DEPARTMENT OF ECE, VBIT, 13 I.

Fig 1.1 : Block Diagram

The input to the circuit is applied from the regulated power supply. The a.c. input i.e., 230V from the mains supply is step down by the transformer to 12V and is fed to a rectifier. The output obtained from the rectifier is a pulsating d.c voltage. So in order to get a pure d.c voltage, the output voltage from the rectifier is fed to a filter to remove any a.c components present even after rectification. Now, this voltage is given to a voltage regulator to obtain a pure constant dc voltage.

230V AC 50Hz

D.C Output

Step down transformer

Bridge Rectifier Filter Regulator

Fig 1.2 : Power supply Transformer: DEPARTMENT OF ECE, VBIT, I.

14 Usually, DC voltages are required to operate various electronic equipment and these voltages are 5V, 9V or 12V. But these voltages cannot be obtained directly. Thus the a.c input available at the mains supply i.e., 230V is to be brought down to the required voltage level. This is done by a transformer. Thus, a step down transformer is employed to decrease the voltage to a required level.

Rectifier: The output from the transformer is fed to the rectifier. It converts A.C. into pulsating D.C. The rectifier may be a half wave or a full wave rectifier. In this project, a bridge rectifier is used because of its merits like good stability and full wave rectification. Filter: Capacitive filter is used in this project. It removes the ripples from the output of rectifier and smoothens the D.C. Output received from this filter is constant until the mains voltage and load is maintained constant. However, if either of the two is varied, D.C. voltage received at this point changes. Therefore a regulator is applied at the output stage. Voltage regulator: As the name itself implies, it regulates the input applied to it. A voltage regulator is an electrical regulator designed to automatically maintain a constant voltage level. In this project, power supply of 5V and 12V are required. In order to obtain these voltage levels, 7805 and 7812 voltage regulators are to be used. The first number 78 represents positive supply and the numbers 05, 12 represent the required output voltage levels.



INTRODUCTION TO EMBEDDED SYSTEMS: An embedded system can be defined as a computing device that does a specific focused job. Appliances such as the air-conditioner, VCD player, DVD player, printer, fax machine, mobile phone etc. are examples of embedded systems. Each of these appliances will have a processor and special hardware to meet the specific requirement of the application along with the embedded software that is executed by the processor for meeting that specific requirement. The embedded software is also called firm ware. The desktop/laptop computer is a general purpose computer. You can use it for a variety of applications such as playing games, word processing, accounting, software development and so on. In contrast, the software in the embedded systems is always fixed listed below: Embedded systems do a very specific task, they cannot be programmed to do different things. . Embedded systems have very limited resources, particularly the memory. Generally, they do not have secondary storage devices such as the CDROM or the floppy disk. Embedded systems have to work against some deadlines. A specific job has to be completed within a specific time. In some embedded systems, called real-time systems, the deadlines are stringent. Missing a deadline may cause a catastrophe-loss of life or damage to property. Embedded systems are constrained for power. As many embedded systems operate through a battery, the power consumption has to be very low. Some embedded systems have to operate in extreme environmental conditions such as very high temperatures and humidity.

Application Areas
Nearly 99 per cent of the processors manufactured end up in embedded systems. The embedded system market is one of the highest growth areas as these systems are used in


16 very market segment- consumer electronics, office automation, industrial automation, biomedical engineering, wireless communication, data communication, telecommunications, transportation, military and so on.
Consumer appliances: Office automation: Industrial automation: Medical electronics: Computer networking:. Telecommunications: Wireless technologies: Insemination: Security & Finance:

Overview of Embedded System Architecture

Every embedded system consists of custom-built hardware built around a Central Processing Unit (CPU). This hardware also contains memory chips onto which the software is loaded. The software residing on the memory chip is also called the firmware. The embedded system architecture can be represented as a layered architecture as shown in Fig.

Fig 1.4 : Layered Architecture of a Embedded System DEPARTMENT OF ECE, VBIT, I. 17

The operating system runs above the hardware, and the application software runs above the operating system. The same architecture is applicable to any computer including a desktop computer. However, there are significant differences. It is not compulsory to have an operating system in every embedded system. For small appliances such as remote control units, air conditioners, toys etc., there is no need for an operating system and you can write only the software specific to that application. Now, let us see the details of the various building blocks of the hardware of an embedded system. As shown in Fig. the building blocks are;

Central Processing Unit (CPU) Memory (Read-only Memory and Random Access Memory) Input Devices Output devices Communication interfaces Application-specific circuitry



Fig 1.5 : Hardware of Embedded System

It is a globally accepted standard for digital cellular communication. GSM is the name of standardization group established in 1982 to create a common European mobile


19 telephone standard that would formulate specifications for a pan-European mobile cellular radio system operating at 900MHZ. Throughout the evolution of cellular telecommunications, various systems have been developed without the benefit of standardized specification. This presented many problems directly related to compatibility, especially with the development of digital radio technology. The GSM standard is intended to address these problems.

GSM-Introduction Architecture Technical Specifications Frame Structure Channels

Security Characteristics and features Applications

Global System for Mobile (GSM) is a second generation cellular standard developed to cater voice services and data delivery using digital modulation.

Developed by Group Special Mobile (founded 1982) which was an CEPT (Conference of European Post and Telecommunication) Aim : to replace the incompatible analog system DEPARTMENT OF ECE, VBIT, I. 20 initiative of Presently the responsibility of GSM standardization resides with special mobile group under ETSI ( European telecommunication Standards Institute ) Full set of specifications phase-I became available in 1990 Under ETSI, GSM is named as Global System for Mobile communication Today many providers all over the world use GSM (more than 135 Countries in Asia, Africa, Europe, Australia, America) More than 1300 million subscribers in world and 45 million subscribers in India.

GSM System Architecture.

Mobile Station (MS) Mobile Equipment (ME) Subscriber Identity Module (SIM) Base Station Subsystem (BSS) Base Transceiver Station (BTS) Base Station Controller (BSC) Network Switching Subsystem(NSS) Mobile Switching Center (MSC) Home Location Register (HLR) Visitor Location Register (VLR) Authentication Center (AUC) Equipment Identity Register (EIR)

System Architecture Mobile Station (MS) The Mobile Station is made up of two entities: 1. Mobile Equipment (ME) DEPARTMENT OF ECE, VBIT, I.

21 2. Subscriber Identity Module (SIM) Mobile Equipment Portable,vehicle mounted, hand held device Uniquely identified by an IMEI (International Mobile Equipment Identity) Voice and data transmission Monitoring power and signal quality of surrounding cells for optimum handover Power level : 0.8W 20 W 160 character long SMS. Subscriber Identity Module (SIM) Smart card contains the International Mobile Subscriber Identity (IMSI) Allows user to send and receive calls and receive other subscribed services Encoded network identification details - Key Ki,Kc and A3,A5 and A8 algorithms Protected by a password or PIN Can be moved from phone to phone contains key information to activate the phone System Architecture Base Station Subsystem (BSS) Base Station Subsystem is composed of two parts that communicate across the standardized Abs interface allowing operation between components made by different suppliers 1. Base Transceiver Station (BTS) DEPARTMENT OF ECE, VBIT, I. 22 2. Base Station Controller (BSC) System Architecture Base Station Subsystem (BSS) Base Transceiver Station (BTS): Encodes,encrypts,multiplexes,modulates and feeds the RF signals to the antenna. Frequency hopping Communicates with Mobile station and BSC Consists of Transceivers (TRX) units Base Station Controller (BSC) Manages Radio resources for BTS Assigns Frequency and time slots for all MSs in its area Handles call set up Transcoding and rate adaptation functionality Handover for each MS Radio Power control It communicates with MSC and BTS System Architecture Network Switching Subsystem(NSS) Mobile Switching Center (MSC) Heart of the network Manages communication between GSM and other networks Call setup function and basic switching Call routing DEPARTMENT OF ECE, VBIT, I. 23 Billing information and collection Mobility management - Registration - Location Updating - Inter BSS and inter MSC call handoff MSC does gateway function while its customer roams to other network by using HLR/VLR. System Architecture Network Switching Subsystem Home Location Registers (HLR) - Permanent database about mobile subscribers in a large service area (generally one per GSM network operator) Database contains IMSI, MS ISDN, prepaid/postpaid, roaming restrictions, and supplementary services. Visitor Location Registers (VLR) Temporary database which updates whenever new MS enters its area, by HLR database Controls those mobiles roaming in its area Reduces number of queries to HLR Database contains IMSI, TMSI, MSISDN, MSRN, Location Area, authentication key Authentication Center (AUC) Protects against intruders in air interface Maintains authentication keys and algorithms and provides security triplets ( RAND, SRES, Kc) DEPARTMENT OF ECE, VBIT, I. 24 Generally associated with HLR

Equipment Identity Register (EIR) - Database that is used to track handsets using the IMEI (International Mobile Equipment Identity) Made up of three sub-classes: The White List, The Black List and the Gray List Only one EIR per PLMN

GSM Specifications-1 RF Spectrum GSM 900 Mobile to BTS (uplink): Bandwidth : 2* 25 Mhz GSM 1800 Mobile to BTS (uplink): 1710-1785 Mhz BTS to Mobile(downlink) 1805-1880 Mhz Bandwidth : 2* 75 Mhz GSM Specification-II Carrier Separation : 200 Khz Duplex Distance : 45 Mhz 890-915 Mhz BTS to Mobile(downlink):935-960 Mhz

No. of RF carriers : 124 Access Method : TDMA/FDMA

Modulation Method : GMSK Modulation data rate : 270.833 Kbps DEPARTMENT OF ECE, VBIT, I. 25


Fig 2.1 : Operation of GSM DEPARTMENT OF ECE, VBIT, I. 26

Call Routing Call Originating from MS Call termination to MS

Outgoing Call

Fig 2.2 : Outgoing call DEPARTMENT OF ECE, VBIT, I. 27

1. 2. 3. 4 5 6.

MS sends dialed number to BSS BSS sends dialed number to MSC MSC checks VLR if MS is allowed the requested service. If so, MSC asks BSS MSC routes the call to GMSC GMSC routes the call to local exchange of called user Answer back (ring back) tone is routed from called user to MS via GMSC, MSC, BSS

to allocate resources for call.

Incoming Call


28 Fig 2.3 : Incoming call 1. Calling a GSM subscribers 2. Forwarding call to GSMC 3. Signal Setup to HLR 4. 5. Request MSRN from VLR 6. Forward responsible MSC to GMSC 7. Forward Call to current MSC 8. 9. Get current status of MS 10. 11. Paging of MS 12. 13. MS answers 14. 15. Security checks 16. 17. Set up connection Handovers



Fig 2.4 : Handovers

Between 1 and 2 Inter BTS / Intra BSC Between 1 and 3 Inter BSC/ Intra MSC Between 1 and 4 Inter MS


30 Security in GSM On air interface, GSM uses encryption and TMSI instead of IMSI. SIM is provided 4-8 digit PIN to validate the ownership of SIM 3 algorithms are specified : - A3 algorithm for authentication - A5 algorithm for encryption - A8 algorithm for key generation Characteristics of GSM Standard Fully digital system using 900,1800 MHz frequency band. TDMA over radio carriers(200 KHz carrier spacing. 8 full rate or 16 half rate TDMA channels per carrier. User/terminal authentication for fraud control. Encryption of speech and data transmission over the radio path. Full international roaming capability. Low speed data services (upto 9.6 Kb/s). Compatibility with ISDN. Support of Short Message Service (SMS).

Advantages of GSM over Analog system: Capacity increases Reduced RF transmission power and longer battery life. International roaming capability. Better security against fraud (through terminal validation and user authentication). DEPARTMENT OF ECE, VBIT, I. 31 Encryption capability for information security and privacy. Compatibility with ISDN,leading to wider range of services GSM Applications Mobile telephony GSM-R Telemetry System - Fleet management - Automatic meter reading - Toll Collection - Remote control and fault reporting of DG sets Value Added Services Future Of GSM 2nd Generation GSM -9.6 Kbps (data rate) 2.5 Generation ( Future of GSM) HSCSD (High Speed ckt Switched data) Data rate : 76.8 Kbps (9.6 x 8 kbps) GPRS (General Packet Radio service) Data rate: 14.4 - 115.2 Kbps EDGE (Enhanced data rate for GSM Evolution) Data rate: 547.2 Kbps (max) 3 Generation WCDMA(Wide band CDMA) Data rate : 0.348 2.0 Mbps DEPARTMENT OF ECE, VBIT, I. 32


Microprocessors and microcontrollers are widely used in embedded systems products. Microcontroller is a programmable device. A microcontroller has a CPU in addition to a fixed amount of RAM, ROM, I/O ports and a timer embedded all on a single chip. The fixed amount of on-chip ROM, RAM and number of I/O ports in microcontrollers makes them ideal for many applications in which cost and space are critical. The Intel 8051 is a Harvard architecture, single chip microcontroller (C) which was developed by Intel in 1980 for use in embedded systems. It was popular in the 1980s and early 1990s, but today it has largely been superseded by a vast range of enhanced devices with 8051-compatible processor cores that are manufactured by more than 20 independent manufacturers including Atmen, Inline Technologies and Maxim Integrated Products.


33 8051 is an 8-bit processor, meaning that the CPU can work on only 8 bits of data at a time. Data larger than 8 bits has to be broken into 8-bit pieces to be processed by the CPU. 8051 is available in different memory types such as UV-EPROM, Flash and NVRAM. The microcontroller used in this project is AT89C51. Atmen Corporation introduced this 89C51 microcontroller. This microcontroller belongs to 8051 family. This

microcontroller had 128 bytes of RAM, 4K bytes of on-chip ROM, two timers, one serial port and four ports (each 8-bits wide) all on a single chip. AT89C51 is Flash type 8051. The present project is implemented on Kiel Vision. In order to program the device, Preload tool has been used to burn the program onto the microcontroller. The features, pin description of the microcontroller and the software tools used are discussed in the following sections. FEATURES OF AT89C51: 4K Bytes of Re-programmable Flash Memory. RAM is 128 bytes. 2.7V to 6V Operating Range. Fully Static Operation: 0 Hz to 24 MHz.


34 Two-level Program Memory Lock. 128 x 8-bit Internal RAM. 32 Programmable I/O Lines. Two 16-bit Timer/Counters. Six Interrupt Sources. Programmable Serial UART Channel. Low-power Idle and Power-down Modes.

Description: The AT89C51 is a low-voltage, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash programmable memory. The device is manufactured using Atmens high-density nonvolatile memory technology and is compatible with the industry-standard MCS-51 instruction set. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmen AT89C51 is a powerful microcomputer, which provides a highly flexible and cost-effective solution to many embedded control applications.


35 In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The power-down mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.



Fig 3.1 : Pin diagram



Fig 3.2 : Block diagram



Vcc Pin 40 provides supply voltage to the chip. The voltage source is +5V. GND Pin 20 is the ground. XTAL1 and XTAL2 XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier that can be configured for use as an on-chip oscillator, as shown in Figure 11. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven, as shown in the below figure. There are no requirements on the duty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed.



Fig 3.3 : Oscillator Connections C1, C2 = 30 pF 10 pF for Crystals

= 40 pF 10 pF for Ceramic Resonators Fig 3.4 : External Clock Drive Configuration DEPARTMENT OF ECE, VBIT, I. 40 RESET Pin9 is the reset pin. It is an input and is active high. Upon applying a high pulse to this pin, the microcontroller will reset and terminate all the activities. This is often referred to as a power-on reset. EA (External access) Pin 31 is EA. It is an active low signal. It is an input pin and must be connected to either Vcc or GND but it cannot be left unconnected. The 8051 family members all come with on-chip ROM to store programs. In such cases, the EA pin is connected to Vcc. If the code is stored on an external ROM, the EA pin must be connected to GND to indicate that the code is stored externally. PSEN (Program store enable) This is an output pin. ALE (Address latch enable) This is an output pin and is active high.



Ports 0, 1, 2 and 3 The four ports P0, P1, P2 and P3 each use 8 pins, making them 8-bit ports. All the ports upon RESET are configured as input, since P0-P3 have value FFH on them.

Port 0(P0) Port 0 is also designated as AD0-AD7, allowing it to be used for both address and data. ALE indicates if P0 has address or data. When ALE=0, it provides data D0-D7, but when ALE=1, it has address A0-A7. Therefore, ALE is used for demultiplexing address and data with the help of an internal latch. When there is no external memory connection, the pins of P0 must be connected to a 10K-ohm pull-up resistor. This is due to the fact that P0 is an open drain. With external pull-up resistors connected to P0, it can be used as a simple I/O, just like P1 and P2. But the ports P1, P2 and P3 do not need any pull-up resistors since they already have pull-up resistors internally. Upon reset, ports P1, P2 and P3 are configured as input ports. Port 1 and Port 2


42 With no external memory connection, both P1 and P2 are used as simple I/O. With external memory connections, port 2 must be used along with P0 to provide the 16-bit address for the external memory. Port 2 is designated as A8-A15 indicating its dual function. While P0 provides the lower 8 bits via A0-A7, it is the job of P2 to provide bits A8-A15 of the address. Port 3: Port 3 occupies a total of 8 pins, pins 10 through 17. It can be used as input or output. P3 does not need any pull-up resistors, the same as port 1 and port 2. Port 3 has an additional function of providing some extremely important signals such as interrupts.

Table 3.1 : Port 3 Alternate Functions



43 The AT89C51 is normally shipped with the on-chip Flash memory array in the erased state (that is, contents = FFH) and ready to be programmed. The programming interface accepts either a high-voltage (12-volt) or a low-voltage (VCC) program enable signal. The low-voltage programming mode provides a convenient way to program the AT89C51 inside the users system, while the high-voltage programming mode is compatible with conventional third party Flash or EPROM programmers. The AT89C51 is shipped with either the high-voltage or low-voltage programming mode enabled. The respective top-side marking and device signature codes are listed in the following table.

Table 3.2 : Topside mark and signature codes The AT89C51 code memory array is programmed byte-byte in either programming mode. To program any nonblank byte in the on-chip Flash Memory, the entire memory must be erased using the Chip Erase Mode. Programming Algorithm: DEPARTMENT OF ECE, VBIT, I. 44 Before programming the AT89C51, the address, data and control signals should be set up according to the Flash programming mode table. To program the AT89C51, the following steps should be considered: 1. Input the desired memory location on the address lines. 2. Input the appropriate data byte on the data lines. 3. Activate the correct combination of control signals. 4. Raise EA/VPP to 12V for the high-voltage programming mode. 5. Pulse ALE/PROG once to program a byte in the Flash array or the lock bits. The bytewrite cycle is self-timed and typically takes no more than 1.5 ms. Repeat steps 1 through 5, changing the address and data for the entire array or until the end of the object file is reached. Data Polling: The AT89C51 features Data Polling to indicate the end of a write cycle. During a write cycle, an attempted read of the last byte written will result in the complement of the written datum on PO.7. Once the write cycle has been completed, true data are valid on all outputs, and the next cycle may begin. Data Polling may begin any time after a write cycle has been initiated. Ready/Busy: DEPARTMENT OF ECE, VBIT, I.

45 The progress of byte programming can also be monitored by the RDY/BSY output signal. P3.4 is pulled low after ALE goes high during programming to indicate BUSY. P3.4 is pulled high again when programming is done to indicate READY. Chip Erase: The entire Flash array is erased electrically by using the proper combination of control signals and by holding ALE/PROG low for 10 ms. The code array is written with all 1s. The chip erase operation must be executed before the code memory can be reprogrammed. Reading the Signature Bytes: The signature bytes are read by the same procedure as a normal verification of locations 030H, 031H, and 032H, except that P3.6 and P3.7 must be pulled to a logic low. The values returned are as follows. (030H) = 1EH indicates manufactured by Atmel (031H) = 51H indicates 89C51 (032H) = FFH indicates 12V programming (032H) = 05H indicates 5V programming Programming Interface: DEPARTMENT OF ECE, VBIT, I. 46 Every code byte in the Flash array can be written and the entire array can be erased by using the appropriate combination of control signals. The write operation cycle is self timed and once initiated, will automatically time itself to completion. All major programming vendors offer worldwide support for the Atmel microcontroller series.

Table 3.3 : Flash Programming Modes



Fig 3.5 : Programming the Flash



Fig 3.6 : Verifying the Flash





Switches and LEDs are the most widely used input/output devices of the 8051. SWITCH INTERFACING: CPU accesses the switches through ports. Therefore these switches are connected to a microcontroller. This switch is connected between the supply and ground terminals. A single microcontroller (consisting of a microprocessor, RAM and EEPROM and several ports all on a single chip) takes care of hardware and software interfacing of the switch. These switches are connected to an input port. When no switch is pressed, reading the input port will yield 1s since they are all connected to high (Vcc). But if any switch is pressed, one of the input port pins will have 0 since the switch pressed provides the path to ground. It is the function of the microcontroller to scan the switches continuously to detect and identify the switch pressed. The switches that we are using in our project are 4 leg micro switches of momentary type.




R P2.0

Gnd Fig 4.1: Interfacing switch with the microcontroller Thus now the two conditions are to be remembered: 1. When the switch is open, the total supply i.e., Vcc appears at the port pin P2.0 P2.0 = 1 2. When the switch is closed i.e., when it is pressed, the total supply path is provided to ground. Thus the voltage value at the port pin P2.0 will be zero. P2.0 = 0 By reading the pin status, the microcontroller identifies whether the switch is pressed or not. When the switch is pressed, the corresponding related to this switch press written in the program will be executed. LED INTERFACING: LED stands for Light Emitting Diode.


51 Microcontroller port pins cannot drive these LEDs as these require high currents to switch on. Thus the positive terminal of LED is directly connected to Vcc, power supply and the negative terminal is connected to port pin through a current limiting resistor. This current limiting resistor is connected to protect the port pins from sudden flow of high currents from the power supply. Thus in order to glow the LED, first there should be a current flow through the LED. In order to have a current flow, a voltage difference should exist between the LED terminals. To ensure the voltage difference between the terminals and as the positive terminal of LED is connected to power supply Vcc, the negative terminal has to be connected to ground. Thus this ground value is provided by the microcontroller port pin. This can be achieved by writing an instruction CLR P1.0. With this, the port pin P1.0 is initialized to zero and thus now a voltage difference is established between the LED terminals and accordingly, current flows and therefore the LED glows. LED and switches can be connected to any one of the four port pins.

Vcc P1.0

Fig 4.2: LED Interfacing with the microcontroller



Light-emitting diode (LED)

Light-emitting diodes are elements for light signalization in electronics. They are manufactured in different shapes, colors and sizes. For their low price, low consumption and simple use, they have almost completely pushed aside other light sources- bulbs at first place. They perform similar to common diodes with the difference that they emit light when current flows through them.

It is important to know that each diode will be immediately destroyed unless its current is limited. This means that a conductor must be connected in parallel to a diode. In order to correctly determine value of this conductor, it is necessary to know diodes voltage drop in forward direction, which depends on what material a diode is made of and what colour it is. Values typical for the most frequently used diodes are shown in table below: As seen, there are three main types of LEDs. Standard ones get ful brightness at current of 20mA. Low Current diodes get ful brightness at ten times lower current while Super Bright diodes produce more intensive light than Standard ones. DEPARTMENT OF ECE, VBIT, I. 53 Since the 8051 microcontrollers can provide only low input current and since their pins are configured as outputs when voltage level on them is equal to 0, direct connectining to LEDs is carried out as it is shown on figure (Low current LED, cathode is connected to output pin).

Switches and Pushbuttons

There is nothing simpler than this! This is the simplest way of controlling appearance of some voltage on microcontrollers input pin. There is also no need for additional explanation of how these components operate.

Fig 4.3 : Switches and Pushbuttons

Nevertheless, it is not so simple in practice... This is about something commonly unnoticeable when using these components in everyday life. It is about contact bounce- a common problem with m e c h a n i c a l switches. If contact switching does not happen so quickly, several consecutive bounces can be noticed prior to maintain stable state. The reasons for this are: vibrations, slight rough spots and dirt. Anyway, whole this process does not last long (a few micro- or miliseconds), but long enough to be registered by the microcontroller. Concerning pulse counter, error occurs in almost 100% of cases!



The simplest solution is to connect simple RC circuit which will suppress each quick voltage change. Since the bouncing time is not defined, the values of elements are not strictly determined. In the most cases, the values shown on figure are sufficient. If complete safety is needed, radical measures should be taken! The circuit, shown on the figure (RS flip-flop), changes logic state on its output with the first pulse triggered by contact bounce. Even though this is more expensive solution (SPDT switch), the problem is definitely resolved! Besides, since the condensator is not used, very short pulses can be also registered in this way. In addition to these hardware solutions, a simple software solution is commonly applied too: when a program tests the state of some input pin and finds changes, the check should be done one more time after certain time delay. If the change is confirmed it means that switch (or pushbutton) has changed its position. The advantages of such solution are obvious: it is free of charge, effects of disturbances are eliminated too and it can be adjusted to the worst-quality contacts.


The main requirements for serial communication are: 1. Microcontrleur DEPARTMENT OF ECE, VBIT, I. 55 2. PC 3. RS 232 cable 4. MAX 232 IC 5. HyperTerminal When the pins P3.0 and P3.1 of microcontroller are set, UART, which is inbuilt in the microcontroller, will be enabled to start the serial communication.

TIMERS: The 8051 has two timers: Timer 0 and Timer 1. They can be used either as timers to generate a time delay or as counters to count events happening outside the microcontroller. Both Timer 0 and Timer 1 are 16-bit wide. Since the 8051 has an 8-bit architecture, each 16-bit timer is accessed as two separate registers of low byte and high byte. Lower byte register of Timer 0 is TL0 and higher byte is TH0. Similarly lower byte register of Timer1 is TL1 and higher byte register is TH1.

TMOD (timer mode) register:

Both timers 0 and 1 use the same register TMOD to set the various operation modes. TMOD is an 8-bit register in which the lower 4 bits are set aside for Timer 0 and the upper 4 bits for Timer 1. In each case, the lower 2 bits are used to set the timer mode and the upper 2 bits to specify the operation. (MSB) DEPARTMENT OF ECE, VBIT, I. (LSB) 56









TIMER 1 Table 4.1 : TMOD Register


GATE Every timer has a means of starting and stopping. Some timers do this by software, some by hardware and some have both software and hardware controls. The timers in the 8051 have both. The start and stop of the timer are controlled by the way of software by the TR (timer start) bits TR0 and TR1. These instructions start and stop the timers as long as GATE=0 in the TMOD register. The hardware way of starting and stopping the timer by an external source is achieved by making GATE=1 in the TMOD register. C/T Timer or counter selected. Cleared for timer operation and set for counter operation. M1 Mode bit 1 M0 Mode bit 0 DEPARTMENT OF ECE, VBIT, I. 57 M1 0 M0 0 Mode 0 Operating Mode 13-bit timer mode 8-bit timer/counter THx with TLx as 5-bit prescaler 0 1 1 16-bit timer mode 16-bit timer/counters THx and TLx are cascaded 1 0 2 8-bit auto reload timer/counter THx holds a value that is to be reloaded into TLx each time it overflows 1 1 3 Split timer mode

The mode used here to generate a time delay is MODE 2. This mode 2 is an 8-bit timer and therefore it allows only values of 00H to FFH to be loaded into the timers register TH. After TH is loaded with the 8-bit value, the 8051 give a copy of it to TL. When the timer starts, it starts to count up by incrementing the TL register. It counts up until it reaches its limit of FFH. When it rolls over from FFH to 00H, it sets high the TF (timer flag). If Timer 0 is used, TF0 goes high and if Timer 1 is used, TF1 goes high. When the TL register rolls from FFH to 0 and TF is set to 1, TL is reloaded automatically with the original value kept by the TH register. ASYNCHRONOUS AND SYNCHRONOUS SERIAL COMMUNICATION


58 Computers transfer data in two ways: parallel and serial. In parallel data transfers, often 8 or more lines are used to transfer data to a device that is only a few feet away. Although a lot of data can be transferred in a short amount of time by using many wires in parallel, the distance cannot be great. To transfer to a device located many meters away, the serial method is best suitable.

To allow compatibility among data communication equipment, an interfacing standard called RS232 is used. Since the standard was set long before the advent of the TTL logic family, its input and output voltage levels are not TTL compatible. For this reason, to connect any RS232 to a microcontroller system, voltage converters such as MAX232 are used to convert the TTL logic levels to the RS232 voltage levels and vice versa.

MAX 232:
Max232 IC is a specialized circuit which makes standard voltages as required by RS232 standards. This IC provides best noise rejection and very reliable against discharges and short circuits. MAX232 IC chips are commonly referred to as line drivers. To ensure data transfer between PC and microcontroller, the baud rate and voltage levels of Microcontroller and PC should be the same. The voltage levels of microcontroller are DEPARTMENT OF ECE, VBIT, I. 59 logic1 and logic 0 i.e., logic 1 is +5V and logic 0 is 0V. But for PC, RS232 voltage levels are considered and they are: logic 1 is taken as -3V to -25V and logic 0 as +3V to +25V. So, in order to equal these voltage levels, MAX232 IC is used. Thus this IC converts RS232 voltage levels to microcontroller voltage levels and vice versa.

Fig 4.4: Pin diagram of MAX 232 IC

SCON (serial control) register: The SCON register is an 8-bit register used to program the start bit, stop bit and data bits of data framing.


SM0 60







RI SM0 SM1 SM2 REN TB8 RB8 TI SCON.7 SCON.6 SCON.5 SCON.4 SCON.3 SCON.2 SCON.1 Serial port mode specifier Serial port mode specifier Used for multiprocessor communication Set/cleared by software to enable/disable reception Not widely used Not widely used Transmit interrupt flag. Set by hardware at the beginning of the stop bit in mode 1. Must be cleared by software. RI SCON.0 Receive interrupt flag. Set by hardware at the beginning of the stop bit in mode 1. Must be cleared by software.

SM0 0 0 1

SM1 0 1 0 Serial Mode 0 Serial Mode 1, 8-bit data, 1 stop bit, 1 start bit Serial Mode 2


61 1 1 Serial Mode 3

Of the four serial modes, only mode 1 is widely used. In the SCON register, when serial mode 1 is chosen, the data framing is 8 bits, 1 stop bit and 1 start bit, which makes it compatible with the COM port of IBM/ compatible PCs.



MAX 232
11 14 13 2

5 3

TxD ( P3.1)

RxD (P3.0)

10 0




LCD stands for Liquid Crystal Display. LCD is finding wide spread use replacing LEDs (seven segment LEDs or other multi segment LEDs) because of the following reasons:


62 1. The declining prices of LCDs. 2. The ability to display numbers, characters and graphics. This is in contrast to LEDs, which are limited to numbers and a few characters. 3. Incorporation of a refreshing controller into the LCD, thereby relieving the CPU of the task of refreshing the LCD. In contrast, the LED must be refreshed by the CPU to keep displaying the data. 4. Ease of programming for characters and graphics. These components are specialized for being used with the microcontrollers, which means that they cannot be activated by standard IC circuits. They are used for writing

Ldifferent messages on a miniature LCD. A model described here is for its low price and great possibilities most frequently used in practice. It is based on the HD44780 microcontroller ( Hitachi) and can display messages in two lines with 16 characters each . It displays all the alphabets, Greek letters, punctuation marks, mathematical symbols etc. In addition, it is possible to display symbols that user makes up on its own. Automatic shifting message on display (shift left and right), appearance of the pointer, backlight etc. are considered as useful characteristics. DEPARTMENT OF ECE, VBIT, I.

63 Pins Functions There are pins along one side of the small printed board used for connection to the microcontroller. There are total of 14 pins marked with numbers (16 in case the background light is built in). Their function is described in the table below: Pin Number 1 2 3 4 Logic State -

Function Ground Power supply Contrast

Name Vss Vdd Vee RS


Control of operating


6 7 8 9 10 11 12 13 14

E D0 D1 D2 D3 D4 D5 D6 D7

Data / commands

0V +5V 0 Vdd D0 D7 are interpreted as 0 commands 1 D0 D7 are interpreted as data Write data (from controller to 0 LCD) 1 Read data (from LCD to controller) 0 Access to LCD disabled 1 Normal operating From 1 to Data/commands are transferred to 0 LCD 0/1 Bit 0 LSB 0/1 Bit 1 0/1 Bit 2 0/1 Bit 3 0/1 Bit 4 0/1 Bit 5 0/1 Bit 6 0/1 Bit 7 MSB

Table 4.2 : Pins Functions

LCD screen: DEPARTMENT OF ECE, VBIT, I. 64 LCD screen consists of two lines with 16 characters each. Each character consists of 5x7 dot matrix. Contrast on display depends on the power supply voltage and whether messages are displayed in one or two lines. For that reason, variable voltage 0-Vdd is applied on pin marked as Vee. Trimmer potentiometer is usually used for that purpose. Some versions of displays have built in backlight (blue or green diodes). When used during operating, a resistor for current limitation should be used (like with any LE diode).

Fig 4.6 : LCD Screen


65 LCD Basic Commands All data transferred to LCD through outputs D0-D7 will be interpreted as commands or as data, which depends on logic state on pin RS: RS = 1 - Bits D0 - D7 are addresses of characters that should be displayed. Built in processor addresses built in map of characters and displays corresponding symbols. Displaying position is determined by DDRAM address. This address is either previously defined or the address of previously transferred character is automatically incremented. RS = 0 - Bits D0 - D7 are commands which determine display mode. List of commands which LCD recognizes are given in the table below: Command Clear display Cursor home Entry mode set Display on/off control Cursor/Display Shift Function set Set CGRAM address Set DDRAM address Read BUSY flag (BF) Write to CGRAM or DDRAM Read from CGRAM or DDRAM RS RW D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 I/ 0 0 0 1 D 0 0 1 D U 0 1 D/C R/L x 1 DL N F x CGRAM address DDRAM address DDRAM address 0 0 0 0 0 0 1 x S B x x Execution Time 1.64mS 1.64mS 40uS 40uS 40uS 40uS 40uS 40uS 40uS 40uS

0 0 0 0 0 0 0 0 0 1 1 BF

0 D7 D6 D5 D4 D3 D2 D1 D0 1 D7 D6 D5 D4 D3 D2 D1 D0

Table 4.3 LCD Basic Commands I/D 1 = Increment (by 1) 0 = Decrement (by 1) R/L 1 = Shift right 0 = Shift left 66

DEPARTMENT OF ECE, VBIT, I. S 1 = Display shift on 0 = Display shift off D 1 = Display on 0 = Display off U 1 = Cursor on 0 = Cursor off B 1 = Cursor blink on 0 = Cursor blink off DL 1 = 8-bit interface 0 = 4-bit interface N 1 = Display in two lines 0 = Display in one line F 1 = Character format 5x10 dots 0 = Character format 5x7 dots D/C 1 = Display shift 0 = Cursor shift

LCD Connection Depending on how many lines are used for connection to the microcontroller, there are 8-bit and 4-bit LCD modes. The appropriate mode is determined at the beginning of the process in a phase called initialization. In the first case, the data are transferred through outputs D0-D7 as it has been already explained. In case of 4-bit LED mode, for the sake of saving valuable I/O pins of the microcontroller, there are only 4 higher bits (D4-D7) used for communication, while other may be left unconnected. Consequently, each data is sent to LCD in two steps: four higher bits are sent first (that normally would be sent through lines D4-D7), four lower bits are sent afterwards. With the help of initialization, LCD will correctly connect and interpret each data received. Besides, with regards to the fact that data are rarely read from LCD (data mainly are transferred from microcontroller to LCD) one more I/O pin may be saved by simple connecting R/W pin to the Ground. Such saving has its price. Even though DEPARTMENT OF ECE, VBIT, 67 I. message displaying will be normally performed, it will not be possible to read from busy flag since it is not possible to read from display. LCD Initialization Once the power supply is turned on, LCD is automatically cleared. This process lasts for approximately 15mS. After that, display is ready to operate. The mode of operating is set by default. This means that: 1. Display is cleared 2. Mode DL = 1 Communication through 8-bit interface N = 0 Messages are displayed in one line F = 0 Character font 5 x 8 dots 3. Display/Cursor on/off D = 0 Display off U = 0 Cursor off B = 0 Cursor blink off 4. Character entry DEPARTMENT OF ECE, VBIT, I. 68 ID = 1 Addresses on display are automatically incremented by 1 S = 0 Display shift off

Fig 4.7 : Procedure on 8-bit initialization. CONTRAST CONTROL:


69 To have a clear view of the characters on the LCD, contrast should be adjusted. To adjust the contrast, the voltage should be varied. For this, a preset is used which can behave like a variable voltage device. As the voltage of this preset is varied, the contrast of the LCD can be adjusted.

Fig 4.8 : Variable resistor Potentiometer Variable resistors used as potentiometers have all three terminals connected. This arrangement is normally used to vary voltage, for example to set the switching point of a circuit with a sensor, or control the volume (loudness) in an amplifier circuit. If the terminals at the ends of the track are connected across the power supply, then the wiper terminal will provide a voltage which can be varied from zero up to the maximum of the supply.

Potentiometer Symbol




Preset Symbol


P2.0 P2.1 P2.2

4 (RS) 5 (R/W) 6(EN) LCD

1 2 3

Vcc Gnd



P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7

D0 D1 D2 D3 D4 D5 D6 D7

15 16

Vcc Gnd




Fig 4.9 : LCD


In the design of all microprocessors-based systems, semiconductor memories are used as primary storage for code and data. Semiconductor memories are connected directly to the CPU and they are the memory that the CPU first asks for information (code and data). For this reason, semiconductor memories are sometimes referred to as primary memory. Important Terminology common to all Semiconductor Memories: Memory capacity: Memory organization: Speed: DEPARTMENT OF ECE, VBIT, I. 72 EEPROM (Electrically Erasable Programmable Read only memory) EEPROM has several advantages over other memory devices, such as the fact that its method of erasure is electrical and therefore instant. In addition, in EEPROM one can select which byte to be erased, in contrast to flash , in which the entire contents of ROM are erased. The main advantage of EEPROM is that one can program and erase its contents while it is in system board. It does not require physical removal of the memory chip from its socket. In general, the cost per bit for EEPROM is much higher when compared to other devices. The EEPROM used in this project is 24C04 type.

Features of 24C04 EEPROM: 1 million erase/write cycles with 40 years data retention. Single supply voltage: 3v to 5.5v for st24x04 versions. 2.5v to 5.5v for st25x04 versions. Hardware write control versions: st24w04 and st25w04. Programmable write protection. Two wire serial interface, fully i2c bus compatible. Byte and multibyte write (up to 4 bytes). Page write (up to 8 bytes). Byte, random and sequential read modes Self timed programming cycle Automatic address incrementing 73

DEPARTMENT OF ECE, VBIT, I. Enhanced ESD/Latch up performances

DIP Pin Connections

SO Pin Connection Fig 5.1 : Dip pin & SO Pin

Table 5.1: Signal Names



Fig 5.2: Logic Diagram

DESCRIPTION The 24C04 is a 4 Kbit electrically erasable programmable memory (EEPROM), organized as 2 blocks of 256 x8 bits. They are manufactured in ST Microelectronics HiEndurance Advanced CMOS technology which guarantees an endurance of one million erase/write cycles with a data retention of 40 years. Both Plastic Dual-in-Line and Plastic Small Outline packages are available. The memories are compatible with the I2C standard, two wire serial interface which uses a bi-directional data bus and serial clock. The memories carry a built-in 4 bit, unique device identification code (1010) corresponding to the I2C bus definition. This is used together with 2 chip enable inputs (E2, E1) so that up to 4 x 4K devices may be attached to the I2C bus and selected individually. The memories behave as a slave device in the I2C protocol with all memory DEPARTMENT OF ECE, VBIT, I. 75 operations synchronized by the serial clock. Read and write operations are initiated by a START condition generated by the bus master. The START condition is followed by a stream of 7 bits (identification code 1010), plus one read/write bit and terminated by an acknowledge bit.

Table 5.2: Device Select Mode

Table 5.3: Operating Modes When writing data to the memory it responds to the 8 bits received by asserting an acknowledge bit during the 9th bit time. Power On Reset: VCC lock out write protect. DEPARTMENT OF ECE, VBIT, I. 76 In order to prevent data corruption and inadvertent write operations during power up, a Power On Reset (POR) circuit is implemented. Until the VCC voltage has reached the POR threshold value, the internal reset is active, all operations are disabled and the device will not respond to any command. In the same way, when VCC drops down from the operating voltage to below the POR threshold value, all operations are disabled and the device will not respond to any command. A stable VCC must be applied before applying any logic signal. SIGNAL DESCRIPTIONS Serial Clock (SCL). Serial Data (SDA). Chip Enable (E1 - E2) . Protect Enable (PRE). The PRE input pin, in addition to the status of the Block Address Pointer bit (b2, location 1FFh as in below figure), sets the PRE write protection active.

Fig 5.3: Memory Protection DEPARTMENT OF ECE, VBIT, I.


Mode (MODE). The MODE input is available on pin 7 and may be driven dynamically. It must be at VIL or VIH for the Byte Write mode, VIH for Multibyte Write mode or VIL for Page Write mode. When unconnected, the MODE input is internally read as VIH (Multibyte Write mode). Write Control (WC). An hardware Write Control feature (WC) is offered only for ST24W04 and ST25W04 versions on pin 7. This feature is useful to protect the contents of the memory from any erroneous erase/write cycle. The Write Control signal is used to enable (WC = VIH) or disable (WC =VIL) the internal write protection. When unconnected, the WC input is internally read as VIL and the memory area is not write protected.

DEVICE OPERATION I2C Bus Background The ST24/25x04 supports the I2C protocol. This protocol defines any device that sends data onto the bus as a transmitter and any device that reads the data as a receiver. The device that controls the data transfer is known as the master and the other as the slave. The master will always initiate a data transfer and will provide the serial clock for synchronization. The ST24/25x04 is always slave devices in all communications.



Fig 5.4: I2C Protocol Start Condition. START is identified by a high to low transition of the SDA line while the clock SCL is stable in the high state. A START condition must precede any command for data transfer. Except during a programming cycle, the ST24/25x04 continuously monitor the SDA and SCL signals for a START condition and will not respond unless one is given. Stop Condition. DEPARTMENT OF ECE, VBIT, I. 79 STOP is identified by a low to high transition of the SDA line while the clock SCL is stable in the high state. A STOP condition terminates communication between the ST24/25x04 and the bus master. A STOP condition at the end of a Read command, after and only after a No Acknowledge, forces the standby state. A STOP condition at the end of a Write command triggers the internal EEPROM write cycle. Acknowledge Bit (ACK). An acknowledge signal is used to indicate a successful data transfer. The bus transmitter, either master or slave, will release the SDA bus after sending 8 bits of data. During the 9th clock pulse period the receiver pulls the SDA bus low to acknowledge the receipt of the 8 bits of data. Data Input. During data input the ST24/25x04 sample the SDA bus signal on the rising edge of the clock SCL. Note that for correct device operation the SDA signal must be stable during the clock low to high transition and the data must change ONLY when the SCL line is low. Memory Addressing. To start communication between the bus master and the slave ST24/25x04, the master must initiate a START condition. Following this, the master sends onto the SDA bus line 8 bits (MSB first) corresponding to the device select code (7 bits) and a READ or WRITE bit. The 4 most significant bits of the device select code are the device type identifier, corresponding to the I2C bus definition. For these memories the 4 bits are fixed as 1010b. The following 2 bits identify the specific memory on the bus. They are matched to the chip enable signals E2, E1. Thus up to 4 x 4K memories can be connected on the same bus giving a memory capacity total of 16 Kilobits. After a START condition any memory on the bus will identify the device code and compare the following 2 bits to its chip enable inputs E2, E1. The 7th bit sent is the block number (one block = 256 DEPARTMENT OF ECE, VBIT, I. 80 bytes). The 8th bit sent is the read or write bit (RW), this bit is set to 1 for read and 0 for write operations. If a match is found, the corresponding memory will acknowledge the identification on the SDA bus during the 9th bit time.

Fig 5.5: AC Waveforms

Write Operations Byte Write. DEPARTMENT OF ECE, VBIT, I. 81 Multibyte Write. Page Write. Minimizing System Delays by Polling on ACK. During the internal write cycle, the memory disconnects itself from the bus in order to copy the data from the internal latches to the memory cells. The maximum value The Multibyte Write mode (only available on the ST24/25C04 versions) is selected when the MODE pin is at VIH and the Page Write mode when MODE pin is at VIL. The MODE pin may be driven dynamically with CMOS input levels. Following a START condition the master sends a device select code with the RW bit reset to 0. The memory acknowledges this and waits for a byte address. The byte address of 8 bits provides access to one block of 256 bytes of the memory. After receipt of the byte address the device again responds with an acknowledge. For the ST24/25W04 versions, any write command with WC = 1 will not modify the memory content.

The maximum value of the During the internal write cycle, the memory disconnects itself from the bus in order to of the write time (Tw) is given from the AC Characteristics, since the typical time is shorter, the time seen by the system may be reduced by an ACK polling sequence issued by the master.



Fig 5.6: Write Cycle Polling using ACK Data in the upper block of 256 bytes of the memory may be write protected. The memory is write protected between a boundary address and the top of memory (address 1FFh) when the PRE input pin is taken high and when the Protect Flag (bit b2 in location 1FFh) is set to 0. The boundary address is user defined by writing it in the Block Address Pointer. The Block Address Pointer is an 8 bit EEPROM register located at the address 1FFh. It is composed by 5 MSBs Address Pointer, which defines the bottom boundary address and 3 LSBs which must be programmed at 0. This Address Pointer can therefore address a boundary in steps of 8 bytes. DEPARTMENT OF ECE, VBIT, I. 83

The sequence to use the Write Protected feature is: write the data to be protected into the top of the memory, up to, but not including, location 1FFh; set the protection by writing the correct bottom boundary address in the Address Pointer (5 MSBs of location 1FFh) with bit b2 (Protect flag) set to 0. Note that for a correct functionality of the memory, all the 3 LSBs of the Block Address Pointer must also be programmed at 0. The area will now be protected when the PRE input pin is taken High. While the PRE input pin is read at 0 by the memory, the location 1FFh can be used as a normal EEPROM byte.

Fig 5.7: Write Modes Sequence



Read Operations Current Address Read. Random Address Read. Sequential Read. . Acknowledge in Read Mode. In all read modes the ST24/25x04 wait for an acknowledge during the 9th bit time. If the master does not pull the SDA line low during this time, the ST24/25x04 terminate the data transfer and switches to a standby state.



Fig 5.8: Read Modes Sequence

Keypads and LCDs are the most widely used input/output devices of the 8051 and a basic understanding of them is essential. The keypads are mainly three types: 1. 4*3 keypad 2. 4*4 keypad 3. 4*8 keypad. The keypad used in this project is 4*3 keypad.



Calculator keypad

Telephone keypad Fig 5.8: calculator and telephone keypod

INTERFACING THE KEYPAD TO 8051 At the lowest level, keyboards are organized in a matrix of rows and columns. The CPU accesses both rows and columns through ports. Therefore, with two 8-bit ports, an 8*8 matrix of keys can be connected to a microprocessor. When a key is pressed, a row and a column make a contact, otherwise there is no connection between rows and columns. A single microcontroller (consisting of a microprocessor, RAM, EPROM and several ports all on a single chip) takes care of hardware and software interfacing of the keypad. In such systems, it is the function of programs stored in EPROM of the microcontroller to scan the keys continuously, identify which one has been activated and present it to the motherboard.



Fig 5.9: 4*3 Matrix Keypad Connections to Ports Scanning and identifying the key: Grounding rows and reading the columns: To detect a pressed key, the microcontroller grounds all rows by providing 0 (zero) to the output latch, then it reads the columns. . It grounds the next row, reads the columns and checks for any zero. This process continues until the row is identified. After identification of the row in which the key has been pressed, the next task is to find out which column the pressed key belongs to. Now this will be easy since the microcontroller knows at any time which row and column are being accessed.

DEPARTMENT OF ECE, VBIT, I. 88 MAGNETIC SENSORS OR REED SWITCHES: The reed switch is an electrical switch operated by an applied magnetic field. The basic reed switch consists of two identical flattened ferromagnetic reeds, sealed in a dry inert-gas atmosphere within a glass capsule, thereby protecting the contact from contamination. The reeds are sealed in the capsule in such a way that their free ends overlap and are separated by a small air gap. Fig 5.10: Reed Switch

The contacts may be normally open, closing when a magnetic field is present, or normally closed and opening when a magnetic field is applied. A magnetic field from an electromagnet or a permanent magnet will cause the contacts to pull together, thus completing an electrical circuit. The stiffness of the reeds causes them to separate, and open the circuit, when the magnetic field ceases. Good electrical contact is assured by plating a thin layer of precious metal over the flat contact portions of the reeds. Since the contacts of the reed switch are sealed away from the atmosphere, they are protected against atmospheric corrosion. The hermetic sealing of a reed switch makes


89 them suitable for use in explosive atmospheres where tiny sparks from conventional switches would constitute a hazard.

A reed sensor is a device built using a reed switch with additional functionality like ability to withstand higher shock, easier mounting, additional intelligent circuitry, etc. In production, a metal reed is inserted in each end of a glass tube and the end of the tube heated so that it seals around a shank portion on the reed. Infrared-absorbing glass is used, so an infrared heat source can concentrate the heat in the small sealing zone of the glass tube. The thermal coefficient of expansion of the glass material and metal parts must be similar to prevent breaking the glass-to-metal seal. The glass used must have a high electrical resistance and must not contain volatile components such as lead oxide and fluorides. The leads of the switch must be handled carefully to prevent breaking the glass envelope. Uses: Reed switches are widely used for electrical circuit control, particularly in the communications field. Reed switches are commonly used in mechanical systems as proximity switches as well as in door and window sensors in burglar alarm systems and tamper proofing methods. These were formerly used in the keyboards for computer terminals, where each key had a magnet and a reed switch actuated by depressing the key. Speed sensors on bicycles use a reed switch to detect when the magnet on the wheel passes the sensor. Advantages: 1. They are hermetically sealed in glass environment.


90 2. Free from contamination, and are safe to use in harsh industrial and explosive environments. 3. Reed switches are immune to electrostatic discharge (ESD) and do not require any external ESD protection circuits. The isolation resistance between the contacts is as high as 1015 ohms, and contact resistance is as low as 50 milliohms. 4. They can directly switch loads as low as a few microwatts without the help of external amplification circuits, to as high as 120W. 5. When the reed switches are combined with magnets and coils, they can be used to form many different types of relays. Six reed switches are used in our project to indicate different levels of the petrochemical liquid in the process container. When the floating magnet comes in contact with any of the reed switches, magnetic field will be generated and the reeds are drawn together and thus the reed switch is triggered and this change is applied to the microcontroller for further processing. Vibration Detector: Here we use a ceramic piezoelectric buzzer plate for vibration detection. Piezoceramic buzzers generate sound through the bending vibrations of a thin metal plate adhered to a piezoceramic disc.

Fig 5.11: vibration detector DEPARTMENT OF ECE, VBIT, I. 91 These buzzers feature low power consumption, a safe, spark-free and non-contact structure, and a small size and light weight for an easy mounting to printed circuit boards. As a result, an increasing number of piezoceramic buzzers are now used to generate an artificial voice in combination with voice synthesizing ICs. To produce high-quality piezoceramic buzzers, FDK has capitalized on many years of piezoceramics production and outstanding ceramic processing technologies and thin film forming techniques. By adding a sophisticated audio know-how to this manufacturing expertise, FDK offers a large array of electronic tone generating products, such as piezoceramic diaphragms, sounders and buzzers, to meet loud sound outputs, wide frequency ranges, and many other requirements. We will be placing it at the door so that a small vibration at the door also can be detected.

The arrangement of this sensor in our project is as shown in the figure above which is sensed by the microcontroller. After sensing the signal the corresponding action is done by the microcontroller which is preprogrammed. Panic Switch: This is nothing but a simple switch which is connected in the sensor board.the arrangement of this is as shown in the figure below.



The response of this switch is monitored by the microcontroller and the corresponding action takes place. IR Section: IR Tx.:

Fig 5.12: IR TX TSAL6200 is a high efficiency infrared emitting diode in GaAlAs on GaAs technology, molded in clear, bluegrey tinted plastic packages. In comparison with the standard GaAs on GaAs technology these emitters achieve more than 100 % radiant power improvement at a similar wavelength. The forward voltages at low current and at high pulse current roughly correspond to the low values of the standard technology. Features Extra high radiant power and radiant intensity High reliability Low forward voltage Suitable for high pulse current operation Standard T-1 ( 5 mm) package Angle of half intensity = 17 Peak wavelength p = 940 nm Good spectral matching to Si photodetectors

Applications DEPARTMENT OF ECE, VBIT, I. 93 Infrared remote control units with high power requirements Free air transmission systems Infrared source for optical counters and card readers IR source for smoke detectors. IR Rx:

The TSOP17.. series are miniaturized receivers for infrared remote control systems. PIN diode and preamplifier are assembled on lead frame, the epoxy package is designed as IR filter. The demodulated output signal can directly be decoded by a microprocessor. TSOP17XX is the standard IR remote control receiver series, supporting all major transmission codes.

Features Photo detector and preamplifier in one package Internal filter for PCM frequency Improved shielding against electrical field disturbance TTL and CMOS compatibility Output active low Low power consumption High immunity against ambient light

Block Diagram



Fig 5.13:IR RX

Application Circuit

Fig 5.14: Application circuit Carrier frequency should be close to center frequency of the band pass (e.g. 38kHz). After each burst which is between 10 cycles and 70 cycles a gap time of at least 14 cycles is necessary. For each burst which is longer than 1.8ms a corresponding gap time is necessary at some time in the data stream. This gap time should have at least same length as the burst. DEPARTMENT OF ECE, VBIT, I. 95 Up to 1400 short bursts per second can be received continuously.

Fig 5.14: Arrangement sensor

1. Turn ON GSM modem &wait for 30 sec. 2. Switch ON the power supply. 3. Then switch ON the TOGGLE SWITCH in order to store the mobile numbers into EEPROM. 4. In this project we can store maximum of 4 mobile numbers into EEPROM with the help of keypad. 5. Here, in this project we are using three types of SENSORS i.e., VIBRATION SENSOR, MAGNETIC SENSOR & IR SENSOR. Depending upon the situations Corresponding sensor will be activated. For example: DEPARTMENT OF ECE, VBIT, I. 96 When coming to IR sensor, it is used for security purpose. Whenever the person wants to enter into the room, first he/she needs to enter the key i.e., CODE 2754 around 16 seconds. If he fails to enter the CODE within that delay then a message will be displayed as INVALID PERSON IN THE ROOM and through GSM, that corresponding message is sent to all. 6. If ever we want to change the numbers that are stored in our EEPROM, then we will switch ON the TOGGLE SWITCH and select the particular mode and enter the number through KEYPAD. In this way, we are able to provide full-fledged security to our homes, industries etc.

1) Sophisticated security 2) Monitors all hazards and threats 3) Alert message to mobile phone for remote information 4) Mobile number can be changed at any time

1) Banks DEPARTMENT OF ECE, VBIT, I. 97 2) Offices 3) Industries 4) Jeweler Shops and Home Applications

Schematic of GSM based security system:





Scopes for further Advancements:

Removable Battery can be connected to this system to enable it to work in power failure conditions also.



CONCLUSION: In this project work, we have studied and implemented a complete working model using a Microcontroller. The programming and interfacing of microcontroller has been mastered during the implementation. This work includes the study of GSM modem using sensors. The biggest advantage of using this project is , whatever the sensor is activated we will be getting the acknowledgement from GSM modem to our mobile numbers which are stored in EEPROM and GSM network operators have roaming facilities, user can often continue to use there mobile phones when they travel to other countries etc.



BIBLOGRAPHY: 1) WWW. 2) Embedded System By Raj Kamal 3) 8051 Microcontroller And Embedded Systems By Mazzidi 4) Magazines 5) Electronics for you 6) Electrikindia 7) 8) WWW.Electronic








#include"reg52.h" #include"string.h" #include"intrins.h" #include"EEPROM.h" #include"GSM.h"

sfr ldata = 0x90; //P1 #define keys P0 sbit buzzer = P2^4; sbit buzzer1 = P2^5; sbit rs = P2^0; sbit rw = P2^1; sbit en = P2^2; sbit ir = P3^3; sbit m1 = P3^4; sbit m2 = P3^5; sbit lock = P3^7; sbit alt = P3^2; sbit SCL=P2^7; sbit SDA=P2^6;


104 bit receive,received = 0; unsigned char buffer[35],Pno[10],ch,i,t,count,alert=1,vib=1; //////////////////////////////////////////////////////////////////////////////////////////////////////////

void sms_function(void) { unsigned char j=0,use=0; message(0x80,"ENTER THE KEY "); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); DEPARTMENT OF ECE, VBIT, I. 105 longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); command(0x01); if(lock==1) { message(0x80," UNAUTHORISED "); message(0xC0," PERSON IN ROOM "); buzzer=0; buzzer1=1; delay(100); if(use==0) { sms_init(); use=1; } send_com("ate0"); new_line(); longdelay(); DEPARTMENT OF ECE, VBIT, I. 106 longdelay(); for(i=0;i<=9;i++) { Pno[i]=read(i); delay(100); } send_msg(Pno); delay(500); delay(500); delay(500); delay(500); delay1(1000); for(i=10,j=0;i<=19;i++,j++) { Pno[j]=read(i); delay(100); } send_msg(Pno); delay(500); delay(500); delay(500); delay(500); delay1(1000); for(i=20,j=0;i<=29;i++,j++) { DEPARTMENT OF ECE, VBIT, I. 107 Pno[j]=read(i); delay(100); } send_msg(Pno); delay(500); delay(500); delay(500); delay(500); delay1(1000); for(i=30,j=0;i<=39;i++,j++) { Pno[j]=read(i); delay(100); } send_msg(Pno); delay(500); delay(500); delay(500); delay1(1000); while(1); } else { message(0X80," KEY ENTERED "); message(0XC0," SUCCESSFULLY "); while(1); DEPARTMENT OF ECE, VBIT, I. 108 } }

///////////////////////////////////////////////////////////////////////////////////////////////////////// void command(unsigned char value) { ldata = value; rs = 0; rw = 0; en = 1; delay(1); en = 0; } ///////////////////////////////////////////////////////////////////////////////////////////////////////// void lcddata(unsigned char value) { ldata = value; rs = 1; rw = 0; en = 1; delay(1); en = 0; } ///////////////////////////////////////////////////////////////////////////////////////////////////////// DEPARTMENT OF ECE, VBIT, I. 109

void delay(unsigned int r) { unsigned int p,q; for(p=0;p<r;p++) for(q=0;q<=200;q++); } //////////////////////////////////////////////////////////////////////////////////////////////////////////// void conv(unsigned char x) { unsigned char d1,d2,t; t=x/10; d1=x%10; d2=t%10; d2=d2+0x30; lcddata(d2); d1=d1+0x30; lcddata(d1); delay(5); } ///////////////////////////////////////////////////////////////////////////////////////////////////////////// void lcd_init(void) { command(0x38); command(0x80); command(0x0e); DEPARTMENT OF ECE, VBIT, I. 110 command(0x01); command(0x06); command(0x0c); } //////////////////////////////////////////////////////////////////////////////////////////////////////////// void main(void) { TH1 = 0xFA; TMOD = 0X20; SCON = 0X50; TR1 = 1; buzzer=1; buzzer1=0; lcd_init(); t=0; message(0X80,"PRESS #"); message(0xc0,"TO CHANGE NO1"); myfunction1(0); message(0X80,"PRESS #"); message(0xc0,"TO CHANGE NO2"); myfunction1(10); message(0X80,"PRESS #"); message(0xc0,"TO CHANGE NO3"); myfunction1(20); message(0X80,"PRESS #"); message(0xc0,"TO CHANGE NO4"); myfunction1(30); message(0X80,"SYSTEM ACTIVATED"); DEPARTMENT OF ECE, VBIT, I. 111 message(0XC0,"LOCK THE KEY while(lock==0); message(0X80,"SYSTEM ACTIVATED"); message(0XC0," longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); longdelay(); message(0XC0,"--------------------"); alert=1; vib=1; while(1) { if(alt==0) { DEPARTMENT OF ECE, VBIT, I. 112 "); "); alert=0; } command(0XC0); ///////////////////////////////// if(m1==1) { alert=0; } ///////////////////////////////// if(m2==1) { alert=0; } ///////////////////////////////// if(ir==1) alert=0; ///////////////////////////////// if(alert==0) { sms_function(); } if(vib==0) { sms_function(); } DEPARTMENT OF ECE, VBIT, I. 113 ///////////////////////////////// } } /////////////////////////////////////////////////////////////////////////////////////////////////////////




Hence the Effective Burglar Alarm have been Successfully created for Security to Industrial Applications By using of Eight Different Sensors.