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Chapter 6 Programmable Interface Devices

Overveiw Z80 PIO is a programmable I/O interfacing device, specially designed for the Z80. It has two 8-bit I/O ports. A and B, and its signals are divided into six groups as shown in Figure. They are described in the next section. Ports A and B can be used in three different modes: byte output (Mode 0), byte input (Mode 1), and bit input/output (Mode 3). In addition, Port A can be configured in the bidirectional mode (Mode 2). Modes 0 and 1. Mode 0 is for output and Mode 1 is for input. In these modes, Ports A and B can be used in two ways: simple I/O without handshake signals or interrupt I/O with handshake signals. Each port has two handshake signals: Strobe and Ready.

Figure Z80 PIO Logic Pinout Mode 2. This mode specifies the bidirectional data flow. Only Port A can be configured in this mode, and it used all four handshake signals. Mode3. This is a bit mode whereby each bit of Port A and Port B can be configured as input or output. The handshake signals cannot be used in this mode.

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1. . These lines can source 250 µA in logic 1 state and sink 2 mA in logic 0 state. In the input mode.ASTB. These lines can supply1. this signal indicates that a byte has been placed in Port A by a peripheral.ARDY – This is an active high Port A output signal from the PIO to a peripheral. When Port A is configured as an output port. all of them are used for Port A when it is configured in the bidirectional mode. However. I/O lines – A7-A0: These are bidirectional tri-state I/O lines of Port A. In the output mode.1 Z80 PIO Signals As shown in Figure the PIO signals are grouped in six categories. it indicates that the Port A register is empty and ready to accept the next byte from the peripheral. used to transfer information between the Z80 MPU and the PIO. the signal indicates that a byte has been placed in the Port A register and is ready for data transfer.5 mA at 1. two for each port.This is an active low Port A input signal from a peripheral to the PIO.6. 2 . used to transfer information between the PIO and a peripheral.D7-D0: This is an 8-bit bidirectional. tri-state data bus. Data Bus.5 V to drive Darlington transistors. 2. Z80 PIO I/O Byte Mode I/O Bit Mode Mode 0 -Simple output -Out put with Interrupt Mode 1 -Simple input -Input with Interrupt Mode 3 Individual I/O lines Can be set as Output and Input Mode 2 Bidirectional data transfer Figure Z80 PIO Modes 3. this signal indicates the acknowledgement of the byte received by the peripheral. . Handshake signals: The PIO has four handshake signals. When Port A is configured as an input port. B7-B0: These are Port B I/O lines similar to those of Port A.

4. - M 1. RD. Read: When the RDand IORQ signals are active low. and when it is low. . .Interrupt: This is an active low open collector output signal from the PIO. the control register is selected to write a command. CE 0 0 0 0 1 C/D 0 0 1 1 X B/ A 0 1 0 1 X Table Z80 PIO Port Selection Select Port Data Port A Data Port B Control Register A Control Register B PIO Not Select 6. The remaining three signals define the type of the operation (Read or Write) being performed.Chip Enable: This is an active low signal and is connected to a decoded address bus of the Z80. these are used by Port A when Port A is configured in the bidirectional mode. and when it is low. B/ A . 3 . Interrupt control logic: The PIO has three signals to handle the interrupt I/O. .All these signals are connected to the corresponding control signals of the Z80. Port A is selected.CE. a. the MPU reads from the selected register. However. Control signals: The PIO has six control signals. and C/D ) determine the port addresses of the I/O registers A and B and their control registers.IEI – Interrupt Enable In: This is an active high input signal used to form a priority interrupt daisy chain when multiple peripherals are connected in the interrupt I/O. . This signal blocks lower priority devices from interrupting when a higher priority device is being serviced.. .Control or Data Select. The M 1 signal synchronizes the internal operation and the interrupt logic of the PIO and performs various functions in conjunction with the other two control signals as described below. . The first three signals ( CE. Power and clock: The PIO operates with a single power supply with +5 V and uses a single phase system clock as an input for internal operations. This signal is generally connected to address line A1 of the MPU. 5. the I/O (Port A or Port B) register is selected to transfer data between the MPU and the PIO. The high on this pin indicates that no other peripherals with higher priority are being serviced. This signal is generally connected to address line A0 of the MPU. When this signal is high.INT . and IORQ . This signal goes high when IEI is high and the Z80 is not servicing an interrupt from this PIO. The port selection is summarized in Table.C/D .BSTBand BRDY – These are handshake signals for Port B similar to those of Port A.IEO – Interrupt Enable Out: This is an active high output signal used in daisy chain priority interrupts.Port B or A Select: When this signal is high. Port B is selected.B/ A . it is used to interrupt the Z80 MPU.

the MPU writes into the selected register. Write: When the IORQ is active. the port addresses are as follows 4 . M 1 is active and both RDand IORQare inactive. it is a default condition. Interrupt Acknowledge: When d. M 1 and IORQ are active. Reset: When the PIO is reset. By combining these address lines with address lines A1 and A0. There is no specific control signal to write into register. Example Solution Figure shows a circuit interfacing the PIO with the Z80 microprocessor. In Figure the output line O0 of the 74LS138 decoder is connected to the Chip Enable of PIO.b. the addresses line A7 should be at logic 1 and the remaining lines at logic 0. c. the MPU acknowledges the interrupt from the PIO. To assert the output line O0 of the decoder. Identify the port addresses of Port A and B and control registers. but the RD is inactive.

The control word for the PIO to specify the modes is shown in Figure. the appropriate control word must be written in the control register of the port being used. and it is specified by the manufacturer. and to initialize Port B as an output port.Control Word Figure shows that the PIO can operate in four different modes. Thus. and the program should continue to monitor the switches. D7 and D6 should be both 0. Read Port A. Write instructions to initialize Port A as an input port and Port B as an output port. otherwise. and how to initialize a port us illustrated in Example below. the control words are Port A as Input Port: 0 1 0 0 1 1 1 1 = 4FH Mode 1 5 . turn on corresponding LEDs at Port B. To set up an operating mode. Assume that the decoding logic is the same as in Figure. eight DIP switches are connected to Port A and seven LEDs and one speaker are connected to Port B (the buffer is necessary to supply sufficient current to the LEDs). Solution To initialize Port A as an input Port A as an input port. Example In Figure. The control word is determined by the internal logic. and if switch S7 is on (logic 0). output an emergency signal to the speaker. D7 = 0 and D6 = 1.

Turn off speaker CALL DELAY . and if this reading is sent out to Port B. If S7 is on. It is a generalpurpose I/O device can be used with almost any microprocessor. Because of its wide use in industry it is discussed here briefly. A . Wait LD A. and economical. but somewhat complex.Port B as Output Port: 0 0 0 0 1 1 1 1 = 0FH Mode 0 Instructions : The following port addresses refer to Figure PORTA EQU 80H . LED . Microprocessor 6 . the program outputs FFH to Port B. Then. If switch S 7 is off. 6. the program jumps to location LED and turns on the corresponding LEDs for the switches that are on. turn on LEDs SPEKER: LD A. A . similar to the Z80 PIO. programmable. It is flexible. Port B address CNTRLA EQU 82H . (See Gaonkar. It is the revised version of Intel’s 8255 and is the commonly referred to as the 8255 rather than the 8255A. the speaker does not generate a tone for constant output. (PORTA) . and the BIT instruction checks bit D7 for logic 0. Then. Write in control register B READ: IN A. B1. A . OUT (PORTB). these port addresses are from Figure. Control Register A CNTRLB EQU 83H . If it is off. The switches that are turned on provide logic 0 reading in the accumulator. an emergency tone is generated at the speaker. Check Switches S7 JR NZ. Continue to check DIP switches Description initially. Wait JR SPEKER . Turn on speaker and turn off LEDs CALL DELAY . Control word 0FH for Port B OUT (CNTRLB). The IN instruction reads DIP switches. 01001111B . A . Control Register B LD A. It can be programmed to transfer data under various conditions-from simple I/O to interrupt I/O. 7FH . S1. A . By calling delay and subsequently turning on/off bit D7. Port A address PORTB EQU 81H . versatile. if switches S0. For example. which indicates the on positions of S7. and logic 0 turns on LEDs because LED anodes are connected to +5 V. Repeat speaker output LED: OUT (PORTB). Turn on LEDs JR READ . Control word 4FH for Port A OUT (CNTRLA). A . Ports A and B are initialized by writing control words in their respective control registers. all ports are defined by writing equates. Load 0 for D7 OUT (PORTB). Write in control register A LD A. and S2 are on. parallel I/O device. 00001111B . Bit D7 of the byte FFH turns on the speaker and turns off all LEDs. it will turn on LEDs connected to B0. the IN instruction will read 1 1 1 1 1 0 0 0 (F8H). Read DIP switches BIT 7. and B2 lines of Port B. OFFH .2 The 8255A Programmable Peripheral Interface The Intel 8255A is another widely used.

In Mode 0. Port A can be set up in either Mode 0 or Mode 1. and they can be grouped into two 8-bit parallel ports. which includes a control register. Mode 1 is a handshake mode. The definitions of Mode 0 and Mode 1 in the 8255A are quite different from those in the PIO and should not be confused. whereby Ports A and/or B use bits from Port C as handshake signals. In Mode 2. Figure (b) shows all the functions of the 8255A. Programming. The eight bits of Port C can be used as individual bits or grouped into two 4-bit ports: CU and CL. 4th ed. The functions of these ports are defined by writing a control word in the control register. and Mode 2. the data bus buffer. Figure (b) shows a simplified but expanded version of the internal structure. for a full description.) The 8255A has 24 I/O pins. all ports function as simple I/O ports. The I/O mode is further divided into three modes: Mode 0. and control logic. A and B. The BSR mode is used to set or reset the bits on Port C.Architecture. This block diagram includes all the elements of a programmable device Port C performs functions similar to those of the status register. In the handshake mode. 7 . and Applications with the 8085. two 4-bit ports (CU and CL). Mode 1. and an 8-bit port C. They are classified according to two modes: the Bit Set/Reset (BSR) mode and the I/O mode (byte mode). and Port C is similar to the bit mode of the PIO.. Ports A and B of the 8255A are similar to Ports A and B of the Z80 PIO. Block Diagram of the 8255A The block diagram in Figure (a) shows two 8-bit ports (A and B). two types of I/O data transfer can be implemented: status check under program control and interrupt.

The CSsignal is the master Chip Select.Read: This control signal enables the Read operation.Figure (a) 8255A Block Diagram (b) Expanded Version of the Control Logic and I/O Port Control Logic The control section has six lines. CS 0 0 0 0 1 A1 0 0 1 1 X A0 0 1 0 1 X Selected Port A Port B Port C Control Register 8255 is not selected 8 . When the signal is low. respectively. o o CS. When the signal goes low. A0. and A1 – Chip Select Signals: These signals are used for selecting the devices. RESET – Reset: This is an active high signal and clears all the registers of the 8255A. the MPU reads data from a selected I/O port of the 8255A. and A0 and A1 are generally connected to the system address lines A0 and A1. and A0 and A1 specify one of the I/O ports or the control register as shown. WR . Their functions and connections are as follows: o o RD.Write: This control signal enables the Write operations. the MPU writes into a selected I/O port or the control register. CSis connected to a decoded address.

Write a control word in the control register. Port C operates in the Bit Set/Reset (BSR) mode. Write I/O instructions to communicate with peripherals through Ports A. The register is not accessible for a Read operation. and C. This register can be assessed to write a control word when A0 and A1 are at logic 1. called the control word. and the contents of this register. B. B. A0 and A1 lines. as shown in Figure 13. Control Word The 8255A has one control register.As an example. specify an I/O function for each port. the port addresses in Figure and determined by the CS. as shown in Figure (b). bits D0-D6 determine I/O functions in various modes. If bit D7 = 0. The CSline goes low when A7 = 1 and A6 through A2 are at logic 0. 9 . If bit D7 = 1. The BSR control word does not affect the functions of Ports A and B: the BSR mode will be described later. the following three steps are necessary: 1. and C and of the control register according to the Chip Select logic and the address lines A0 and A1. To communicate with peripherals through the 8255A. 3.26. Combining these signals with A0 and A1 yields port addresses ranging from 80H to 83H. as mentioned previously. Determine the addresses of Ports A. as shown in Figure (b). 2. Bit D7 of the control register specifies either the I/O function or the Bit Set/Reset function.

Outputs are latched. Each port (or half port. The input/output features in Mode 0 are as follows: 1. in the case of C) can be programmed to function as simply an input or output port. Inputs are not latched.Mode 0: Simple Input or Output In this mode. 2. Ports A and B function as two 8-bit I/O ports and Port C as two 4-bit ports. 10 .

and it does not alter previously transmitted control word with bit D7 = 1. BSR Control Word This control word. BSR (Bit Set/Reset) Mode The BSR mode is concerned only with the 8 bit of Port C. sets or resets one bit at a time. In the BSR mode. thus. 11 . individual bits of Port C can be used for applications such as an on/off switch. the I/O operations of Ports A and B are not affected by a BSR control word. Ports do not have handshake interrupt capability. when written in the control register. which can be set or reset by writing an appropriate control word in the control register.3. A control word with bit D7 = 0 is recognized as a BSR control word.