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Faculty of Engineering

Undergraduate Modular Scheme


Session 2009/2010 Semester 2 Level 5 SUBJECT: DATE: TIME: EG2061: Electronics and Control 25 May 2010 09.30 12.30
Instructions to Candidates This paper contains SIX questions in TWO sections: Section A and Section B Answer FOUR questions only Section A: Answer TWO questions Section B: Answer TWO questions All questions carry equal marks If question 5 is answered the tables for Q5 must be handed in with your answer book Provided: Log Linear Graph Paper 5541

CANDIDATES ARE PERMITTED TO BRING ONE CALCULATOR OF ANY TYPE INTO THIS EXAMINATION. Candidates are reminded that the major steps in all arithmetical calculations are to be set out clearly Number of Pages: 1 - 6 + Tables for Q5: 1 page

SECTION A 1. i Consider the control system in the figure below 0

G(s)

in which K is an adjustable gain parameter and G (s) = (a) 50 s(1 + 0.1s)(1 + 0.2 s)

Draw the Bode plot of the open-loop transfer function G(s), and determine the stability of the open loop system G(s). (8 marks) Find the closed-loop transfer function of the system and write the closed-loop characteristic polynomial. (3 marks) Find Kmax, the maximum value of K that leads to closed-loop stability. (Hint: use for instance a Rouths stability test) (7 marks) Take the input i = 0, for nonzero initial condition the closedloop system oscillates when K = Kmax. Find the frequency of these oscillations. (7 marks)

(b)

(c)

(d)

2.

Consider the feedback control system shown in the figure below. r(s) y(s)

K(s)

G(s)

Question 2 continued on page 2

Continuation of Question 2: Here, G ( s ) = 1 ( s + 1)( s + 2)

and K(s) is the transfer function of the compensator. (a) For K(s) = k, a constant compensator, draw the root locus accurately as k varies in the range 0 k . (6 marks) Take K(s) = k where k > 0. Find the largest value of k for which the closed loop response is non-oscillatory. (7 marks) Design a first order compensator K(s) such that the following design specifications are simultaneously satisfied: (i) (ii) (iii) The closed-loop is stable. The settling time for the dominant pole is at most 4s. The damping ratio of the dominant poles is (1/2). (12 marks) 3. A heating unit has an open loop transfer function of: 6.2 (1 + 40s) (a) Assuming unity feedback sketch the response of the closed loop system to a step input of 10 units. (7 marks) If Proportional plus Integral (P+I) control of the form 1 + 1/s is added to the system determine the new closed loop transfer function. (8 marks) Sketch the response of the closed loop system (with P+I) to a step input of 10 units and comment on the effect of P+I. (10 marks)

(b)

(c)

Draw the root locus of the compensated system.

(b)

(c)

Continued ... SECTION B 4. Consider the circuit presented in Figure Q4(a).

Figure Q4(a) Electric circuit where: R1=1 k, R2=2 k, C=2.5 F and L = 4 mH. (a) Assume that the voltage Vin is the alternating voltage: V=170 sin(120t + /3) [V]. Represent this voltage in polar and Cartesian notation and plot on an Argand diagram. (4 marks) (b) Using the frequency from (a), calculate the overall impedance of the circuit (polar or Cartesian notation are acceptable). (4 marks) Using the values from (a) and (b), calculate the overall current drawn from the supply (polar or Cartesian notation are acceptable). (2 marks) If the output voltage is taken across resistor R2, determine the expression for the output voltage as a function of input voltage (polar or Cartesian notation is acceptable). (2 marks)

(c)

(d)

Question 4 continued on page 4...

Continuation of Question 4: Consider the circuit presented in Figure Q4(e).

Figure Q4(e) (e) State the three most important characteristics of an ideal operational amplifier and explain the term virtual earth. (4 marks) (f) Provide the general expression for the output voltage as a function of the input voltage (Vo = f(Vi)). (2 marks) If the resistor values are given as R1 (LSB resistor) = Rf = 2k calculate the values for the other three resistors for the circuit to perform a binary D/A conversion and provide the expression for the output voltage as a function of those resistor values. (3 marks) If the four input voltages are equal and given as V1=V2=V3=V4=E=5V, calculate the resolution of the converter and the full scale output voltage. (4 marks)

(g)

(h)

Continued ...

5.

Design a circuit that can be used to produce the parity bits data for the code defined by the truth table shown in Table Q5. Decimal 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 A 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 B 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 C 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 F3 0 0 1 1 1 1 0 0 1 1 0 0 0 0 1 1 F2 0 1 0 1 1 0 1 0 1 0 1 0 0 1 0 1 F1 0 1 1 0 0 1 1 0 1 0 0 1 1 0 0 1 F0 0 1 1 0 1 0 0 1 0 1 1 0 1 0 0 1

Table Q5 (a) Use the Karnaugh maps given on the page 7, to obtain the minimal solution for all 4 output functions F3, F2, F1 and F0. (8 marks) Obtain the Boolean expression for all the output functions (F 3, F2, F1 and F0), based on map minimisation.

(b)

(6 marks)
Note 1: Aim for the minimal solution. Note 2: Detach the Karnaugh maps page from the back of this question paper, enter your enrolment number and attach this page to the answer sheets. Please note that some of the blank maps are spares, just in case of errors.

(c)

Draw the schematic diagram of the circuit that performs the function represented by the equations from (b). (6 marks) Re-design the circuit to utilise NAND gates ONLY. (3 marks) Identify the Boolean equation used to perform the conversion in (d), write out and represent the equation as a schematic diagram. (2 marks) Continued ... A typical diagram of the digital signal processing system is presented in Fig Q6(a). Explain the meaning and the purpose of each block. Which block performs anti-aliasing?

(d) (e)

6.

(a)

AF

ADC

DSP

DAC

AF

Figure Q6(a) (10 marks) (b) State the theorem which determines the minimum sampling frequency needed for perfect reconstruction of sampled signals. (5 marks) (c) A digital signal processing unit with input u and output y is described by the following equation: y(t) = 0.9y(t-1) + 0.1 y(t-2) + u(t-1) Find discrete-time transfer function between y and u in Z-domain. Assume the following: all signals are equal to zero for t<0, y(0)=0, u(0)=10, u(t)=0 for t>0. Calculate y(1), y(2), y(3). (10 marks) END OF EXAMINATION PAPER 7

SEE NEXT PAGE FOR BLANK KARNOUGH MAPS FOR Q5 (detach from the exam paper and attach to the answers script)

I.D. Number ______________________

Desk No,__________________

KARNAUGH MAPS for Q5 F1 AB CD 00 01 11 10 F4 AB CD 00 01 11 10 F2 00 01 11 10 AB CD 00 01 11 10 SPARE AB 00 01 CD 00 01 11 10 00 01 11 10 F3 AB CD 00 01 11 10 SPARE AB 00 CD 00 01 11 10

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