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- power factor correction & pfc converters
- Project report on input power factor correction of ac to dc converter circuit
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You are on page 1of 17

**The demand for power, which has increased tremendously over the
**

last few decades, has forced the power engineers to establish reliable

network in order to supply quality power to the consumer. Over the

years lot of research has been carried out for the supply of quality power

to the consumers. This research got a tremendous boost with the strides

made in the miniaturization of the electrical industry. The power

electronic devices are very versatile devices capable of delivering power

as high as 10KW. These devices are capable of working at frequencies in

the range of hundreds of KHz and at the same time the control being only

at the gate terminal of the devices, which makes these devices easily

controllable.

**Research in improved power quality utility interface has gained
**

importance due to stringent power quality regulation and strict limits on

total harmonic distortion (THD) of input current placed by standards such

as IEC 61000-3-2 and IEEE 519-1992. This has led to consistent research

in the various techniques for power quality improvement. Research into

passive and active techniques for input current wave shaping has

highlighted their inherent drawbacks. Passive filters have the demerits of

fixed compensation, large size and resonance whereas the use of active

filters is limited due to added cost and control complexity.

**An ac to dc converter is an integral part of any power supply unit
**

used in the all electronic equipments. So all the PFC methods have been

received a great attention and a number of techniques have been

developed. There are two types of PFC’s. 1) Passive PFC, 2) Active PFC. The

active PFC is further classified into low frequency and high-frequency

active PFC-depending on the switching frequency. Among these PFC’s we

will get better power factor by using high-frequency active PFC circuit.

These converters can operate in Continuous Current Mode – CCM, where

the inductor current never reaches zero during one switching cycle or

Discontinuous Current Mode - DCM, where the inductor current is zero

during intervals of the switching cycle.

**In DCM, the input inductor is no longer a state variable since its
**

state in a given switching cycle is independent on the value in the previous

switching cycle. The peak of the inductor current is sampling the line

Page | 1

voltage automatically. This property of DCM input circuit can be called

“self power factor correction” because no control loop is required from its

input side. In DCM the input current is nearly sinusoidal waveform with

constant duty cycle switching. Another merit of this mode is that the turn

of the switch occurs at zero current switching (ZCS).Therefore the

switching loss of this converter is very low.

**Most applications requiring ac-dc power converters need the output dc
**

voltage to be well regulated with good steady-state and transient performance. The

circuitry typically favored until recently (diode rectifier—capacitor filter) for the

utility interface is cost effective, but it severely deteriorates the quality of the utility

supply thereby affecting the performance of other loads connected to it besides

causing other well-known problems. In order to maintain the quality of the utility

supply, several national and international agencies have started imposing standards

and recommendations for electronic equipment connected to the utility.

**POWER FACTOR CORRECTION
**

• ISSUES THAT HAVE TO DO WITH POWER FACTOR CORRECTION

• BACKGROUND

Conventional single phase ac-dc utility interface

**Conventionally, the utility interface of a low power single phase off-
**

line ac-dc converter typically consists of a simple uncontrolled rectifier

feeding a bulky filter capacitor. An input filter is usually present in the

ac side in commercial products to reduce the electromagnetic interference

(EMI) due to the converter. The bulk capacitor, Cin, is designed to

Page | 2

maintain the ripple in the dc bus to an acceptable level and also to meet

the "hold-up time" requirements. The circuit draws narrow input current

pulses around the line voltage peaks.

Fig: conventional converter & its input waveform

**Power factor: Power factor (PF), is defined as the ratio of the average power
**

to the apparent power. Mathematically, it is represented as:

AveragePower Vs I sl cosθ1 I s1

PowerFactor = = = cosθ1

ApparentPower Vs I s Is

**Power factor reflects how effectively the given source power is utilized by the
**

load. It has been assumed that the input voltage is sinusoidal with low

distortion. Here, Vs is the rms input voltage, Is is the rms input current, I s1 is

the rms value of fundamental input current, and θ1 is the phase angle of the

Is

fundamental current. The ratio is the distortion factor; its value reflects the

I s1

effect due to input current harmonics. The cosine of the angle O is the

displacement power factor; its value reflects the conventional power factor when

there is no distortion.

Page | 3

PFC Techniques

• PASSIVE PFC TECHNIQUES

**The power line disturbances caused by the proliferation of phase controlled
**

and diode rectifier circuits were of concern even in late 70s. The definition of

power factor for nonlinear circuits and passive techniques for improving it are

presented in an early literature. Currently, passive techniques remain attractive

for low power PFC applications. It has been reported that power factor as high as

0.98 can be achieved using passive PFC techniques. The following sub-sections

discuss a few of the passive PFC arrangements.

INDUCTIVE FILTER

**The Figure below shows a well-known scheme with an inductor inserted
**

between the output of the rectifier and the capacitor. The inclusion of the

inductor results in larger conduction angle of the current pulse and reduced

peak and rms values. For low values of inductance the input current is

discontinuous and pulsating. Typical PF achieved in discontinuous mode

operation (DCM), with practical values for the inductor, is in the range of 0.65

to 0.75. Better power factor (PF) is achievable by using a larger value of the

inductance and pushing the operation to continuous conduction mode (CCM).

However, it is shown that even for infinite value of the inductance, the PF cannot

exceed 0.9 for this arrangement.

Page | 4

Figure: Conventional Rectifier Circuit with inductive filter.

**The inductor may also be introduced on the ac side. The position of the
**

inductance will not affect the PF in DCM operation. Under CCM operation,

however, the circuit behavior itself will be different depending upon the location

of the inductance. For instance, the presence of an infinite inductance on the

ac side (i.e. CCM operation) will result in zero input current and zero voltage

across the bulk capacitor, theoretically. However, the same inductance on the dc

side will result in rectangular blocks of current in the input with the bulk

capacitor charging up to the average value of the rectified input voltage. For

lower power levels, the distribution line inductance will itself act as a good

filter. For an office plug point (15 A), the line inductance is typically in the

range of 1 to 4 mH.. An estimate of this value can be obtained from the

assumption that the ac side reactance Xs (=ωLs) is 5% of the ratio of nominal

rated voltage to the maximum current rating of the plug point.

**In the scheme shown in figure below, a small filter capacitor C s is
**

connected across the input terminals of the circuit. The line inductance (not

shown in figure) and C, forms the first stage LC filter. Therefore higher order

harmonics of the line frequency will undergo greater attenuation (typically 80

dB) resulting in better harmonic performance. It is reported that even for

relatively small values of the inductance, a PF of 0.86 is attainable, which

is a considerable improvement over the no- capacitance case.

Page | 5

Figure: Rectifier circuit with input capacitor Cs

RESONANT INPUT FILTER

**The Figure shows the series filter arrangement for power factor correction,
**

which results in good power factors as high as 0.94. Thus, harmonic

performance is also good. However, the power factor depends upon the

resonant quality factor which is load dependent. Here the band pass filter is

designed with a centre frequency equal to the supply frequency. The quality

factor "Q" determines the bandwidth and hence the harmonic content of the

supply current. High "Q" (narrow bandwidth) will result in reduced

harmonic content and close to unity power factor. This circuit arrangement

is popularly used in applications where the supply frequency is high. One

such application is the space platform, with supply frequency up to 25 kHz.

Figure: Rectifier circuit with series resonant filter

**Use of parallel resonant filter for PF improvement has also been suggested.
**

With this arrangement power factor close to 0.95 is achieved. The filter is

tuned to offer very high impedance to the third harmonic component (the

most predominant). The high value parallel resistor is added to damp out

circuit oscillations. The figure for such arrangement is shown below.

Page | 6

ACTIVE POWER FACTOR CORRECTION

**The active PFC technique, which involves the shaping of the line current
**

using switching devices such as MOSFETs (metal oxide semiconductor field

effect transistors) and IGBTs (insulated gate bipolar junction transistors), is a

result of advances in power semiconductor devices and microelectronics. For

low and medium power ranges up to a few kilowatts (<5 kW), MOSFETs are

by far the popular choice for PFC because of their switching speed, ease of

driving and ruggedness. BJTs and more recently IGBTs are used for high

voltage medium power applications which MOSFETs are unable to contend

with owing to their large on-state resistances. For achieving good input

current wave shaping using active techniques, typically the switching

frequency should be at least an order of magnitude greater than 3 kHz (= 50

x 60 Hz = 50th harmonic of line frequency). With modern advances in

MOSFETs and IGBTs, this is feasible.

**The use of active PFC techniques results in one or more of the following
**

advantages.

**•Lower harmonic content in the input current compared to the passive
**

techniques.

•Reduced rms current rating of the output filter capacitor.

•Near unity power factor (0.99) is possible to achieve with the Total Harmonic

Distortion (THD) as low as 3-5%.

•For higher power levels active PFC techniques will result in size, weight and cost

benefits over passive PFC techniques.

The following sub-sections present the recent advances in single phase active

PFC techniques. The active PFC techniques have been classified into two

broad categories in this survey.

(1)Active PFC techniques with poor load dynamics. These have been referred to

Page | 7

in this paper as "Conventional active PFC techniques". They are typically

followed by a dc-dc downstream converter which caters to the demands of

the load.

(2)Active PFC techniques with fast load dynamics. Here, the PFC unit is

capable of meeting the fast dynamic requirement of a typical load.

Conventional active PFC techniques

Here, there are basically two approaches. One approach is to use

current-source-type circuit, in which the PFC acts as a current source

feeding the load. Though the voltage source type circuits are more popular,

the current source type circuits are useful in certain niche applications. In

the following subsections both types of circuits and schemes are

discussed.

Topologies:

The current-source-type PFC converter is usually of buck type.

However, for the voltage-source-type PFC converter, any one of the basic dc to

dc converter switching cells, such as buck, boost, buck-boost and Cuk

converter, can be used. Among these, the boost and the buck-boost

topologies are more popular. In the following subsections the notable

features of these topologies (both current and voltage source types) and

certain critical issues related to these topologies are presented. These

topologies are described briefly below and the diagrams are given below.

These power factor correction circuits are of conventional type and are

useful in certain applications.

**Figure: Circuit variations of the boost PFC topology. Single-switch (a), two-
**

switch (b), four- switch (c), and half-bridge (d) boost PFC's.

Page | 8

THE BOOST POWER FACTOR CORRECTION CONVERTER

**It is an ac-dc converter which operates at DCM and soft-switching
**

with partial resonant method. The partial resonant method operates at zero

current switching (ZCS) and zero voltage switching (ZVS).

**The figure shows the proposed ac-dc boost converter. The proposed
**

ac-dc boost converter consists of step up inductor, switches S1, S2.The

proposed converter switches operates at soft switching condition by partial

resonant condition by control of constant duty cycle. The turn on of the

switches is done under zero current switching (ZCS) and turn off of the

switches is worked under zero voltage switching (ZVS) by partial resonant

method. Therefore the proposed converter is operated with high efficiency.

Figure: The proposed ac-dc Boost converter

MODES OF OPERATION

There are four modes of operation during one switching cycle. At the

beginning the current flowing through the inductor Lr is zero. Both the

switches remain in off condition and the capacitor charges up to the same

voltage at the dc output side. The equation of input voltage and output

voltage of full bridge rectifier is given below.

Vin = Vm sin ωt.................(1)

Vr = Vin = Vm sin ωt.........( 2)

Page | 9

MODE1: ( t 0 ≤ t ≤ t1 )

**Mode 1 begins with the turning on of two switches. The input voltage
**

Vin and capacitor voltage Vcr are added and applied to the inductor. Now the

capacitor starts discharging through inductor Lr forming a series LC

resonant circuit.

MODE1 operation of boost converter

**Thus at this mode the turning on off the switches occur at zero current
**

switching (ZCS).Under ZCS the equation of Vr and i Lr is given by;

Vcr = (Vr + Vdc ) cos ω r t − Vr ............(3)

(Vr + Vdc )

i Lr = − sin ω r t..................(4)

X

Where, ωr = Lr C r

When Vcr = 0, the inductor current at the end of this mode is given by;

1 2

I1 = (Vdc + 2VrVdc ) ...............(5)

X

MODE2: t1 ≤ t ≤ t 2

Mode 2 begins when voltage across Cr becomes zero and diodes d1

and d2 begins to conduct. The inductor current equation is linearly

increased given by;

Vr

i Lr = t + I 1 ..................................(6)

Lr

Page | 10

This mode ends when both the switches turn off and the inductor current

is given by the equation;

Vr

I 2 = I1 + {TON − ( Lr C r ) cos −1 (v)}..........(7)

Lr

MODE3: t 2 ≤ t ≤ t 3

Mode 3 begins by turning of both the switches at same time. The

current flows through path Lr -d1- C r -d2, thus charges the capacitor. This

mode takes of a series resonant circuit. Turning of both the switches

occurs at ZCS condition when voltage across capacitor is zero. When

voltage across capacitor reaches “ Vdc ”, then the diode d3 start conducting.

The inductor current at this mode is assumed to be a constant value I 3 ,

because of short period of this mode.

Page | 11

MODE4: t 3 ≤ t ≤ t 4

Mode 4 begins when diode d3 start conducting and the inductor

current flows into the load .Here the inductor current decreases linearly is

given by the equation:

Vr − Vdc

i Lr = t + I 2 .....................(8)

Lr

This mode ends when the inductor current reaches Zero value.

SIMULATION RESULTS

**A diode rectifier bridge can be used to supply the input AC voltage. The
**

PFC converter is constructed by use of a boost chopper circuit with a

switching device in the dc side of the diode bridge rectifier circuit. A

sinusoidal current waveform in phase with the ac line voltage and the

constant dc voltage can be obtained from the PFC converter.

**The proposed converter is analyzed with the help of PSIM simulation.
**

The input to this simulation is given below

• Input ac voltage =100 volt(rms)

• Output dc voltage =300 volt

• Switching frequency =50 kHz

• Duty cycle=30%

**Components used in the converter are listed as:
**

• Filter inductor Lf=3mH

• Resonant inductor Lr=0.75uH

• Filter Capacitor Cf=5nF

Page | 12

• Resonant Capacitor Cr=91nF

• Output capacitor =2000

• Resistive load R=400

**In MODE 1 the waveforms for inductor current and voltage across
**

capacitor is given below. This plot shows the soft switching across switch

S1.

**In MODE 2 the waveforms for inductor current and capacitor voltage
**

is shown below. This plot of voltage and current shows the soft switching

across switch s2.

Page | 13

The waveform below shows the input and output voltages of the PFC

boost converter.

**The input waveform for discontinuous current mode (DCM) is shown
**

below.

Page | 14

The input ac voltage waveform and the sinusoidal input current is given

below

Input ac voltage waveform

Sinusoidal input current waveform

Page | 15

CONCLUSION

• From simulation

The input current waveform got to be sinusoidal in proportion to

supply voltage waveform with constant duty cycle i.e. 30% operation. The

DCM method reduces the complicacy of designing control circuit. Therefore

the input current waveform got to be sinusoidal without any control circuit

.The circuit switches operate under partial resonant soft switching method,

thus it increases the efficiency of the circuit. The proposed converter

achieves unity power factor with high efficiency from the above result.

• Limitations of PFC

The main switch Si operates in ZVS mode and reverse recovery of D1 is

**gradual. Hence the switching losses of Si and D1 decrease notably. The turn-
**

off loss of S2 is similar to that Si, while its turn-on loss is caused by discharge

of the body capacitor and transient voltage dropping. Since S2 only conducts a

short period, its power rating can be much smaller than S 1's and so does its

body capacitor. As a result, the discharge loss caused by body capacitor of S2

in a soft-switched converter will be much smaller than Si in its hard-switched

counterpart.

**By suppressing the diode recovery current and utilizing the energy stored
**

in the main switch's body capacitance, the soft-switching technique reduces

PFC's loss obviously when switching frequency is not very high. As penalty,

the soft switching makes converter be more complex.

**The loss of auxiliary switch relates to its on-time period. Constricting
**

this on-time period too much will increase switching loss notably. There is an

on-time lower limit for the auxiliary switch in the soft-switched PFC. As a

result the soft-switching technique makes PFC decrease efficiency notably

when the frequency is close to its limitation.

**To ensure efficiency of PFC the equivalent PWM on-time period requires
**

much longer than on-time period of auxiliary switch. For AC220-240VAc

input and 385-400VDC output PFC, widely variable duty ratio causes the

converter to reach above-mentioned limit. The effect of increasing CCM

boost PFC's switching frequency by soft-switching technique is not obvious.

Page | 16

It is not realistic that the switching frequency could be as high as DC/DC

converter's level (1MHz), though maybe it is useful to enhance the efficiency

by employing ZVS auxiliary switch.

**On the other hand, the limitation in the soft-switching PFC will not be a
**

serious problem if the input voltage is lower (e.g. 85-120VAc) or the output

voltage is higher (e.g. higher than 400VDC). Alternatively by changing the

topology of PFC to enlarge minimum duty ratio, the soft switching can also

avoid being affected by this limitation.

Page | 17

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