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Help on the Power Modeling Block

Help on the Power Modeling Block


Powersim Inc.

This document describes how to use the Power Modeling Block in PSIM. It is organized in the following way: Section 1: Background on the Power Modeling Block Section 2: Introduction on PSIMs numerical algorithm Section 3: Examples of using the Power Modeling Block

1. Background
The Power Modeling Block is a block that allows users to define algebraic and differential equations for a device, and to build a model in the power circuit. Unlike control circuit models that have signal inputs and signal outputs with no consideration of the power conservation (no input and output power balance), electric currents can flow into and out of the terminals of the Power Modeling block. Take the following dc converter circuit as an example:

In the circuit on the left, the inductor L1 uses the built-in model from the PSIM library. In the circuit on the right, the inductor L2 is modeled using the Power Modeling Block based on the differential equation vL = L diL / dt. The Power Modeling Block provides a very powerful way of modeling power devices. It can have power terminals, control input/output terminals, and mechanical shaft terminals, and equations can be algebraic or differential, linear or nonlinear. A significant feature of the Power Modeling Block is that these equations are assembled and solved simultaneously with the other equations from the rest of the PSIM circuit, resulting a very robust, stable, and efficient solution.

2. PSIMs Numerical Algorithm


In order to use the Power Modeling Block, one needs to understand how PSIM solves a circuit. PSIMs solution involves three steps: Discretize differential equations based on the Trapezoidal Rule and Backward Euler integration algorithm. Formulate circuit equations using the Nodal Analysis. Solve the nodal equation Y * V = I where Y is the admittance matrix, V is the voltage vector, and I is the current vector.
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Discretizing Differential Equations: In PSIM, a differential equation is first discretized into an algebraic equation using the Trapezoidal Rule and the Backward Euler method. For example, the equation of an inductor is described:

vL = L

diL dt

With the Trapezoidal Rule, it can be discretized as follows:

vL + vL (0) i i (0) = L L L 2 t
where t is the simulation time step, and vL(0) and iL(0) are the voltage and current at the previous time step. The above equation can be rearranged as:

iL =
or

t t vL + [ vL (0) + iL (0)] 2L 2L
vL + I eq Req

iL =
where

Req =
I eq =

2L t

vL (0) + i L ( 0) Req

Similarly, with the Backward Euler method, and using half of the time step, the same differential equation can be discretized as follows:

vL = L
The above equation can be rearranged as:

iL iL (0) t 2

iL =
or

t vL + iL (0) 2L
vL + I eq Req

iL =
where

Req =

2L t

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I eq = iL (0)
The reason of using the half time step is that the equivalent resistance Req remains the same as in the case of the Trapezoidal Rule. Similarly, the equation of a capacitor is:

iC = C

dvC dt

With the Trapezoidal Rule, it can be discretized as follows:

iC + iC (0) v v (0) = C C C t 2
With the Backward Euler, using half of the time step, it can be discretized as follows:

iC = C
The above equations can be rearranged as:

vC vC (0) t 2
vC + I eq Req

iC =
where

Req =
For Trapezoidal Rule:

t 2C

I eq =
and for Backward Euler:

vC (0) iC (0) Req vC (0) Req

I eq =

After the discretization, an inductor or capacitor is represented by an equivalent resistor, in parallel with a current source that is a function of the values at the previous time step, as shown below:

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Formulating Equations: After inductors and capacitors are discretized, a circuit becomes a resistive circuit which contains only resistors and voltage/current sources. Nodal analysis can then be used to formulate the circuit equations. Take the following circuit as an example:

The circuit on the left is the original circuit. The circuit on the right is after the discretization. Nodal equations can then be formulated for each node. For Node 1:

(
For Node 2:

1 1 1 1 + ) v1 v 2 v3 = I eq _ L1 R1 R2 Req _ L1 R1 1 Req _ L1 1 Req _ C1

1 Req _ L1

v1 + (

) v 2 = I eq _ L1 I eq _ C1 I s

Voltage v3 is already known, and is the same as Vs. In the matrix form, the equations become:

1 1 R + R 2 1 1 Req _ L1
or in a more general form:

1 v I + Vs Req _ L1 1 eq _ L 1 = R1 1 1 v 2 + I I eq _ L1 eq _ C1 I s Req _ L1 Req _ C1 1


Y V = I

Please note that the right-hand-side vector I contains both the terms that depend on the values of the previous time step (such as Ieq_L1 and Ieq_C1) and the terms due to fixed voltage/current sources (such as Vs and Is). Once the nodal equation Y*V = I is formulated, it can be solved.

3. Building the Device Model Using the Power Modeling Block


To build a device model, one needs to prepare a set of algebraic equation A*X = B for the device, and PSIM will assemble this equation with the equation Y*V = I from the rest of the circuit, and the complete equation set will be solved simultaneously. The following examples are used to illustrate this process.

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Modeling a Resistor: Assume that the device to be modeled is a resistor, and the resistor connects to the rest of the PSIM circuit through two terminals, as shown below:

1 The rest of the PSIM circuit

2 Device to be modelled

If the resistor is treated in isolation which is separate from the rest of the PSIM circuit, the nodal equations for Node 1 and 2 are: For Node 1:

1 1 v1 v 2 = 0 R R
For Node 2:

1 1 v1 + v 2 = 0 R R

The implementation of the resistor model in a C code is shown below.


void REQUESTSIMDATA(DllDeviceData * pDD, int *pnError, LPSTR szErrorMsg) { Internal_DLL_Block_Data * pData = (Internal_DLL_Block_Data *)(pDD->m_pUserData); double R; R = pData->m_fR; //resistance defined by the user switch( pDD->m_nRequestCode ) { case REQUEST_NODE_INFO: //Request the node information pDD->m_nExtLinearNodes = 2; break; case REQUEST_COEFF_A: //Request coefficient A for A*X = B { //Calculate Yii and Yij if (pDD->m_nRequestNodeIndex == 1) // Node E1 { pDD->m_pfCoeff_A[0] = 1. / R; pDD->m_pfCoeff_A[1] = - 1./R; } else if (pDD->m_nRequestNodeIndex == 2) // Node E2 { pDD->m_pfCoeff_A[0] = -1./R; pDD->m_pfCoeff_A[1] = 1./R; } } break; case REQUEST_PREV: // Calculate Ieq for all L and C break; case REQUEST_COEFF_B: //Request coefficient B for A*X = B break; case REQUEST_STATE_UPDATE: //Request update of state variables break; case REQUEST_STATE_READ: //Request values of state variables break; case REQUEST_STATE_WRITE: //Receive modified values of state break; case REQUEST_DLL_OUTPUT: //Request the DLL outputs break; }; *pnError = 0; }

There are 2 terminals.

Coefficients for equation at Node 1

Coefficients for equation at Node 2

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In the code above, the lines marked in red are the code added by users. As shown in the code, the coefficients of the equations at Node 1 and Node 2 are entered as they are. In this case, there are no right-hand-side term and no historic terms. Modeling an Inductor: Assume that the device to be modeled is an inductor, and the inductor connects to the rest of the PSIM circuit through two terminals, as shown below:

The rest of the PSIM circuit

1 2 Device to be modelled

There are two ways to formulate the equation for the inductor. One is to treat the inductor current as an internal variable (a variable that is not solved directly in the equation), and the other is to solve the inductor current directly. If the inductor current is treated as an internal variable, the nodal equations for Node 1 and 2 are (ignoring the rest of the PSIM circuit): For Node 1:

1 1 v1 v 2 = I eq Req Req
For Node 2:

1 1 v1 + v 2 = I eq Req Req

The code implementation of the model will be as follows.


void REQUESTSIMDATA(DllDeviceData * pDD, int *pnError, LPSTR szErrorMsg) { Internal_DLL_Block_Data * pData = (Internal_DLL_Block_Data *)(pDD->m_pUserData); double Req_L, vkm0, T, delt; T = pDD->m_fT; delt = pDD->m_fDeltaT; Req_L = 2.*pData->m_fL / delt; switch( pDD->m_nRequestCode ) { case REQUEST_NODE_INFO: //Request the node information pDD->m_nExtLinearNodes = 2; pDD->m_nIntStates = 1; break;

Calculate inductor equivalent resistance Req = 2L / t

There are two terminals, and one internal state variable (the inductor current iL).

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case REQUEST_COEFF_A: //Request coefficient A for A*X = B { //Calculate Yii and Yij if (pDD->m_nRequestNodeIndex == 1) // Node E1 { pDD->m_pfCoeff_A[0] = 1. / Req_L; pDD->m_pfCoeff_A[1] = - 1./Req_L; } else if (pDD->m_nRequestNodeIndex == 2) // Node E2 { pDD->m_pfCoeff_A[0] = -1./Req_L; pDD->m_pfCoeff_A[1] = 1./Req_L; } } break; case REQUEST_PREV: // Calculate Ieq for all L and C // Ieq_L1 are internal variables. { if (pDD->m_nRequestFlag == FLAG_BACKWARD_EULER) { pData->m_fIeq = pData->m_fIt; } else //if (pDD->m_nRequestFlag == FLAG_TRAPEZOIDAL) { vkm0 = pDD->m_pfVoltages[0] - pDD->m_pfVoltages[1]; pData->m_fIeq = pData->m_fIt + vkm0/Req_L; } } break; case REQUEST_COEFF_B: //Request coefficient B for A*X = B { pDD->m_pfCoeff_B[0] = - pData->m_fIeq; pDD->m_pfCoeff_B[1] = pData->m_fIeq; } break;

Coefficients for equation at Node 1 Coefficients for equation at Node 2

Calculate Ieq based on Backward Euler Calculate Ieq based on Trapezoidal Rule

// Node E1 // Node E2

Define the righthand-side of the equations for Node 1 and 2

case REQUEST_STATE_UPDATE: //Request update of state variables (i.e. iL(t)) { vkm0 = pDD->m_pfVoltages[0] - pDD->m_pfVoltages[1]; pData->m_fIt = vkm0/Req_L + pData->m_fIeq; } break; case REQUEST_STATE_READ: //Request values of state variables (i.e. iL(t)) { pDD->m_pfStateVariables[0] = pData->m_fIt; } break; case REQUEST_STATE_WRITE: //Receive modified state variables (i.e. iL(t)) { pData->m_fIt = pDD->m_pfStateVariables[0];

Calculate the inductor current iL based on: iL = VL / Req + Ieq

Update the internal state variable iL

break; case REQUEST_DLL_OUTPUT: break; }; *pnError = 0; } //Request the DLL outputs

Alternative, the inductor can be modeled in such a way that the inductor current is solved directly. The advantage of this method is that the inductor does not have to be treated as an internal variable, and there is no need for extra calculation. With the direction of the inductor current iL as shown in the diagram, the equations can be expressed as:

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For Node 1: For Node 2: For the variable iL:

Y V +i

=0 =0

Y V i
iL =

vL + I eq Req

or

v1 + v 2 + Req i L = Req I eq
In the equations for Node 1 or Node 2, the term Y*V corresponds to the contribution of the rest of the PSIM circuit to the nodal equation at the node, and it represents the summation of the currents flowing away from this node. The model implementation in the code is shows as follows.
void REQUESTSIMDATA(DllDeviceData * pDD, int *pnError, LPSTR szErrorMsg) { Internal_DLL_Block_Data * pData = (Internal_DLL_Block_Data *)(pDD->m_pUserData); double Req_L, vkm0, T, delt, iL; T = pDD->m_fT; delt = pDD->m_fDeltaT; Req_L = 2.*pData->m_fL / delt; switch( pDD->m_nRequestCode ) { case REQUEST_NODE_INFO: //Request the node information pDD->m_nExtLinearNodes = 2; pDD->m_nIntLinearNodes = 1; break;

Calculate inductor equivalent resistance Req = 2L / t

There are 2 terminals, and 1 internal node due to iL.

case REQUEST_COEFF_A: //Request coefficient A for A*X = B { //Calculate Yii and Yij if (pDD->m_nRequestNodeIndex == 1) // Node E1 { Define coefficients for equation at pDD->m_pfCoeff_A[0] = 0.; Node 1. The node sequence is: v1, v2, pDD->m_pfCoeff_A[1] = 0.; pDD->m_pfCoeff_A[1] = 1.; and iL } else if (pDD->m_nRequestNodeIndex == 2) // Node E2 { pDD->m_pfCoeff_A[0] = 0.; Define coefficients for equation at pDD->m_pfCoeff_A[1] = 0.; Node 2. pDD->m_pfCoeff_A[1] = -1.; } else if (pDD->m_nRequestNodeIndex == 3) // Node I1 { pDD->m_pfCoeff_A[0] = -1.; Define coefficients for equation at pDD->m_pfCoeff_A[1] = 1.; Node 2. pDD->m_pfCoeff_A[1] = Req_L; } } break;

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case REQUEST_PREV: //Calculate Ieq for all L and C { if (pDD->m_nRequestFlag == FLAG_BACKWARD_EULER) { pData->m_fIeq = pDD->m_pfVoltages[2]; } else //if (pDD->m_nRequestFlag == FLAG_TRAPEZOIDAL) { vkm0 = pDD->m_pfVoltages[0] - pDD->m_pfVoltages[1]; pData->m_fIeq = pDD->m_pfVoltages[2] + vkm0/Req_L ; } } break; case REQUEST_COEFF_B: //Request coefficient B for A*X = B { pDD->m_pfCoeff_B[0] = 0.; // Node E1 pDD->m_pfCoeff_B[1] = 0.; // Node E2 pDD->m_pfCoeff_B[2] = Req_L * pData->m_fIeq; //Node I1 } break; case REQUEST_STATE_UPDATE: //Request update of state variables break; case REQUEST_STATE_READ: //Request values of state variables break; case REQUEST_STATE_WRITE: //Receive modified values of state variables break; case REQUEST_DLL_OUTPUT: break; }; *pnError = 0; } //Request the DLL outputs

Calculate Ieq based on Backward Euler.

Calculate Ieq based on Trapezoidal Rule. Define the righthand-side of the equations for Node 1 and 2 and iL.

Modeling a Capacitor: Assume that the device to be modeled is a capacitor, and the capacitor connects to the rest of the PSIM circuit through two terminals, as shown below:

The rest of the PSIM circuit

1 2 Device to be modelled

Similar to the way equations are formulated for the inductor, the equations for the capacitor can be formulated as follows. For Node 1:

1 1 v1 v 2 = I eq Req Req
For Node 2:

1 1 v1 + v 2 = I eq Req Req

The implementation of the model in the code will be as follows.


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void REQUESTSIMDATA(DllDeviceData * pDD, int *pnError, LPSTR szErrorMsg) { Internal_DLL_Block_Data * pData = (Internal_DLL_Block_Data *)(pDD->m_pUserData); double Req_C, vkm0, T, delt; T = pDD->m_fT; delt = pDD->m_fDeltaT; Req_C = delt / (2.*pData->m_fC); switch( pDD->m_nRequestCode ) { case REQUEST_NODE_INFO: //Request the node information pDD->m_nExtLinearNodes = 2; break; case REQUEST_COEFF_A: //Request coefficient A for A*X = B { //Calculate Yii and Yij if (pDD->m_nRequestNodeIndex == 1) // Node E1 { pDD->m_pfCoeff_A[0] = 1. / Req_C; pDD->m_pfCoeff_A[1] = - 1./Req_C; } else if (pDD->m_nRequestNodeIndex == 2) // Node E2 { pDD->m_pfCoeff_A[0] = -1./Req_C; pDD->m_pfCoeff_A[1] = 1./Req_C; } } break; case REQUEST_PREV: // Calculate Ieq for all L and C // Ieq_L1 are internal variables. { vkm0 = pDD->m_pfVoltages[0] - pDD->m_pfVoltages[1]; if (pDD->m_nRequestFlag == FLAG_BACKWARD_EULER) { pData->m_fIeq = - vkm0 / Req_C; } else //if (pDD->m_nRequestFlag == FLAG_TRAPEZOIDAL) { io = vkm0 / Req + pData->m_fIeq; pData->m_fIeq = - vkm0 / Req_C - io; } } break; case REQUEST_COEFF_B: //Request coefficient B for A*X = B { pDD->m_pfCoeff_B[0] = - pData->m_fIeq; pDD->m_pfCoeff_B[1] = pData->m_fIeq; } break;

Calculate capacitor equivalent resistance Req = t / (2C). There are two terminals.

Define the equation coefficients.

Calculate Ieq based on Backward Euler. Calculate Ieq based on Trapezoidal Rule.

// Node E1 // Node E2

Define the righthand-side of the equations for Node 1 and 2 and iL.

case REQUEST_STATE_UPDATE: //Request update of state variables break; case REQUEST_STATE_READ: //Request values of state variables break; case REQUEST_STATE_WRITE: //Receive modified values of state break; case REQUEST_DLL_OUTPUT: //Request the DLL outputs break; }; *pnError = 0; }

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Modeling a DC Machine with Saturation: The Power Modeling Block has the capability to model very complex power devices. As an example, a dc machine with saturation is modeled using the equivalent circuit and the Power Modeling Block.

Armature resistance Ra = 0.5 Ohm Armature inductance La = 50 mH Field winding resistance Rf = 75 Ohm Field winding inductance Lf = 20 mH Moment of inertia J = 0.3 kg/m2 Rated conditions: Va = 120 V, Ia = 10 A, If = 1.6 A n = 1200 rpm

The armature winding equation, mechanical equation, and the field winding equation of the dc machine can be expressed as:

v a = R a i a + La

Ea = Laf m J

dia + Ea dt

d m = Tem TL dt Tem = Laf ia


di f dt

v f = Rf i f + Lf Laf = 0.372 e
Here the field nonlinearity is considered.
if 1.6

+ 0 .2

Using the equivalent circuit method, the machine can be represented by the following equivalent circuit model:

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To understand how the equivalent circuit for the mechanical equation is obtained, if we compare the mechanical equation J * dm / dt = Tem TL with the capacitor equation C * dvc / dt = ic, we will find that they are analogous. Therefore, we can treat the moment of inertia J as the capacitance, the mechanical speed m as the voltage, and the torques as the currents. In the equivalent circuit, the voltage across the capacitor J, therefore, represents the mechanical speed m. To implement the machine using the Power Modeling Block, we need to re-organize the equations as follows: At Node va+: At Node va-: At Node vf+: At Node vf-: For if: For ia: For m:

Y V + i Y V i Y V + i Y V i

=0 =0 =0 =0

v f + + v f + ( R f + Req _ Lf ) i f = H f va + + va + ( Ra + Req _ La ) ia + Laf m = H a

m
Req _ J

Laf ia = H J TL

where Req_La = 2 La / t, Req_Lf = 2 Lf / t, Req_J = t / (2J), and Hf, Ha, and HJ are defined as follows: For Backward Euler: Hf = Req_Lf * if(0), Ha = Req_La * ia(0), and HJ = m(0) / Req_J . For Trapezoidal Rule: Hf = Req_Lf * if(0) + vLf(0), Ha = Req_La * ia(0) + vLa(0), and HJ = m(0) / Req_J + im(0). To understand how Hf, Ha, and HJ are obtained, we take the equation for if as an example. We can rewrite the differential equation for if as follows:

v f = R f i f + vLf

where vLf is defined as: vLf = Lf * dif / dt. If we discretize this equation using the Backward Euler (with half of the time step), it becomes:

vLf = Req _ Lf i f Req _ Lf i f (0)


Substituting this equation to the field winding equation, we have:

v f = R f i f + Req _ Lf i f Req _ Lf i f (0)


or

v f + ( R f + Req _ Lf ) i f = Req _ Lf i f (0)


Similarly, if we discretize the equation vLf = Lf * dif / dt using the Trapezoidal Rule, it becomes:

vLf = Req _ Lf i f Req _ Lf i f (0) vLf (0)

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Substituting this equation to the field winding equation, we have:

v f = R f i f + Req _ Lf i f Req _ Lf i f (0) vLf (0)


or

v f + ( R f + Req _ Lf ) i f = Req _ Lf i f (0) + vLf (0)


The model implementation in the code is shows as follows.
void REQUESTSIMDATA(DllDeviceData * pDD, int *pnError, LPSTR szErrorMsg) { Internal_DLL_Block_Data * pData = (Internal_DLL_Block_Data *)(pDD->m_pUserData); double AbsoluteTolerance = 2.e-2, RelativeTolerance = 1.e-4; double Ra, Rf, Req_La, Req_Lf, Req_J, Laf; double Ia, iL, If, Wm, VLa0, Ia0, VLf0, If0, Wm0, io, T, delt; T = pDD->m_fT; delt = pDD->m_fDeltaT; Ra = pData->m_fRa; Rf = pData->m_fRf; Req_La = 2. * pData->m_fLa / delt; Req_Lf = 2. * pData->m_fLf / delt; Req_J = delt / (2. * pData->m_fJ); switch( pDD->m_nRequestCode ) { case REQUEST_NODE_INFO: //Request the node information ( //The node sequence is as follows: Va+ Va- Vf+ Vf- If Ia Wm pDD->m_nExtLinearNodes = 4; //Va+, Va-, Vf+, VfpDD->m_nIntLinearNodes = 1; //If pDD->m_nIntNonLinearNodes = 1; //Ia pDD->m_nMechShaftNonLinear = 1; //Wm pDD->m_pMechShaftFlags[0] = 1; //master/slave flag pDD->m_nOutputDisplay = 1; } break; case REQUEST_COEFF_A: //Request coefficient A for A*X = B { //Calculate Yii and Yij If = pDD->m_pfVoltages[4]; Laf = 0.372 * exp( - fabs(If) / 1.6) + 0.2; pData->m_fIa = pDD->m_pfVoltages[5]; pData->m_fWm = pDD->m_pfVoltages[6]; if (pDD->m_nRequestNodeIndex == 1) pDD->m_pfCoeff_A[5] = 1.; // Node Va+

Calculate equivalent resistances.

Define the number of internal and external nodes. Node Ia is nonlinear because of Laf. Node Wm is a mechanical node.

Calculate Laf and store Ia and Wm for convergence check.

Define matrix coefficients.

else if (pDD->m_nRequestNodeIndex == 2) pDD->m_pfCoeff_A[5] = -1.; else if (pDD->m_nRequestNodeIndex == 3) pDD->m_pfCoeff_A[4] = 1.; else if (pDD->m_nRequestNodeIndex == 4) pDD->m_pfCoeff_A[4] = -1.; else if (pDD->m_nRequestNodeIndex == 5) { pDD->m_pfCoeff_A[2] = -1.; pDD->m_pfCoeff_A[3] = 1.; pDD->m_pfCoeff_A[4] = Rf + Req_Lf; } else if (pDD->m_nRequestNodeIndex == 6) { pDD->m_pfCoeff_A[0] = -1.; pDD->m_pfCoeff_A[1] = 1.; pDD->m_pfCoeff_A[5] = Ra + Req_La; pDD->m_pfCoeff_A[6] = Laf; }

// Node Va// Node Vf+ // Node Vf// Node If

// Node Ia

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else if (pDD->m_nRequestNodeIndex == 6) { pDD->m_pfCoeff_A[0] = -1.; pDD->m_pfCoeff_A[1] = 1.; pDD->m_pfCoeff_A[5] = Ra + Req_La; pDD->m_pfCoeff_A[6] = Laf; } else if (pDD->m_nRequestNodeIndex == 7) { pDD->m_pfCoeff_A[5] = -Laf; pDD->m_pfCoeff_A[6] = 1. / Req_J; } break; case REQUEST_PREV: { If0 Ia0 Wm0 // Calculate Ieq for all L and C = pDD->m_pfVoltages[4]; = pDD->m_pfVoltages[5]; = pDD->m_pfVoltages[6];

// Node Ia

// Node Wm

Calculate the historic terms Hf, Ha, and HJ.


//Backward Euler

if (pDD->m_nRequestFlag == FLAG_BACKWARD_EULER) { pData->m_fVLf0 = Req_Lf * If0; pData->m_fVLa0 = Req_La * Ia0; pData->m_fTem0 = Wm0 / Req_J; } else // Trapezoidal Rule { VLf0 = Req_Lf * If0 - pData->m_fVLf0; pData->m_fVLf0 = Req_Lf * If0 + VLf0; VLa0 = Req_La * Ia0 - pData->m_fVLa0; pData->m_fVLa0 = Req_La * Ia0 + VLa0; io = Wm0 / Req_J - pData->m_fTem0; pData->m_fTem0 = Wm0 / Req_J + io; } } break; case REQUEST_COEFF_B: //Request coefficient B for A*X = { pDD->m_pfCoeff_B[0] = 0; pDD->m_pfCoeff_B[1] = 0; pDD->m_pfCoeff_B[2] = 0; pDD->m_pfCoeff_B[3] = 0; pDD->m_pfCoeff_B[4] = pData->m_fVLf0; // pDD->m_pfCoeff_B[5] = pData->m_fVLa0; // pDD->m_pfCoeff_B[6] = pData->m_fTem0; // } break; B // Node // Node // Node // Node Node If Node Ia Node Wm

Define the right-hand-side terms of the equations.


Va+ VaVf+ Vf-

case REQUEST_STATE_UPDATE: //Request update of state variables break; case REQUEST_STATE_READ: //Request values of state variables break; case REQUEST_STATE_WRITE: //Receive modified values of state variables break; case REQUEST_CONVERGENCE: //Request convergence check Check if the solution for { //Set m_nConvergenceFlag = 1 if not converged and Wm has converged. Ia0 = pData->m_fIa; Ia = pDD->m_pfVoltages[5]; //Absolute tolerance if (fabs(Ia - Ia0) > AbsoluteTolerance) pDD->m_nConvergenceFlag = 1; //Relative tolerance if (fabs((Ia - Ia0)/Ia0) > RelativeTolerance) pDD->m_nConvergenceFlag = 1; Wm0 = pData->m_fWm; Wm = pDD->m_pfVoltages[6]; //Absolute tolerance if (fabs(Wm - Wm0) > AbsoluteTolerance) pDD->m_nConvergenceFlag = 1; //Relative tolerance if (fabs((Wm - Wm0)/Wm0) > RelativeTolerance) pDD->m_nConvergenceFlag = 1; } break;

Ia

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Help on the Power Modeling Block

case REQUEST_DLL_OUTPUT: //Request the DLL outputs pDD->m_pfOutputDisplay[0] = pDD->m_pfVoltages[5]; break; }; } *pnError = 0;

Send Ia to the output for display.

The image of the Power Modeling Block can be customized. The circuit below shows the how the dc machine with the customized image is connected to the rest of the circuit. Please note that the mechanical terminals of the Power Modeling Block are to be directly connected to the mechanical elements in PSIM, as shown in this case.

The dc machine model described by the Power Modeling Block.

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