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http://onsemi.com Prepared by: W.H. Lei, T.K. Man ON Semiconductor

APPLICATION NOTE

Abstract

A general approach for optimizing dynamic response for buck converters is presented. The basic theory to stabilize a buck converter with different types of compensation networks is introduced in detail. Using an averaging model and a computer program, three types of compensation networks for the buck converter are examined and analyzed. The K−factor approach to determine the compensation network components is explained. Finally, a practical experiment with a popular buck controller IC for computing applications is introduced. By using the presented approach, a fast transient response system using type−III compensation network is evaluated and results in a high performance system with sufficient stability margin. INTRODUCTION The subject of stability, which pertains to the closed−loop frequency response of switching regulators, has received much attention and many papers have been published on and around the subject. All of them have their own implementation method and considerations. To most practicing engineers, it seems a cloud of mystery shrouds feedback control loop stability. This paper seeks to remove that shroud, blending theory, simulation tools and practical experiment illustrating a general approach to stabilize the buck converter with least effort. ANALYSIS OF THE OPEN LOOP BUCK CONVERTER Figure 1 shows the feedback system for a buck converter. First, transfer functions Gp(s) for the Pulse Width Modulation (PWM) stage and the power stage are identified. These two blocks are commonly grouped as the modulator. Gc(s) is the compensation network transfer function. It will be discussed in the next section. The modeling of the low−frequency behavior of power switches in square−wave power converters is explained in [1]. The circuit of a buck

modulator is shown in Figure 2 and the model of its power switches is shown in Figure 3. That represents the low frequency equivalent circuit for the buck modulator. The transfer function for the output, Vout with respect to duty ratio, D is:

1 (1ńRo) ) dVout(s) + Vin dD(s) sL ) R ) (1ńRo) ) 1 Resr ) (1ńsC) 1 1 Resr ) (1ńsC)

(eq. 1)

**When Ro >> Resr and Ro >> R, equation (1) can be simplified to:
**

ResrCs ) 1 dVout(s) + VIN (eq. 2) dD(s) LCs2 ) ǒ L ) C(R ) Resr)Ǔs ) 1

Ro

**where the double poles are located at:
**

fp + 1 and 2p ǸLC

(eq. 3)

**the zero is located at:
**

1 fz + 2pResrC

Modulator + − dVout(s) Gc(s) dVc(s) Compensation Network PWM dD(s) Gp(s) (eq. 4)

Figure 1. Feedback Control Loop for Buck Converter

© Semiconductor Components Industries, LLC, 2004

1

April, 2004 − Rev. 0

Publication Order Number: AND8143/D

fc + 1 . Low−Frequency Equivalent Circuit of Buck Modulator. Therefore. 2pR1C1 0 −90 A Type−I compensation network provides a single pole at the origin and the gain rolls off at –20 dB/decade (–1 slope) forever. 6) COMPENSATION NETWORK TYPE Type−I Figure 3. Type−I Compensation Network Schematic Diagram http://onsemi. The transfer function of the compensation network in Figure 5 is: Vout 1 + Vin R1C1s (eq.AND8143/D R1 L Resr + − Vin C R2 Ro the output capacitor introduces a zero. 5) Figure 2. 7) GAIN (dB) GAIN AV −40 dB (−2 Slope) 0 fp PHASE −20 dB (−1 Slope) fz PHASE (DEG) with a crossover frequency. R = DR1 + (1−D) R2 The simplest form of compensation network with single−pole roll off is shown in Figure 5. Buck Modulator Switches Model L where VM is the amplitude of the ramp in the PWM stage. This is called a Type−I compensation network.com 2 . The roll−off continues until the frequency reaches region around fz. For PWM shown in Figure 1. crossing unity gain at the frequency where the reactance of C1 is equal in magnitude to the resistance of R1. C1 −180 Vin R1 − + RBIAS VREF Vout Figure 4. From (2) and (5). At this point the gain curve slope changes to –20 dB/decade (−1 slope) and the phase curve turns back towards –90°. where the ESR (Equivalent Series Resistance) of where RBIAS + VREFR1 Vin−VREF Figure 5. Frequency Response of Buck Modulator Figure 4 shows the frequency response of a typical buck modulator. Type−I compensation network is used for systems where the phase shift of the modulator is minimal. The Type−I compensation network has –270° (−180° phase shift with the inverting compensation network included) of phase shift throughout the –1 slope region. fp will make the gain curve rolls off at –40 dB/decade (−2 slope) and phase curve towards –180°. the PWM stage transfer function is: dD(s) + 1 VM dVc(s) (eq. the DC gain for this stage is simply the input voltage Vin divided by VM. the open loop transfer function for the output Vout with respect to the compensation network control voltage Vc is: dVout(s) VIN ResrCs ) 1 + dVc(s) VM LCs2 ) ǒ L ) C(R ) R Ro R + − Vin + − D*IL + − D*Vin Resr Rc C esr)Ǔs ) 1 (eq. Note that the effect of the complex conjugate poles of L−C.

In this circuit. the network provides a pole at the origin with two zero−pole pairs.com 3 . After f4. A zero−pole pair has been introduced to give a region of frequency where the gain is flat and no phase shift is introduced. 9) (eq. 14) http://onsemi. the magnitude response decreases at a rate of –20 dB/decade (−1 slope). The closed loop compensation crossover should occur in between f2 and f3 for best results. 10) where C2 t t C1 Type−III The compensation network depicted in Figure 9 can give superior transient response. The gain and break frequencies are presented below. Frequency Response of Type−II Compensation Network R2 R1 AV + Type−II (eq. Frequency Response of Type−I Compensation Network Figure 8.AND8143/D GAIN (dB) PHASE (DEG) GAIN (dB) −1 GAIN AV 0 0 −1 −90 −180 −180 PHASE −270 PHASE −270 0 f1 f2 −1 −90 GAIN 0 0 PHASE (DEG) Figure 6. Figure 8 shows the frequency response of the Type−II compensation network. C2 R2 R1 Vin RBIAS − + VREF Vout C1 1 f1 + 2pR2C1 C ) C2 1 f2 + 1 [ 2pR2C1C2 2pR2C2 (eq. 12) 1 f1 + 2pR2C1 1 f2 + 2p(R1 ) R3)C3 (eq. After f2. f1 and f2. It is flat again after f3. The gain becomes constant between the two zero frequencies. Type−II Compensation Network Schematic Diagram R2(R1 ) R3) R1 R3 (eq. 8) The compensation network of Figure 7 offers improved buck converter transient response when the converter is subject to output load changes. This region must be used for loop gain crossover. the effects of second zero cause the gain to increase at +20 dB/decade (+1 slope) until approaching f3. as opposed to the slow response of the Type−I compensation network. The region with constant gain occurs between the break frequencies f1 and f2. 11) where RBIAS + VREFR1 Vin−VREF Figure 7. As shown in Figure 10 shows how the low frequency gain decreases at −20 dB/decade (−1 slope) due to the pole at the origin. 13) (eq. The gains and pole−zero frequencies can be calculated from the following equations: AV1 + AV2 + R2 R1 (eq.

regardless of the type of compensation network used. arrived at by controlling the location of poles and zeros of the feedback compensation networks Bode plot in relation to the loop crossover frequency fc. for Type−I compensation network K is always 1. and (c) Type−III compensation network. For type−II compensation network. in relation to the K factor.AND8143/D C ) C2 f3 + 1 2pR2C1C2 1 f4 + 2pR3C3 C3 C2 R3 R2 R1 Vin RBIAS − + VREF Vout C1 (eq. The K−factor is a measure of the reduction of gain at low frequencies and increase of gain at high frequencies. http://onsemi. 18) −1 −90 −180 PHASE Figure 10. as shown in Figures 11b and 11c. This is due to a total lack of phase boost or corresponding increase or decrease in gain. peak phase boost will occur at the crossover frequency. Since fc is the geometric mean of the zero and pole locations. It is widely known that phase boost due to a zero−pole pair is the inverse tangent of the ratio of the measurement frequency to the zero or pole frequency.com 4 . the zero frequency is placed a factor of K below the loop crossover frequency and the pole frequency a factor of K above. For Type−II and Type−III compensation fc fc fc ǸK ǸK (c) LOG FREQ K Figure 11. Type−III Compensation Network Schematic Diagram LOG GAIN G GAIN (dB) −1 AV2 0 AV1 GAIN +1 −1 0 LOG GAIN G 1 −270 f1 f2 f3 f4 fc K fc Kfc K (b) LOG FREQ TYPE 1 REF K (a) PHASE (DEG) 1 fc LOG FREQ K + tan Ǔ ) 45°ƫ ƪǒqboost 2 K=1 (eq. The Bode plot characteristics of (a) the Type−I compensation network. 17) From this equation it can be shown that: V R where RBIAS + REF 1 Vin−VREF Figure 9. Frequency Response of Type−III Compensation Network LOG GAIN G 1 TYPE 1 REF K K−Factor The K−factor [2] is a simple mathematical tool for defining the shape and characteristics of a transfer function. (b) Type−II compensation network. 15) (eq. the phase boost qboost at frequency fc is given by the equation: qboost + tan −1(K) * tan −1 1 K ǒǓ (eq. 16) networks. The total phase shift then is the sum of all individual zero and pole phase contributions. Figure 11a shows that.

compensation network Type−II when the required boost is less than 90° (a more practical requirement is less than 70°). G is the required compensation network gain at crossover frequency and must be equal to the modulator http://onsemi. Components for Type−I.com 5 . The amount of phase boost required from the zero−pole pair in the compensation network is given by the formula: qboost + M * Pm −90° (eq. but practical considerations have proven that a crossover frequency figure of less than one−fifth of the switching frequency is a good choice. Determine the phase shift.AND8143/D For Type−III compensation network. 22) where: M = desired phase margin (degrees) Pm = modulator phase shift (degrees) Step 5: Choose the compensation network type and determine the K value (using the K−factor approach). Step 4: Calculate the required phase boost and determine the K value (using the K−factor approach). For Type−I. the phase boost qboost at frequency fc is given by the equation: qboost + tan −1ǒǸKǓ * tan −1 1 ǸK ǒ Ǔ loss. K value can be calculated from Equation (18) or (20) for Type−II and Type−III respectively. derive the values using the K−factor approach and Table 1 as described in previous sections. This type of compensation network is used for converter topologies that exhibit a minimal phase shift prior to the anticipated unity gain crossover frequency. please refer to Figure 9. such as buck. Otherwise. K is always equal to 1. practical limitations restrict the range of the crossover frequency. Step 2: Determine the required compensation network gain. Pm and modulator gain. Its load regulation is outstanding due to its very high DC gain. The gain G is the required compensation network gain at the crossover frequency and must equal the modulator loss. with 60° being a good compromise. Type−II and Type−III Compensation Networks Type−I R1 R2 Not Used R3 C1 C2 C3 Not Used 1 2pfcGR1 Type−II User−Selected K2 GR 1 K2−1 Not Used K2−1 1 K 2pfcGR1 1 1 K 2pfcGR1 Not Used ǸK GR1 K−1 R1 K−1 K−1 2pfcGR1 1 2pfcGR1 K−1 1 ǸK 2pfcR1 Type−III Step 3: Choose the desired phase margin (using the K−factor approach). calculate values for the compensation network. so no phase boost is required from the compensation network stage. The crossover frequency is the point where you want the overall loop gain to be unity. This type of compensation network is not commonly used in systems that require rapid transient load respond. The theoretical limit is half of the switching frequency. the better the transient response of the power converter. However. VREFR1 NOTE: RBIAS + Vin * VREF Synthesis of Compensation Networks The basic steps to synthesize a compensation network to stabilize a feedback loop are recommended as follows: Step 1: Choose a crossover frequency and determine the phase shift and gain. For the corresponding schematic. This margin is the amount of phase desired at unity gain. 20) Equations shown in Table 1 provide a convenient way to calculate the component values for each compensation network type discussed in the previous section. If the gain is expressed in dB. Step 6: Calculate component values. Remember that the higher the crossover frequency. Topologies include forward−mode regulators. and compensation network Type−III when the required phase boost is greater than 70° and less than 180°. The phase margin can be adjusted by choosing the unity gain crossover frequency. that is: G + 1ńGm (eq. Table 1. 19) and subsequently. The gain. Type−I compensation network has a relatively poor transient load response time as the unity gain crossover frequency normally occurs at a low frequency. K + tan 2 Ǔ ) 45°ƫ ƪǒqboost 4 (eq. The phase margin should be large enough to provide well−damped transient response and accommodate unforeseen excess phase shift due to all possible variations. the crossover frequency should be high enough to provide good dynamic regulation and low enough to avoid sub−harmonic instability and noise amplification. half−bridge and full−bridge using either voltage or current mode control techniques. SELECTION OF COMPENSATION NETWORK TYPE The Type−I compensation network uses a minimum number of components to achieve necessary phase margin. push−pull. Choose compensation network Type−I when no phase boost is required. Phase margin may have a range of 30° to 90°. As a rule of thumb. then the compensation network gain is simply the negative of the modulator gain. These converters exhibit a relatively low phase shift below the pole contributed by the output filter. Gm at the crossover frequency. Based on Equations (7)−(16). 21) (eq. fc.

2 kW.0 V. In order to improve the transient response characteristic. The schematic of the buck converter compensated with a Type−I compensation network is shown in Figure 5. Type−III compensation network can achieve very fast transient response and may provide more than 70° phase boost. half−bridge and full−bridge topologies using voltage mode control techniques. Another compensation network type should be considered. The high phase margin results in very stable system. First of all.AND8143/D The Type−II compensation network is used for converters that exhibit a single filter pole at low frequency and a maximum phase shift of 90°. R1 = 10 kW and C1 = 100 nF. The Type−III compensation network is intended for converters that exhibit a –40 dB/decade roll−off above the poles of the output filter and a −180° phase lag. With the averaged model proposed by Sam Ben−Yaakov [3]. the frequency response is shown in Figure 13. These converters are the boost.8 mH. Ro = 0. component values are calculated. the loop bandwidth needs to be extended. Like the Type−II compensation network method. This extends the loop bandwidth. Type−III compensation network introduces zeros into the error amplifier to reduce the steep gain slope above the double pole caused by the filter and its associated −180° phase shift. the phase margin is not good enough. however. The closed loop response has 40° of phase margin and the unity gain bandwidth of 19. The transient response is much better then last trial when type−II compensation network is used. the break frequency is 159 Hz as shown in Figure 12.0 MHz vdb(out) Figure 12. but the low bandwidth will result in very slow transient response. the closed loop system has 79° of phase margin. but the unity gain bandwidth is only 1. With RBIAS = 9. L = 1. Closed Loop System of Buck Converter with Type−I Compensation Network http://onsemi.1415 kHz. VREF = 1.0 V and the reference for the error amplifier. we can simulate the open loop transfer function and the whole closed feedback loop system response. From simulation results shown in Figure 12.com 6 .25 W is considered.23 kW. R1 = 2.2 V. buck−boost and the fly−back topologies operating in the discontinuous mode (DCM) of operation. −50 Gain −100 10 Hz close loop 100 Hz vdb(err) 10 kHz vdb(err)−vdb(out) Frequency 1. push−pull. 180d Type I close loop 0d open loop SEL>> −200d vp(err) 50 open loop vp(err)−vp(out) vP(out) Phase A real life buck converter shown in Figure 2 with Vin = 5. the converter with different compensation networks is evaluated. C2 = 165.0 mW and C = 3. With steps suggested in previous sections and equations listed in Table 1 or Equation (7). Forward−mode converters with current−mode control are also included. Resr = 5.5 mF. By adding an additional zero before the first pole.78 kHz. The pole caused by the output filter capacitor and the load resistance occurs at an extremely low frequency. CLOSED FEEDBACK LOOP SYSTEM Close Loop System with Different Types of Compensation Network 0 Type I The buck converter is then compensated with a Type−II compensation network as shown in Figure 7 with R2 = 20 kW. the loop bandwidth can be greatly extended with phase boost and hence the overall transient response time can be greatly improved.8 pF and C1 = 3. the ramp size of the PWM stage is 1. These include the forward−mode converters such as buck. They are commonly used for systems requiring very fast transient respond. Again by simulation.96 nF by placing a zero around the L−C resonant frequency of the buck modulator and a pole around 1/5 switching frequency.

0 MHz vdb(err)−vdb(out) SEL>> Gain 100 Hz vdb(err) SEL>> 1. for most cases.AND8143/D 180d 180d Type II close loop Type III close loop 0d 0d open loop Phase −190d vp(err) 100 vp(out) vp(err)−vp(out) −190d vp(err) vp(out) Phase open loop vp(err)−vp(out) 50 50 Type II 0 close loop open loop Type III 0 close loop open loop 10 kHz vdb(out) Frequency 1. the gain loss of the modulator is obtained from the open loop Bode plot shown in Figure 14.0 W. http://onsemi. The double zero is placed around the resonant frequency of the modulator. Closed Loop System of the Buck Converter with Type−III Compensation Network For the Type−III compensation network shown in Figure 9. the value of R1 can be arbitrary. The closed loop system provides 63.0 MHz vdb(err)−vdb(out) Gain 100 Hz vdb(err) −80 10 Hz 10 kHz vdb(out) Frequency −60 10 Hz Figure 13. Closed Loop System of Buck Converter with Type−II Compensation Network Figure 14. When the output current is large. R3 = 8. The first pole is placed around the ESR zero of the modulator and the second pole is placed around 1/2 of the switching frequency. based on the phase boost requirement. C2 = 10 nF. the converter actually can be designed with all three types of compensation networks. C3 = 100 nF. The moderate phase margin and significantly higher bandwidth provide an excellent trade−off between stability and fast transient response.com 7 . The Type−III compensation network can give the fastest transient response among three types of compensation network. applying the equations in Table 1 and choosing a crossover frequency less than 1/5 of the switching frequency.0 kW.2 k and RBIAS = 2. The major difference is the transient response of the closed loop system. If the output current is small. R1 should not be too small in order to avoid loading effects at Vout. C1 = 6. Component values are calculated as R2 = 20 kW. Then the compensation network gains and break frequencies are calculated.8 nF.48 kHz. R1 = 2. Although the compensation network type is selected.66° of phase margin and unity gain bandwidth of 23. The frequency response of the Type−III compensated buck converter is shown in Figure 14. Choosing the value of R1 depends on the modulator output current.

Figure 15 shows the open loop Bode plot of the converter modulator itself. Results of these simulations are agreed well with the results from PSpice simulation with the averaging model in above−mentioned section. The example in the section. Open Loop Bode Plot of the Buck Converter Figure 18. Figure 17. Closed Loop Bode Plot of the Buck Converter with a Type−II Compensation Network Figure 15. Figures 16.com 8 . Closed Loop Bode Plot of the Buck Converter with a Type−III Compensation Network Figure 16. Closed Loop Bode Plot of the Buck Converter with a Type−I Compensation Network http://onsemi. respectively. is next evaluated using this software.AND8143/D Testing Closed Loop System with Numerical Tool ON Semiconductor has developed software [4] for simulating buck converter behavior with all three types of compensation network reviewed in this paper. 17 and 18 illustrate the closed loop converter response with Type−I. Type−II and Type−III compensation networks. Selection of Compensation Network Type.

1993. [3] Ben−Yaakov. 510−516.” IEEE Applied Power Electronics Conference (APEC. (April. Selection of compensation type requires detailed understanding of the target system. the device designer obviously uses the Type−III compensation network rather than the other two types of compensation network. By using the component values of the Type−III compensation network derived in previous sections. The Type−I compensation network can give good phase margin. Inc. The experimental transient response of this converter with a Type−III compensation network was captured in Figure 19.onsemi.AND8143/D Feedback Loop System with Practical Controller ON Semiconductor provides a series of synchronous buck controller. 1983. “Average Simulation of PWM Converters by Direct Implementation of Behavioral Relationships. In this paper. Channel 1: Current sourced into buck converter. Powercon 10. CA. 2004) “Compensation Calculator Software Tool to aid in Voltage Mode Compensation Circuits. REFERENCES [1] Yim−Shu Lee. 100 mV/div Figure 19. pp. the benefits of the tool are highlighted. H. S. The NCP5210 design includes a high bandwidth amplifier. but bandwidth is usually too low for fast transient systems. The Type−II compensation network can improve the transient response but phase boost is limited to less than 90°.” Marcel Dekker. it should be compensated with a Type−III compensation network. It is well known that type−III compensation network can give very fast transient response and have good phase margin at the same time.com 9 . for the fastest transient response. 1993). [4] Moyer. For systems requiring fast response.” Proc. H1−1 to H1−12. The Type−III compensation network provides fast transient response and sufficient phase margin to ensure system stability. [2] Venable. “The K Factor: A New Mathematical Tool for Stability Analysis and Synthesis. The NCP5210 for computing applications require very fast transient response. Transient Response of the Buck Converter with a Type−III Compensation Network CONCLUSION A closed loop system can be implemented with different types of compensation network. through examples and simulations. an actual circuit was set up. but. pp. The K−factor approach for feedback loop design is introduced. “Computer−Aided Analysis and Design of Switch−Mode Power Supplies. San Diego. This high bandwidth error amplifier can provide fast transient response. Hong Kong. www.” ON Semiconductor. 10 A/div Channel 2: Buck converter output voltage.ZIP http://onsemi. Ole. the theory of compensation and types of compensation networks are explained in detail. Dean. and.com/pub/Collateral/COMPCALC. but at the cost of circuit complexity.

directly or indirectly. Japan 153−0051 Phone: 81−3−5773−3850 ON Semiconductor Website: http://onsemi. intended. Japan Customer Focus Center 2−9−1 Kamimeguro. damages. affiliates.com N. Buyer shall indemnify and hold SCILLC and its officers. All operating parameters. please contact your local Sales Representative. SCILLC is an Equal Opportunity/Affirmative Action Employer. any claim of personal injury or death associated with such unintended or unauthorized use. and expenses. or authorized for use as components in systems intended for surgical implant into the body. including “Typicals” must be validated for each customer application by customer’s technical experts. including without limitation special. employees. SCILLC does not convey any license under its patent rights nor the rights of others. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application. Meguro−ku. SCILLC reserves the right to make changes without further notice to any products herein. or other applications intended to support or sustain life. LLC (SCILLC).com 10 AND8143/D . and specifically disclaims any and all liability. subsidiaries. Denver. SCILLC products are not designed. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P. consequential or incidental damages. Box 5163.com/litorder For additional information. Tokyo. and reasonable attorney fees arising out of.com Order Literature: http://www. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. This literature is subject to all applicable copyright laws and is not for resale in any manner. nor does SCILLC assume any liability arising out of the application or use of any product or circuit. or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. http://onsemi.AND8143/D ON Semiconductor and are registered trademarks of Semiconductor Components Industries. Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi. representation or guarantee regarding the suitability of its products for any particular purpose.onsemi. SCILLC makes no warranty. even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.O. American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor. costs. and distributors harmless against all claims.

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